A multi-channel parallel low-noise information acquisition system

Abstract

This invention relates to the field of data acquisition technology for spaceborne radiation-resistant long-line multi-channel infrared detectors, and more specifically, to a multi-channel parallel low-noise information acquisition system. The system includes: a preamplifier module, which receives multiple detection signals from a long-wave infrared detector, converts the signals, and sends them to an information acquisition module; an information acquisition module, which receives multiple analog signals from the detector, converts the signals, and sends them to an information processing module; and an information processing module, which acquires and outputs image data. The preamplifier module is a rigid-flex board, comprising multi-layer rigid boards and multi-layer flexible boards, wherein the multi-layer rigid boards have complete ground planes, and the multi-layer flexible boards have complete ground planes. This invention obtains a signal output closer to that of a long-wave infrared detector by performing noise simulation on the parasitic parameters of the circuit board, effectively improving the system's signal-to-noise ratio and realizing multi-channel parallel low-noise transmission of long-wave infrared detector signals.

Description

Technical Field

[0001] This invention relates to the field of data acquisition technology for spaceborne radiation-resistant long linear multi-channel infrared detectors, and more specifically, to a multi-channel parallel low-noise information acquisition system. Background Technology

[0002] The core component of a modern infrared imaging system is the focal plane array (FPA), which includes a detector and signal readout circuitry. Information acquisition techniques are generally designed on a channel-by-channel basis, with each channel having its own signal conditioning and acquisition circuitry, or using analog switches to multiplex the signal before A / D quantization.

[0003] With the continuous advancement of electronic science and technology and sensor science and technology, remote sensing technology has developed towards high temporal, high spatial, and high spectral resolution, leading to a rapid expansion in the scale of linear detectors and a geometric increase in the number of output channels.

[0004] For example, a thermal infrared imager uses a long-wave infrared detector that outputs 96 analog signals simultaneously, while the main and backup units for aerospace applications process 192 analog signals.

[0005] Increasing the number of output channels has a significant impact on noise performance.

[0006] Meanwhile, because the input and output signal routing paths of infrared detectors used in aerospace applications are longer than those used in ground-based laboratory tests, the detector signal adapter board and information acquisition circuit box need to be located at a considerable distance from the infrared detector. Aerospace equipment requires primary and backup redundancy for its input and output signals, large-sized radiation-resistant components, and high-power refrigerators for Dewar refrigeration, among other reasons. These factors result in numerous noise sources, making it difficult to meet the technical requirements for information acquisition from infrared detectors. Summary of the Invention

[0007] The purpose of this invention is to provide a multi-channel parallel low-noise information acquisition system to solve the problem of high noise in existing multi-channel parallel low-noise information acquisition systems.

[0008] To achieve the above objectives, this invention proposes a multi-channel parallel low-noise information acquisition system, comprising a preamplifier module, connecting cables, an information acquisition module, and an information processing module:

[0009] The front-end board module is connected to the long-wave infrared detector, receives multiple detection signals from the long-wave infrared detector, and sends the signals to the information acquisition module after signal conversion.

[0010] The connecting cable connects to the front-end board module at one end and to the information acquisition module at the other end.

[0011] The information acquisition module is connected to the information processing module, receives multiple analog signals from the detector, converts the multiple detection signals into signals, and sends them to the information processing module.

[0012] The information processing module collects and outputs image data;

[0013] The front panel module is a rigid-flex board, comprising multiple rigid boards and multiple flexible boards. The multiple rigid boards have complete ground planes, and the multiple flexible boards have complete ground planes.

[0014] In one embodiment, the analog signal connector of the preamplifier module is an unshielded connector;

[0015] The connecting cable is equipped with unshielded connectors at both ends;

[0016] The information acquisition module is equipped with an unshielded connector.

[0017] In one embodiment, the analog signal connectors of the front-amplifier module are routed according to the principle of non-intersection, and the analog signal and ground signal are alternately distributed on the connectors.

[0018] In one embodiment, the preamplifier module leads out the data drive signal through a wire harness to isolate interference.

[0019] In one embodiment, the noise voltage V of the preamplifier module i The corresponding expression is:

[0020] V i =j·2πfC R i u;

[0021]

[0022] Where f is the frequency of the interference signal, C is the distributed capacitance of the two parallel straight wires connected by the analog signal connector, and R... i εr is the signal impedance to ground, εr is the relative permittivity, d is the conductor core diameter of the analog signal connector to the preamplifier module, D is the outer diameter, L is the conductor length of the analog signal connector to the preamplifier module, and u is the interference voltage.

[0023] In one embodiment, the connecting cable is a multi-strand shielded coaxial cable;

[0024] The expression for the capacitance and inductance C per unit length of the coaxial cable is:

[0025]

[0026] Where εr is the relative permittivity, C0 is the speed of light in vacuum, and z0 is;

[0027] The delay parameter Td of the coaxial cable and / or preamplifier module is expressed as follows:

[0028]

[0029] Where L is the length of the system signal transmission line, that is, the length of the coaxial cable / or the signal transmission line of the preamplifier module.

[0030] In one embodiment, the connecting cable includes a temperature control wire;

[0031] The temperature control wire is twisted in two.

[0032] In one embodiment, there are multiple connecting cables, and the nodes of the multiple connecting cables are identical and interchangeable.

[0033] The ground wire and signal wire of the connecting cable are arranged alternately.

[0034] In one embodiment, the information acquisition module includes a main backup isolation unit, a signal conditioning unit, an AD conversion unit, a bias voltage generation unit, a bias voltage relay, and a drive bias voltage signal automatic switching unit.

[0035] The main backup isolation unit receives multiple analog signals from the detector to perform main backup isolation.

[0036] The signal conditioning unit conditions the multiple analog signals from the detector.

[0037] The AD conversion unit performs AD conversion on the multiple analog signals from the detector;

[0038] The bias generation unit provides a low-noise bias voltage to the bias relay;

[0039] The drive signal unit sends drive signals to the front-amplifier module.

[0040] In one embodiment, the primary backup isolation unit actively sends a pulse signal to control the primary backup switching after power-on.

[0041] In one embodiment, the signal conditioning unit is selected from the OP467GS chip;

[0042] The AD conversion unit uses the LTC2325-16 chip.

[0043] In one embodiment, there are multiple LTC2325-16 chips. The LTC2325-16 chips are synchronously acquired and synchronized with signal delay through FPGA. The LTC2325-16 chips share two CLKOUTs as data acquisition edges, with the CLKOUT located in the middle as the input signal pin and the CLKOUT located at the far end as the verification input signal pin.

[0044] In one embodiment, the information acquisition module transmits the drive signal to the baseboard, which is connected to the FPGA of the information processing module via a flexible flat cable design, thus integrating the baseboard and the FPGA digital board.

[0045] The present invention provides a multi-channel parallel low-noise information acquisition system. By performing noise simulation of AC signal characteristics on relevant parasitic parameters of the circuit board, a signal output closer to that of a long-wavelength detector is obtained, which effectively improves the system signal-to-noise ratio and realizes low-noise signal transmission. The optimized noise performance is improved by at least 20%. Attached Figure Description

[0046] The above and other features, properties and advantages of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings and embodiments, in which the same reference numerals always denote the same features, wherein:

[0047] Figure 1 A principle block diagram of a multi-channel parallel low-noise information acquisition system according to an embodiment of the present invention is disclosed;

[0048] Figure 2 A detailed block diagram of a multi-channel parallel low-noise information acquisition system according to an embodiment of the present invention is disclosed.

[0049] Figure 3 A signal arrangement diagram of a wire harness detector according to an embodiment of the present invention is disclosed;

[0050] Figure 4 An impedance matching model diagram of an information acquisition module according to an embodiment of the present invention is disclosed;

[0051] Figure 5 A circuit diagram of the signal conditioning unit of an information acquisition module according to an embodiment of the present invention is disclosed;

[0052] Figure 6 A circuit diagram of the master / slave switching control unit for the automatic switching of the drive bias signal of the information acquisition module according to an embodiment of the present invention is disclosed.

[0053] The meanings of the labels in the figures are as follows:

[0054] 100 Long-wave infrared detector modules;

[0055] Detector 111;

[0056] 112 detectors;

[0057] Detector 113;

[0058] Detector 114

[0059] 121 Dewar connector;

[0060] 210 Preamplifier Module;

[0061] 211 Dewar connector;

[0062] 212 Dewar connector;

[0063] 213 pads;

[0064] 214 pads;

[0065] 215 J14A socket;

[0066] 220 connecting cable;

[0067] 221 drives digital signals;

[0068] 222 Analog signal;

[0069] 223 Analog signal;

[0070] 224 Analog bias and power supply signals;

[0071] 225 J14A plug;

[0072] 226 J14A plug;

[0073] 227 Refrigeration unit power supply cable;

[0074] 230 Information Acquisition Module;

[0075] 231 Primary Backup Isolation Unit;

[0076] 232 Signal Conditioning Unit;

[0077] 233 AD conversion unit;

[0078] 234 bias generation units;

[0079] 235 Bias Relay;

[0080] 236 Automatic switching unit for drive bias signal;

[0081] 237 J14A socket;

[0082] 240 Information Processing Module;

[0083] 241 FPGA;

[0084] 242 digital control signals;

[0085] 243 Power supply signal. Detailed Implementation

[0086] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the invention.

[0087] Multi-channel infrared detectors typically have a large number of output channels. They are usually selected by analog switches for multi-channel time-division acquisition, which can reduce the number of ADC components used. However, this method can lead to channel isolation and noise issues, as well as saturation crosstalk.

[0088] To improve the noise reduction effect during signal acquisition, this invention proposes a multi-channel parallel low-noise information acquisition system for use in a spaceborne remote sensing camera thermal infrared imager.

[0089] Figure 1 and Figure 2 The principle block diagrams of a multi-channel parallel low-noise information acquisition system according to an embodiment of the present invention are disclosed respectively, such as Figure 1 and Figure 2 As shown, the multi-channel parallel low-noise information acquisition system proposed in this invention includes a preamplifier module 210, a connecting cable 220, an information acquisition module 230, and an information processing module 240.

[0090] The front-end board module 210 is connected to the long-wave infrared detector 100, receives multiple detection signals from the long-wave infrared detector 100 and performs signal conversion, and sends the signals to the information acquisition module 230 after optimization of node arrangement through ordinary low-frequency connectors (non-coaxial connectors) with short-distance leads and coaxial cables.

[0091] The connecting cable 220 is a coaxial cable, with one end connected to the front-end board module 210 and the other end connected to the information acquisition module 230;

[0092] The information acquisition module 230 is connected to the information processing module 240. It receives multiple analog signals from the detector, performs data processing based on a quantitative calculation model of crosstalk, mutual inductance interference and signal fluctuations between multiple signals, obtains the optimal solution for noise, and sends the multiple detection signals to the information processing module 240 after signal conversion.

[0093] The information processing module 240 collects and outputs quantized image data.

[0094] In this embodiment, the 96 analog output signals of the long-wave infrared detector 100 are output to four identical information acquisition modules 230 through the preamplifier module 210 and then through multiple shielded coaxial cables for main backup isolation, signal conditioning, and multi-channel serial AD conversion. The quantized image data is then framed and output after being acquired by the FPGA.

[0095] exist Figure 2 In the embodiment shown, the long-wave infrared detector 100 includes four detectors, namely detector 111, detector 112, detector 113 and detector 114.

[0096] The long-wave infrared detector 100 is also equipped with a Dewar connector 121.

[0097] exist Figure 2 In the illustrated embodiment, the front-end board module 210 is a rigid-flex board, comprising multiple rigid boards and multiple flexible boards, wherein the multiple rigid boards have complete ground planes and the multiple flexible boards have complete ground planes. In one embodiment, the front-end board module 210 comprises 8 rigid boards and 4 flexible boards.

[0098] The multilayer rigid board has a complete ground plane, and the multilayer flexible board has a complete ground plane, which shields the noise on both sides of the analog signal. As a result, the key analog signals on the PCB board, including the flexible strip, are all located between the two sets of analog ground planes in the inner layer of the PCB board. The radiation or crosstalk noise is reduced by more than half compared to the noise of a single-layer flexible strip board.

[0099] exist Figure 2 In the illustrated embodiment, the preamplifier module 210 is provided with Dewar connectors 211 and 212. The preamplifier module 210 is provided with pads 213 and 214.

[0100] In this embodiment, since the long-wave infrared detector 100 has 96 channels with 48 detector signals on each of the left and right halves, plus the shielding ground, at least 192 points are needed. Therefore, four J14A-51ZKB connectors are selected to evenly distribute the four sets of detector signals.

[0101] Due to weight and size limitations, the multi-channel analog signals on the preamplifier board module are connected to the input and output signals using multi-core low-frequency connectors such as the J14A series or J30J series instead of SMA coaxial connectors.

[0102] The analog signal connectors for the preamplifier module can be unshielded connectors such as J14A.

[0103] In this embodiment, the analog signal connector of the preamplifier module 210 is a J14A connector, and the crosstalk on the connector is inter-layer interference.

[0104] The front panel module 210 is equipped with a J14A socket 215.

[0105] The J14A connector has a 2mm spacing between each pin, and the pins in the same row are already isolated by ground wires, resulting in low crosstalk noise. The output pins are spaced by one ground pin, with a distance of 2.23mm. The pin diameter is approximately 0.8mm. The non-fully shielded length inside the connector is 42mm. Crosstalk on the connector is mainly inter-layer interference.

[0106] Obtain the conductor core diameter d, outer diameter D, conductor length L, and interference voltage u of the wire from the analog signal connector to the preamplifier module.

[0107] Establish the noise voltage V of the preamplifier module i The corresponding expression is:

[0108] V i =j·2πfC R i u;

[0109]

[0110] Where f is the frequency of the interference signal, C is the distributed capacitance of the two parallel straight wires connected by the analog signal connector, and R... i εr is the signal impedance to ground, and εr is the relative permittivity.

[0111] In one embodiment, the conductor core diameter d = 0.5 mm and outer diameter D = 1 mm of the wire from the J14A connector to the preamplifier module, the signal line spacing is 1.5 mm, the average wire length L of the wire from the analog signal connector to the preamplifier module is 70 mm, the interference voltage u is calculated as 12% (90 mV) of the infrared detector with blind element response before correction for uniformity differences, and the signal-to-ground impedance R... i It is 50Ω.

[0112] The main source of noise in the preamplifier module 210 is crosstalk between analog signals on the J14A connector and the lead wire from the connector to the signal adapter board. In addition, the signal adapter board does not have the space and weight to place a large number of coaxial cables and shielded connectors, so they are led out through a wire harness.

[0113] Figure 3 A signal arrangement diagram of a wire harness detector according to an embodiment of the present invention is disclosed, such as... Figure 3 As shown, the analog signal connectors of the front-amplifier module 210 are routed according to the principle of non-crossing. The order of each signal on the analog connector is changed, and the analog signal and ground signal AGND are alternately distributed on the connector to reduce crosstalk of the analog signal traces. When the image is framed in the subsequent process, the image data of each channel is remapped, thereby greatly reducing the number of vias and the degree of trace crossing, and improving the reliability and performance of the circuit.

[0114] Considering the width and length of the rigid-flex PCB and the risks of multi-layer processes for long flexible strips, in this embodiment, the flexible part of the circuit board in the front-end board module 210 is shortened. The process is changed from flexible strip → signal rigid PCB → long flexible strip to flexible strip → signal rigid PCB → J14A connector. The cable connectors at both ends are connected by coaxial cables, which improves reliability and safety and avoids the risk of short circuits caused by vibration and wear damaging the signal.

[0115] In this embodiment, the preamplifier module 210 leads the data drive signal out of the preamplifier module through a wire harness to isolate interference, and leads it out through the wire harness to save space and weight.

[0116] To mitigate the impact of digital drive signals, interference is isolated by leading the circuit board out through wire harnesses. This way, critical analog signals on the PCB, including the flexible strip, are all located between two sets of analog ground planes on the inner layer of the PCB. Compared to a single-layer flexible strip board, this configuration ensures that radiated or crosstalk noise is reduced by more than half. Combined with more than three times the trace spacing and ground isolation, far-end crosstalk on the inner layer can be reduced to almost zero.

[0117] The connecting cable 220 is a multi-strand shielded coaxial cable.

[0118] The expression for the capacitance and inductance C per unit length of the coaxial cable is:

[0119]

[0120] Where εr is the relative permittivity, C0 is the speed of light in vacuum, and z0 is;

[0121] The delay parameter Td of the coaxial cable and / or preamplifier module is expressed as follows:

[0122]

[0123] Where L is the length of the system signal transmission line, that is, the length of the coaxial cable / or the signal transmission line of the preamplifier module.

[0124] Furthermore, the connecting cable is an aerospace-grade SFF type coaxial cable, which is a multi-strand shielded coaxial cable.

[0125] Furthermore, both ends of the connecting cable are equipped with unshielded connectors such as J14A.

[0126] exist Figure 2 In the embodiment shown, the connecting cable 220 is provided with J14A plug 225 and J14A plug 226 at both ends.

[0127] The connecting cable 220 transmits drive digital signals 221, analog signals 222, analog signals 223, analog bias and power supply signals 224.

[0128] The 221 driving digital signal is a 15-channel driving digital signal;

[0129] Analog signal 222 consists of 24 analog signals Vout1 to 24;

[0130] Analog signal 223 consists of 24 analog signals, with Vout ranging from 25 to 48.

[0131] The analog bias and power supply signals 224 consist of 18 analog bias signals and 6 power supply signals.

[0132] The connecting cable 220 also includes a chiller power supply line 227 and a thermal control temperature control line.

[0133] In this embodiment, the temperature control wire is twisted in pairs to reduce magnetic field interference.

[0134] Both the refrigerator drive cable and the thermal control cable can interfere with the detector's analog signal. Both the refrigerator drive cable and the detector signal line are shielded, and the shielding layers are grounded at both ends. Electric field interference is largely shielded, but magnetic field mutual inductance interference cannot be ignored. The refrigerator's AC power supply frequency is 60Hz. If the refrigerator drive input shielding line is within 0.1 meters of the detector's input / output signal line l, the coupling distance d... s At a distance of approximately 0.15 meters, the average current of the refrigerator in this embodiment is about 4.5A at room temperature, the calculated value of mutual inductance M is 0.072uH, and the calculated value of interference noise from magnetic field mutual inductance is 122uV.

[0135] The shielding of the chiller drive lines and analog signals provides good shielding against electric field interference from high-power chillers. However, the magnetic field interference generated by the untwisted drive lines cannot be ignored by the low-noise information acquisition circuit.

[0136] In some miniaturization projects, the coupling distance d between the refrigerator drive line and the detector signal s The shorter the length, the more noticeable the magnetic field interference.

[0137] In this embodiment, since it is not possible to add shielding wires to each of the numerous temperature-controlled heating wires individually, twisting the temperature-controlled wires into pairs is also a measure to reduce magnetic field interference.

[0138] The information acquisition module 230 includes a main backup isolation unit 231, a signal conditioning unit 232, an AD conversion unit 233, a bias voltage generation unit 234, a bias voltage relay 235, and a drive bias voltage signal automatic switching unit 236.

[0139] The main backup isolation unit 231 is connected to the signal conditioning unit 232. It receives multiple analog signals from the detector and performs main backup isolation. It performs impedance distribution based on a quantization calculation model. The quantization calculation model is used to analyze the relationship between transmission length, transmission medium material, and applicable frequency range, and to evaluate the impact on analog signal sampling points and noise.

[0140] The signal conditioning unit 232 is connected to the AD conversion unit 233 to condition the multiple analog signals from the detector. If the path is long, the increased interference caused by parasitic capacitance and inductance parameters or signal oscillation need to be considered.

[0141] The AD conversion unit 233 performs AD conversion on the multiple analog signals from the detector;

[0142] The bias generation unit 234 provides a low-noise bias voltage to the bias relay 235;

[0143] The automatic switching unit 236 for driving bias signals sends a driving signal 210 to the bias relay 235.

[0144] In this embodiment, there are 4 information acquisition modules 230, each with 24 main and 24 backup channels, 48 ​​channels per board, for a total of 96 channels, and the system outputs 16 bits of AD quantization.

[0145] Figure 4 An impedance matching model diagram of an information acquisition module according to an embodiment of the present invention is disclosed, wherein TD1 is the total delay from the long transmission line to the PCB board, and TD2 and TD3 are the delays of the two branch paths, as shown below. Figure 4 As shown, using a long-wave infrared detector as the excitation source, the detector's internal resistance R is calculated. s .

[0146] As an excitation source, the detector has a certain internal resistance. To achieve accurate impedance matching, it is necessary to calculate the detector's internal resistance.

[0147] Simulation calculations show that the upper limit of the operating frequency for the analog signal master backup method using operational amplifiers is approximately 10 times the total transmission time in the line.

[0148] In this embodiment, the total system transmission time delay is 5.7ns, which corresponds to a 1m long coaxial cable with a relative permittivity of 2.1 and a 0.13m long PCB board with a relative permittivity of 4.4. When the system transmission time is 10 times longer (57ns), the upper limit required for the main backup using an operational amplifier is about 17MHz.

[0149] Using op-amp master-slave isolation requires analog signal sampling after 10 times the transmission delay, which can reduce noise caused by sampling position;

[0150] When routing the cables, the impedance of each branch link can be distributed to be about twice that of a single link.

[0151] Based on simulation and final actual test results, in this embodiment, operational amplifiers are used instead of traditional relays to isolate and cold-back up the analog signal by splitting it into two main and backup circuits. After impedance matching, the noise performance remains unchanged, and the area, volume, and weight of the circuit board are reduced. This has important reference value for the design of multi-channel spaceborne information acquisition.

[0152] The system signal transmission delay parameter Td is the delay parameter of the coaxial cable and / or the preamplifier module.

[0153] Calculate the initial reflected voltage signal V0 for the signal transmission delay of each system.

[0154] To calculate the noise caused by the fluctuations in the detector signal, the initial reflected voltage signal V0 after the signal transmission delay Td of each system is calculated using circuit simulation software.

[0155] Figure 5 A circuit diagram of the signal conditioning unit of an information acquisition module according to an embodiment of the present invention is disclosed, such as... Figure 5 As shown, in this embodiment, the signal conditioning unit 232 uses an operational amplifier chip such as the OP467GS chip to complete the radiation resistance test;

[0156] Based on the simulation software, the parasitic parameters on the PCB board are calculated to obtain the parasitic inductance L1 and parasitic capacitance C1 of the signal conditioning unit 232.

[0157] Numerical simulations were performed on the open-loop gain and output impedance of the operational amplifier to obtain the noise generated by the corresponding high-frequency signal.

[0158] In this embodiment, the signal conditioning unit 232 configures the distributed resistors corresponding to the parasitic inductance L1 and parasitic capacitance C1 as two resistors, the fourth distributed resistor R4 and the fifth distributed resistor R5, and performs optimal resistor matching.

[0159] When the distributed resistors and optimal resistor matching described in this embodiment of the invention are not used, the existing technical solution will have significant in-channel interference and a significant increase in noise. Using the constant DC analysis method, the noise when this part of the resistors is not distributed and not matched will be ignored, resulting in a large difference between the constant DC simulation model and the system noise test values.

[0160] The AD conversion unit 233 uses a 4-channel parallel input ADC chip, such as the LTC2325-16 chip, or a similar ADC chip that has completed radiation resistance testing.

[0161] Long-line multi-channel infrared detectors typically have a large number of output channels. A common approach is to use analog switches for multi-channel time-division sampling, which reduces the total number of ADC components. However, this method introduces channel isolation and noise, leading to issues such as saturation crosstalk and decreased channel transfer function. Channel isolation is limited by the multi-channel analog switch chip used.

[0162] Since there are few serial data output ADCs that meet aerospace-grade requirements, low noise, and 16-bit quantization, this embodiment uses the small-package, low-power ADC chip LTC2325-16 with differential 4-channel, 16-bit serial LVCMOS single-ended output through screening tests such as irradiation selection. This significantly reduces the number of image data signals input to the FPGA pins.

[0163] On the information acquisition module 230, the AD conversion unit 233 designed based on this chip and the main and backup 24-channel signal conditioning unit 232 require 6 ADC chips.

[0164] Typically, each ADC chip requires 7 single-ended input / output control pins (CNV, CLK, CLKOUT, DATAOUT1~4). In this embodiment, through FPGA synchronous acquisition and signal delay synchronization, 24 ADC chips share 2 sampling clocks for data edge acquisition. That is, among the 2 CLKOUT, the CLKOUT with a trace distance around the average value is used as the input signal, and the CLKOUT with the farthest trace distance is used as the verification input signal.

[0165] Therefore, with 96 analog signals, the four information acquisition modules 230 would require 768 control pins if using a single-channel parallel 16-bit ADC chip with 4 pairs of differential control pins. However, this invention uses the LTC2325-16 ADC, with 7 control pins for every 4 channels, and uses a shared CLKOUT, requiring only 146 control pins, thus significantly reducing the number of image data signal input pins to the FPGA.

[0166] In existing technologies, although using differential signals in ADCs can improve anti-interference capabilities, the required number of pins and differential signal requirements need to be doubled, the number of pins in the baseboard connector needs to be doubled, and the number of wiring layers and costs need to be further increased.

[0167] In this embodiment, under the premise of meeting the signal integrity requirements, the number of ADC pins for acquiring multiple 16-bit information is significantly reduced. The number of control pins is reduced from 17 for a single 16-bit parallel ADC chip (68 for 4 channels, 1632 for 96 channels) or 7 for a typical serial design, to only 146 control pins. Specifically, 14 pins are needed for 7 differential pairs for 4 channels, and 336 control pins are needed for 96 channels. 168 control pins are needed for 7 differential pairs for 4 channels.

[0168] The ADC chip has a noise performance of 82dB in differential input mode, with an equivalent input noise of 0.12mV. The average total noise of the multiple channels (96 channels) of the signal conditioning unit 232 and the AD conversion unit 233 can be statistically analyzed in terms of DC level, and the noise can reach 0.193mV. It can be further reduced by optimizing the operational amplifier and the parameters in the circuit.

[0169] Furthermore, the information acquisition module is equipped with an unshielded connector such as J14A.

[0170] In this embodiment, the information acquisition module 230 is provided with a J14A socket 237.

[0171] Because high-reliability application systems such as aerospace systems require primary and backup designs, multi-channel parallel low-noise information acquisition systems generally have multiple bias designs that require primary and backup switching. If the chip pins have a certain voltage in the primary and backup circuits, there is a risk of leakage in the circuit. Therefore, cold backup is implemented on the relay in the circuit.

[0172] The low-noise bias voltage is provided by the bias generation unit 234 of the information acquisition module 230. The bias voltage uses the voltage reference and the op-amp follower output, which is a DC signal. The noise can be further reduced by adjusting the RC parameters and filtering with a large capacitor combination.

[0173] This invention analyzes the detector output structure to identify bias pairs with a differential relationship. The bias generation unit 234 outputs two bias compensation designs through the same voltage reference chip. The resistors are selected with similar temperature drift rates, and the bias voltage difference is controlled to suppress bias fluctuations under temperature changes.

[0174] To balance the low-temperature operating environment of the spaceborne probe with the operating temperature of the probe's power-on experiment at normal ground temperature, the temperature range for the bias voltage stability test was set to -25℃ to 25℃.

[0175] The verification method was as follows: multiple high and low temperature cycle experiments were set up in the experiment, and the difference between the bias voltages VINREF and VDETCOM that require differential input on the circuit board was recorded.

[0176] The bias relay 235 receives a low-noise bias voltage to switch on and off.

[0177] Figure 6 A circuit diagram of the master / slave switching control unit for the automatic switching of the drive bias signal of the information acquisition module according to an embodiment of the present invention is disclosed, such as... Figure 6 As shown, the automatic bias signal switching unit 236 is used to switch the bias signal.

[0178] Since the main and backup bias signals and the main and backup information acquisition circuits need to be synchronized, the bias and power supply switching control signals are designed to switch automatically upon power-on.

[0179] After the FPGA of the digital part of the information acquisition circuit is powered on and loaded, it drives the bias signal automatic switching unit 236 to actively send a high-level pulse to switch the controlled bias relay 235. This controls the Darlington transistor array or transistor and other OC driving devices to automatically switch the circuit to the main circuit or the backup circuit after power-on. This achieves automatic switching between the main and backup circuits by controlling the coil on any type of magnetic latching relay, thus avoiding the problem of chaotic switching between the main and backup circuits in complex information acquisition systems.

[0180] The high-level pulse duration can be 80ms or 100ms. The design achieves the synchronization of the detector bias, power supply and information acquisition circuit on the single board. Multiple information acquisition boards also switch between primary and backup synchronously. The design avoids the problems of inconsistent multiple information acquisition boards or the need for additional instructions. Figure 6 This is a schematic diagram of the automatic relay switching after the FPGA starts working. After signal integrity simulation using simulation software, in this embodiment, the drive signal is transmitted to the baseboard via the information acquisition module 230 and the CPCI connector. The baseboard is connected to the FPGA 241 of the information processing module 240 through a pre-defined rigid-flex board design, achieving integration of the baseboard and the FPGA digital board. This improves signal integrity and facilitates expansion by adding or removing information acquisition circuit boards, adapting to different information acquisition system specifications, and significantly reducing the number and weight of onboard equipment connectors. The signal processing module 240 is equipped with the FPGA 241 and sends digital control signals 242 and power supply signals 243.

[0181] The signal processing module 240 is a combined main and backup module, and the FPGA 241 performs image data framing and output.

[0182] A spaceborne remote sensing camera thermal infrared imager using the multi-channel parallel low-noise information acquisition system provided by this invention performed data acquisition tests on a blackbody source. The linearity of the system within the output range was greater than 99.8%. With an integrating capacitor of 16pF and an integration time of 100µs, the average noise voltage of the multi-channel parallel low-noise information acquisition system was calculated to be 0.461mV, corresponding to a dynamic range of 3251:1 (70.2dB), which meets the system requirements.

[0183] In summary, the multi-channel parallel low-noise information acquisition system proposed in this invention can achieve a high signal-to-noise ratio of up to 96 channels and 192 main and backup channels. The total noise of the information acquisition system connected to the detector system reaches 0.46mV, and the dynamic range reaches 3251:1.

[0184] The present invention provides a multi-channel parallel low-noise information acquisition system, which has the following technical effects:

[0185] 1) J14A series multi-core connectors are used to replace SMA coaxial connectors for connecting input and output signals in cable 220. Through methods such as node layout optimization, the noise crosstalk between multiple channels is reduced.

[0186] 2) The information acquisition hardware of the information acquisition electronics system is modularized and universalized. The cable nodes of multiple connecting cables 220 are exactly the same, avoiding the risks and image abnormalities caused by incorrect insertion of different cables;

[0187] 3) OP467GS and LTC2325-16 chips are selected, and FPGA synchronous acquisition and signal delay synchronization methods are adopted to reduce the number of control pins of the signal conditioning unit of the information acquisition module;

[0188] 4) The drive signal is transmitted to the baseboard through the information acquisition module 230 and CPCI connector. The baseboard is connected to the FPGA241 of the information processing module 240 through a flexible flat cable design, realizing the integration of the baseboard and the FPGA digital board, improving the signal integrity requirements, and also facilitating the expansion and reduction of the number of information acquisition modules.

[0189] As indicated in this application and claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" are not specifically singular and may include plural forms. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of explicitly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

[0190] Those skilled in the art will understand that information, signals, and data can be represented using any of a variety of different techniques and arts. For example, the data, instructions, commands, information, signals, bits, symbols, and chips described throughout the above description can be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, light fields or optical particles, or any combination thereof.

[0191] Those skilled in the art will further appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, the various illustrative components, blocks, modules, circuits, and steps are described above in a generalized manner in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the invention.

[0192] The various illustrative logic modules and circuits described in conjunction with the embodiments disclosed herein may be implemented or performed using a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but in alternatives, it may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors cooperating with a DSP core, or any other such configuration.

[0193] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of both. The software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor such that the processor can read and write information to / from the storage medium. In an alternative, the storage medium may be integrated into the processor. The processor and storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In an alternative, the processor and storage medium may reside as discrete components in the user terminal.

[0194] In one or more exemplary embodiments, the described functionality may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software as a computer program product, the functionality may be stored or transmitted as one or more instructions or code on or through a computer-readable medium. A computer-readable medium includes both computer storage media and communication media, encompassing any medium that facilitates the transfer of a computer program from one location to another. A storage medium may be any available medium accessible to a computer. By way of example and not limitation, such a computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disc storage, disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and is accessible to a computer. Any connection is also legitimately referred to as a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of a medium. As used in this article, disk and disc include compact discs (CDs), laser discs, optical discs, digital multi-purpose discs (DVDs), floppy disks, and Blu-ray discs. Disks typically reproduce data magnetically, while discs reproduce data optically using lasers. Combinations of these should also be included within the scope of computer-readable media.

[0195] The above embodiments are provided for those skilled in the art to implement or use the present invention. Those skilled in the art can make various modifications or changes to the above embodiments without departing from the inventive concept of the present invention. Therefore, the protection scope of the present invention is not limited to the above embodiments, but should be the maximum scope that conforms to the innovative features mentioned in the claims.

Claims

1. A multi-channel parallel low-noise information acquisition system, characterized in that, Includes a front-end module, connecting cables, an information acquisition module, and an information processing module: The front-end board module is connected to the long-wave infrared detector, receives multiple detection signals from the long-wave infrared detector, and sends the signals to the information acquisition module after signal conversion. The connecting cable connects to the front-end board module at one end and to the information acquisition module at the other end. The information acquisition module is connected to the information processing module, receives multiple analog signals from the detector, converts the multiple detection signals into signals, and sends them to the information processing module. The information processing module collects and outputs image data; The front panel module is a rigid-flex board, comprising multiple rigid boards and multiple flexible boards. The multiple rigid boards have complete ground planes, and the multiple flexible boards have complete ground planes. The front-end board module leads out the data drive signal through a wire harness to isolate interference.

2. The multi-channel parallel low-noise information acquisition system according to claim 1, characterized in that: The analog signal connector of the preamplifier module is an unshielded connector; The connecting cable is equipped with unshielded connectors at both ends; The information acquisition module is equipped with an unshielded connector.

3. The multi-channel parallel low-noise information acquisition system according to claim 1, characterized in that, The analog signal connectors of the preamplifier board module are routed according to the principle of non-intersection, and the analog signal and ground signal are alternately distributed on the connectors.

4. The design method for a multi-channel parallel low-noise information acquisition system according to claim 1, characterized in that, The noise voltage V of the front-amplifier module i The corresponding expression is: V i =j·2πfCR i u; Where f is the frequency of the interference signal, C is the distributed capacitance of the two parallel straight wires connected by the analog signal connector, and R... i εr is the signal impedance to ground, εr is the relative permittivity, d is the conductor core diameter of the analog signal connector to the preamplifier module, D is the outer diameter, L is the conductor length of the analog signal connector to the preamplifier module, and u is the interference voltage.

5. The multi-channel parallel low-noise information acquisition system according to claim 1, characterized in that, The connecting cable is a multi-strand shielded coaxial cable; The expression for the capacitance and inductance C per unit length of the coaxial cable is: Where εr is the relative permittivity, C0 is the speed of light in vacuum, and z0 is; The delay parameter Td of the coaxial cable and / or preamplifier module is expressed as follows: Where L is the length of the system signal transmission line, that is, the length of the coaxial cable / or the signal transmission line of the preamplifier module.

6. The multi-channel parallel low-noise information acquisition system according to claim 1, characterized in that, The connecting cable includes a temperature control wire; The temperature control wire is twisted in two.

7. The multi-channel parallel low-noise information acquisition system according to claim 1, characterized in that, The number of connecting cables is multiple, and the nodes of the multiple connecting cables are exactly the same and can be replaced by each other; The ground wire and signal wire of the connecting cable are arranged alternately.

8. The multi-channel parallel low-noise information acquisition system according to claim 1, characterized in that, The information acquisition module includes a main backup isolation unit, a signal conditioning unit, an AD conversion unit, a bias generation unit, a bias relay, and an automatic switching unit for drive bias signals. The main backup isolation unit receives multiple analog signals from the detector to perform main backup isolation. The signal conditioning unit conditions the multiple analog signals from the detector. The AD conversion unit performs AD conversion on the multiple analog signals from the detector; The bias generation unit provides a low-noise bias voltage to the bias relay; The automatic switching unit for the drive bias signal performs primary / backup switching on the bias signal.

9. The multi-channel parallel low-noise information acquisition system according to claim 8, characterized in that, The signal conditioning unit configures the distributed resistors corresponding to the parasitic inductance and parasitic capacitance as two distributed resistors and performs optimal resistor matching.

10. The multi-channel parallel low-noise information acquisition system according to claim 8, characterized in that, The bias generation unit outputs two bias compensations through the same voltage reference chip to suppress bias fluctuations under temperature changes.

11. The multi-channel parallel low-noise information acquisition system according to claim 8, characterized in that, The automatic switching unit for the drive bias signal actively sends pulse signals to control the relay switching after power-on, and automatically performs master-backup switching.

12. The multi-channel parallel low-noise information acquisition system according to claim 8, characterized in that, The signal conditioning unit uses a chip that has completed radiation resistance testing; The AD conversion unit uses a chip that has completed radiation resistance testing.

13. The multi-channel parallel low-noise information acquisition system according to claim 10, characterized in that, The AD conversion unit uses multiple LTC2325-16 chips and is synchronized through FPGA acquisition and signal delay synchronization. The multiple LTC2325-16 chips share two sampling clocks for data edge acquisition. The sampling clock with a trace distance within a certain range of the average value is used as the input signal, and the sampling clock at the farthest trace distance is used as the verification input signal.

14. The multi-channel parallel low-noise information acquisition system according to claim 1, characterized in that, The information acquisition module transmits the drive signal to the base plate, which is connected to the FPGA of the information processing module through a hardware-software integrated board with a preset connection length, thus realizing the integration of the base plate and the FPGA digital board.

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