An image sensing system

Abstract

The present invention provides an image sensing system, which includes: a circuit board that outputs a voltage source and a control signal; a voltage regulating circuit electrically connected to the image sensor, and the voltage regulating circuit includes: a digital-to-analog conversion circuit, the input end of which is electrically connected to the voltage source and the control signal, and the output end obtains a plurality of output voltages according to the control signal; an operational amplifier circuit, the input end of which is electrically connected to the voltage output end of the digital-to-analog conversion circuit, and the output end of the operational amplifier circuit outputs a pixel reference voltage; and an image sensor electrically connected to the output end of the voltage regulating circuit. Through the image sensing system provided by the present invention, precise regulation of the pixel reference voltage of the image sensor can be achieved.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and particularly relates to an image sensing system. Background Art

[0002] When adjusting the voltage, a potentiometer can be used to achieve voltage adjustment. A potentiometer is a type of variable resistor. A potentiometer consists of a potentiometer resistor body and a rotating or sliding system, that is, a moving contact moves on the resistor body to obtain a partial voltage output. A potentiometer is an adjustable electronic component composed of a resistor body and a rotating or sliding system. When a voltage is applied between the two fixed contacts of the resistor body, by changing the position of the contact on the resistor body through the rotating or sliding system, a voltage related to the position of the moving contact can be obtained between the moving contact and the fixed contact. A potentiometer is provided with an operating handle for convenient manual operation.

[0003] However, since the potentiometer is manually controlled by an operating handle and the voltage value is obtained by changing the position of the contact on the resistor body through the rotating or sliding system, it is difficult to accurately adjust, and the potentiometer can only be manually adjusted and cannot be remotely controlled. There are also problems such as mechanical wear, resistance, vibration sensitivity, and wiper contamination on the operating handle of the potentiometer. Moreover, the voltage output by the potentiometer is lower than the theoretical voltage due to voltage fluctuations and voltage drops on the circuit board. Summary of the Invention

[0004] The purpose of the present invention is to provide an image sensing system that can achieve accurate voltage adjustment and remote control.

[0005] To achieve the above purpose, the present invention provides an image sensing system, which at least includes:

[0006] A circuit board that outputs a voltage source and a control signal;

[0007] A voltage regulating circuit electrically connected to the image sensor, and the voltage regulating circuit includes;

[0008] A digital-to-analog conversion circuit, whose input end is electrically connected to the voltage source and the control signal, and whose output end obtains multiple output voltages according to the control signal;

[0009] An operational amplifier circuit, whose input end is electrically connected to the voltage output end of the digital-to-analog conversion circuit,

[0010] The output end of the operational amplifier circuit outputs a pixel reference voltage; and

[0011] An image sensor electrically connected to the output end of the voltage regulating circuit.

[0012] In an embodiment of the present invention, the image sensing system further includes a host computer, and the host computer is electrically connected to the circuit board.

[0013] In an embodiment of the present invention, the digital-to-analog conversion circuit includes a digital-to-analog converter. The digital-to-analog converter inputs an integrated circuit bus control signal, and the output end of the digital-to-analog converter outputs a plurality of output voltages.

[0014] In an embodiment of the present invention, the operational amplifier circuit includes a first type of operational amplifier circuit, and the first type of operational amplifier circuit includes:

[0015] A first operational amplifier, and the non-inverting input end of the first operational amplifier inputs a first output voltage;

[0016] A connection resistor, one end of which is electrically connected to the non-inverting input end of the first operational amplifier;

[0017] Another connection resistor, one end of which is electrically connected to the inverting input end of the first operational amplifier, and the other ends of the two connection resistors are connected to each other; and

[0018] A voltage regulating resistor, one end of which is electrically connected to the inverting input end of the first operational amplifier, and the other end of the voltage regulating resistor is electrically connected to the output end of the first operational amplifier.

[0019] In an embodiment of the present invention, the first type of operational amplifier circuit further includes an output resistor, one end of which is electrically connected to the output end of the first operational amplifier, and the other end outputs a first pixel reference voltage.

[0020] In an embodiment of the present invention, the operational amplifier circuit includes a second type of operational amplifier circuit, and the second type of operational amplifier circuit includes:

[0021] A second operational amplifier, and the non-inverting input end of the second operational amplifier inputs a second output voltage;

[0022] A connection resistor, one end of which is electrically connected to the non-inverting input end of the second operational amplifier;

[0023] Another connection resistor, one end of which is electrically connected to the inverting input end of the second operational amplifier, and the other ends of the two connection resistors are connected to each other; and

[0024] A voltage regulating resistor, one end of which is electrically connected to the inverting input end of the second operational amplifier, and the other end of the voltage regulating resistor is electrically connected to the output end of the second operational amplifier.

[0025] In an embodiment of the present invention, the second type of operational amplifier circuit further includes an output resistor, one end of the output resistor is electrically connected to the output end of the second operational amplifier, and the other end outputs a second pixel reference voltage.

[0026] In an embodiment of the present invention, the operational amplifier circuit includes a third type of operational amplifier circuit, and the third type of operational amplifier circuit includes:

[0027] A third operational amplifier, the inverting input terminal of the third operational amplifier inputs a fifth output voltage;

[0028] A voltage regulating resistor, one end is electrically connected to the fifth output voltage, and the other end is electrically connected to the inverting input terminal of the third operational amplifier; and

[0029] Another voltage regulating resistor, one end is electrically connected to the inverting input terminal of the third operational amplifier, and the other end is electrically connected to the output end of the third operational amplifier.

[0030] In an embodiment of the present invention, the third type of operational amplifier circuit further includes:

[0031] An impedance matching resistor, one end is electrically connected to the fifth output voltage, and the other end is electrically connected to the ground terminal;

[0032] A filtering capacitor, which is connected in parallel with the impedance matching resistor; and

[0033] A balancing resistor, one end is electrically connected to the non-inverting input terminal of the third operational amplifier, and the other end is electrically connected to the ground terminal.

[0034] In an embodiment of the present invention, the third type of operational amplifier circuit further includes an output resistor, one end of the output resistor is electrically connected to the output end of the third type of operational amplifier, and the other end electrically outputs the fifth pixel reference voltage.

[0035] In an embodiment of the present invention, the operational amplifier circuit further includes a fourth type of operational amplifier circuit, and the fourth type of operational amplifier circuit includes:

[0036] A fourth operational amplifier, the inverting input terminal of the fourth operational amplifier inputs a sixth output voltage;

[0037] A voltage regulating resistor, one end is electrically connected to the sixth output voltage, and the other end is electrically connected to the inverting input terminal of the fourth operational amplifier; and

[0038] Another voltage regulating resistor, one end is electrically connected to the inverting input terminal of the fourth operational amplifier, and the other end is electrically connected to the output end of the fourth operational amplifier.

[0039] In an embodiment of the present invention, the fourth type of operational amplifier circuit further includes:

[0040] An impedance matching resistor, one end of which is electrically connected to the sixth output voltage, and the other end is electrically connected to the ground terminal;

[0041] A filter capacitor, which is connected in parallel with the impedance matching resistor; and

[0042] A balancing resistor, one end of which is electrically connected to the non-inverting input terminal of the fourth operational amplifier, and the other end is electrically connected to the ground terminal.

[0043] In an embodiment of the present invention, the fourth type of operational amplifier circuit further includes an output resistor, one end of which is electrically connected to the output terminal of the fourth type of operational amplifier, and the other end outputs the sixth pixel reference voltage.

[0044] In summary, an image sensing system provided by the present invention includes a digital-to-analog conversion circuit and is electrically connected to the digital-to-analog conversion circuit. The digital-to-analog conversion circuit accurately converts the input voltage of the digital-to-analog converter into the required output voltage according to the I2C communication information, so that the required pixel reference voltage can be regulated, and the accuracy of the output voltage can reach 5 mV. And by electrically connecting the digital-to-analog converter to the control circuit and electrically connecting to the upper computer, remote control of the pixel reference voltage can be realized, without the need for manual operation with a handle, and there are no problems such as mechanical wear, resistance, vibration sensitivity, and wiper contamination. The output voltage of the digital-to-analog converter is output as the pixel reference voltage through the voltage amplifier circuit, so that the output of the pixel reference voltage will not be affected by load changes. An image sensing system provided by the present invention can achieve accurate regulation of the pixel reference voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0046] Figure 1 is a structural block diagram of an image sensing system in the present invention.

[0047] Figure 2 is a structural block diagram of a voltage regulating circuit in the present invention.

[0048] Figure 3 is a circuit diagram of a digital-to-analog conversion circuit in the present invention.

[0049] Figure 4 is a circuit diagram of the first operational amplifier circuit and the third operational amplifier circuit in the present invention.

[0050] Figure 5 It is the circuit diagram of the second operational amplifier circuit and the fourth operational amplifier circuit in the present invention.

[0051] Figure 6 It is the circuit diagram of the fifth operational amplifier circuit and the eighth operational amplifier circuit in the present invention.

[0052] Figure 7 It is the circuit diagram of the sixth operational amplifier circuit and the seventh operational amplifier circuit in the present invention. Detailed implementation manners

[0053] For the convenience of understanding the present application, the present application will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present application can be understood more thoroughly and comprehensively.

[0054] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used in the description of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0055] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by terms such as "center", "upper", "lower", "front", "rear", "left", "right", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus cannot be understood as a limitation of the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0056] Please refer to Figure 1As shown in the figure, the present invention provides an image sensing system, which includes an image sensor 10, a circuit board 30 electrically connected to the image sensor 10, and a host computer 40 electrically connected to the circuit board 30. Among them, the image sensor 10 can convert an optical signal into an electrical signal. A control circuit and a power supply circuit are provided on the circuit board 30. The power supply circuit provides power for the image sensor 10 and the control circuit. The control circuit can realize the state regulation of the operation of the graphic sensor, as well as signal storage and transmission, etc. The host computer 40 can realize the remote control of the graphic sensor. Specifically, a network port can be set on the circuit board 30, and a network cable can be used to connect to the host computer 40 through the network port of the circuit board 30, and the software of the host computer 40 can realize remote control through the network cable. The image sensing system described in the present invention can be applied to fields such as industrial inspection, intelligent transportation, machine vision, scientific instruments, and automotive electronics.

[0057] Please refer to Figure 1 As shown in the figure, in an embodiment of the present invention, a photoelectric device, a logic circuit, and an interface circuit are provided inside the image sensor 10. The photoelectric device can convert the optical image on the photosensitive surface into an electrical signal in a proportional relationship with the optical image, and control the working state of the photodiode through the logic circuit inside the image sensor 10, so as to realize the orderly conversion of the optical image into an electrical signal, and transmit it to the circuit board 30 through the interface circuit.

[0058] Please refer to Figure 1 As shown in the figure, in an embodiment of the present invention, the circuit board 30 includes, for example, a power supply circuit and a control circuit. The circuit board 30 is, for example, a Field-Programmable Gate Array (FPGA) main board. A power supply circuit is provided on the circuit board 30. The power supply circuit can be a common switching power supply circuit, which can convert alternating current with a larger voltage into direct current with a smaller voltage for output. The control circuit includes a clock circuit, a storage circuit, a signal conversion circuit, etc., and can convert the electrical signal transmitted by the graphic sensor into an electrical signal of the required type for output. Multiple output interfaces can also be set on the circuit board 30 to realize communication with the host computer 40.

[0059] Please refer to Figure 1 As described above, in an embodiment of the present invention, a voltage regulating circuit 20 provided by the present invention is arranged between the graphic sensor and the circuit board 30, which converts the voltage output by the power supply circuit into the pixel reference voltage required by the image sensor 10, and can realize the precise remote control of multiple paths of pixel reference voltages.

[0060] Please refer to Figure 1As shown in the figure, the voltage regulation circuit 20 provided by the present invention includes a digital-to-analog conversion circuit and multiple operational amplifier circuits. The digital-to-analog conversion circuit is electrically connected to the circuit board 30, and is electrically connected to the voltage source and control signal output by the circuit board 30. The digital-to-analog conversion circuit can output voltage sources with multiple different voltages. The operational amplifier circuit is electrically connected to the voltage output terminal OUT of the digital-to-analog conversion circuit and outputs the required voltage. In the present invention, the number of digital-to-analog conversion circuits and the number of operational amplifier circuits can be set according to the number of pixel reference voltages required by the image sensor 10. In an embodiment of the present invention, the image sensor 10 requires, for example, 8 channels of pixel reference voltages, and the required pixel reference voltages of the image sensor 10 are specifically shown in Table 1, including the first pixel reference voltage GRSTH, the second pixel reference voltage TXH, the second pixel reference voltage RSH, the fourth pixel reference voltage VDDCH, the fifth pixel reference voltage GRSTL, the sixth pixel reference voltage TXL, the seventh pixel reference voltage RSL, and the eighth pixel reference voltage VDDCL.

[0061] Table 1 Pixel reference voltages required by the image sensor

[0062] Power supply parameters <![CDATA[V min (V)]]> <![CDATA[V NOM (V)]]> <![CDATA[V max (V)]]> Current (mA) GRSTH 3.95 4.1 4.25 220 GRSTL -0.45 -0.5 -0.55 220 RSH 3.95 4.1 4.25 8 RSL -0.85 -0.9 -0.95 8 VDDCH 3.15 3.3 3.45 25 VDDCL -0.65 -0.7 -0.75 25 TXH 3.45 3.6 3.75 400 TXL -1.25 -1.3 -0.35 400

[0063] Please refer to Figure 2 As shown in the figure, in an embodiment of the present invention, to ensure the stability of each channel of pixel reference voltage in the image sensor 10, there is provided, for example, 1 eight-channel digital-to-analog conversion circuit and, for example, 8 operational amplifier circuits. In other embodiments, there may also be provided, for example, 2 four-channel digital-to-analog conversion circuits and, for example, 8 operational amplifier circuits. When the number of reference voltages required by the image sensor 10 is different, the number of digital-to-analog conversion circuits and the number of operational amplifier circuits can be flexibly adjusted, and the present invention does not make specific limitations on this.

[0064] Please refer to Figures 1 to 7 As shown in the figure, in an embodiment of the present invention, the digital-to-analog conversion circuit includes a 12-bit high-precision eight-channel, two-wire interface digital-to-analog converter U1, which can realize the transmission of I2C control signals through the Inter-Integrated Circuit (I2C) interface to control the voltage output of each channel. The operational amplifier circuit selects a dual-channel, high-output current channel operational amplifier, and the maximum output current of the operational amplifier is, for example, 500 mA. In a specific embodiment of the present invention, the model of the digital-to-analog converter U1 is, for example, selected as DAC7678SRGET, and the model of the operational amplifier is, for example, selected as OPA2677IDDA.

[0065] Please refer to Figure 3As shown, in an embodiment of the present invention, the second pin of the power supply pin of the digital-to-analog converter U1 is electrically connected to the voltage output terminal OUT of the power supply circuit, and the power supply circuit provides a supply voltage VCC_DAC of, for example, 5V for the digital-to-analog conversion circuit. A magnetic bead and a capacitor are provided between the second pin and the circuit board 30. Specifically, it includes a first magnetic bead L1, a first capacitor C1, and a second capacitor C2. One end of the first magnetic bead L1 is electrically connected to the voltage output terminal OUT of the power supply circuit, and the other end is electrically connected to the second pin. The first magnetic bead L1 can be selected as BLM21PG121SN1D. By setting the first magnetic bead L1, high-frequency noise and pulse interference can be suppressed. One end of the first capacitor C1 and the second capacitor C2 is electrically connected to the second pin, and the other end is electrically connected to the ground terminal AGND. The capacitance value of the first capacitor C1 is, for example, 22uF, and the capacitance value of the second capacitor C2 is, for example, 0.1uF. By setting the first capacitor C1 and the second capacitor C2, high-frequency noise and interference can be filtered out.

[0066] Please refer to Figure 3 As shown, in an embodiment of the present invention, the nineteenth pin and the twentieth pin of the digital-to-analog converter U1 are I2C communication pins, and the nineteenth pin and the twentieth pin are electrically connected to the control circuit, and the control circuit can realize controlling the magnitude of the output voltage through the I2C communication pins. In this embodiment, the third pin, the fourth pin, the fifth pin, the sixth pin, the thirteenth pin, the fourteenth pin, the fifteenth pin, and the sixteenth pin of the digital-to-analog conversion circuit are output voltage pins, and the range of the output voltage is 0V to 5V.

[0067] Please refer to Figure 3 As shown, in an embodiment of the present invention, according to the characteristics of the digital-to-analog conversion circuit, the eighth pin of the digital-to-analog converter U1 is connected to the ground terminal AGND through a third capacitor C3, and the capacitance value of the third capacitor C3 is, for example, 0.1uF. The tenth pin, the eleventh pin, and the twelfth pin of the digital-to-analog converter U1 are electrically connected to the supply voltage VCC_DAC output by the power supply circuit, and the twenty-fifth pin, the ninth pin, the twenty-first pin, the twenty-seventh pin, and the twenty-second pin of the digital-to-analog converter U1 are all electrically connected to the ground terminal AGND. The first pin, the seventh pin, the eighteenth pin, the twenty-third pin, and the twenty-fourth pin of the digital-to-analog converter U1 are left floating.

[0068] Please refer to Figures 2 to 3As shown, in an embodiment of the present invention, the voltage regulating circuit 20 includes, for example, 8 operational amplifier circuits, namely, the first operational amplifier circuit 201, the second operational amplifier circuit 202, the third operational amplifier circuit 203, the fourth operational amplifier circuit 204, the fifth operational amplifier circuit 205, the sixth operational amplifier circuit 206, the seventh operational amplifier circuit 207, and the eighth operational amplifier circuit 208. Among them, the first operational amplifier circuit 201 is electrically connected to the first output voltage GRSTH_1, the second operational amplifier circuit 202 is electrically connected to the second output voltage THX_1, the third operational amplifier circuit 203 is electrically connected to the third output voltage RSH_1, the fourth operational amplifier circuit 204 is electrically connected to the fourth output voltage VDDCH_1, the fifth operational amplifier circuit 205 is electrically connected to the fifth output voltage GRSTL_1, the sixth operational amplifier circuit 206 is electrically connected to the sixth output voltage TXL_1, the seventh operational amplifier circuit 207 is electrically connected to the seventh output voltage RSL_1, and the eighth operational amplifier circuit 208 is electrically connected to the eighth output voltage VDDCL_1.

[0069] Please refer to Figure 2 and Figure 4 As shown, in an embodiment of the present invention, the first operational amplifier circuit 201 and the third operational amplifier circuit 203 are the same and are of the first type of operational amplifier circuit. Here, the first operational amplifier circuit 201 is taken as an example for illustration. The first operational amplifier circuit 201 includes a first operational amplifier U11, and the specification of the first operational amplifier U11 can be selected according to the value of the first output voltage GRSTH_1. In this embodiment, the model of the first operational amplifier U11 selected is, for example, OPA2677IDDA.

[0070] Please refer to Figure 4As shown, in an embodiment of the present invention, the first output voltage GRSTH_1 is electrically connected to the non-inverting input terminal +InA of the first operational amplifier U11, and a fourth capacitor C4 is also electrically connected between the non-inverting input terminal +InA and the ground terminal AGND of the first operational amplifier U11. The fourth capacitor C4 is a filtering capacitor, which can filter the first output voltage GRSTH_1. The capacitance value of the fourth capacitor C4 is, for example, 0.1 uF. Two connecting resistors, namely a first resistor R1 and a second resistor R2, are connected in series between the non-inverting input terminal +InA and the inverting input terminal -InA of the first operational amplifier U11, and the common connection terminal of the first resistor R1 and the second resistor R2 is electrically connected to the ground terminal AGND. A voltage regulating resistor, that is, a third resistor R3, is electrically connected between the inverting input terminal -InA and the output terminal OUT of the first operational amplifier U11. Among them, the resistance values of the first resistor R1 and the second resistor R2 are equal, for example, 49.9 Ω. This makes the non-inverting input terminal +InA and the inverting input terminal -InA form a virtual short, and the voltages of the non-inverting input terminal +InA and the inverting input terminal -InA are equal. And according to the working principle of the operational amplifier, it can be known that at this time, the first operational amplifier U11 is a non-inverting amplifier, and the relationship between the first pixel reference voltage GRSTH output by the first operational amplifier U11 and the first output voltage GRSTH_1 input to the first operational amplifier U11 is:

[0071] The first pixel reference voltage = the first output voltage × (1 + R3 / R2).

[0072] In this embodiment, the resistance value of the third resistor R3 is 0, so the first pixel reference voltage GRSTH at the output terminal OUT is equal to the first output voltage GRSTH_1 at the non-inverting input terminal +InA. By outputting the first pixel reference voltage GRSTH through the first operational amplifier U11, the influence of the load on the signal source is reduced, and the signal's ability to drive the load is improved. An output resistor, that is, a fourth resistor R4, is also electrically connected to the output terminal OUT of the first operational amplifier U11. The output resistor makes the load exhibit capacitive characteristics, which not only stabilizes the circuit output but also prevents the output terminal OUT from being short-circuited and damaging the first operational amplifier U11. The resistance value of the fourth resistor R4 is, for example, 33 Ω.

[0073] Please refer to Figure 4As shown, in an embodiment of the present invention, the positive voltage input terminal +VS and the negative voltage input terminal -VS of the first operational amplifier U11 are electrically connected to a power supply circuit. The power supply circuit provides a positive-phase voltage of, for example, +4.5V to the in-phase input terminal +InA and a negative-phase voltage of, for example, -4.5V to the negative voltage input terminal -VS. A second bead L2, a fifth capacitor C5, and a sixth capacitor C6 are connected to the positive voltage input terminal +VS. The second bead L2 is connected in series between the positive voltage input terminal +VS and the output terminal of the power supply circuit, which can suppress high-frequency noise and pulse interference. One end of the fifth capacitor C5 and the sixth capacitor C6 is electrically connected to the positive voltage input terminal +VS, and the other end is electrically connected to the ground terminal AGND, which can further filter out high-frequency noise and pulse interference. A third bead L3, a seventh capacitor C7, and an eighth capacitor C8 are connected to the negative voltage input terminal -VS. The third bead L3 is connected in series between the negative voltage input terminal -VS and the output terminal of the power supply circuit, which can suppress high-frequency noise and pulse interference. One end of the seventh capacitor C7 and the eighth capacitor C8 is electrically connected to the negative voltage input terminal -VS, and the other end is electrically connected to the ground terminal AGND, which can further filter out high-frequency noise and pulse interference. In this embodiment, the second bead L2, the third bead L3 have the same model as the first bead L1, and the capacitance values of the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7, and the eighth capacitor C8 are, for example, 0.1uF.

[0074] Please refer to Figure 2 and Figure 5 As shown, in an embodiment of the present invention, the second operational amplifier circuit 202 and the fourth operational amplifier circuit 204 are set the same and are of the second type of operational amplifier circuit. Here, the second operational amplifier circuit 202 is taken as an example for description. The second operational amplifier circuit 202 includes a second operational amplifier U12, and the specification of the second operational amplifier U12 can be selected according to the value of the second output voltage THX_1. In this embodiment, the model selected for the second operational amplifier U12 is, for example, OPA2677IDDA.

[0075] Please refer to Figure 3 and Figure 5As shown, in an embodiment of the present invention, the second output voltage THX_1 is electrically connected to the non-inverting input terminal +InA of the second operational amplifier U12, and a ninth capacitor C9 is also electrically connected between the input terminal and the ground terminal AGND of the second operational amplifier U12. The ninth capacitor C9 is a filtering capacitor that can filter the second output voltage THX_1. The capacitance value of the ninth capacitor C9 is, for example, 0.1 uF. Two connecting resistors, namely a fifth resistor R5 and a sixth resistor R6, are connected in series between the non-inverting input terminal +InA and the inverting input terminal -InA of the second operational amplifier U12, and the common connection terminal of the fifth resistor R5 and the sixth resistor R6 is electrically connected to the ground terminal AGND. A voltage regulating resistor, that is, a seventh resistor R7, is electrically connected between the inverting input terminal -InA and the output terminal OUT of the second operational amplifier U12. Among them, the resistance values of the fifth resistor R5 and the sixth resistor R6 are equal, for example, 49.9 Ω, so that the non-inverting input terminal +InA and the inverting input terminal -InA form a virtual short, and the voltages of the non-inverting input terminal +InA and the inverting input terminal -InA are equal. According to the working principle of the operational amplifier, it can be known that at this time, the second operational amplifier U12 is a non-inverting amplifier, and the relationship between the second pixel reference voltage THX output by the second operational amplifier U12 and the second output voltage THX_1 input to the second operational amplifier U2 is:

[0076] Second pixel reference voltage = Second output voltage × (1 + R7 / R6).

[0077] In this embodiment, the resistance value of the seventh resistor R7 is 0, so the second pixel reference voltage TXH at the output terminal OUT is equal to the second output voltage THX_1 at the non-inverting input terminal +InA. By outputting the second pixel reference voltage TXH through the second operational amplifier U12, the influence of the load on the signal source is reduced, and the signal's ability to drive the load is improved. An output resistor, that is, an eighth resistor R8, is also electrically connected to the output terminal OUT of the second operational amplifier U12. The output resistor makes the load exhibit capacitive characteristics, which not only stabilizes the circuit output but also prevents the output terminal OUT from being short-circuited and damaging the second operational amplifier U12. The resistance value of the eighth resistor R8 is, for example, 33 Ω.

[0078] Please refer to Figure 2 and Figure 6 As shown, in an embodiment of the present invention, the fifth operational amplifier circuit 205 and the seventh operational amplifier circuit 207 are set the same and are of the third type of operational amplifier circuit. Here, the fifth operational amplifier circuit 205 is taken as an example for illustration. The fifth operational amplifier circuit 205 includes a third operational amplifier U13, and the specification of the third operational amplifier U13 can be selected according to the value of the fifth output voltage GRSTL_1. In this embodiment, the model selected for the third operational amplifier U13 is, for example, OPA2677IDDA.

[0079] Please refer toFigure 6 As shown, in an embodiment of the present invention, the fifth output voltage GRSTL_1 is electrically connected to the inverting input terminal -InA of the third operational amplifier U13, and a tenth capacitor C10 is also electrically connected between the input terminal and the ground terminal AGND of the third operational amplifier U13. The tenth capacitor C10 is a filtering capacitor and can filter the fifth output voltage GRSTL_1. The capacitance value of the tenth capacitor C10 is, for example, 0.1 uF. A ninth resistor R9 and a tenth resistor R10 are connected to the inverting input terminal -InA of the third operational amplifier U13; two voltage regulating resistors, the ninth resistor R9 is electrically connected between the fifth output voltage GRSTL_1 and the inverting input terminal -InA, and the tenth resistor R10 is electrically connected between the inverting input terminal -InA and the output terminal OUT. According to the working principle of the operational amplifier, it can be known that the third operational amplifier U13 is an inverting amplifier at this time. At this time, the third operational amplifier U13 is a non-inverting amplifier, and the relationship between the fifth pixel reference voltage GRSTL output by the third operational amplifier U13 and the fifth output voltage GRSTL_1 input to the third operational amplifier U13 is:

[0080] Fifth pixel reference voltage = - Fifth output voltage × (-R10 / R9).

[0081] In this embodiment, the resistance values of the ninth resistor R9 and the tenth resistor R10 are equal, for example, 1 KΩ. Therefore, the voltages of the inverting input terminal -InA and the output terminal OUT are equal and in opposite directions. At the inverting input terminal -InA of the third operational amplifier U13, an eleventh resistor R11 is connected in parallel with the tenth capacitor C10 to achieve impedance matching. A balancing resistor, that is, a twelfth resistor R12, is provided at the non-inverting input terminal +InA of the third operational amplifier. One end of the twelfth resistor R12 is electrically connected to the non-inverting input terminal +InA, and the other end is electrically connected to the ground terminal AGND, so that the voltages of the non-inverting input terminal +InA and the inverting input terminal -InA of the third operational amplifier U13 are balanced and voltage failure will not occur. An output resistor, that is, a thirteenth resistor R13, is also electrically connected to the output terminal OUT of the third operational amplifier U13. The output resistor makes the load capacitive, which not only stabilizes the circuit output but also prevents the output terminal OUT from being short-circuited and damaging the third operational amplifier U13. In this embodiment, the resistance value of the eleventh resistor R11 is, for example, 52.3 Ω, the resistance value of the twelfth resistor R12 is, for example, 510 Ω, and the resistance value of the thirteenth resistor R13 is, for example, 33 Ω.

[0082] Please refer to Figure 6As shown, in an embodiment of the present invention, the positive voltage input terminal +VS and the negative voltage input terminal -VS of the third operational amplifier U13 are electrically connected to a power supply circuit. The power supply circuit provides a positive-phase voltage of, for example, +4.5V to the in-phase input terminal +InA and a negative-phase voltage of, for example, -4.5V to the negative-phase voltage input terminal -VS. A fourth magnetic bead L4, an eleventh capacitor C11, and a twelfth capacitor C12 are connected to the positive voltage input terminal +VS. The fourth magnetic bead L4 is connected in series between the positive voltage input terminal +VS and the output terminal of the power supply circuit, which can suppress high-frequency noise and pulse interference. One end of the eleventh capacitor C11 and the twelfth capacitor C12 is electrically connected to the positive voltage input terminal +VS, and the other end is electrically connected to the ground terminal AGND, which can further filter out high-frequency noise and pulse interference. A fifth magnetic bead L5, a thirteenth capacitor C13, and a fourteenth capacitor C14 are connected to the negative voltage input terminal -VS. The fifth magnetic bead L5 is connected in series between the negative voltage input terminal -VS and the output terminal of the power supply circuit, which can suppress high-frequency noise and pulse interference. One end of the thirteenth capacitor C13 and the fourteenth capacitor C14 is electrically connected to the negative voltage input terminal -VS, and the other end is electrically connected to the ground terminal AGND, which can further filter out high-frequency noise and pulse interference. In this embodiment, the fourth magnetic bead L4 and the fifth magnetic bead L5 have the same model as the first magnetic bead L1, and the capacitance values of the eleventh capacitor C11, the twelfth capacitor C12, the thirteenth capacitor C13, and the fourteenth capacitor C14 are, for example, 0.1uF.

[0083] Please refer to Figure 2 and Figure 7 As shown, in an embodiment of the present invention, the sixth operational amplifier circuit 206 and the eighth operational amplifier circuit 208 are set the same and are of the fourth type of operational amplifier circuit. Here, the sixth operational amplifier circuit 206 is taken as an example for description. The sixth operational amplifier circuit 206 includes a fourth operational amplifier U14, and the specification of the fourth operational amplifier U14 can be selected according to the value of the sixth output voltage TXL_1. In this embodiment, the model selected for the fourth operational amplifier U14 is, for example, OPA2677IDDA.

[0084] Please refer to Figure 7As shown, in an embodiment of the present invention, the sixth output voltage TXL_1 is electrically connected to the inverting input terminal -InA of the fourth operational amplifier U14, and a fifteenth capacitor C15 is also electrically connected between the input terminal and the ground terminal AGND of the fourth operational amplifier U14. The fifteenth capacitor C15 is a filtering capacitor that can filter the sixth output voltage TXL_1. The capacitance value of the fifteenth capacitor C15 is, for example, 0.1 uF. Two voltage regulating resistors, namely the fourteenth resistor R14 and the fifteenth resistor R15, are connected to the inverting input terminal -InA of the fourth operational amplifier U14. The fourteenth resistor R14 is electrically connected between the sixth output voltage TXL_1 and the inverting input terminal -InA, and the fifteenth resistor R15 is electrically connected between the inverting input terminal -InA and the output terminal OUT. According to the working principle of the operational amplifier, the fourth operational amplifier U14 is an inverting amplifier at this time. The relationship between the sixth pixel reference voltage TXL output by the fourth operational amplifier U14 and the sixth output voltage TXL_1 input to the fourth operational amplifier U14 is:

[0085] Sixth pixel reference voltage = -Sixth output voltage × (-R15 / R14).

[0086] In this embodiment, the resistance values of the fourteenth resistor R14 and the fifteenth resistor R15 are equal, for example, 1 KΩ. Therefore, the voltages at the inverting input terminal -InA and the output terminal OUT are equal and opposite in direction. A sixteenth resistor R16 is connected in parallel with the fifteenth capacitor C15 at the inverting input terminal -InA of the fourth operational amplifier U14 to achieve impedance matching. A balancing resistor, namely the seventeenth resistor R17, is provided at the non-inverting input terminal +InA of the third operational amplifier. One end of the seventeenth resistor R17 is electrically connected to the non-inverting input terminal +InA, and the other end is electrically connected to the ground terminal AGND, so that the voltages at the non-inverting input terminal +InA and the inverting input terminal -InA of the fourth operational amplifier U14 are balanced and voltage failure will not occur. An output resistor, namely the eighteenth resistor R18, is also electrically connected to the output terminal OUT of the fourth operational amplifier U14. The output resistor makes the load capacitive, which not only stabilizes the circuit output but also prevents the output terminal OUT from being short-circuited and damaging the fourth operational amplifier U14. In this embodiment, the resistance value of the sixteenth resistor R16 is, for example, 52.3 Ω, the resistance value of the seventeenth resistor R17 is, for example, 510 Ω, and the resistance value of the eighteenth resistor R18 is, for example, 33 Ω.

[0087] In summary, the voltage regulating circuit provided by the present invention is applied in an image sensor system. The voltage regulating circuit includes an image sensing circuit and a plurality of voltage amplification circuits electrically connected to the voltage output terminal of the graphic sensing circuit. By controlling the voltage output value of the digital-to-analog converter in the I2C communication control digital-to-analog conversion circuit, precise control and remote regulation of the pixel reference voltage are achieved. After obtaining the output voltage, an operational amplifier circuit is provided after each output voltage to output the pixel reference voltage.

[0088] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of this specification. These embodiments are selected and specifically described in this specification to better explain the principle and practical application of the present invention, so that those skilled in the art can well understand and utilize the present invention. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. An image sensing system, characterized in that, Comprising: A circuit board, an output voltage source, and a control signal; A voltage regulating circuit electrically connected to an image sensor, and the voltage regulating circuit includes: A digital-to-analog conversion circuit, the input end of which is electrically connected to the voltage source and the control signal, and the output end obtains a plurality of output voltages according to the control signal; A plurality of operational amplifier circuits, the input end of each operational amplifier circuit is electrically connected to a voltage output end of the digital-to-analog conversion circuit, and the output end of the operational amplifier circuit outputs a pixel reference voltage; and An image sensor electrically connected to the output end of the voltage regulating circuit.

2. An image sensing system according to claim 1, characterized in that, The image sensing system further includes a host computer, and the host computer is electrically connected to the circuit board.

3. An image sensing system according to claim 1, characterized in that, The digital-to-analog conversion circuit includes a digital-to-analog converter, the digital-to-analog converter inputs an integrated circuit bus control signal, and the output end of the digital-to-analog converter outputs a plurality of output voltages.

4. An image sensing system according to claim 1, wherein, The operational amplifier circuit includes a first type of operational amplifier circuit, and the first type of operational amplifier circuit includes: A first operational amplifier, the non-inverting input end of the first operational amplifier inputs a first output voltage; A connecting resistor, one end of which is electrically connected to the non-inverting input end of the first operational amplifier; Another connecting resistor, one end of which is electrically connected to the inverting input end of the first operational amplifier, and the other ends of the two connecting resistors are connected to each other; and A voltage regulating resistor, one end of which is electrically connected to the inverting input end of the first operational amplifier, and the other end of the voltage regulating resistor is electrically connected to the output end of the first operational amplifier.

5. An image sensing system according to claim 4, characterized in that, The first type of operational amplifier circuit further includes an output resistor, one end of the output resistor is electrically connected to the output end of the first operational amplifier, and the other end outputs a first pixel reference voltage.

6. An image sensing system according to claim 1, wherein, The operational amplifier circuit includes a second type of operational amplifier circuit, and the second type of operational amplifier circuit includes: A second operational amplifier, the non-inverting input end of the second operational amplifier inputs a second output voltage; A connecting resistor, one end of which is electrically connected to the non-inverting input end of the second operational amplifier; Another connecting resistor, one end of which is electrically connected to the inverting input end of the second operational amplifier, and the other ends of the two connecting resistors are connected to each other; and A voltage regulating resistor, one end of which is electrically connected to the inverting input end of the second operational amplifier, and the other end of the voltage regulating resistor is electrically connected to the output end of the second operational amplifier.

7. An image sensing system according to claim 6, wherein The second type of operational amplifier circuit further includes an output resistor, one end of the output resistor is electrically connected to the output end of the second operational amplifier, and the other end outputs a second pixel reference voltage.

8. An image sensing system according to claim 1, characterized in that, The operational amplifier circuit includes a third type of operational amplifier circuit, and the third type of operational amplifier circuit includes: A third operational amplifier, the inverting input end of the third operational amplifier inputs a fifth output voltage; A voltage regulating resistor, one end of which is electrically connected to the fifth output voltage, and the other end is electrically connected to the inverting input end of the third operational amplifier; and Another voltage regulating resistor, one end of which is electrically connected to the inverting input end of the third operational amplifier, and the other end is electrically connected to the output end of the third operational amplifier.

9. An image sensing system according to claim 8, characterized in that, The third type of operational amplifier circuit further includes: An impedance matching resistor, one end of which is electrically connected to the fifth output voltage and the other end of which is electrically connected to the ground terminal; A filtering capacitor, which is connected in parallel with the impedance matching resistor; and A balancing resistor, one end of which is electrically connected to the non-inverting input terminal of the third operational amplifier and the other end of which is electrically connected to the ground terminal.

10. An image sensing system according to claim 8, wherein, The third type of operational amplifier circuit further includes an output resistor, one end of which is electrically connected to the output terminal of the third type of operational amplifier and the other end of which electrically outputs a fifth pixel reference voltage.

11. An image sensing system according to claim 1, characterized in that, The operational amplifier circuit further includes a fourth type of operational amplifier circuit, and the fourth type of operational amplifier circuit includes: A fourth operational amplifier, with a sixth output voltage input to the inverting input terminal of the fourth operational amplifier; A voltage regulating resistor, one end of which is electrically connected to the sixth output voltage and the other end of which is electrically connected to the inverting input terminal of the fourth operational amplifier; and Another voltage regulating resistor, one end of which is electrically connected to the inverting input terminal of the fourth operational amplifier and the other end of which is electrically connected to the output terminal of the fourth operational amplifier.

12. An image sensing system according to claim 11, characterized in that, The fourth type of operational amplifier circuit further includes: An impedance matching resistor, one end of which is electrically connected to the sixth output voltage and the other end of which is electrically connected to the ground terminal; A filtering capacitor, which is connected in parallel with the impedance matching resistor; and A balancing resistor, one end of which is electrically connected to the non-inverting input terminal of the fourth operational amplifier and the other end of which is electrically connected to the ground terminal.

13. An image sensing system according to claim 11, wherein, The fourth type of operational amplifier circuit further includes an output resistor, one end of which is electrically connected to the output terminal of the fourth type of operational amplifier and the other end of which electrically outputs a sixth pixel reference voltage.

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