Display panel, repairing method thereof and display device

Abstract

Embodiments of the present application provide a display panel, a repairing method thereof and a display device. The display panel comprises a first display area and a first arrangement area. The first display area comprises a plurality of pixel rows arranged in a first direction in sequence, each pixel row comprises a plurality of sub-pixels arranged in a second direction in sequence, each sub-pixel comprises a first pixel circuit and a light emitting element. The display panel comprises a target voltage signal line, the target voltage signal line is electrically connected with the sub-pixels in the first display area, and is used to provide a target voltage signal. The first arrangement area comprises a plurality of second pixel circuits arranged in the first direction in sequence, a target second pixel circuit is electrically connected with a first node on the target voltage signal line, and the first node is located in the first display area. The target second pixel circuit is electrically connected with the light emitting element of the target sub-pixel, and is used to provide a driving signal for the light emitting element of the target sub-pixel. Embodiments of the present application can reduce the brightness difference between the repaired sub-pixel and other surrounding sub-pixels.

Description

Technical Field

[0001] This application belongs to the field of display technology, and in particular relates to a display panel and its repair method, and a display device. Background Technology

[0002] When a subpixel in a display panel is defective, the defective subpixel may always emit light or never emit light. A defective subpixel that always emits light or never emits light can be identified by the user as a bright spot or a dark spot, respectively. To eliminate bright spots or dark spots, the defective subpixel can be repaired using a backup subpixel circuit.

[0003] However, the inventors of this application have found that the brightness difference between the repaired sub-pixel and other surrounding sub-pixels is large in the related technologies, resulting in poor repair effect. Summary of the Invention

[0004] This application provides a display panel and its repair method and display device, which can effectively repair defective sub-pixels and reduce the brightness difference between the repaired sub-pixels and other surrounding sub-pixels.

[0005] In a first aspect, embodiments of this application provide a display panel, which includes a first display area and a first arrangement area located on at least one side of the first display area; the first display area includes a plurality of pixel rows arranged sequentially along a first direction, and a pixel row includes a plurality of sub-pixels arranged sequentially along a second direction, each sub-pixel including a first pixel circuit and a light-emitting element electrically connected to the first pixel circuit, the first direction intersecting the second direction; the display panel includes a target voltage signal line, which is electrically connected to the sub-pixels in the first display area to provide a target voltage signal; the first arrangement area includes a plurality of second pixel circuits arranged sequentially along the first direction, a target second pixel circuit among the plurality of second pixel circuits being electrically connected to a first node on the target voltage signal line, the first node being located in the first display area; the target second pixel circuit is electrically connected to the light-emitting element of the target sub-pixel among the plurality of sub-pixels to provide a driving signal to the light-emitting element of the target sub-pixel.

[0006] Secondly, embodiments of this application provide a method for repairing a display panel. The method includes: establishing a first functional relationship of voltage drop between a connection node and a target second pixel circuit; establishing a second functional relationship of voltage drop between a target sub-pixel and a connection node; determining a target correspondence between a first interval and a second interval based on the first and second functional relationships; the first interval being the number of sub-pixels between a connection node and a target sub-pixel along a first direction, and the second interval being the number of sub-pixels between a target sub-pixel and a target second pixel circuit along a second direction; obtaining the second interval, and determining the first interval based on the second interval and the target correspondence; determining the position of a first node based on the target sub-pixel and the first interval; and electrically connecting the target second pixel circuit to the first node on the target voltage signal line.

[0007] Thirdly, embodiments of this application provide a method for repairing a display panel. The method includes: obtaining the number of sub-pixels m-1 between a target second pixel circuit and a target sub-pixel along a second direction, and the number of sub-pixels M in a pixel row; when m≤M / 2, determining the region where the first node is located on the second target pixel row where the m / 2th sub-pixel is located; wherein the m / 2th sub-pixel is separated from the target second pixel circuit by (m / 2)-1 sub-pixels along the second direction; and electrically connecting the target second pixel circuit to the first node on the target voltage signal line.

[0008] Fourthly, embodiments of this application provide a display device, which includes a display panel as provided in the first aspect.

[0009] The display panel and its repair method and display device of this application embodiment are used to repair the target sub-pixel by electrically connecting the target second pixel circuit located in the first arrangement area to the light-emitting element of the target sub-pixel in the first display area. By electrically connecting the target second pixel circuit to the first node located in the first display area on the target voltage signal line, that is, by using the target voltage signal line located in the first display area to provide a target voltage signal to the target second pixel circuit, the voltage difference between the target voltage signal input to the target second pixel circuit and the target voltage signal input to the surrounding sub-pixels can be reduced, thereby making the brightness of the repaired target sub-pixel similar to that of other surrounding sub-pixels, improving the display effect and repair effect of the display panel. Attached Figure Description

[0010] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1This is a circuit diagram of a display panel;

[0012] Figure 2 A circuit diagram of a display panel provided in an embodiment of this application;

[0013] Figure 3 Another circuit diagram of the display panel provided in the embodiments of this application;

[0014] Figure 4 Another circuit diagram of a display panel provided in an embodiment of this application;

[0015] Figure 5 Another circuit diagram of a display panel provided in an embodiment of this application;

[0016] Figure 6 Another circuit diagram of a display panel provided in an embodiment of this application;

[0017] Figure 7 Another circuit diagram of a display panel provided in an embodiment of this application;

[0018] Figure 8 Another circuit diagram of a display panel provided in an embodiment of this application;

[0019] Figure 9 Another circuit diagram of a display panel provided in an embodiment of this application;

[0020] Figure 10 Another circuit diagram of a display panel provided in an embodiment of this application;

[0021] Figure 11 Another circuit diagram of a display panel provided in an embodiment of this application;

[0022] Figure 12 A schematic flowchart illustrating a method for repairing a display panel provided in an embodiment of this application;

[0023] Figure 13 A schematic flowchart illustrating a method for repairing a display panel provided in an embodiment of this application;

[0024] Figure 14 This is a schematic diagram of a display device provided in an embodiment of this application. Detailed Implementation

[0025] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.

[0026] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0027] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0028] In the embodiments of this application, the term "electrical connection" can refer to a direct electrical connection between two components, or it can refer to an electrical connection between two components via one or more other components.

[0029] In the embodiments of this application, the first node is defined only for the convenience of describing the circuit structure, and the first node is not an actual circuit unit.

[0030] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this application can be combined with each other without contradiction.

[0031] Before describing the technical solutions provided in the embodiments of this application, in order to facilitate understanding of the embodiments of this application, this application first specifically explains the problems existing in the related technologies:

[0032] As mentioned above, the inventors of this application have discovered that the related technologies have the problem that the brightness difference between the repaired sub-pixel and other surrounding sub-pixels is large, resulting in poor repair effect.

[0033] In order to solve the above-mentioned technical problems, the inventors of this application first studied and analyzed the root causes of the above-mentioned technical problems. The specific research and analysis process is as follows:

[0034] Figure 1 This is a circuit diagram of a display panel. For example... Figure 1 As shown, the display panel includes a display area AA and a non-display area NA located on at least one side of the display area AA. The display area AA is provided with a plurality of sub-pixels, each sub-pixel may include a first pixel circuit 01' and a light-emitting element 02' electrically connected to the first pixel circuit 01'. The non-display area NA is provided with a second pixel circuit 03', which serves as a backup pixel circuit and can be used to replace the first pixel circuit 01' in driving the light-emitting element 02' when the first pixel circuit 01' fails, thereby repairing the defective sub-pixel.

[0035] The inventors of this application discovered that in related technologies, defective target sub-pixels typically provide target voltage signals to target voltage signal lines located in display area AA. Since the target voltage signal lines in display area AA need to drive a large number of sub-pixels, the voltage drop of the target voltage signal corresponding to the target sub-pixel is significant. Second pixel circuit 03' typically provides target voltage signals to target voltage signal lines located at the edge of the display panel (such as non-display area NA). Since the target voltage signal lines in non-display area NA only need to drive a few second pixel circuits 03', the voltage drop of the target voltage signal corresponding to the second pixel circuit 03' is smaller. This results in a large voltage difference between the target voltage signal input to the second pixel circuit 03' and the target voltage signals input to the surrounding sub-pixels of the target sub-pixel, leading to a significant brightness difference between the repaired target sub-pixel and its surrounding sub-pixels, resulting in a poor repair effect.

[0036] See also Figure 1 For example, taking the target voltage signal line as the power supply voltage signal line PVDD, the display area AA includes p rows of sub-pixels arranged sequentially along the column direction Y'. Each row of sub-pixels can include multiple sub-pixels arranged sequentially along the row direction X', where p is an integer greater than 1. The power supply voltage signal line PVDD extends along the column direction Y' and is located in both the display area AA and the non-display area NA. For example, when the target sub-pixel is located in... Figure 1 When the target sub-pixel is located in the middle area of ​​the display area AA or far from the IC terminal, the PVDD voltage drop at the target sub-pixel is equal to the voltage drop generated by all sub-pixels from row 1 to row (m-1). However, the PVDD power supply signal line located in the non-display area NA only needs to drive one second pixel circuit 03'. Therefore, the PVDD voltage drop at this second pixel circuit 03' is only the voltage drop generated by one sub-pixel, which is significantly less than the voltage drop of the sub-pixels surrounding or near the target sub-pixel. Consequently, the brightness of the repaired target sub-pixel is significantly greater than the brightness of other surrounding sub-pixels.

[0037] See also Figure 1 For example, taking the target voltage signal line as the reference voltage signal line Vref, the reference voltage signal line Vref extends along the row direction X' and connects from the non-display area NA to the display area AA. Therefore, the reference voltage signal line Vref will first be electrically connected to the second pixel circuit 03', resulting in a smaller voltage drop of the reference voltage signal corresponding to the second pixel circuit 03'. However, when the target sub-pixel is located... Figure 1 When the target sub-pixel is in the middle area of ​​the display area AA shown, the reference voltage signal line Vref will be electrically connected to the target sub-pixel through multiple sub-pixels. Then, the voltage drop of the reference voltage signal corresponding to the target sub-pixel will be significantly greater than the voltage drop of the reference voltage signal corresponding to the second pixel circuit 03'. This results in a large voltage difference between the reference voltage signal input to the second pixel circuit 03' and the reference voltage signal input to the surrounding sub-pixels of the target sub-pixel, and a large difference in the degree of reset. Consequently, the brightness difference between the repaired target sub-pixel and other surrounding sub-pixels is large.

[0038] In view of the inventors’ above-mentioned research findings, the embodiments of this application provide a display panel and its repair method and display device, which can solve the technical problem in the related art that the brightness difference between the repaired sub-pixel and other surrounding sub-pixels is large and the repair effect is poor.

[0039] The technical concept of this application embodiment is as follows: the target second pixel circuit located in the first arrangement area is electrically connected to the light-emitting element of the target sub-pixel in the first display area for repairing the target sub-pixel. By electrically connecting the target second pixel circuit to the first node on the target voltage signal line located in the first display area, that is, by using the target voltage signal line located in the first display area to provide a target voltage signal to the target second pixel circuit, the voltage difference between the target voltage signal input to the target second pixel circuit and the target voltage signal input to the surrounding sub-pixels can be reduced, thereby making the brightness of the repaired target sub-pixel similar to that of other surrounding sub-pixels, improving the display effect and repair effect of the display panel.

[0040] The display panel provided in the embodiments of this application will be described first below.

[0041] Figure 2 This is a circuit diagram of a display panel provided in an embodiment of this application. Figure 2 As shown, the display panel 20 provided in this embodiment may include a first display area A1 and a first arrangement area A2 located on at least one side of the first display area A1. The first arrangement area A2 may be either a non-display area or a display area. That is, the first arrangement area A2 may or may not have light-emitting elements, and this embodiment does not limit this.

[0042] The first display area A1 includes a plurality of pixel rows arranged sequentially along a first direction Y. Each pixel row includes a plurality of sub-pixels PX arranged sequentially along a second direction X. The first direction Y intersects with the second direction X. For example, the first direction Y may be the column direction of the display panel, and the second direction X may be the row direction of the display panel. Sub-pixels PX may include a first pixel circuit 01 and a light-emitting element 02 electrically connected to the first pixel circuit 01. For example, the light-emitting element 02 includes, but is not limited to, an organic light-emitting diode (OLED).

[0043] The display panel 20 may include a target voltage signal line 210, which is electrically connected to a sub-pixel PX in the first display area A1 to provide a target voltage signal. For example, in conjunction with... Figure 1 As shown, the target voltage signal line 210 includes, but is not limited to, the power supply voltage signal line PVDD, the reference voltage signal line Vref, or other voltage signal lines. The power supply voltage signal line PVDD can be used to provide a positive voltage signal, such as a +3.5V voltage signal. The reference voltage signal line Vref can be used to provide a reference voltage signal, which is generally a negative voltage signal, used to reset the target node (such as the gate of a driving transistor or the anode of a light-emitting element).

[0044] The first arrangement area A2 includes a plurality of second pixel circuits 03 arranged sequentially along the first direction Y. A target second pixel circuit 03a among the plurality of second pixel circuits 03 can be electrically connected to the light-emitting element 02 of the target sub-pixel PX1 among the plurality of sub-pixels PX, and is used to provide a driving signal to the light-emitting element 02 of the target sub-pixel PX1. It should be noted that there is a one-to-one correspondence between the target second pixel circuit 03a and the target sub-pixel PX1. For example, when there are n faulty target sub-pixels PX1 among the plurality of sub-pixels PX, there are also n target second pixel circuits 03a, and the n target second pixel circuits 03a are electrically connected to the n faulty target sub-pixels PX1 in a one-to-one correspondence, where n ≥ 1 and is an integer.

[0045] In this embodiment, the target second pixel circuit 03a is electrically connected to a first node N1 on the target voltage signal line 210, and the first node N1 may be located in the first display area A1. That is, the target second pixel circuit 03a may be electrically connected to the target voltage signal line 210 located in the first display area A1, and the target voltage signal line 210 located in the first display area A1 provides a target voltage signal to the target second pixel circuit 03a.

[0046] It should be noted that when the display panel 20 includes multiple target second pixel circuits 03a, the multiple target second pixel circuits 03a can be connected to different first nodes N1, but they can also be connected to the same first node N1. This application embodiment does not limit this. For ease of understanding and explanation, the following description uses a single target second pixel circuit 03a as an example.

[0047] The display panel provided in this application embodiment electrically connects the target second pixel circuit 03a to the first node N1 on the target voltage signal line 210 located in the first display area A1. That is, the target voltage signal line 210 located in the first display area A1 is used to provide the target second pixel circuit 03a with a target voltage signal, instead of using the target voltage signal line 210 located at the edge of the display panel 20 to provide the target second pixel circuit 03a with a target voltage signal. This can reduce the voltage difference between the target voltage signal input to the target second pixel circuit 03a and the target voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1, thereby making the brightness of the repaired target sub-pixel PX1 similar to that of other surrounding sub-pixels, improving the display effect and repair effect of the display panel.

[0048] To ensure a good repair effect on the display panel, the inventors of this application considered that the connection point (i.e., the first node N1) between the target second pixel circuit 03a and the target voltage signal line 210 should not be too far from the target sub-pixel PX1. That is, the target voltage signal line 210 near the target sub-pixel PX1 is used to provide the target voltage signal to the target second pixel circuit 03a, thereby further reducing the voltage difference between the target voltage signal input to the target second pixel circuit 03a and the target voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1, so that the brightness of the repaired target sub-pixel PX1 is similar to that of other surrounding sub-pixels.

[0049] See also Figure 2According to some embodiments of this application, optionally, along a direction parallel to the plane where the display panel 20 is located, the minimum distance L1 between the first node N1 and the target sub-pixel PX1 is less than half the length L or width W of the first display area A1, i.e., L1 < L / 2 or L1 < W / 2. Here, the length L is the distance of the first display area A1 along the first direction Y, and the width W is the distance of the first display area A1 along the second direction X. It should be noted that the length L of the first display area A1 approximates the length of the display panel 20, and the width W of the first display area A1 approximates the width of the display panel 20. Therefore, in practical applications, the length L of the first display area A1 can be understood as the length of the display panel 20, and the width W of the first display area A1 can be understood as the width of the display panel 20.

[0050] In this way, the target voltage signal is provided to the target second pixel circuit 03a by the target voltage signal line 210 which is close to the target sub-pixel PX1, thereby further reducing the voltage difference between the target voltage signal input to the target second pixel circuit 03a and the target voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1, so that the brightness of the repaired target sub-pixel PX1 is similar to that of other surrounding sub-pixels.

[0051] See also Figure 2 According to some embodiments of this application, optionally, a plurality of second pixel circuits 03 in the display panel 20 can correspond one-to-one with a plurality of pixel rows in the display panel 20. Taking a display panel including a first arrangement area A2 as an example, if there are p pixel rows in the display panel 20, then there can be p second pixel circuits 03 in the first arrangement area A2. The p second pixel circuits 03 are arranged sequentially along the first direction Y in the first arrangement area A2, and each second pixel circuit 03 can be located at one end of the corresponding pixel row, where p is an integer greater than 1. The target second pixel circuit 03a can be a second pixel circuit 03 located in the same row as the target sub-pixel PX1. That is, the target sub-pixel PX1 is repaired using the second pixel circuit 03 closest to the target sub-pixel PX1.

[0052] This can simplify the wiring between the target second pixel circuit 03a and the target sub-pixel PX1, reduce the wiring length between the target second pixel circuit 03a and the target sub-pixel PX1, and save production costs.

[0053] For ease of understanding, the following description uses either the target voltage signal line 210 as the power supply voltage signal line PVDD or the reference voltage signal line Vref as examples to illustrate the display panel of this application embodiment.

[0054] Figure 3 Another circuit diagram of the display panel provided in an embodiment of this application. For example... Figure 3As shown, according to some embodiments of this application, optionally, the target voltage signal line 210 may include a power supply voltage signal line PVDD, and the power supply voltage signal line PVDD may include multiple sub-power supply voltage signal lines PVDD1 to PVDD that extend along the first direction Y and are spaced apart along the second direction X. n Each sub-power supply voltage signal line PVDD i It can be electrically connected to n1 sub-pixels arranged along the first direction Y, where n1 is an integer greater than 1. The sub-power supply voltage signal line PVDD... i PVDD1~PVDD n Any one of the sub-power supply voltage signal lines in the system.

[0055] The display panel 20 may further include a bonding area A3, which may include multiple pads (not shown in the figure) that can be electrically connected to a driver chip. Along the first direction Y, the first node N1 may be located on the side of the target sub-pixel PX1 near the bonding area A3.

[0056] The advantage of this setting is that: Figure 3 As shown, if the power supply voltage signal line PVDD at the target sub-pixel PX1 is directly connected to the target second pixel circuit 03a via the connecting line s1, the voltage of the power supply voltage signal input to the target second pixel circuit 03a will be lower than the voltage of the power supply voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1 due to the voltage drop of the connecting line s1. This results in the brightness of the repaired target sub-pixel PX1 being lower than the brightness of its surrounding sub-pixels, leading to dark spots. Therefore, it is necessary to ensure that the voltage of the power supply voltage signal at the first node N1 is higher than the voltage of the power supply voltage signal at the target sub-pixel PX1. This is to better ensure that the brightness of the repaired target sub-pixel PX1 is similar to the brightness of its surrounding sub-pixels. Along the first direction Y, the closer to the binding area A3, the higher the voltage of the power supply voltage signal line PVDD is generally. Therefore, when the first node N1 is located on the side of the target sub-pixel PX1 close to the binding area A3, it can be ensured that the voltage of the power supply voltage signal at the first node N1 is higher than the voltage of the power supply voltage signal at the target sub-pixel PX1. This ensures that the voltage of the power supply voltage signal input to the target second pixel circuit 03a is similar to the voltage of the power supply voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1, and further ensures that the brightness of the repaired target sub-pixel PX1 is similar to the brightness of the surrounding sub-pixels of the target sub-pixel PX1.

[0057] In order to accurately find the best access point (first node N1) and ensure that the brightness of the repaired target sub-pixel PX1 is the same as the brightness of the surrounding sub-pixels of the target sub-pixel PX1 as much as possible, this application embodiment also provides a method for determining the first node N1.

[0058] Figure 4 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 4 As shown, according to some embodiments of this application, optionally, assuming that along the second direction X, the target second pixel circuit 03a is separated from the target sub-pixel PX1 by m-1 sub-pixels, that is, separated by m-1 columns of sub-pixels, where m is an integer greater than 1. Assuming that along the first direction Y, the first node N1 is separated from the target sub-pixel PX1 by b sub-pixels, that is, separated by b pixel rows, where b is a positive integer. Then, the voltage drop on path ① between the first node N1 and the target second pixel circuit 03a is (m+b) volts, that is, the sum of the voltage drop of the horizontal routing section a1 and the voltage drop of the vertical routing section a2. The voltage drop on path ② between the first node N1 and the target sub-pixel PX1 is the sum of the voltage drops of b pixel rows, specifically (1+2+3+…+b-1)=b*(b-1) / 2 volts. The access point corresponding to the voltage drop on path ① being equal to the voltage drop on path ② is the preferred access point, that is, let m+b=b*(b-1) / 2. When the target sub-pixel PX1 is located in the center area of ​​the display panel, m and b are usually large. Therefore, the above formula can be approximated as m = b. 2 / 2, that is

[0059] Therefore, when m > 1, if the first node N1 along the first direction Y is separated from the target sub-pixel PX1... By using a row of pixels, it can be largely ensured that the brightness of the repaired target sub-pixel PX1 is the same as the brightness of the surrounding sub-pixels. It should be noted that when m=1, the power supply voltage signal line at the target sub-pixel PX1 can be directly electrically connected to the target second pixel circuit 03a in the same row.

[0060] In some embodiments, optionally, a deviation error x can be set, and the first node N1 and the target sub-pixel PX1 along the first direction Y can be separated by N pixel rows, where N = b ± x. x ≤ 20 and is a positive integer.

[0061] In this way, by accurately finding the best access point, it can be ensured that the brightness of the repaired target sub-pixel PX1 is the same as the brightness of the surrounding sub-pixels of the target sub-pixel PX1, thus greatly improving the repair effect.

[0062] Figure 5 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 5 As shown, according to some embodiments of this application, optionally, the display panel 20 may further include a plurality of first auxiliary lines 510 extending along the second direction X and spaced apart along the first direction Y, wherein the plurality of first auxiliary lines 510 may correspond one-to-one with a plurality of pixel rows.

[0063] The display panel 20 may also include a second auxiliary line 520 located in the first arrangement area A2. The second auxiliary line 520 extends along the first direction Y and is electrically connected to a plurality of first auxiliary lines 510 and a plurality of second pixel circuits 03.

[0064] Along the first direction Y, the first node N1 can be separated from the target sub-pixel PX1 by N pixel rows, where N is a positive integer. The pixel row located on the side of the target sub-pixel PX1 closer to the binding area and separated from the target sub-pixel PX1 by N pixel rows is the first target pixel row MPX1. The first node N1 can be electrically connected to the target second pixel circuit 03a through the first auxiliary line 510 and the second auxiliary line 520 corresponding to the first target pixel row MPX1.

[0065] In this way, multiple second pixel circuits 03 only need to be connected to the same second auxiliary line 520 to achieve the repair of target sub-pixel PX1 at any position, which helps to reduce the wiring in the display panel and reduce production costs.

[0066] Figure 6 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 6 As shown, according to some embodiments of this application, optionally, the target sub-pixel PX1 may include multiple sub-target sub-pixels px1', the first node N1 includes multiple sub-nodes N1', the target second pixel circuit 03a includes multiple sub-target second pixel circuits 03a', and the multiple sub-target second pixel circuits 03a', the multiple sub-target sub-pixels px1' and the multiple sub-nodes N1' correspond one-to-one with each other.

[0067] The second auxiliary line 520 may include multiple routing segments 520a that are disconnected from each other. Different sub-target second pixel circuits 03a' correspond to different routing segments 520a. Each sub-target second pixel circuit 03a' can be electrically connected to the corresponding sub-node N1' through the corresponding routing segment 520a and the first auxiliary line 510.

[0068] In this way, when there are multiple sub-target sub-pixels px1' to be repaired on the display panel, by breaking the second auxiliary line 520 and dividing it into multiple trace segments 520a, it can be ensured that a sub-node N1' is electrically connected to only one sub-target second pixel circuit 03a'. This ensures that the voltage of the power supply signal input to the sub-target second pixel circuit 03a' is close to the voltage of the power supply signal input to the surrounding sub-pixels of the corresponding sub-target sub-pixel px1', guaranteeing that the brightness of the repaired sub-target sub-pixel px1' is the same as the brightness of its surrounding sub-pixels, thus improving both the display and repair effects.

[0069] Figure 7 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 7 As shown, according to some embodiments of this application, optionally, the target voltage signal line 210 may include a reference voltage signal line Vref, which may include multiple sub-reference voltage signal lines vref1 to vrefp extending along the second direction X and spaced apart along the first direction Y, where p is an integer greater than 1. Each sub-reference voltage signal line vreffi may be electrically connected to multiple sub-pixels PX in the pixel row. The sub-reference voltage signal line vreffi is any one of vref1 to vrefp.

[0070] The display panel 20 may further include a first repair line 710, which may include multiple sub-first repair lines 710a extending along the second direction X and spaced apart along the first direction Y. Each sub-first repair line 710a corresponds one-to-one with multiple sub-reference voltage signal lines vref1 to vrefp. The pixel row where the target sub-pixel PX1 is located is the second target pixel row MPX2. The target second pixel circuit 03a can be electrically connected to a first node N1 on the sub-reference voltage signal line vref1 corresponding to the second target pixel row MPX2 via the sub-first repair line 710a corresponding to the second target pixel row MPX2. The first node N1 is located between the target sub-pixel PX1 and the target second pixel circuit 03a along the second direction X.

[0071] like Figure 7 In the direction indicated by the middle arrow, the reference voltage signal first travels from the edge of the display panel 20 through the sub-reference voltage signal line vrefi corresponding to the second target pixel row MPX2 to the first node N1, and then returns to the target second pixel circuit 03a via the sub-first repair line 710a corresponding to the second target pixel row MPX2. To prevent the reference voltage signal from being transmitted to the sub-first repair line 710a on the side of the first node N1 away from the target second pixel circuit 03a (such as the left side of the first node N1), the electrical connection between the sub-first repair line 710a on the side of the first node N1 away from the target second pixel circuit 03a and the first node N1 can be disconnected.

[0072] The voltage drop of the reference voltage signal corresponding to the target second pixel circuit 03a is the sum of the voltage drops of path ③ and path ④, while the voltage drop of the reference voltage signal at the target sub-pixel PX1 is the voltage drop of path ⑤. Since the first node N1 is located between the target sub-pixel PX1 and the target second pixel circuit 03a along the second direction X, the sum of the voltage drops of path ③ and path ④ is close to the voltage drop of path ⑤. Therefore, the voltage of the reference voltage signal input to the target second pixel circuit 03a is close to the voltage of the reference voltage signals input to the surrounding sub-pixels of the target sub-pixel PX1, thereby further making the brightness of the repaired target sub-pixel PX1 similar to that of other surrounding sub-pixels.

[0073] Figure 8 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 8 As shown, according to some embodiments of this application, optionally, along the second direction X, the distance between the target sub-pixel PX1 and the first node N1 is a first distance L1', and the distance between the target second pixel circuit 03a and the first node N1 is a second distance L2'. The difference between the first distance L1' and the second distance L2' can be less than the width of one sub-pixel. The width of the sub-pixel can be the distance of the sub-pixel along the second direction X.

[0074] In this way, the sum of the voltage drop of path ③ and the voltage drop of path ④ can be made much closer to the voltage drop of path ⑤. Therefore, the voltage of the reference voltage signal input to the target second pixel circuit 03a can be made as close as possible to the voltage of the reference voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1, thereby making the brightness of the repaired target sub-pixel PX1 much closer to that of the surrounding sub-pixels.

[0075] See also Figure 8 In some specific embodiments, optionally, along the second direction X, the target second pixel circuit 03a is separated from the target sub-pixel PX1 by m-1 sub-pixels, that is, separated by m-1 columns of sub-pixels, where m is an integer greater than 1. When m ≤ M / 2, M is the number of sub-pixels in a pixel row. Along the direction perpendicular to the plane where the display panel is located, the first node N1 is located in the area where the m / 2th sub-pixel PX is located on the second target pixel row MPX2. Among them, the m / 2th sub-pixel PX is separated from the target second pixel circuit 03a by (m / 2)-1 sub-pixels along the second direction X, that is, separated by m-1 columns of sub-pixels. That is to say, for example, when the target second pixel circuit 03a is located on the right side of the first display area A1 along the second direction X, if the target sub-pixel PX1 is located in the middle-right area (right screen) of the first display area A1, then the first node N1 is also located in the area where the orthographic projection of the m / 2th sub-pixel PX of the right screen is located.

[0076] In this way, the voltage drop of the reference voltage signal at the target second pixel circuit 03a can be made to be much closer to the voltage drop of the reference voltage signal at the target sub-pixel PX1. This makes the voltage of the reference voltage signal input to the target second pixel circuit 03a as close as possible to the voltage of the reference voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1, so that the brightness of the repaired target sub-pixel PX1 is much closer to that of the surrounding sub-pixels.

[0077] Figure 9 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 9 As shown, according to some embodiments of this application, optionally, when m > M / 2, M is the number of sub-pixels in a pixel row, and along the direction perpendicular to the plane where the display panel is located, the first node N1 is located in the region of the (Mm) / 2th sub-pixel on the second target pixel row MPX2. Wherein, the (Mm) / 2th sub-pixel is separated from the target second pixel circuit 03a by ((Mm) / 2)-1 sub-pixels along the second direction X.

[0078] For example, suppose the number of sub-pixels in a pixel row is M = 100, meaning the display panel includes 100 columns of sub-pixels. Along the second direction X, the target second pixel circuit 03a is located to the right of the first display area A1. The target sub-pixel PX1 is located at the 80th sub-pixel from the right, approximately 20 sub-pixels from the left. Since the reference voltage signal line Vref is driven on both sides, meaning the reference voltage signal can be input to both the left and right sides of the first display area A1, the voltage drop of the reference voltage signal at the target sub-pixel PX1 is approximately the voltage drop of 20 sub-pixels from the left. Equivalently, to the right of the target second pixel circuit 03a, the first node N1 can be located at the 10th sub-pixel from the right. Thus, the voltage drop of the reference voltage signal at the target second pixel circuit 03a is also approximately the voltage drop of 20 sub-pixels, which is the same as or similar to the voltage drop of the reference voltage signal at the target sub-pixel PX1.

[0079] In this way, the voltage drop of the reference voltage signal at the target second pixel circuit 03a can be made to be much closer to the voltage drop of the reference voltage signal at the target sub-pixel PX1. This makes the voltage of the reference voltage signal input to the target second pixel circuit 03a as close as possible to the voltage of the reference voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1, so that the brightness of the repaired target sub-pixel PX1 is much closer to that of the surrounding sub-pixels.

[0080] Figure 10 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 10As shown, in some specific embodiments, optionally, the display panel 20 includes two first arrangement areas A2, with a first display area A1 located between the two first arrangement areas A2 along the second direction X. Each of the two first arrangement areas A2 may be provided with second pixel circuits 03 arranged sequentially along the first direction Y. Along the second direction X, the target second pixel circuit 03a may be located in the first arrangement area A2 closest to the target sub-pixel PX1. That is, if the target sub-pixel PX1 is located on the left screen, the second pixel circuit 03 in the left first arrangement area A2 can be used to repair the target sub-pixel PX1. If the target sub-pixel PX1 is located on the right screen, the second pixel circuit 03 in the right first arrangement area A2 can be used to repair the target sub-pixel PX1.

[0081] It should be noted that when two first layout areas A2 are set on the left and right sides of the first display area A1, the second pixel circuit 03 in the first layout area A2 closest to the target sub-pixel PX1 can be selected to repair the target sub-pixel PX1.

[0082] Figure 11 This is another circuit diagram of a display panel provided in an embodiment of this application. For example... Figure 11 As shown, according to some embodiments of this application, optionally, the display panel 20 may further include multiple data signal lines (data) and data repair lines (110). The data signal lines (data) extend along a first direction Y and are electrically connected to multiple sub-pixels (PX) arranged along the first direction Y, for providing data signals. The data repair lines (110) may extend along a second direction X and can be used to connect the target second pixel circuit 03a and the target data signal line (data'), where the target data signal line (data') is the data signal line (data) electrically connected to the target sub-pixel PX1. That is, by electrically connecting the data signal line (data) at the target sub-pixel PX1 to the target second pixel circuit 03a, data signals are provided to the target second pixel circuit 03a, thereby enabling the light-emitting element in the target sub-pixel PX1 to emit light normally, i.e., achieving the expected target brightness.

[0083] In addition, it should be noted that in order to ensure that the light-emitting element in the target sub-pixel PX1 emits light normally, the electrical connection between the first pixel circuit and the light-emitting element in the target sub-pixel PX1 can be disconnected.

[0084] Based on the display panel 20 provided in the above embodiments, this application also provides a method for repairing the display panel. The method for repairing the display panel provided in this application can be applied to the display panel 20 provided in the above embodiments.

[0085] Figure 12This is a schematic flowchart illustrating a method for repairing a display panel provided in an embodiment of this application. Figure 12 As shown, the method for repairing a display panel provided in this application embodiment may include the following steps S101 to S106.

[0086] S101. Establish the first functional relationship of voltage drop between the connection node and the target second pixel circuit.

[0087] like Figure 4 As shown, for example, a first functional relationship of voltage drop between the connecting node (i.e., the first node N1) and the target second pixel circuit 03a can be established as (m+b) volts.

[0088] S102. Establish a second functional relationship of the voltage drop between the target sub-pixel and the connecting node.

[0089] See also Figure 4 For example, a second functional relationship can be established between the target sub-pixel PX1 and the connecting node as (1+2+3+…+b-1)=b*(b-1) / 2 volts.

[0090] S103. Determine the target correspondence between the first interval and the second interval based on the first functional relationship and the second functional relationship.

[0091] See also Figure 4 The first interval b is the number of sub-pixels between the connection node and the target sub-pixel PX1 along the first direction Y, and the second interval m is the number of sub-pixels between the target sub-pixel PX1 and the target second pixel circuit 03a along the second direction X.

[0092] In S103, let m+b=b*(b-1) / 2 to obtain the target correspondence.

[0093] S104. Obtain the second interval, and determine the first interval based on the correspondence between the second interval and the target.

[0094] In S104, since the position of the target sub-pixel PX1 is known, the second interval m is also known. Based on the known correspondence between the second interval m and the target... The first interval can be obtained.

[0095] S105. Determine the position of the first node based on the target sub-pixel and the first interval.

[0096] Since the position of the target sub-pixel PX1 is known, the position of the first node N1 can be determined after the first interval b is determined.

[0097] S106. Electrically connect the target second pixel circuit to the first node on the target voltage signal line.

[0098] The display panel repair method provided in this application embodiment can significantly reduce the voltage difference between the target voltage signal input to the target second pixel circuit 03a and the target voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1 by accurately finding a better access point and electrically connecting the target second pixel circuit 03a to the better access point (first node N1). This makes the brightness of the repaired target sub-pixel PX1 similar to that of other surrounding sub-pixels, thereby improving the display effect and repair effect of the display panel.

[0099] Figure 12 The specific implementation process of each step has been described in detail above, and will not be repeated here for the sake of brevity.

[0100] Based on the display panel 20 provided in the above embodiments, this application also provides another method for repairing the display panel. The method for repairing the display panel provided in this application can be applied to the display panel 20 provided in the above embodiments.

[0101] Figure 13 This is a schematic flowchart illustrating a method for repairing a display panel provided in an embodiment of this application. Figure 13 As shown, the method for repairing a display panel provided in this application embodiment may include the following steps S201 to S203.

[0102] S201. Obtain the number of sub-pixels m-1 between the target second pixel circuit and the target sub-pixel along the second direction, and the number of sub-pixels M in a pixel row.

[0103] like Figure 8 As shown, along the second direction X, the target second pixel circuit 03a is separated from the target sub-pixel PX1 by m-1 sub-pixels, where m is an integer greater than 1. M is the number of sub-pixels in a pixel row. In S201, the sizes of m-1 and M can be obtained.

[0104] S202. When m≤M / 2, determine the region where the first node is located on the second target pixel row, specifically the region where the m / 2th sub-pixel is located; wherein the m / 2th sub-pixel is (m / 2)-1 sub-pixels away from the target second pixel circuit along the second direction.

[0105] See also Figure 8 When m≤M / 2, along the direction perpendicular to the plane where the display panel is located, determine the area where the first node N1 is located on the m / 2th sub-pixel PX on the second target pixel row MPX2.

[0106] S203. Electrically connect the target second pixel circuit to the first node on the target voltage signal line.

[0107] The display panel repair method provided in this application embodiment can significantly reduce the voltage difference between the target voltage signal input to the target second pixel circuit 03a and the target voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1 by accurately finding a better access point and electrically connecting the target second pixel circuit 03a to the better access point (first node N1). This makes the brightness of the repaired target sub-pixel PX1 similar to that of other surrounding sub-pixels, thereby improving the display effect and repair effect of the display panel.

[0108] According to some embodiments of this application, optionally, before S203, the method for repairing the display panel provided in the embodiments of this application may further include the following steps:

[0109] When m > M / 2, the region where the first node is located is the (Mm) / 2th sub-pixel on the second target pixel row; wherein, the (Mm) / 2th sub-pixel is separated from the target second pixel circuit by ((Mm) / 2)-1 sub-pixels along the second direction.

[0110] like Figure 9 As shown, when m > M / 2, along the direction perpendicular to the plane where the display panel is located, the region where the first node N1 is located on the (Mm) / 2th sub-pixel of the second target pixel row MPX2 is determined.

[0111] In this way, the voltage drop of the reference voltage signal at the target second pixel circuit 03a can be made to be much closer to the voltage drop of the reference voltage signal at the target sub-pixel PX1. This makes the voltage of the reference voltage signal input to the target second pixel circuit 03a as close as possible to the voltage of the reference voltage signal input to the surrounding sub-pixels of the target sub-pixel PX1, so that the brightness of the repaired target sub-pixel PX1 is much closer to that of the surrounding sub-pixels.

[0112] Figure 13 The specific implementation process of each step has been described in detail above, and will not be repeated here for the sake of brevity.

[0113] Based on the display panel 20 provided in the above embodiments, this application also provides a display device, including the display panel provided in this application. Please refer to... Figure 14 , Figure 14 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 14 The provided display device 1000 includes the display panel 20 provided in any of the above embodiments of this application. Figure 14The embodiments use a mobile phone as an example to describe the display device 1000. It is understood that the display device provided in the embodiments of this application can be other display devices with display functions, such as wearable products, computers, televisions, and in-vehicle display devices. This application does not impose specific limitations on these. The display device provided in the embodiments of this application has the beneficial effects of the display panel 20 provided in the embodiments of this application. For details, please refer to the specific descriptions of the display panel 20 in the above embodiments. These descriptions will not be repeated here.

[0114] It should be understood that the specific circuit structures provided in the accompanying drawings of the embodiments of this application are merely examples and are not intended to limit this application. Furthermore, the above embodiments provided in this application can be combined with each other unless there is contradiction.

[0115] The embodiments described above are not exhaustive, nor do they limit the application to the specific embodiments described herein. Clearly, many modifications and variations can be made based on the above description. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. This application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, characterized in that, The display panel includes a first display area and a first arrangement area located on at least one side of the first display area; The first display area includes a plurality of pixel rows arranged sequentially along a first direction, and a pixel row includes a plurality of sub-pixels arranged sequentially along a second direction. The sub-pixels include a first pixel circuit and a light-emitting element electrically connected to the first pixel circuit. The first direction intersects the second direction. The display panel includes a target voltage signal line, which is electrically connected to the sub-pixel in the first display area to provide a target voltage signal. The first arrangement area includes a plurality of second pixel circuits arranged sequentially along the first direction. The target second pixel circuit among the plurality of second pixel circuits is electrically connected to a first node on the target voltage signal line, and the first node is located in the first display area. The target second pixel circuit is electrically connected to the light-emitting element of the target sub-pixel among the plurality of sub-pixels, and is used to provide a driving signal for the light-emitting element of the target sub-pixel.

2. The display panel according to claim 1, characterized in that, The minimum distance between the first node and the target sub-pixel is less than half the length or width of the first display area, where the length is the distance of the first display area along the first direction and the width is the distance of the first display area along the second direction.

3. The display panel according to claim 1, characterized in that, Each of the multiple second pixel circuits corresponds one-to-one with one of the multiple pixel rows; The target second pixel circuit is the second pixel circuit located in the same row as the target sub-pixel.

4. The display panel according to claim 1, characterized in that, The target voltage signal line includes a power supply voltage signal line, which includes multiple sub-power supply voltage signal lines extending along the first direction and spaced apart along the second direction. The sub-power supply voltage signal lines are electrically connected to n1 sub-pixels arranged along the first direction, where n1 is an integer greater than 1. The display panel also includes a bonding area, which includes multiple pads that are electrically connected to the driver chip. Along the first direction, the first node is located on the side of the target sub-pixel closer to the binding region.

5. The display panel according to claim 4, characterized in that, Along the second direction, the target second pixel circuit is separated from the target sub-pixel by m-1 sub-pixels, where m is an integer greater than 1; Along the first direction, the first node is separated from the target sub-pixel by N pixel rows, where N = b ± x. x ≤ 20 and is a positive integer.

6. The display panel according to claim 4, characterized in that, The display panel further includes a plurality of first auxiliary lines extending along the second direction and spaced apart along the first direction, wherein the plurality of first auxiliary lines correspond one-to-one with the plurality of pixel rows; The display panel further includes a second auxiliary line located in the first arrangement area. The second auxiliary line extends along the first direction and is electrically connected to multiple first auxiliary lines and multiple second pixel circuits. Along the first direction, the first node is separated from the target sub-pixel by N pixel rows, where N is a positive integer; The pixel row located on the side of the target sub-pixel close to the binding area and separated from the target sub-pixel by N pixel rows is the first target pixel row. The first node is electrically connected to the target second pixel circuit through the first auxiliary line and the second auxiliary line corresponding to the first target pixel row.

7. The display panel according to claim 6, characterized in that, The target sub-pixel includes multiple sub-target sub-pixels, the first node includes multiple sub-nodes, the target second pixel circuit includes multiple sub-target second pixel circuits, and the multiple sub-target second pixel circuits, the multiple sub-target sub-pixels, and the multiple sub-nodes correspond one-to-one with each other; The second auxiliary line includes multiple trace segments that are disconnected from each other. Different sub-target second pixel circuits correspond to different trace segments. The sub-target second pixel circuit is electrically connected to the corresponding sub-node through the corresponding trace segment and the first auxiliary line.

8. The display panel according to claim 1, characterized in that, The target voltage signal line includes a reference voltage signal line, and the reference voltage signal line includes a plurality of sub-reference voltage signal lines extending along the second direction and spaced apart along the first direction. The sub-reference voltage signal lines are electrically connected to a plurality of sub-pixels in the pixel row. The display panel further includes a first repair line, which includes multiple sub-first repair lines extending along the second direction and spaced apart along the first direction. Each of the multiple sub-first repair lines corresponds to a multiple of the sub-reference voltage signal lines. The pixel row where the target sub-pixel is located is the second target pixel row, and the target second pixel circuit is electrically connected to the first node on the sub-reference voltage signal line corresponding to the second target pixel row through the sub-first repair line corresponding to the second target pixel row; Along the second direction, the first node is located between the target sub-pixel and the target second pixel circuit.

9. The display panel according to claim 8, characterized in that, Along the second direction, the distance between the target sub-pixel and the first node is a first distance, and the distance between the target second pixel circuit and the first node is a second distance. The difference between the first distance and the second distance is less than the width of one sub-pixel, where the width is the distance of the sub-pixel along the second direction.

10. The display panel according to claim 8, characterized in that, Along the second direction, the target second pixel circuit is separated from the target sub-pixel by m-1 sub-pixels, where m is an integer greater than 1; When m ≤ M / 2, along the direction perpendicular to the plane where the display panel is located, the first node is located in the region where the m / 2th sub-pixel is located on the second target pixel row; wherein, the m / 2th sub-pixel is separated from the target second pixel circuit by (m / 2)-1 sub-pixels along the second direction, and M is the number of sub-pixels in a pixel row.

11. The display panel according to claim 8, characterized in that, Along the second direction, the target second pixel circuit is separated from the target sub-pixel by m-1 sub-pixels, where m is an integer greater than 1; When m > M / 2, along the direction perpendicular to the plane where the display panel is located, the first node is located in the region of the (Mm) / 2th sub-pixel on the second target pixel row; wherein, the (Mm) / 2th sub-pixel is separated from the target second pixel circuit by ((Mm) / 2)-1 sub-pixels along the second direction, and M is the number of sub-pixels in a pixel row.

12. The display panel according to claim 1, characterized in that, The display panel includes two first arrangement areas, and along the second direction, the first display area is located between the two first arrangement areas; Along the second direction, the target second pixel circuit is located in the first arrangement area closest to the target sub-pixel.

13. The display panel according to claim 1, characterized in that, The display panel also includes: Multiple data signal lines extend along the first direction and are electrically connected to multiple sub-pixels arranged along the first direction to provide data signals; A data repair line extends along the second direction and is used to connect the target second pixel circuit and the target data signal line, wherein the target data signal line is the data signal line electrically connected to the target sub-pixel.

14. A method for repairing a display panel, characterized in that, The display panel includes the display panel as described in any one of claims 1 to 13, and the method includes: Establish a first functional relationship of voltage drop between the connection node and the target second pixel circuit; Establish a second functional relationship of the voltage drop between the target sub-pixel and the connection node; Based on the first functional relationship and the second functional relationship, the target correspondence between the first interval and the second interval is determined; the first interval is the number of sub-pixels between the connection node and the target sub-pixel along the first direction, and the second interval is the number of sub-pixels between the target sub-pixel and the target second pixel circuit along the second direction; Obtain the second interval, and determine the first interval based on the correspondence between the second interval and the target; The position of the first node is determined based on the target sub-pixel and the first interval; The target second pixel circuit is electrically connected to the first node on the target voltage signal line.

15. A method for repairing a display panel, characterized in that, The display panel includes the display panel as described in any one of claims 1 to 13, and the method includes: Obtain the number m-1 of sub-pixels between the target second pixel circuit and the target sub-pixel along the second direction, and the number M of sub-pixels in a pixel row; When m ≤ M / 2, the region where the first node is located is the m / 2th sub-pixel on the second target pixel row; wherein, the m / 2th sub-pixel is separated from the target second pixel circuit by (m / 2)-1 sub-pixels along the second direction, and the second target pixel row is the pixel row where the target sub-pixel is located; The target second pixel circuit is electrically connected to the first node on the target voltage signal line.

16. The method according to claim 15, characterized in that, Before electrically connecting the target second pixel circuit to the first node on the target voltage signal line, the method further includes: When m > M / 2, the region where the first node is located is the (Mm) / 2th sub-pixel on the second target pixel row; wherein the (Mm) / 2th sub-pixel is separated from the target second pixel circuit by ((Mm) / 2)-1 sub-pixels along the second direction.

17. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 13.

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