Display substrate, mask assembly, and display panel

Abstract

The present disclosure provides a display substrate, a mask assembly, and a display panel. The display substrate includes: a plurality of pixel units arranged in an array, including a plurality of first pixel units and a plurality of second pixel units; in the row direction, the first pixel units and the second pixel units are alternately arranged; in the column direction, the first pixel units and the second pixel units are alternately arranged; the first pixel units include a first sub-pixel, two second sub-pixels, and a third sub-pixel located within a virtual quadrilateral; the second pixel units include a first sub-pixel, two second sub-pixels, and a third sub-pixel located within a virtual hexagon; wherein adjacent first pixel units and second pixel units in the column direction share a first sub-pixel or a third sub-pixel, and adjacent first pixel units and second pixel units in the row direction share a second sub-pixel. The present disclosure can achieve a high-resolution display effect.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate, a mask assembly, and a display panel. Background Art

[0002] With economic development, display panels are becoming increasingly common in people's lives. Display panels primarily comprise a light-emitting unit. This unit includes two opposing electrodes and a light-emitting layer located between the electrodes. The two electrodes are electrically connected to a power source to supply power to the light-emitting layer. However, existing display panels have low resolution. Summary of the Invention

[0003] The purpose of the present disclosure is to provide a display substrate, a mask assembly and a display panel that can achieve a high-resolution display effect.

[0004] According to one aspect of the present disclosure, there is provided a display substrate, comprising:

[0005] A plurality of pixel units arranged in an array, comprising a plurality of first pixel units and a plurality of second pixel units; in a row direction, the first pixel units and the second pixel units are alternately arranged; in a column direction, the first pixel units and the second pixel units are alternately arranged; the first pixel unit comprises a first sub-pixel, two second sub-pixels, and a third sub-pixel located within a virtual quadrilateral; the second pixel unit comprises a first sub-pixel, two second sub-pixels, and a third sub-pixel located within a virtual hexagon;

[0006] The first pixel unit and the second pixel unit adjacent to each other in the column direction share the first sub-pixel or the third sub-pixel, and the first pixel unit and the second pixel unit adjacent to each other in the row direction share the second sub-pixel.

[0007] Furthermore, the virtual hexagon includes two first side edges arranged opposite to each other, and the first side edges are perpendicular to the column direction; the first sub-pixel and the third sub-pixel located in the virtual hexagon are respectively arranged in contact with the two first side edges, and the two second sub-pixels located in the virtual hexagon are respectively arranged at two angles formed by the other four sides of the virtual hexagon.

[0008] Furthermore, the first sub-pixel and the third sub-pixel located in the virtual quadrilateral are respectively arranged at two opposite angles of the virtual quadrilateral, and the two second sub-pixels located in the virtual quadrilateral are respectively arranged at the other two angles of the virtual quadrilateral.

[0009] Furthermore, the two second sub-pixels located in the virtual hexagon are symmetrically distributed; and / or the two second sub-pixels located in the virtual quadrilateral are symmetrically distributed.

[0010] Furthermore, the first sub-pixel is an axisymmetric figure, and the symmetry axis of the two symmetrically distributed second sub-pixels coincides with the symmetry axis of the first sub-pixel.

[0011] Furthermore, the third sub-pixel is an axisymmetric figure, and the symmetry axis of the two symmetrically distributed second sub-pixels coincides with the symmetry axis of the third sub-pixel.

[0012] Further, in the row direction, the first sub-pixels and the third sub-pixels are alternately arranged, and the geometric centers of the alternately arranged first sub-pixels and the geometric centers of the third sub-pixels are on the same straight line; and / or

[0013] In the column direction, the first sub-pixels and the third sub-pixels are alternately arranged, and the geometric centers of the alternately arranged first sub-pixels and the geometric centers of the third sub-pixels are on the same straight line.

[0014] Furthermore, the first sub-pixel and the second sub-pixel are both pentagonal, and the second sub-pixel is a quadrilateral.

[0015] Furthermore, within the virtual hexagon, the spacing between the second sub-pixel and the first sub-pixel is equal to the spacing between the second sub-pixel and the third sub-pixel, and the spacing between the second sub-pixel and the first sub-pixel is smaller than the spacing between the first sub-pixel and the third sub-pixel.

[0016] Further, within the virtual quadrilateral, the spacing between the second sub-pixel and the first sub-pixel is equal to the spacing between the second sub-pixel and the third sub-pixel, and the spacing between the second sub-pixel and the first sub-pixel is equal to the spacing between the first sub-pixel and the third sub-pixel.

[0017] Furthermore, the first sub-pixels and the second sub-pixels are alternately arranged in a first direction, and sides of any adjacent first sub-pixels and second sub-pixels in the first direction are flush, wherein the first direction is different from the column direction and the row direction.

[0018] Furthermore, the luminous color of the first sub-pixel, the luminous color of the second sub-pixel, and the luminous color of the third sub-pixel are different.

[0019] Furthermore, the first sub-pixel is used to emit red light, the second sub-pixel is used to emit green light, and the third sub-pixel is used to emit blue light.

[0020] According to one aspect of the present disclosure, a mask assembly is provided for manufacturing the display substrate, the mask assembly comprising:

[0021] a first mask plate, wherein the first mask plate includes a first substrate and a first opening formed in the first substrate, wherein the first opening corresponds to the first sub-pixel;

[0022] a second mask plate, the second mask plate comprising a second substrate and a second opening formed in the second substrate, the second opening corresponding to the second sub-pixel;

[0023] A third mask plate includes a third substrate and a third opening formed in the third substrate, wherein the third opening corresponds to the third sub-pixel.

[0024] According to one aspect of the present disclosure, a display panel is provided, comprising the display substrate.

[0025] In the display substrate, mask assembly, and display panel disclosed herein, the first pixel unit and the second pixel unit adjacent in the column direction share the first sub-pixel or the third sub-pixel, and the first pixel unit and the second pixel unit adjacent in the row direction share the second sub-pixel, thereby achieving a high-resolution display effect through the principle of borrowed color. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a schematic diagram of a display substrate according to an embodiment of the present disclosure.

[0027] Figure 2 FIG. 1 is a partial schematic diagram of a display substrate according to an embodiment of the present disclosure.

[0028] Figure 3 Schematic diagram of a first mask according to an embodiment of the present disclosure.

[0029] Figure 4 Schematic diagram of a second mask according to an embodiment of the present disclosure.

[0030] Figure 5 Schematic diagram of a third mask according to an embodiment of the present disclosure.

[0031] Explanation of the accompanying drawings: 1. First pixel unit; 101. First sub-pixel; 102. Second sub-pixel; 103. Third sub-pixel; 2. Second pixel unit; 3. First substrate; 301. First opening; 4. Second substrate; 401. Second opening; 5. Third substrate; 501. Third opening. DETAILED DESCRIPTION

[0032] Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. When the following description refers to the drawings, identical numerals in different figures represent identical or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present disclosure. Rather, they are merely examples of devices consistent with certain aspects of the present disclosure, as detailed in the appended claims.

[0033] The terms used in this disclosure are for the purpose of describing specific embodiments only and are not intended to limit the disclosure. Unless otherwise defined, technical or scientific terms used in this disclosure should have the ordinary meaning understood by a person of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and similar words used in this disclosure and the claims do not denote any order, quantity, or importance, but are simply used to distinguish different components. Similarly, the terms "a" or "an" and similar words do not denote a limitation of quantity, but rather indicate the presence of at least one. The terms "plurality" or "several" mean two or more. Unless otherwise indicated, the terms "front," "rear," "lower," and / or "upper" and similar words are for convenience only and are not intended to limit to a single position or spatial orientation. The terms "include" or "comprising" and similar words mean that the elements or objects listed before "include" or "comprising" include the elements or objects listed after "include" or "comprising" and their equivalents, and do not exclude other elements or objects. The terms "connected" or "connected" and similar words are not limited to physical or mechanical connections and can include electrical connections, whether direct or indirect. As used in this disclosure and the appended claims, the singular forms "a," "an," "said," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0034] The present disclosure provides a display substrate. Figure 1 As shown, the display substrate may include a plurality of pixel units arranged in an array. The plurality of pixel units may include a plurality of first pixel units 1 and a plurality of second pixel units 2. In the row direction ( Figure 1 In the Y direction in the , the first pixel unit 1 and the second pixel unit 2 are alternately arranged; in the column direction ( Figure 1In the X direction (in the X direction in FIG), first pixel units 1 and second pixel units 2 are alternately arranged. The first pixel unit 1 includes a first sub-pixel 101, two second sub-pixels 102, and a third sub-pixel 103 located within a virtual quadrilateral. The second pixel unit 2 includes a first sub-pixel 101, two second sub-pixels 102, and a third sub-pixel 103 located within a virtual hexagon. Adjacent first pixel units 1 and second pixel units 2 in the column direction share the first sub-pixel 101 or the third sub-pixel 103, and adjacent first pixel units 1 and second pixel units 2 in the row direction share the second sub-pixel 102.

[0035] In the display substrate of the embodiment of the present disclosure, the first pixel unit 1 and the second pixel unit 2 adjacent in the column direction share the first sub-pixel 101 or the third sub-pixel 103, and the first pixel unit 1 and the second pixel unit 2 adjacent in the row direction share the second sub-pixel 102, thereby achieving a high-resolution display effect through the color borrowing principle.

[0036] The following describes in detail the various components of the display substrate according to the embodiment of the present disclosure:

[0037] The display substrate may include a substrate and a drive circuit layer. The substrate may be a rigid substrate. Specifically, the rigid substrate may be a glass substrate or a PMMA (polymethyl methacrylate) substrate. Alternatively, the substrate may be a flexible substrate. Specifically, the flexible substrate may be a PET (polyethylene terephthalate) substrate, a PEN (polyethylene naphthalate two formic acid glycolester) substrate, or a PI (polyimide) substrate.

[0038] The drive circuit layer may be provided on a substrate. The drive circuit layer may include multiple drive transistors. The drive transistors may be thin-film transistors, but the embodiments of the present disclosure are not limited thereto. The thin-film transistors may be top-gate thin-film transistors, or alternatively, bottom-gate thin-film transistors. Taking a top-gate thin-film transistor as an example, the drive circuit layer may include an active layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, a source electrode, and a drain electrode. The active layer may be provided on the substrate. The gate insulating layer may be provided on the substrate and cover the active layer. The gate electrode may be provided on a side of the gate insulating layer facing away from the substrate. The interlayer insulating layer may be provided on the gate insulating layer and cover the gate electrode. The source and drain electrodes may be provided on the interlayer insulating layer and connected to the active layer via vias passing through the interlayer insulating layer and the gate insulating layer. The display substrate of the embodiments of the present disclosure may also include a planarization layer and a pixel definition layer. The planarization layer may be provided on the surface of the drive circuit layer facing away from the substrate and cover the source and drain electrodes of the drive transistors. The pixel definition layer may be provided on the planarization layer. The pixel defining layer may be provided with a plurality of pixel openings, which are used for evaporating luminescent materials to form sub-pixels.

[0039] The display substrate may include a plurality of pixel units arranged in an array. The plurality of pixel units include a plurality of first pixel units 1 and a plurality of second pixel units 2. Figure 1 In the Y direction in the , the first pixel unit 1 and the second pixel unit 2 are alternately arranged; in the column direction ( Figure 1 In the X direction in the image (in the X direction in the image), the first pixel units 1 and the second pixel units 2 are alternately arranged. Specifically, the plurality of first pixel units 1 can be arranged in an array, and the plurality of first pixel units 1 arranged in an array can include a plurality of first pixel rows and a plurality of first pixel columns. The first pixel row can include a plurality of first pixel units 1 distributed along the row direction. The row direction is the extension direction of the first pixel row. Any two adjacent first pixel rows can be staggered with each other in the row direction. The extension direction of the first pixel column is the column direction. The first pixel column can include a plurality of first pixel units 1 distributed along the column direction. Any two adjacent first pixel columns can be staggered with each other in the column direction. Multiple first pixel columns can be distributed along the extension direction of the first pixel row.

[0040] The first pixel unit 1 includes a first sub-pixel 101, two second sub-pixels 102, and a third sub-pixel 103 within a virtual quadrilateral. The first sub-pixel 101 and the third sub-pixel 103 within the virtual quadrilateral are respectively arranged at two opposite corners of the virtual quadrilateral. That is, one corner of the first sub-pixel 101 coincides with one of the two opposite corners of the virtual quadrilateral, and one corner of the third sub-pixel 103 coincides with the other of the two opposite corners of the virtual quadrilateral. The two second sub-pixels 102 within the virtual quadrilateral are respectively arranged at the other two corners of the virtual quadrilateral. That is, one corner of one second sub-pixel 102 coincides with one of the other two corners of the virtual quadrilateral, and one corner of the other second sub-pixel 102 coincides with the other of the other two corners of the virtual quadrilateral.

[0041] The two second sub-pixels 102 located within the virtual quadrilateral may be symmetrically distributed. The axes of symmetry of the two symmetrically distributed second sub-pixels 102 may intersect with the first sub-pixel 101 and / or the third sub-pixel 103 located within the virtual quadrilateral. Furthermore, the axes of symmetry of the two second sub-pixels 102 may intersect with the geometric center of the first sub-pixel 101 and / or the geometric center of the third sub-pixel 103 located within the virtual quadrilateral. Furthermore, the first sub-pixel 101 located within the virtual quadrilateral may be an axially symmetrical figure, and the axes of symmetry of the two symmetrically distributed second sub-pixels 102 coincide with the axis of symmetry of the first sub-pixel 101. That is, of the two symmetrically distributed second sub-pixels 102, the distance between the geometric center of one second sub-pixel 102 and the geometric center of the first sub-pixel 101 is equal to the distance between the geometric center of the other second sub-pixel 102 and the geometric center of the first sub-pixel 101. The third sub-pixel 103 located within the virtual quadrilateral can be an axisymmetric pattern, and the symmetry axes of the two symmetrically distributed second sub-pixels 102 coincide with the symmetry axis of the third sub-pixel 103. That is, of the two symmetrically distributed second sub-pixels 102, the distance between the geometric center of one second sub-pixel 102 and the geometric center of the third sub-pixel 103 is equal to the distance between the geometric center of the other second sub-pixel 102 and the geometric center of the third sub-pixel 103. The symmetry axis of the first sub-pixel 101 can also coincide with the symmetry axis of the third sub-pixel 103.

[0042] In addition, if Figure 2 As shown, within the virtual quadrilateral, the spacing D4 between the second sub-pixel 102 and the first sub-pixel 101 is equal to the spacing D6 between the second sub-pixel 102 and the third sub-pixel 103, and the spacing D4 between the second sub-pixel 102 and the first sub-pixel 101 is equal to the spacing D5 between the first sub-pixel 101 and the third sub-pixel 103.

[0043] A plurality of second pixel units 2 may be arranged in an array. The plurality of second pixel units 2 arranged in an array may include a plurality of second pixel rows and a plurality of second pixel columns. The extension direction of the second pixel row may be the same as the extension direction of the first pixel row, and the extension direction of the second pixel column may be the same as the extension direction of the second pixel column. The second pixel row may include a plurality of second pixel units 2 distributed along the row direction. Any two adjacent second pixel rows may be staggered with each other in the row direction. The plurality of second pixel rows may be distributed along the extension direction of the second pixel column. The second pixel column may include a plurality of second pixel units 2 distributed along the column direction. Any two adjacent second pixel columns may be staggered with each other in the column direction. The plurality of second pixel columns may be distributed along the extension direction of the second pixel row.

[0044] The second pixel unit 2 includes a first sub-pixel 101, two second sub-pixels 102, and a third sub-pixel 103 within a virtual hexagon. The virtual hexagon may include two first sides arranged opposite each other, and the first sides are perpendicular to the column direction. The first sub-pixel 101 and the third sub-pixel 103 within the virtual hexagon are respectively arranged to conform to the two first sides. That is, one side of the first sub-pixel 101 may overlap with one first side of the virtual hexagon, and one side of the second sub-pixel 102 may overlap with another first side of the virtual hexagon. The two second sub-pixels 102 within the virtual hexagon are respectively arranged at two angles formed by the other four sides of the virtual hexagon. That is, one corner of one second sub-pixel 102 overlaps with one of the two angles formed by the other four sides of the virtual hexagon, and one corner of the other second sub-pixel 102 overlaps with the other of the two angles formed by the other four sides of the virtual hexagon. In this case, the two sides of the second sub-pixel 102 respectively overlap with the two sides forming the angle of the virtual hexagon.

[0045] The two second sub-pixels 102 located within the virtual hexagon may be symmetrically distributed. The symmetry axes of the two symmetrically distributed second sub-pixels 102 may intersect with the first sub-pixel 101 and / or the third sub-pixel 103 located within the virtual hexagon. Furthermore, the symmetry axes of the two second sub-pixels 102 may intersect with the geometric center of the first sub-pixel 101 and / or the geometric center of the third sub-pixel 103 located within the virtual hexagon. Furthermore, the first sub-pixel 101 located within the virtual hexagon may be an axially symmetrical figure, and the symmetry axes of the two symmetrically distributed second sub-pixels 102 coincide with the symmetry axis of the first sub-pixel 101. That is, of the two symmetrically distributed second sub-pixels 102, the distance between the geometric center of one second sub-pixel 102 and the geometric center of the first sub-pixel 101 is equal to the distance between the geometric center of the other second sub-pixel 102 and the geometric center of the first sub-pixel 101. The third sub-pixel 103 located within the virtual hexagon can be an axisymmetric shape, and the symmetry axes of the two symmetrically distributed second sub-pixels 102 coincide with the symmetry axis of the third sub-pixel 103. That is, of the two symmetrically distributed second sub-pixels 102, the distance between the geometric center of one second sub-pixel 102 and the geometric center of the third sub-pixel 103 is equal to the distance between the geometric center of the other second sub-pixel 102 and the geometric center of the third sub-pixel 103. The symmetry axis of the first sub-pixel 101 can also coincide with the symmetry axis of the third sub-pixel 103.

[0046] In addition, if Figure 2 As shown, within the virtual hexagon, the spacing D1 between the second sub-pixel 102 and the first sub-pixel 101 and the spacing D3 between the second sub-pixel 102 and the third sub-pixel 103 are equal, and the spacing D1 between the second sub-pixel 102 and the first sub-pixel 101 is smaller than the spacing D2 between the first sub-pixel 101 and the third sub-pixel 103.

[0047] The plurality of second pixel columns may correspond one-to-one to the plurality of first pixel columns described above. The plurality of second pixel units 2 in a second pixel column may be alternately arranged in the column direction with the plurality of first pixel units 1 in the corresponding first pixel column, and adjacent first pixel units 1 and second pixel units 2 may share the first sub-pixel 101 or the third sub-pixel 103. Specifically, for the first pixel unit 1, the second pixel unit 2, and the first pixel unit 1 adjacent to each other in sequence, the second pixel unit 2 located in the middle position shares the first sub-pixel 101 with the first pixel unit 1 on one side, and the second pixel unit 2 located in the middle position shares the third sub-pixel 103 with the first pixel unit 1 on the other side. The plurality of second pixel rows may correspond one-to-one to the plurality of first pixel rows described above. The plurality of second pixel units 2 in a second pixel row may be alternately arranged in the row direction with the plurality of first pixel units 1 in the corresponding first pixel row, and adjacent first pixel units 1 and second pixel units 2 may share the second sub-pixel 102.

[0048] In the row direction, the first sub-pixels 101 and the third sub-pixels 103 are alternately arranged, and the centers of the alternately arranged first sub-pixels 101 and the centers of the third sub-pixels 103 are on the same straight line. In the column direction, the first sub-pixels 101 and the third sub-pixels 103 are alternately arranged, and the centers of the alternately arranged first sub-pixels 101 and the centers of the third sub-pixels 103 are on the same straight line. For the first sub-pixels 101 and the third sub-pixels 103 alternately arranged in the column direction, the first sub-pixel 101 or the third sub-pixel 103 is shared by the adjacent first pixel unit 1 and the second pixel unit 2. In addition, as Figure 2 As shown, in the first direction ( Figure 2 In the Z direction (in the first direction), the first sub-pixels 101 and the second sub-pixels 102 are alternately arranged, and the sides of any adjacent first sub-pixels 101 and second sub-pixels 102 in the first direction are aligned. In other words, the sides of the first sub-pixels 101 and the second sub-pixels 102 coincide with the straight line L1. The first direction is different from the column direction and the row direction.

[0049] The luminous colors of the first sub-pixel 101, the luminous colors of the second sub-pixel 102, and the luminous colors of the third sub-pixel 103 are different. For example, the first sub-pixel 101 is configured to emit red light, the second sub-pixel 102 is configured to emit green light, and the third sub-pixel 103 is configured to emit blue light, but this is not particularly limited in the present embodiment. The first sub-pixel 101 and the second sub-pixel 102 can both be pentagonal, and the second sub-pixel 102 can be quadrilateral, but this is not limited in the present embodiment.

[0050] The embodiment of the present disclosure also provides a mask assembly. The mask assembly is used to manufacture the display substrate described in any of the above embodiments. The mask assembly may include a first mask plate, a second mask plate, and a third mask plate. Figure 3 As shown, the first mask includes a first substrate 3 and a first opening 301 opened in the first substrate 3. The first opening 301 corresponds to the first sub-pixel 101. Figure 4 As shown, the second mask includes a second substrate 4 and a second opening 401 opened in the second substrate 4. The second opening 401 corresponds to the second sub-pixel 102. Figure 5 As shown, the third mask includes a third substrate 5 and a third opening 501 formed in the third substrate 5. The third opening 501 corresponds to the third sub-pixel 103.

[0051] The present disclosure also provides a display panel. The display panel includes the display substrate described in any of the above embodiments. The display panel can be used in smart cards, mobile phones, tablet computers, televisions, and the like.

[0052] The display substrate, mask assembly, and display panel provided in the embodiments of the present disclosure belong to the same inventive concept, and the descriptions of relevant details and beneficial effects can be referred to each other and will not be repeated here.

[0053] The above description is merely a preferred embodiment of the present disclosure and does not constitute any form of limitation to the present disclosure. Although the present disclosure has been disclosed as a preferred embodiment as above, it is not intended to limit the present disclosure. Any technician familiar with this profession can make some changes or modifications to equivalent embodiments of the technical content disclosed above without departing from the scope of the technical solution of the present disclosure. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present disclosure without departing from the content of the technical solution of the present disclosure are still within the scope of the technical solution of the present disclosure.

Claims

1. A display substrate, characterized in that: include: A plurality of pixel units arranged in an array, including a plurality of first pixel units and a plurality of second pixel units; In the row direction, the first pixel units and the second pixel units are alternately arranged; in the column direction, the first pixel units and the second pixel units are alternately arranged; the first pixel unit includes a first sub-pixel, two second sub-pixels and a third sub-pixel located in a virtual quadrilateral; the second pixel unit includes a first sub-pixel, two second sub-pixels and a third sub-pixel located in a virtual hexagon; The first pixel unit and the second pixel unit adjacent to each other in the column direction share the first sub-pixel or the third sub-pixel, and the first pixel unit and the second pixel unit adjacent to each other in the row direction share the second sub-pixel; The first sub-pixels and the second sub-pixels are alternately arranged in a first direction, and sides of any adjacent first sub-pixels and second sub-pixels in the first direction are flush, wherein the first direction is different from the column direction and the row direction.

2. The display substrate according to claim 1, wherein: The virtual hexagon includes two first side edges arranged opposite to each other, and the first side edges are perpendicular to the column direction; the first sub-pixel and the third sub-pixel located in the virtual hexagon are respectively arranged in contact with the two first side edges, and the two second sub-pixels located in the virtual hexagon are respectively arranged at two angles formed by the other four sides of the virtual hexagon.

3. The display substrate according to claim 1, wherein The first sub-pixel and the third sub-pixel located in the virtual quadrilateral are respectively arranged at two opposite angles of the virtual quadrilateral, and the two second sub-pixels located in the virtual quadrilateral are respectively arranged at the other two angles of the virtual quadrilateral.

4. The display substrate according to claim 1, wherein The two second sub-pixels located in the virtual hexagon are symmetrically distributed; and / or the two second sub-pixels located in the virtual quadrilateral are symmetrically distributed.

5. The display substrate according to claim 4, wherein: The first sub-pixel is an axisymmetric shape, and the symmetry axes of the two symmetrically distributed second sub-pixels coincide with the symmetry axis of the first sub-pixel.

6. The display substrate according to claim 4, wherein: The third sub-pixel is an axisymmetric pattern, and the symmetry axes of the two symmetrically distributed second sub-pixels coincide with the symmetry axis of the third sub-pixel.

7. The display substrate according to claim 1, wherein: In the row direction, the first sub-pixels and the third sub-pixels are alternately arranged, and the geometric centers of the alternately arranged first sub-pixels and the geometric centers of the third sub-pixels are on the same straight line; and / or In the column direction, the first sub-pixels and the third sub-pixels are alternately arranged, and the geometric centers of the alternately arranged first sub-pixels and the geometric centers of the third sub-pixels are on the same straight line.

8. The display substrate according to claim 1, wherein: The first sub-pixel and the second sub-pixel are both pentagonal, and the second sub-pixel is a quadrilateral.

9. The display substrate according to claim 1, wherein: In the virtual hexagon, the spacing between the second sub-pixel and the first sub-pixel is equal to the spacing between the second sub-pixel and the third sub-pixel, and the spacing between the second sub-pixel and the first sub-pixel is smaller than the spacing between the first sub-pixel and the third sub-pixel.

10. The display substrate according to claim 1, wherein Within the virtual quadrilateral, the spacing between the second sub-pixel and the first sub-pixel is equal to the spacing between the second sub-pixel and the third sub-pixel, and the spacing between the second sub-pixel and the first sub-pixel is equal to the spacing between the first sub-pixel and the third sub-pixel.

11. The display substrate according to claim 1, wherein The luminous color of the first sub-pixel, the luminous color of the second sub-pixel, and the luminous color of the third sub-pixel are different.

12. The display substrate according to claim 11, wherein: The first sub-pixel is configured to emit red light, the second sub-pixel is configured to emit green light, and the third sub-pixel is configured to emit blue light.

13. A mask assembly for manufacturing the display substrate according to any one of claims 1 to 12, characterized in that: The mask assembly comprises: a first mask plate, wherein the first mask plate includes a first substrate and a first opening formed in the first substrate, wherein the first opening corresponds to the first sub-pixel; a second mask plate, the second mask plate comprising a second substrate and a second opening formed in the second substrate, the second opening corresponding to the second sub-pixel; A third mask plate includes a third substrate and a third opening formed in the third substrate, wherein the third opening corresponds to the third sub-pixel.

14. A display panel, characterized in that: The display substrate comprises the display substrate according to any one of claims 1 to 12.

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