Input clamping circuit for operational amplifier

Abstract

The application discloses an input clamping circuit of an operational amplifier, comprising: a threshold setting module, which is used for setting a threshold voltage; an input module, which is connected with a signal input end of the operational amplifier and is used for being turned on when the voltage of the signal input end reaches a first preset voltage, the first preset voltage being obtained based on the threshold voltage and a power supply voltage; a voltage comparator, whose positive input end is connected with the output of the input module and whose negative input end is connected with the power supply voltage; and a current discharge module, which is connected between the signal input end and the ground, wherein the voltage comparator is configured to control the current discharge module to be turned on when the voltage difference between the output voltage of the input module and the power supply voltage exceeds a second preset voltage, so as to discharge the high-voltage pulse signal of the signal input end to the ground. The input clamping circuit not only can protect the input device in the operational amplifier from being damaged by the high-voltage signal, but also can adaptively adjust the clamping threshold according to the application situation, and is more flexible.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and more specifically to an input clamping circuit for an operational amplifier. Background Technology

[0002] Operational amplifiers are devices that amplify the voltage or power of input signals and are widely used in communications, PCs, consumer electronics, automobiles, and industrial fields. Figure 1a and Figure 1b The diagrams show the structural schematic of a traditional operational amplifier and its waveform when encountering a high-voltage pulse signal. Due to factors such as electromagnetic pulse interference, voltage or current surges, and parasitic capacitance and inductance, the positive input terminal V of existing operational amplifier chips experiences degradation during application. P and negative input terminal V N You may encounter high-voltage pulse signals, such as Figure 1b As shown in the pulse waveform, if the high-voltage pulse signal is too high or exceeds the power supply voltage of the chip, it may cause the gate oxide layer of the input transistor pair of the operational amplifier to be broken down, resulting in the chip being burned out.

[0003] Figure 2 A schematic diagram of the structure of an existing operational amplifier in application is shown. For example... Figure 2 As shown, in order to protect the input devices of the operational amplifier (OPA) from damage by high-voltage pulse signals, existing solutions typically address this issue at the positive input terminal V of the OPA. P and negative input terminal V N Adding a diode to the power supply voltage Vcc allows the diode to forward conduct when a high-voltage pulse signal higher than the power supply voltage appears at the input port of the operational amplifier (OPA), releasing the energy of the high-voltage pulse signal and effectively protecting the input device. However, this approach has two drawbacks: First, it requires the high-voltage pulse signal to be greater than the diode's forward conduction voltage; that is, the clamping circuit's turn-on threshold is the diode's forward conduction voltage, and this threshold cannot be adjusted. Second, this approach requires the chip's power supply Vcc to have the ability to absorb current. If the system powering the operational amplifier cannot absorb current, or its current absorption capability is insufficient, the power supply will be pulled high by the input high-voltage signal, potentially damaging the entire operational amplifier. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide an input clamping circuit for an operational amplifier, which can not only release the high voltage signal at the input port of the operational amplifier to ground and protect the input devices in the operational amplifier from damage by the high voltage signal, but also adaptively adjust the clamping threshold according to the application.

[0005] According to an embodiment of the present invention, an input clamping circuit for an operational amplifier is provided, comprising: a threshold setting module for setting a threshold voltage; an input module connected to the signal input terminal of the operational amplifier, configured to activate when the voltage at the signal input terminal reaches a first preset voltage, wherein the first preset voltage is obtained based on the threshold voltage and a power supply voltage; a voltage comparator having its non-inverting input terminal connected to the output of the input module and its inverting input terminal connected to the power supply voltage; and a current discharge module connected between the signal input terminal and ground, wherein the voltage comparator is configured to control the current discharge module to activate when the voltage difference between the output voltage of the input module and the power supply voltage exceeds a second preset voltage, so as to discharge the high-voltage pulse signal at the signal input terminal to ground.

[0006] Optionally, the threshold setting module includes: a fifth PMOS transistor having a first terminal connected to the power supply voltage, a second terminal connected to the output of the first voltage signal, and a control terminal, wherein the first voltage signal is equal to the difference between the first preset voltage and the gate-source voltage of the fifth PMOS transistor; a first resistor having a first end connected to the second terminal of the fifth PMOS transistor and a second end connected to the control terminal of the fifth PMOS transistor; and a first current source having a first end connected to the second end of the first resistor and a second end connected to ground.

[0007] Optionally, the input module includes: a sixth PMOS transistor having a first terminal connected to the signal input terminal of the operational amplifier, a second terminal connected to the non-inverting input terminal of the voltage comparator, and a control terminal connected to the first voltage signal, wherein when the voltage at the signal input terminal reaches the first preset voltage, the sixth PMOS transistor is turned on, connecting the signal input terminal to the non-inverting input terminal of the voltage comparator.

[0008] Optionally, the input module further includes a second current source connected between the power supply voltage and the non-inverting input of the voltage comparator, used to pull up the non-inverting input of the voltage comparator to the power supply voltage during the period when the sixth PMOS transistor is off.

[0009] Optionally, the current discharge module includes: a fifth NMOS transistor having a first terminal connected to the signal input terminal of the operational amplifier, a second terminal connected to ground, and a control terminal connected to the output of the voltage comparator.

[0010] Optionally, the second preset voltage is set by the input offset voltage of the voltage comparator.

[0011] Optionally, the voltage comparator includes: a first PMOS transistor and a first NMOS transistor connected between the power supply voltage and ground; a second PMOS transistor and a third NMOS transistor connected between the power supply voltage and a first terminal of a tail current source, the second terminal of the tail current source being connected to ground; a third PMOS transistor and a fourth NMOS transistor connected between the power supply voltage and the first terminal of the tail current source; and a fourth PMOS transistor and a second NMOS transistor connected between the power supply voltage and ground, wherein the first PMOS transistor and the second PMOS transistor constitute a first current mirror, the third PMOS transistor and the fourth PMOS transistor constitute a second current mirror, and the first NMOS transistor and the second NMOS transistor constitute a third current mirror; the control terminal of the third NMOS transistor serves as the inverting input terminal of the voltage comparator, the control terminal of the fourth NMOS transistor serves as the non-inverting input terminal of the voltage comparator, and the intermediate node between the fourth PMOS transistor and the second NMOS transistor serves as the output terminal of the voltage comparator.

[0012] Optionally, the size ratio between the third NMOS transistor and the fourth NMOS transistor is N, where N is an integer greater than 1.

[0013] Optionally, the second preset voltage can be set by adjusting the size ratio between the third NMOS transistor and the fourth NMOS transistor.

[0014] The input clamping circuit of this invention does not require the high-voltage pulse signal at the signal input terminal of the operational amplifier to be higher than the forward conduction voltage of the diode, and does not require the power supply of the chip to have the ability to absorb current. Therefore, it can effectively protect the input devices in the operational amplifier from damage by the input high-voltage signal under any circumstances, thus improving the stability of the operational amplifier.

[0015] Furthermore, the input clamping circuit of this embodiment of the invention also includes a threshold setting module, which can adjust the clamping threshold voltage of the circuit, making it more flexible compared to the prior art where the clamping threshold voltage is not adjustable. Attached Figure Description

[0016] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings.

[0017] Figure 1a A schematic diagram of a conventional operational amplifier is shown.

[0018] Figure 1b This diagram shows the waveform of a conventional operational amplifier when it encounters a high-voltage pulse signal.

[0019] Figure 2A circuit diagram of an existing operational amplifier in application is shown;

[0020] Figure 3 A circuit diagram of the input clamping circuit of an operational amplifier according to an embodiment of the present invention is shown. Detailed Implementation

[0021] The invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale. Furthermore, some well-known parts may not be shown in the drawings.

[0022] Many specific details of the invention, such as the structure, materials, dimensions, processing methods, and techniques of the components, are described below to provide a clearer understanding of the invention. However, as those skilled in the art will understand, the invention may be implemented without following these specific details.

[0023] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0024] Figure 3 A circuit diagram of the input clamping circuit of an operational amplifier according to an embodiment of the present invention is shown. Figure 3As shown, the input clamping circuit 100 includes a threshold setting module 110, a voltage comparator 120, an input module 130, and a current discharge module 140. The threshold setting module 110 sets a clamping threshold voltage. The input module 130 is connected to the signal input terminal of the operational amplifier and is activated when the voltage at the signal input terminal of the operational amplifier reaches a first preset voltage, which is obtained based on the threshold voltage and the power supply voltage Vcc. The voltage comparator 120 has a non-inverting input terminal, an inverting input terminal, and an output terminal. Its non-inverting input terminal is connected to the output of the input module 130, its inverting input terminal is connected to the power supply voltage Vcc, and its output terminal is connected to the control port of the current discharge module 140. The current discharge module 140 is connected between the signal input terminal of the operational amplifier and ground. The voltage comparator 120 is configured to control the current discharge module 140 to turn on when the voltage difference between the output voltage Vsn of the input module 130 and the power supply voltage Vcc exceeds a second preset voltage, so as to discharge the high voltage pulse signal at the signal input terminal of the operational amplifier to ground. The second preset voltage is obtained, for example, by the input offset voltage of the voltage comparator 120.

[0025] The input clamping circuit 100 in this embodiment does not require the high-voltage pulse signal at the signal input terminal of the operational amplifier to be higher than the forward conduction voltage of the diode, and does not require the power supply of the chip to have the ability to absorb current. Therefore, it can effectively protect the input devices in the operational amplifier from damage by the input high-voltage signal under any circumstances, thus improving the stability of the operational amplifier.

[0026] Continue to refer to Figure 3 The threshold setting module 110 includes a PMOS (Positive Channel Metal Oxide Semiconductor) transistor Mp5, a resistor R1, and a current source I1. The source of the PMOS transistor Mp5 is connected to the power supply voltage Vcc, and the drain is connected to the output terminal of the voltage signal Vpsw. The first terminal of the resistor R1 is connected to the drain of the PMOS transistor Mp5, and the second terminal is connected to the gate of the PMOS transistor Mp5. The first terminal of the current source I1 is connected to the second terminal of the resistor R1, and the second terminal is connected to ground.

[0027] Input module 130 includes a PMOS transistor Mp6 and a current source I2. The source of PMOS transistor Mp6 is connected to the signal input terminal Vin of the operational amplifier, the drain is connected to the non-inverting input terminal of voltage comparator 120, and the gate is connected to the voltage signal Vpsw. The first terminal of current source I2 is connected to the power supply voltage Vcc, and the second terminal is connected to the non-inverting input terminal of voltage comparator 120. Specifically, current source I2 is used to pull up the non-inverting input terminal of voltage comparator 120 to the power supply voltage Vcc when PMOS transistor Mp6 is off.

[0028] In this embodiment, the turn-on threshold Vth of PMOS transistors Mp5 and Mp6 are equal, and the potential of the psw node is Vpsw = (Vcc - Vsg_Mp5) + I1 × R1, where Vsg_Mp5 is the source-gate voltage of PMOS transistor Mp5. Therefore, the source-gate voltage Vsg_Mp6 of PMOS transistor Mp6 can be obtained as Vin - Vpsw = Vin - [(Vcc - Vsg_Mp5) + I1 × R1]. Since PMOS transistor Mp6 is turned on when Vsg_Mp6 = Vsg_Mp5, it can be concluded that when the voltage Vin at the signal input terminal of the external operational amplifier is Vin = Vcc + I1 × R1, i.e., Vcc + I1 × R1 is the first preset voltage mentioned above, PMOS transistor Mp6 is turned on, and at this time, the output voltage Vsn of the input module 130 is Vin. From the above analysis, it can be seen that the threshold voltage set by the threshold setting module 110 is equal to I1×R1, and the magnitude of the threshold voltage can be adjusted by adjusting the output of the current source I1 and the resistor R1.

[0029] Furthermore, the voltage comparator 120 in this embodiment includes NMOS (Negative Channel Metal Oxide Semiconductor) transistors Mn1 to Mn4, PMOS transistors Mp1 to Mp4, and a tail current source It1. Specifically, the connections are as follows: PMOS transistors Mp1 and Mn1 are connected between the power supply voltage Vcc and ground; PMOS transistors Mp2 and Mn3 are connected between the power supply voltage Vcc and the first terminal of the tail current source It1; PMOS transistors Mp3 and Mn4 are connected between the power supply voltage Vcc and the first terminal of the tail current source It1; the second terminal of the tail current source It1 is connected to ground; and PMOS transistors Mp4 and Mn2 are connected between the power supply voltage Vcc and ground.

[0030] In this configuration, NMOS transistors Mn3 and Mn4 form a differential input pair. The gate of NMOS transistor Mn3 serves as the inverting input of voltage comparator 120, connected to the power supply voltage Vcc. The gate of NMOS transistor Mn4 serves as the non-inverting input of voltage comparator 120, connected to the output of input module 130. The sources of NMOS transistors Mn3 and Mn4 are connected to the first terminal of tail current source It1. The drain of NMOS transistor Mn3 is connected to the drain of PMOS transistor Mp2, and the drain of NMOS transistor Mn4 is connected to the drain of PMOS transistor Mp3. PMOS transistors Mp1 and Mp2 form a current mirror, meaning their gates are connected to each other and to the drain of PMOS transistor Mp2. The sources of PMOS transistors Mp1 and Mp2 are connected to the power supply voltage Vcc. PMOS transistors Mp3 and Mp4 form another current mirror. The gates of PMOS transistors Mp3 and Mp4 are connected to each other and to the drain of PMOS transistor Mp3. The sources of PMOS transistors Mp3 and Mp4 are connected to the power supply voltage Vcc. NMOS transistors Mn1 and Mn2 form a third current mirror. The gates of NMOS transistors Mn1 and Mn2 are connected to each other and to the drain of NMOS transistor Mn1. The sources of NMOS transistors Mn1 and Mn2 are connected to ground. The drain of NMOS transistor Mn1 is also connected to the drain of PMOS transistor Mp1. The drain of NMOS transistor Mn2 is connected to the drain of PMOS transistor Mp4. The common node of PMOS transistors Mp4 and NMOS transistor Mn2 serves as the output of voltage comparator 120 to output the signal Vin_high.

[0031] The current discharge module 140 includes an NMOS transistor Mn5, which has a drain connected to the signal input terminal of the operational amplifier, a source connected to ground, and a gate connected to the output terminal of the voltage comparator 120. When the output signal Vin_high of the voltage comparator 120 is high, the NMOS transistor Mn5 is turned on, thereby providing a current discharge path from the signal input terminal of the operational amplifier to ground; when the output signal Vin_high of the voltage comparator 120 is low, the NMOS transistor Mn5 is turned off.

[0032] The principle of the input clamping circuit 100 according to the embodiment of the present invention is as follows: When the input voltage Vin of the operational amplifier is less than the first preset voltage (i.e., Vin < Vcc + I1×R1), the PMOS transistor Mp6 is turned off, and the non-inverting input terminal of the voltage comparator 120 is pulled up to the power supply voltage Vcc by the current source I2. Since the size ratio of the NMOS transistors Mn3 and Mn4 is N, where N is an integer greater than 1, and the signal Vsn = Vcc, the output signal Vin_high of the voltage comparator 120 is at a low level, turning off the NMOS transistor Mn5, and the entire clamping circuit does not function, without affecting the normal operation of the protected operational amplifier. Moreover, the threshold setting module 110, the current source I2, and the PMOS transistor Mp6 can ensure that when the voltage Vin at the signal input terminal of the operational amplifier is low, the voltage comparator 120 will not have an offset due to a large voltage difference between the non-inverting and inverting input terminals for a long time, which is beneficial to improving the accuracy of the entire clamping circuit.

[0033] When the input voltage Vin is higher than the first preset voltage (i.e., Vin > Vcc + I1×R1), the PMOS transistor Mp6 is turned on. At this time, the voltage Vsn at the non-inverting input terminal of the voltage comparator 120 is Vin. At this time, the voltage difference between the non-inverting and inverting input terminals of the voltage comparator 120 is Vin - Vcc = Vcc + I1×R1 - Vcc = I1×R1. By adjusting the size ratio N between the NMOS transistors Mn3 and Mn4 such that I1×R1 is greater than the input offset voltage of the comparator (i.e., the second preset voltage), the output signal Vin_high of the voltage comparator 120 flips to a high level, and the NMOS transistor Mn5 is turned on with a pulling-down ability, releasing the energy of the high-voltage pulse signal at the signal input port of the operational amplifier. Even the pulling-down ability for releasing energy can be adjusted by adjusting the size of the NMOS transistor Mn5, thereby achieving the purpose of protecting the input device of the operational amplifier.

[0034] In summary, the input clamping circuit according to the embodiment of the present invention does not require the high-voltage pulse signal at the signal input terminal of the operational amplifier to be necessarily higher than the forward conduction voltage of the diode, and at the same time does not require the chip's power supply to have the ability to absorb current. Thus, it can effectively protect the input device in the operational amplifier from being damaged by the input high-voltage signal in any case, improving the stability of the operational amplifier.

[0035] In addition, the input clamping circuit according to the embodiment of the present invention further includes a threshold setting module, and the clamping threshold voltage of the circuit can be adjusted through the threshold setting module. Compared with the prior art solution where the clamping threshold voltage cannot be adjusted, it has greater flexibility.

[0036] It should be noted that although devices are described herein as N-channel or P-channel devices, or N-type or P-type doped regions, those skilled in the art will understand that complementary devices are also possible according to the present invention. Those skilled in the art will understand that conductivity type refers to the mechanism by which conductivity occurs, such as conduction through holes or electrons; therefore, conductivity type relates to doping type, such as P-type or N-type, rather than doping concentration. Those skilled in the art will understand that the terms “during,” “when,” and “when…” used herein in relation to circuit operation are not strict terms indicating an action that occurs immediately at the start of a startup action, but rather that there may be one or more small but reasonable delays between the startup action and the reaction action initiated by it, such as various propagation delays. The terms “approximately” or “substantially” used herein mean that an element value has a parameter expected to be close to the declared value or location. However, as is well known in the art, there are always small deviations that make it difficult for the value or location to be strictly the declared value. It has been properly determined in the art that a deviation of at least 10 percent (10%) (or at least 20 percent (20%) for semiconductor doping concentration) is a reasonable deviation from the described accurate ideal target. When used in conjunction with signal states, the actual voltage value or logic state of the signal (e.g., "1" or "0") depends on whether positive or negative logic is used.

[0037] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0038] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. An input clamping circuit for an operational amplifier, comprising: The threshold setting module is used to set a threshold voltage. An input module, connected to the signal input terminal of the operational amplifier, is used to turn on when the voltage at the signal input terminal reaches a first preset voltage, wherein the first preset voltage is obtained based on the threshold voltage and the power supply voltage; A voltage comparator, whose non-inverting input is connected to the output of the input module, and whose inverting input is connected to the power supply voltage; as well as A current discharge module is connected between the signal input terminal and ground. The voltage comparator is configured to control the current discharge module to open when the voltage difference between the output voltage of the input module and the power supply voltage exceeds a second preset voltage, so as to discharge the high-voltage pulse signal at the signal input terminal to ground. The second preset voltage is set by the input offset voltage of the voltage comparator. The threshold setting module includes: The fifth PMOS transistor has a first terminal connected to the power supply voltage, a second terminal connected to the output of a first voltage signal, and a control terminal, wherein the first voltage signal is equal to the difference between the first preset voltage and the gate-source voltage of the fifth PMOS transistor. A first resistor, the first end of which is connected to the second terminal of the fifth PMOS transistor, and the second end of which is connected to the control terminal of the fifth PMOS transistor; and A first current source has its first terminal connected to the second terminal of the first resistor, and its second terminal connected to ground. The input module includes: The sixth PMOS transistor has a first terminal connected to the signal input terminal of the operational amplifier, a second terminal connected to the non-inverting input terminal of the voltage comparator, and a control terminal connected to the first voltage signal; and A second current source is connected between the power supply voltage and the non-inverting input of the voltage comparator, and is used to pull up the non-inverting input of the voltage comparator to the power supply voltage during the period when the sixth PMOS transistor is off; Specifically, when the voltage at the signal input terminal reaches the first preset voltage, the sixth PMOS transistor turns on, connecting the signal input terminal to the non-inverting input terminal of the voltage comparator. The current discharge module includes: The fifth NMOS transistor has a first terminal connected to the signal input terminal of the operational amplifier, a second terminal connected to ground, and a control terminal connected to the output of the voltage comparator.

2. The input clamping circuit according to claim 1, wherein, The voltage comparator includes: A first PMOS transistor and a first NMOS transistor are connected between the power supply voltage and ground; A second PMOS transistor and a third NMOS transistor are connected between the power supply voltage and the first terminal of a tail current source, and the second terminal of the tail current source is connected to ground. The third PMOS transistor and the fourth NMOS transistor are connected between the power supply voltage and the first terminal of the tail current source; and The fourth PMOS transistor and the second NMOS transistor are connected between the power supply voltage and ground. Wherein, the first PMOS transistor and the second PMOS transistor constitute the first current mirror, the third PMOS transistor and the fourth PMOS transistor constitute the second current mirror, and the first NMOS transistor and the second NMOS transistor constitute the third current mirror. The control terminal of the third NMOS transistor serves as the inverting input terminal of the voltage comparator, the control terminal of the fourth NMOS transistor serves as the non-inverting input terminal of the voltage comparator, and the intermediate node between the fourth PMOS transistor and the second NMOS transistor serves as the output terminal of the voltage comparator.

3. The input clamping circuit according to claim 2, wherein, The size ratio between the third NMOS transistor and the fourth NMOS transistor is N, where N is an integer greater than 1.

4. The input clamping circuit according to claim 3, wherein, The second preset voltage is set by adjusting the size ratio between the third NMOS transistor and the fourth NMOS transistor.

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