Semiconductor device and method for manufacturing the same
By setting the C-axis orientation of tin crystals at different angles in the tin-based solder layer and using heat transfer plates with different thermal conductivity, the deterioration problem of the tin-based solder layer under temperature changes and electromigration is solved, and the dual suppression of inelastic strain and electromigration is achieved, and the reliability of the semiconductor device is improved.
Patent Information
- Application Number
- CN202210270203.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-03-23
- Filing Date
- 2022-03-18
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2042-03-18
AI Technical Summary
In the prior art, the tin-based solder layer is prone to inelastic strain and electromigration deterioration under temperature changes and electromigration, and it is difficult to effectively suppress these two phenomena at the same time.
By providing the central part and the peripheral part in the tin-based solder layer, the C-axis of the tin crystal in the central part intersects at an angle greater than 45 degrees with the substrate normal, and the C-axis of the tin crystal in the peripheral part intersects or parallels with the substrate normal at an angle less than or equal to 45 degrees. The crystallization direction of the tin crystal is controlled in combination with a heat transfer plate with different thermal conductivity.
The dual suppression of inelastic strain and electromigration is achieved, and the reliability and life of the semiconductor device are improved.
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Figure CN115116990B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device and a method of manufacturing the semiconductor device. Background Art
[0002] JP 2015-65301A discloses a semiconductor device having a semiconductor element bonded to a substrate using a tin(Sn)-based solder layer. Tin crystals have anisotropy. The tin-based solder layer generates inelastic strain due to temperature change, and this inelastic strain has anisotropy. The inelastic strain is maximum in the direction of the C-axis of the tin crystal structure. When a repetitive force is applied in the direction where the inelastic strain is large, the deterioration of the tin-based solder layer may be accelerated. Therefore, in the technique described in JP 2015-65301, the tin-based solder layer is formed such that the C-axis of the tin crystals contained in the tin-based solder layer is orthogonal to the direction of the maximum stress of the tin-based solder layer. The maximum stress acting on the solder layer between the substrate and the semiconductor element faces a direction parallel to the substrate. In other words, in the technique described in JP 2015-65301, the tin-based solder layer is formed such that the C-axis of the tin crystals contained in the tin-based solder layer faces the normal direction of the substrate.
[0003] On the other hand, when an electric current flows through the solder layer, a phenomenon called electromigration occurs, as described in JP 2016-51844A. Electromigration is a phenomenon in which a metal is deformed due to the flow of electrons. Tin (Sn) tends to transfer atoms due to the flow of electrons compared to other metals such as copper (Cu). That is, electromigration is likely to occur in the tin-based solder layer. As electromigration proceeds in the tin-based solder layer, the metal distribution in the tin-based solder layer becomes non-uniform. That is, the tin-based solder layer may deteriorate. When the orientation of the C-axis in the tin crystal is aligned with the direction of the electron flow, electromigration is likely to occur. In the case where the substrate and the semiconductor element are bonded through the solder layer in the semiconductor device, electrons, that is, an electric current mainly flows in a direction orthogonal to the substrate. In other words, when the tin-based solder layer is formed such that the C-axis of the tin crystals contained in the tin-based solder layer faces a direction orthogonal to the substrate, electromigration may occur. JP 2016-51844A describes that the tin-based solder layer is formed such that the C-axis of the tin crystal is parallel to the substrate. Summary of the Invention
[0004] To reduce the inelastic strain of the tin-based solder layer, the C-axis of the tin crystal can be oriented orthogonal to the substrate, but in this case, the effect of electromigration may become greater. To reduce the effect of electromigration on the tin-based solder layer, the C-axis of the tin crystal can be orthogonal to the normal of the substrate, but in this case, the inelastic strain may become greater. The object of the present disclosure is to provide a semiconductor device that has greater resistance to both inelastic strain and electromigration, and a method of manufacturing the semiconductor device.
[0005] According to a first aspect of the present disclosure, a semiconductor device includes a substrate, a semiconductor element, and a tin-based solder layer. The semiconductor element faces the substrate in a direction orthogonal to the substrate. The direction orthogonal to the substrate is the normal direction of the substrate. The normal direction of the substrate corresponds to the normal of the substrate. The tin-based solder layer bonds the semiconductor element to the substrate. The tin-based solder layer includes a central portion and a peripheral portion. When viewed from the normal direction, the peripheral portion surrounds the central portion. The tin-based solder layer includes tin crystals having a C-axis, and the C-axis is located at each of the central portion and the peripheral portion. The C-axis at the central portion intersects the normal at an angle greater than 45 degrees with respect to the normal. The C-axis at the peripheral portion intersects the normal at an angle less than or equal to 45 degrees with respect to the normal, or is parallel to the normal.
[0006] In the above semiconductor device, at the central portion of the tin-based solder layer, the C-axis intersects the normal of the substrate at an angle greater than 45 degrees with respect to the normal of the substrate. If the C-axis intersects the normal of the substrate at an angle greater than 45 degrees with respect to the normal of the substrate, the tin-based solder layer can suppress the effect of electromigration even if the inelastic strain is not reduced. Since the C-axis at the peripheral portion intersects the normal of the substrate at an angle less than or equal to 45 degrees with respect to the normal of the substrate or the C-axis is parallel to the normal, the inelastic strain of the tin-based solder layer becomes smaller even if the effect of suppressing the electromigration effect is relatively small. However, the peripheral portion has a smaller current than the central portion. Since the current is smaller, overall considering the semiconductor device, the effect of electromigration at the peripheral portion is relatively small. On the other hand, by suppressing the inelastic strain at the peripheral portion, the strain of the central portion surrounded by the peripheral portion is also suppressed. The semiconductor device described in this specification has higher resistance to both inelastic strain and electromigration.
[0007] In the central portion, the C-axis is orthogonal to the normal of the substrate. In the tin-based layer, the central portion has a greater current than the peripheral portion. Therefore, if the C-axis is orthogonal to the normal of the substrate in the central portion, a higher resistance to electromigration can be obtained. On the contrary, since no large amount of current flows in the peripheral portion, the influence of electromigration is relatively small.
[0008] According to a second aspect of the present disclosure, there is provided a method of manufacturing a semiconductor device including a substrate, a semiconductor element, and a tin-based solder layer. The semiconductor element faces the substrate in a direction orthogonal to the substrate. The direction orthogonal to the substrate is the normal direction of the substrate. The tin-based solder layer bonds the semiconductor element to the substrate. The method includes: a first step of heating and melting a tin-based solder material disposed between the semiconductor element and the substrate; and a second step of cooling the melted tin-based solder material and solidifying the tin-based solder. In the second step, a heat transfer plate is interposed between the substrate and the cooler. The heat transfer plate includes: a first region that faces the central portion of the tin-based solder layer when viewed in the normal direction; and a second region that faces the peripheral portion of the tin-based solder layer when viewed in the normal direction. The peripheral portion surrounds the central portion when viewed in the normal direction. The first region has a higher heat transfer rate than the second region.
[0009] When the heat transfer plate is employed, heat flows in the normal direction of the substrate at the central portion of the tin-based layer. At the peripheral portion, heat flows in a direction inclined with respect to the normal direction. The melted tin-based solder layer crystallizes such that the C-axis is perpendicular to the direction of heat flow. Therefore, by employing the above heat transfer plate, the tin-based solder layer can be formed such that the C-axis is orthogonal to the normal of the substrate at the central portion and the C-axis is inclined with respect to the normal of the substrate at the peripheral portion. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Other objects, features, and advantages of the present disclosure will become more apparent from the following detailed description with reference to the accompanying drawings. In the drawings:
[0011] Figure 1 is a plan view of a semiconductor device according to a first embodiment;
[0012] Figure 2 is along Figure 1 the line II-II shown in the cross-sectional view of the semiconductor device taken;
[0013] Figure 3 is a cross-sectional view of a semiconductor device according to a second embodiment;
[0014] Figure 4 is a cross-sectional view of a semiconductor device according to a third embodiment;
[0015] Figure 5 is a diagram showing the manufacturing process of the semiconductor device in the fourth embodiment; and
[0016] Figure 6 is a diagram showing another manufacturing process of the semiconductor device in the fourth embodiment. DETAILED DESCRIPTION
[0017] (First Embodiment)
[0018] The following describes the semiconductor device 2 according to the first embodiment with reference to Figure 1 and 2 . Figure 1 Illustrates a plan view of the semiconductor device 2. Figure 2 Illustrates a cross-sectional view of the semiconductor device 2. Figure 2 Illustrates a cross-section of the semiconductor device 2 taken along the line II-II in Figure 1 . The semiconductor device 2 is a device in which the semiconductor element 10 is bonded above the substrate 20.
[0019] In the coordinate system of each of the diagrams in Figure 1 and Figure 2 , the Z-axis corresponds to the direction orthogonal to the substrate 20. The direction orthogonal to the substrate 20 may also be referred to as the normal direction of the substrate 20. The normal direction of the substrate 20 corresponds to the normal 22 of the substrate 20 described below. The semiconductor element 10 faces the substrate 20 in the normal direction of the substrate 20.
[0020] The solder layer 30 bonds the semiconductor element 10 to the substrate 20. Hereinafter, the central portion of the solder layer 30 observed in the normal direction (i.e., the Z-direction of the substrate 20) may also be referred to as the central portion 32, and the region surrounding the central portion 32 observed in the normal direction may also be referred to as the peripheral portion 33.
[0021] The semiconductor element 10 is a power transistor and has one surface on which the collector 11 is arranged and another surface on which the emitter 12 is arranged. Figure 2 The illustration of the structure of the semiconductor element other than the collector 11 and the emitter 12 is omitted. A wiring pattern 21 is formed on the substrate 20. The wiring pattern 21 refers to a conductive path formed on the surface of the substrate 20.
[0022] The wiring pattern 21 of the substrate faces the collector 11 which is one of the electrodes of the semiconductor element 10. The solder layer 30 is in contact with the wiring pattern 21 and the collector 11. A circuit (not shown) is mounted on the substrate 20, and the solder layer 30 and the wiring pattern 21 electrically connect the collector 11 of the semiconductor element 10 to the circuit. The member for electrically connecting the emitter 12 to the circuit is not shown.
[0023] The solder layer 30 contains tin (Sn). The tin-containing solder may also be referred to as a tin-based solder layer. The solder layer 30 is a tin-based solder layer. As an example of a tin-based solder material, an Sn-3Ag-0.5Cu alloy can be used. Tin crystallizes in the solder layer 30. The orientation of the C-axis 31 of the tin crystals is different in the central portion 32 of the solder layer 30 and in the peripheral portion 33 of the solder layer 30. When it is not necessary to distinguish between the two C-axes 31a and 31b, the C-axis 31a at the central portion 32 and the C-axis 31b at the peripheral portion 33 can be expressed as the C-axis 31.
[0024] The C-axis 31a at the central portion 32 intersects the normal 22 of the substrate 20 at an angle greater than 45 degrees with respect to the normal 22. The C-axis 31b at the peripheral portion 33 intersects the normal 22 at an angle of 45 degrees or less with respect to the normal 22. Alternatively, the C-axis 31b at the peripheral portion 33 is parallel to the normal 22.
[0025] In Figure 2 、 Figure 3 、 Figure 4 , the angle Ang-a represents the angle formed by the C-axis 31a at the central portion 32 and the normal 22, and the angle Ang-b represents the angle Ang-b formed by the C-axis 31b at the peripheral portion 33 and the normal 22. The angle formed by the C-axis 31 and the normal 22 refers to the acute angle formed by the two lines. The angle on the obtuse side can also be represented as follows. For example, the angle Ang-a formed by the C-axis 31a at the central portion 32 and the normal 22 can be greater than 45 degrees and less than 135 degrees, and the angle Ang-b formed by the C-axis 31b at the peripheral portion 33 and the normal 22 can be less than or equal to 45 degrees or can be greater than or equal to 135 degrees.
[0026] The advantages of the different orientations of the C-axis 31 at the central portion 32 and the peripheral portion 33 are described below. In a tin-based solder layer, when the orientation of the C-axis of the tin crystals inside the solder matches the current direction, electromigration occurs, in other words, the solder deteriorates. When the orientation of the C-axis is orthogonal to the current direction, the progress of electromigration is the slowest. In a tin-based solder, the inelastic strain in the C-axis direction becomes greater than the inelastic strain in other directions. Therefore, when the orientation of the C-axis coincides with the direction of the maximum stress acting on the solder, the inelastic strain generated in the solder becomes larger. In other words, the deterioration caused by pressure develops. On the contrary, when the orientation of the C-axis is orthogonal to the orientation of the maximum stress, the inelastic strain becomes the smallest. In other words, the development of deterioration caused by stress becomes the slowest.
[0027] In the solder layer 30 sandwiched between the substrate 20 and the semiconductor element 10, the current is directed in the direction of the normal line 22 of the substrate 20, and the direction of the maximum stress is orthogonal to the normal line 22. When the C-axis 31 intersects the normal line 22 at an angle greater than 45 degrees with respect to the normal line 22, the effect of suppressing electromigration is greater than the effect of suppressing inelastic strain. When the C-axis intersects the normal line 22 at an angle less than or equal to 45 degrees with respect to the normal line 22, the effect of suppressing inelastic strain is greater than the effect of suppressing electromigration.
[0028] Therefore, in the central portion 32 where the current flows more than in the peripheral portion 33, the solder layer 30 is arranged such that the C-axis 31a intersects the normal line 22 at an angle greater than 45 degrees with respect to the normal line 22. A remarkable effect of suppressing electromigration is obtained in the central portion 32 where the current flows more. In the peripheral portion 33 surrounding the central portion 32, the solder layer 30 is arranged such that the C-axis 31b intersects the normal line 22 at an angle less than or equal to 45 degrees with respect to the normal line 22. In the peripheral portion 33, a remarkable effect of suppressing inelastic strain is obtained. If inelastic strain can be suppressed in the peripheral portion 33, inelastic strain in the central portion 32 surrounded by the peripheral portion 33 can also be suppressed. In the central portion 32, even if the effect of suppressing inelastic strain caused by the orientation of the C-axis is small, the effect of suppressing inelastic strain applied by the peripheral portion 33 can be obtained. The solder layer 30 of the semiconductor device 2 has higher resistance to both inelastic strain and electromigration.
[0029] (Second Embodiment)
[0030] Figure 3 A cross-sectional view of a semiconductor device 2a according to the second embodiment is shown. In the semiconductor device 2a, the C-axis 31a at the central portion 32 of the solder layer 30 is orthogonal to the normal line 22 (Ang-a = 90 degrees). The C-axis 31b at the peripheral portion 33 surrounding the central portion 32 is parallel to the normal line 22 (Ang-b = 0 degrees). When the orientation of the C-axis 31 is set as described above, the maximum effect of suppressing electromigration is obtained in the central portion 32, and the maximum effect of suppressing deterioration caused by inelastic strain is obtained in the peripheral portion 33.
[0031] (Third Embodiment)
[0032] Figure 4FIG. shows a cross-sectional view of a semiconductor device 2b according to the third embodiment. In the semiconductor device 2b, the C-axis 31a at the central portion 32 of the solder layer 30 is orthogonal to the normal line 22 (Ang-a = 90 degrees). The C-axis 31b at the peripheral portion 33 surrounding the central portion 32 is inclined at an angle of 45 degrees with respect to the normal line 22 (Ang-b = 45 degrees) with respect to the normal line 22. When the orientation of the C-axis 31 is set as described above, the maximum effect of suppressing electromigration is obtained in the central portion 32, and the maximum effects of suppressing deterioration caused by inelastic strain and suppressing electromigration are obtained in the peripheral portion 33.
[0033] (Fourth Embodiment)
[0034] The method for manufacturing the semiconductor device 2 described in the first embodiment is described below. The manufacturing method includes a first process and a second process. In the first process, the tin-based solder material disposed between the substrate and the semiconductor element is heated and melted. As Figure 5 shown, for example, the substrate 20, the semiconductor element 10, and the tin-based solder material 35 are placed in a high-temperature furnace 60 and heated. The tin-based solder material 35 is sandwiched between the substrate 20 and the semiconductor element 10. In the second process, the molten solder material is cooled and solidified. The bonding method of placing a solid or paste solder material at a desired position and then melting the solder material is also called a reflow soldering process.
[0035] Figure 6 The second process is illustrated. Figure 6 The illustration of the wiring pattern 21, the collector 11, and the emitter 12 is omitted. A cooler 40 is attached to the substrate 20 to solidify the molten tin-based solder material 35. A heat transfer plate 50 is sandwiched between the substrate 20 and the cooler 40. The heat transfer plate 50 has a first region 51 and a second region 52. When viewed from the normal direction of the substrate 20 (i.e., the Z direction), the first region 51 faces the central portion 32 of the semiconductor element 10. The second region 52 faces the peripheral portion 33 surrounding the central portion 32. The thermal conductivity at the first region 51 is higher than the thermal conductivity at the second region 52. Thermal conductivity can also be referred to as the rate of heat flow.
[0036] The heat of the molten tin-based solder material 35 is transferred to the cooler 40 through the heat transfer plate 50. Since the central portion 32 faces the first region 51 having a higher thermal conductivity, the heat of the central portion 32 is transferred in the direction parallel to the normal line 22 of the substrate 20, in other words, in the direction of the Z axis in the coordinate system of the drawing. The dashed arrow line 53 indicates the heat transfer direction at the central portion 32 of the solder layer 30.
[0037] The peripheral portion 33 faces the second region 52 having a lower thermal conductivity. The heat in the peripheral portion 33 does not flow in a direction parallel to the normal, but in an inclined direction to approach the first region 51 having a higher thermal conductivity. The dashed arrow line 54 indicates the heat transfer direction at the peripheral portion 33. In the case of tin solidification, tin crystallizes such that the C-axis is orthogonal to the heat flow. Therefore, at the central portion 32, the C-axis 31a is perpendicular to the normal 22, i.e., the Z-axis, and at the peripheral portion 33, the C-axis 31b is inclined with respect to the normal 22, i.e., the Z-axis. By appropriately determining the position of the boundary between the first region 51 and the second region 52 of the heat transfer plate 50, an angle of 45 degrees or less between the C-axis 31b and the normal 22 (i.e., the Z-axis) at the peripheral portion 33 can be set. Thus, the semiconductor device 2 described in the first embodiment is obtained.
[0038] Since the thermal conductivity of the second region 52 is lower than that of the first region 51, the second region 52 can be a gap or void.
[0039] The points to note regarding the technology of the above embodiments are described below. The semiconductor element 10 is not limited to a transistor.
[0040] The boundary between the central portion 32 and the peripheral portion 33 of the solder layer 30 does not have to be clearly set. In other words, in the boundary region between the central portion 32 and the peripheral portion 33, the orientation of the C-axis 31 can gradually change. The C-axis 31a can intersect at an angle greater than 45 degrees with respect to the normal 22 in most of the central portion 32, and the C-axis 31b can intersect at an angle less than or equal to 45 degrees with respect to the normal 22. Alternatively, the C-axis 31b can be parallel to the normal in most of the peripheral portion 33.
[0041] Although specific examples of the present disclosure have been described in detail above, these are merely examples and do not limit the scope of this specification. The technology described in this specification includes various modifications and variations of the above specific examples. Additionally, the technical elements described in this specification or the drawings are useful technically alone or in various combinations, and are not limited to the combinations described in this specification at the time of filing the application. Furthermore, the technology illustrated in this specification or the drawings can achieve multiple purposes simultaneously, and achieving one of the purposes itself has technical usefulness.
Claims
1. A semiconductor device, comprising: a substrate; a semiconductor element configured to face the substrate in a direction orthogonal to the substrate, the direction being the normal direction of the substrate and corresponding to the normal of the substrate; and a tin-based solder layer configured to bond the semiconductor element to the substrate, wherein the tin-based solder layer includes a central portion and a peripheral portion surrounding the central portion when observed in the normal direction, wherein the tin-based solder layer includes tin crystals having a C-axis, and the C-axis is located at each of the central portion and the peripheral portion, wherein the C-axis at the central portion intersects the normal at an angle greater than 45 degrees with respect to the normal, and wherein the C-axis at the peripheral portion intersects the normal at an angle less than or equal to 45 degrees with respect to the normal, or is parallel to the normal.
2. The semiconductor device according to claim 1, wherein, The C-axis is orthogonal to the normal at the central portion.
3. A method of manufacturing a semiconductor device, the semiconductor device including a substrate, a semiconductor element, and a tin-based solder layer, the semiconductor element facing the substrate in a direction orthogonal to the substrate, the direction being the normal direction of the substrate, the tin-based solder layer bonding the semiconductor element to the substrate, the method comprising: a first step of heating and melting a tin-based solder material disposed between the semiconductor element and the substrate; and a second step of cooling the melted tin-based solder material and solidifying the tin-based solder material, wherein, in the second step, a heat transfer plate is sandwiched between the substrate and a cooler, wherein the heat transfer plate includes: a first region that faces the central portion of the tin-based solder layer when observed in the normal direction, and a second region that faces the peripheral portion of the tin-based solder layer when observed in the normal direction, wherein, when observed in the normal direction, the peripheral portion surrounds the central portion, and wherein the first region has a higher heat transfer rate than the second region.
Citation Information
Patent Citations
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