Methods and equipment for measuring the resistance of nodal contacts

Abstract

This disclosure provides a method and apparatus for measuring the resistance of node contacts. The method includes: determining at least three paths on a DRAM, each path sequentially including: a first component, a substrate of a transistor on the DRAM, and a second component, wherein the first component is a first body of the DRAM, and the second component is a node contact or a second body of the DRAM, and different paths include substrates of different lengths; testing the paths to obtain the path resistance; and determining the resistance of the node contact based on the path resistance. The path resistance of each path and the resistance of each structure included in the path constitute an equation, thereby obtaining multiple such equations. Thus, the resistance of the node contact in the path can be obtained by combining multiple equations. The node contact resistance obtained by solving is the node contact resistance extracted from the path resistance, and does not include the resistance of the body and the substrate in the path, thus improving the accuracy of the node contact resistance.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and more particularly to a method and apparatus for measuring the resistance of node contacts. Background Technology

[0002] DRAM (Dynamic Random Access Memory) is an internal memory comprising one or more memory arrays, each array consisting of M×N memory cells, each capable of storing one bit of data. Memory cells store charge via storage capacitors, and NC (node ​​contacts) connect transistors and storage capacitors. The resistance of the NC affects the data read / write speed to the storage capacitors. Higher NC resistance results in slower read / write speeds and greater read / write latency. Therefore, determining the NC resistance is crucial for improving DRAM read / write speeds and reducing read / write latency.

[0003] In existing technologies, the resistance measurement process of an NC (non-linear oscillator) involves measuring a set of voltages and currents. For example, test probes can be connected to both the DRAM body and the NC to measure the voltage difference and corresponding current between them. The resistance of the NC can then be calculated from this voltage and current reading.

[0004] However, the resistance accuracy of the NC obtained by the above method is low. Summary of the Invention

[0005] This disclosure provides a method and apparatus for measuring the resistance of node contacts to improve the resistance accuracy of NC.

[0006] In a first aspect, embodiments of this disclosure provide a method for measuring the resistance of a node contact, the method comprising:

[0007] At least three pathways are defined on the DRAM, each pathway sequentially comprising: a first component, a substrate of a transistor on the DRAM, and a second component, wherein the first component is a first body of the DRAM, the second component is a node contact of the DRAM or a second body of the DRAM, and different pathways include substrates of different lengths;

[0008] The path resistance of each path is obtained by testing the path individually.

[0009] The resistance of the node contact is determined based on at least three of the said path resistances.

[0010] In some implementations, determining the resistance of the node contact based on at least three of the path resistances includes:

[0011] Determine the length ratio between the substrates in any two of the said pathways;

[0012] The functional relationship between the resistances of the substrates in the at least three paths is determined by the length ratio;

[0013] The resistance of the node contact is determined based on the functional relationship between the resistances of the substrates and at least three of the path resistances.

[0014] In some embodiments, determining the resistance of the node contact based on the functional relationship between the resistances of the substrates and at least three of the path resistances includes:

[0015] A functional relationship is created for each of the said pathways, which is the correspondence between the pathway resistance and the resistance of the first body, the substrate, and the second component in the pathway;

[0016] The resistance of the node contact is obtained by solving the functional relationship between the path and the resistance of the substrate.

[0017] In some implementations, determining at least three paths from the DRAM includes:

[0018] Select a target region uniformly distributed on the substrate from the DRAM;

[0019] Determine the at least three pathways from the target region.

[0020] In some implementations, the first components of different pathways share the same first body, and / or the first components of different pathways use different first bodies.

[0021] In some implementations, determining the at least three pathways from the target region includes:

[0022] Two adjacent entities are selected from the target area, which are respectively designated as the first entity and the second entity;

[0023] Select at least two nodes to contact within the target region;

[0024] The at least three paths are determined based on the first body, the second body, and the at least two node contacts, wherein the first component and the second component of one path are the first body and the second body, respectively, and the first component and the second component of at least two paths are the first body and one node contact, respectively.

[0025] In some implementations, selecting at least two node contacts from the target region includes:

[0026] Select at least two node contacts from the node contacts between the adjacent entities, wherein the at least two node contacts are located on the same straight line as the adjacent entities.

[0027] In some implementations, the at least two node contacts are evenly distributed between the first body and the second body.

[0028] In some embodiments, two or three node contacts are selected, and three or four pathways are selected. In some embodiments, testing each pathway to obtain its pathway resistance includes:

[0029] For each of the said pathways, a first test probe is connected to a first component of the pathway, and a second test probe is connected to a second component of the pathway.

[0030] The path is tested using the first test probe and the second test probe to obtain the voltage difference across the path and the current flowing through the path.

[0031] The path resistance of the path is determined based on the voltage difference and the current.

[0032] In some implementations, the connection position of the first test probe to the first body is the position closest to the node; when the second component is the second body, the connection position of the second test probe to the second body is the position closest to the node.

[0033] In some embodiments, the method further includes:

[0034] The DRAM is processed to expose the polysilicon gate layer of the DRAM, and then the path is tested to obtain the path resistance of the path.

[0035] In a second aspect, embodiments of this disclosure provide a resistance measuring device for node contacts, comprising:

[0036] A path determination module is used to determine at least three paths from the DRAM, each path sequentially including: a first component, a substrate of a transistor on the DRAM, and a second component, wherein the first component is a first body of the DRAM, the second component is a node contact of the DRAM or a second body of the DRAM, and different paths include substrates of different lengths;

[0037] A path resistance testing module is used to test each path to obtain the path resistance.

[0038] A resistance determination module is used to determine the resistance of the node contact based on at least three of the said path resistances.

[0039] In some implementations, the resistance determination module is further configured to:

[0040] Determine the length ratio between the substrates in any two of the said pathways;

[0041] The functional relationship between the resistances of the substrates in the at least three paths is determined by the length ratio;

[0042] The resistance of the node contact is determined based on the functional relationship between the resistances of the substrates and at least three of the path resistances.

[0043] In some implementations, the resistance determination module is further configured to:

[0044] When determining the resistance of the node contact based on the functional relationship between the resistances of the substrate and the resistances of at least three of the pathways, a functional relationship is created for each of the pathways, which is the correspondence between the pathway resistance of the pathway and the resistance of the first body in the pathway, the resistance of the substrate, and the resistance of the second component.

[0045] The resistance of the node contact is obtained by solving the functional relationship between the path and the resistance of the substrate.

[0046] In some embodiments, the path determination module is further configured to:

[0047] When determining at least three paths from the DRAM, a target region uniformly distributed on the substrate is selected from the DRAM;

[0048] Determine the at least three pathways from the target region.

[0049] In some implementations, the first components of different pathways share the same first body, and / or the first components of different pathways use different first bodies.

[0050] In some embodiments, the path determination module is further configured to:

[0051] When determining the at least three pathways from the target region, two adjacent entities are selected from the target region, respectively as the first entity and the second entity;

[0052] Select at least two nodes to contact within the target region;

[0053] The at least three paths are determined based on the first body, the second body, and the at least two node contacts, wherein the first component and the second component of one path are the first body and the second body, respectively, and the first component and the second component of at least two paths are the first body and one node contact, respectively.

[0054] In some implementations, selecting at least two node contacts from the target region includes:

[0055] Select at least two node contacts from the node contacts between the adjacent entities, wherein the at least two node contacts are located on the same straight line as the adjacent entities.

[0056] In some implementations, the at least two node contacts are evenly distributed between the first body and the second body.

[0057] In some implementations, the selected node contacts are two or three, and the pathways are three or four.

[0058] In some embodiments, the path resistance testing module is also used for:

[0059] When testing the pathways to obtain the pathway resistance, for each pathway, a first test probe is connected to a first component of the pathway, and a second test probe is connected to a second component of the pathway.

[0060] The path is tested using the first test probe and the second test probe to obtain the voltage difference across the path and the current flowing through the path.

[0061] The path resistance of the path is determined based on the voltage difference and the current.

[0062] In some implementations, the connection position of the first test probe to the first body is the position closest to the node; when the second component is the second body, the connection position of the second test probe to the second body is the position closest to the node.

[0063] In some embodiments, the apparatus further includes:

[0064] A preprocessing module is used to process the DRAM to expose the polysilicon gate layer of the DRAM and allow it to enter the path determination module.

[0065] Thirdly, embodiments of this disclosure also provide an electronic device, including: at least one processor and a memory;

[0066] The memory stores computer-executed instructions;

[0067] The at least one processor executes computer execution instructions stored in the memory, causing the electronic device to implement the method described in the first aspect.

[0068] Fourthly, embodiments of this disclosure also provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a computing device, cause the computing device to implement the method described in the first aspect.

[0069] Fifthly, embodiments of this disclosure also provide a computer program product for performing the method described in the first aspect.

[0070] The method and apparatus for measuring the resistance of node contacts provided in this disclosure can identify multiple paths, test each path, and obtain the path resistance of that path. The path resistance of each path, together with the resistances of the various structures included in that path, forms an equation, thereby obtaining multiple such equations. In this way, the resistance of the node contacts in the path can be obtained by combining multiple equations. The obtained node contact resistance is extracted from the path resistances and does not include the resistance of the main body or the substrate in the path, thus improving the accuracy of the node contact resistance. Attached Figure Description

[0071] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the embodiments of the present disclosure.

[0072] Figure 1 This is a side view schematic diagram of a DRAM structure provided in an embodiment of this disclosure;

[0073] Figure 2 This is a top view schematic diagram of a DRAM structure provided in an embodiment of this disclosure;

[0074] Figure 3 This is a flowchart illustrating the steps of a method for measuring the resistance of a node contact according to an embodiment of this disclosure;

[0075] Figure 4 This is a schematic diagram of a pathway provided in an embodiment of this disclosure;

[0076] Figure 5 This is a schematic diagram of an equivalent circuit provided in an embodiment of this disclosure;

[0077] Figures 6 to 9 These are schematic diagrams of the equivalent circuit structures corresponding to the four paths provided in the embodiments of this disclosure;

[0078] Figure 10 This is a schematic diagram of the structure of a resistance measuring device for node contact provided in an embodiment of this disclosure;

[0079] Figure 11 This is a structural block diagram of an electronic device provided in an embodiment of this disclosure.

[0080] The accompanying drawings have illustrated specific embodiments of the present disclosure, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the present disclosure in any way, but rather to illustrate the concepts of the present disclosure to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0081] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this disclosure as detailed in the appended claims.

[0082] Figure 1 This is a side view schematic diagram of a DRAM structure provided in an embodiment of this disclosure. Figure 2 This is a top view schematic diagram of a DRAM structure provided in an embodiment of this disclosure. (Refer to...) Figure 1 and Figure 2 As shown, DRAM includes a body contact, a transistor substrate, WL (word line), BLC (bit line contact), NC (non-linear contact), BL (bit line), and STI (shallow trench isolation). From... Figure 2 As can be seen, the main body is distributed around the perimeter, with multiple active areas (AAs) in the center. Each active area can have at least two non-active areas (NCs), and NCs can be connected by bounding channels (BLCs). Furthermore, bit lines are vertically arranged in the diagram, with multiple lines, each connecting multiple AAs. The bit lines contact the AA areas via BLCs. Word lines are... Figure 2 The middle is located in the horizontal direction perpendicular to the bit line, and each word line also connects multiple AAs. Figure 1 The NCs are coupled to the same bit line, which ensures that the spacing between the NCs is the same when performing resistance testing, which is beneficial for the test. Figure 2 The position of the main body can be adjusted so that the distance between the main body and NC is the same or basically the same.

[0083] The transistors mentioned above can be any type of transistor, such as NMOS (negative channel metal-oxide-semiconductor field-effect transistor).

[0084] The drain of the aforementioned transistor can be connected to one plate of a storage capacitor to write and read data from that plate. The drain (WL) controls the transistor's on / off state, thus controlling the reading and writing operations on the storage capacitor's plate. For example, in an NMOS transistor, a high-level signal can turn the transistor on to read and write data to the storage capacitor's plate; conversely, a low-level signal can turn the transistor off to disable reading and writing to the storage cell's plate.

[0085] During the reading and writing process of the storage capacitor's plates, the transistor connects the BL to the plates, thus enabling the plates to be read and written through the BL.

[0086] from Figure 1 As can be seen, the DRAM substrate, part of the substrate, and the NC form a circuit. Therefore, the NC resistance calculated using the voltage difference and current between the substrate and the NC is inaccurate, as it includes not only the NC resistance but also... Figure 1 The resistance of the PN junction, the resistance of the main body, and the resistance of part of the substrate in this path.

[0087] To more accurately determine the resistance of the NC, embodiments of this disclosure consider identifying multiple of the aforementioned pathways and testing each pathway to obtain its pathway resistance. The pathway resistance of each pathway, together with the resistances of the various structures included within that pathway, forms an equation, resulting in multiple such equations. These multiple equations can then be combined to solve for the NC resistance. The solved NC resistance is extracted from the pathway resistances and does not include the resistance of the main body or the substrate within the pathway, thus improving the accuracy of the NC resistance.

[0088] It can be seen that the resistance of the NC obtained in the embodiments of this disclosure includes the resistance of the PN junction and the resistance of the NC itself, which means that the resistance of the NC obtained in the embodiments of this disclosure is also an approximation. However, compared with using the sum of the resistance of the PN junction, the resistance of the main body, and the resistance of part of the substrate as the approximate resistance of the NC, the embodiments of this disclosure still improve the accuracy of the resistance of the NC.

[0089] Figure 3 This is a flowchart illustrating the steps of a method for measuring the resistance of a node contact according to an embodiment of this disclosure. Please refer to... Figure 3 The above method includes the following steps S101 to S103.

[0090] S101: Determine at least three paths from the DRAM, each path including: a first component, a substrate of a transistor on the DRAM, and a second component, wherein the first component is the first body of the DRAM, the second component is a node contact of the DRAM or the second body of the DRAM, and different paths include substrates of different lengths.

[0091] It should be noted that when the dimensions and density of each DRAM substrate are the same, the resistance of different substrates is the same; that is, the resistance of the first substrate and the second substrate is the same. Since the pathway in the embodiments of this disclosure includes at most a substrate, a substrate, and a non-conductive NC (NC), at least three pathways are required to uniquely determine the resistance of the substrate, the resistance of the substrate, and the resistance of the NC, in order to construct three equations, and it is necessary to establish the relationship between the resistances of the substrates in different pathways.

[0092] Because the embodiments of this disclosure construct equations between the resistance of the path and the resistance of the components in the path to solve for the resistance of NC, the equations corresponding to the same path are also the same when the paths are the same. As a result, the number of different equations is insufficient, making it impossible to solve for the resistance of NC.

[0093] from Figure 1 As can be seen, the distance between the first and second components in the path determines the length of the substrate, and the two can be the same. When the substrate lengths of different paths are different, the substrates included in different paths can be different, that is, the paths are different, which can avoid the inability to solve the resistance of NC due to the same path.

[0094] According to the resistivity formula: Resistance R = Resistivity ρ × Length L / Cross-sectional Area S, it can be seen that in a scenario where the substrate has a uniform distribution, that is, when both the resistivity ρ and the cross-sectional area S of the substrate are fixed, the resistance of the substrate is directly proportional to the length L of the substrate. Therefore, the relationship between the resistances of different paths can be established based on the relationship between the substrate lengths.

[0095] It can be seen that the accuracy of the relationship between the above resistances depends on the distribution of the substrate. When the distribution is uniform, the accuracy of the relationship between the resistances of the substrates in different paths is higher. Compared to selecting at least three paths in any region of the DRAM, the embodiments of this disclosure can select a target region with a uniform substrate distribution in the DRAM, and then determine at least three paths from that target region. In this way, the accuracy of the relationship between resistances can be effectively improved, thereby further improving the accuracy of the NC resistance.

[0096] In this context, uniform substrate distribution can be understood as: uniform substrate density, Figure 1The depth H of the substrate is uniform. Uniform depth H can mean that the depth H is the same at different locations.

[0097] It is understandable that the aforementioned pathways can be determined by the first component and the second component. Once the first component and the second component are determined, the substrate between the first component and the second component is also determined, thus the pathways can be determined. In other words, the process of selecting at least three pathways can be considered as the process of selecting the first component and the second component.

[0098] When selecting the first body, the same first body can be selected for different paths, so that the first components of different paths can share the same first body. In this way, when switching to the next path to test the path resistance, only the test probe of the second component needs to be moved, without moving the test probe of the first component. This helps to reduce the testing complexity of path resistance, save testing time, and improve testing efficiency. Figure 4 This is a schematic diagram of a pathway provided by an embodiment of this disclosure. It can be seen that... Figure 4 Pathways and Figure 1 The pathways in them share the same entity.

[0099] In other embodiments, the same first body can be selected for different paths, so that the first components of different paths use different first bodies. In this way, the path resistance of different paths can be tested simultaneously, which helps to save test time and improve test efficiency.

[0100] In practical applications, all of the above at least three pathways may share the same first entity, or all of the above at least three pathways may use different first entities, or some of the above at least three pathways may share a first entity, while other pathways may use different first entities.

[0101] In some implementations, two different NCs at different distances from the first body and another body (the second body) can be used as three second components, or three different NCs at different distances from the first body can be used as three second components.

[0102] When the aforementioned three second components include two NCs and a second main body, the process of determining at least three paths from the target region may include: First, selecting two adjacent main bodies from the target region, respectively designated as the first main body and the second main body. Then, selecting at least two NCs from the target region. Finally, determining at least three paths based on the first main body, the second main body, and the at least two NCs, wherein the first component and the second component of one path are respectively the first main body and the second main body, and the first component and the second component of at least two paths are respectively the first main body and an NC.

[0103] The at least two NCs described in the embodiments of this disclosure can be NCs in one or more AA areas.

[0104] Figure 5 This is a schematic diagram of an equivalent circuit provided in an embodiment of this disclosure. It can be... Figure 1 The two subjects in the text are respectively designated as the first subject and the second subject, from... Figure 1 Select three NCs from the four NCs between the two main bodies to obtain Figure 5 The equivalent circuit shown. Figure 5 The two R1 resistors are the resistors of the first and second main components, and the three R2 resistors are from... Figure 1 The three NC resistors extracted are R3 to R6, which are the resistors of the four substrates respectively.

[0105] Reference Figure 5 As shown, the resistance R3 of the first substrate is the resistance of the substrate between the first body and the first NC; the resistance R4 of the second substrate is the resistance of the substrate between the first NC and the second NC; the resistance R6 of the fourth substrate is the resistance of the substrate between the second NC and the third NC; and the resistance R5 of the third substrate is the resistance of the substrate between the third NC and the second body. When the lengths of the first, second, third, and fourth substrates are all the same, the above R3 = R4 = R5 = R6.

[0106] based on Figure 5 The equivalent circuit shown is Figures 6 to 9 These are schematic diagrams of the equivalent circuit structures corresponding to the four paths provided in the embodiments of this disclosure. Different equivalent circuits correspond to different paths.

[0107] Reference Figure 6 As shown, when the first component of the passage is the first main body, and the second component is... Figure 5 When the first NC is in the circuit, the resistor R1 of the first body, the resistor R3 of the first substrate, and the resistor R2 of the first NC constitute an equivalent circuit of the path.

[0108] Reference Figure 7 As shown, when the first component of the passage is the first main body, and the second component is... Figure 5 During the second NC phase, the resistance R1 of the first substrate, the resistance R3 of the first substrate, and the resistance R4 of the second substrate are... Figure 5 The resistor R2 in the second NC circuit constitutes the equivalent circuit corresponding to this path. Figure 7 The sum of R3 and R4 can also be understood as the resistance R34 of the substrate between the first body and the second NC.

[0109] Reference Figure 8 As shown, when the first component of the passage is the first main body, and the second component is... Figure 5In the second substrate, the resistance R1 of the first substrate, the resistance R3 of the first substrate, the resistance R4 of the second substrate, the resistance R6 of the fourth substrate, and the resistance R5 of the third substrate are... Figure 5 The resistor R1 of the second main body constitutes the equivalent circuit corresponding to this path. Figure 8 The sum of R3, R4, R5 and R6 can also be understood as the resistance R35 of the substrate between the first and second bodies.

[0110] Reference Figure 9 As shown, when the first component of the passage is the first main body, and the second component is... Figure 5 In the third NC phase, the resistance R1 of the first substrate, the resistance R3 of the first substrate, the resistance R4 of the second substrate, and the resistance R6 of the fourth substrate are... Figure 5 The resistor R2 in the third NC circuit constitutes the equivalent circuit corresponding to this path. Figure 9 The sum of R3, R4 and R6 can also be understood as the resistance R36 of the substrate between the first body and the third NC.

[0111] Combination Figures 5 to 9 It can be seen from this that Figure 7 The substrate length L2 in the equivalent circuit shown is greater than Figure 6 The substrate length L1 in the equivalent circuit shown is... Figure 8 The substrate length L3 in the equivalent circuit shown is greater than Figure 7 The substrate length L2 in the equivalent circuit shown is... Figure 9 The substrate length L4 in the equivalent circuit shown is greater than Figure 8 The substrate length L2 in the equivalent circuit shown is less than 1. Figure 8 The length L3 of the substrate in the equivalent circuit shown.

[0112] This embodiment of the disclosure can select at least three paths from a target region with a uniform substrate distribution, and one of the paths has two ends of a main body. The equation corresponding to this path includes two unknowns: the resistance R1 of the main body and the resistance R35 of the substrate. The first component and the second component of the remaining paths are the first main body and NC, respectively, and the corresponding equations include three unknowns: R1, the resistance of the substrate, and the resistance of NC.

[0113] It can be seen that when two NCs are selected, there are three pathways, which means... Figures 6 to 8 The three paths are shown. In this embodiment, the resistance of NC can be solved based on the path resistances corresponding to the three paths. This algorithm has low testing costs for path resistances and fewer equations, thereby minimizing the complexity of solving for the resistance of NC and improving the efficiency of determining the resistance of NC.

[0114] Furthermore, when three NCs are selected, there are four pathways. That is to say, the embodiments of this disclosure can also be implemented in the above-mentioned... Figures 6 to 8 Based on the three pathways shown, then... Figure 9 The pathway shown is the fourth pathway. Therefore, by eliminating differences through a larger set of functional relationships and selecting the effective set for calculation, the accuracy of the test can be further improved.

[0115] In some embodiments, at least two NCs can be selected from adjacent substrates, and these at least two NCs are located on the same straight line as the adjacent substrates. This minimizes the influence of the substrate on the test, contributing to further improvement in test accuracy. In some embodiments, the at least two NCs are evenly distributed between the first and second substrates. This makes the substrate lengths corresponding to R3 to R6 as similar as possible, and consequently, the sizes of R3 to R6 are similar. In this case, the resistances of the substrates in different paths are multiples of each other, which helps reduce the complexity of calculating the resistance of the NCs.

[0116] In some implementations, the DRAM can be processed to expose the polysilicon gate (PG) layer of the DRAM, and then proceed to the step of determining at least three paths from the DRAM. This allows for more accurate determination of the NC and the body's location, leading to better path selection, avoiding abnormal path selection, and further improving the accuracy of the NC's resistance.

[0117] In some implementations, it is also necessary to verify the functionality of the NC probe before testing. A brightening of the NC probe indicates it is functioning correctly. This ensures proper electrical conductivity on the NC, facilitating successful testing. Of course, it is also essential to ensure the main body's probes are functioning correctly to prevent any abnormal connections between the main body and the test probes.

[0118] S102: Test each path to obtain the path resistance.

[0119] In this context, the circuit resistance is the sum of the resistances of all components within the circuit. Specifically, the circuit resistance is the sum of the resistances of the first component, the substrate, and the second component. When the circuit includes a first body, a substrate, and a second body, the circuit resistance is the sum of the resistances of the first body, the substrate, and the second body. When the circuit includes a first body, a substrate, and a control (NC), the circuit resistance is the sum of the resistances of the first body, the substrate, and the NC.

[0120] This disclosure embodiment determines the path resistance using current and voltage difference. First, for each path, a first test probe is connected to a first component of the path, and a second test probe is connected to a second component of the path. Then, the path is tested using the first and second test probes to obtain the voltage difference across the path and the current flowing through the path. Finally, the path resistance is determined based on the voltage difference and current; the path resistance is the ratio of the voltage difference to the current.

[0121] In practical applications, the voltage at one end of the circuit can be set to 0 for testing. There are two testing methods. In the first method, a voltage can be applied to the other end of the circuit to test the current. In the second method, current can be supplied to the other end of the circuit to test the voltage.

[0122] As can be seen, when the voltage at one end is 0, the voltage difference between the two ends is the voltage at the other end. This avoids the need to calculate the voltage difference based on the voltage at both ends, which helps to reduce the calculation complexity of the path resistance.

[0123] In some embodiments, the connection position of the first test probe to the first body is the position closest to the NC. When the second component is the second body, the connection position of the second test probe to the second body is the position closest to the NC. That is, both the first and second test probes are located at the body closest to the memory array. In this way, the path formed by the first body, the second body, and the substrate can be aligned as much as possible, which can reduce the influence of the substrate on the path resistance and help improve the accuracy of the NC resistance.

[0124] like Figure 4 As shown, when the left body is the first body and the right body is the second body, there are multiple NCs between the first body and the second body. Therefore, the first test probe can be set on the right side of the first body, which is the position closest to the NC, and the second test probe can be set on the left side of the second body, which is the position closest to the NC.

[0125] In addition, when using nanoprobes for electrical testing, prolonged exposure should be avoided as much as possible to prevent carbon buildup, which can cause errors in the electrical test results.

[0126] S103: Determine the resistance of the node contact based on at least three path resistances.

[0127] The process involves at least two non-nuclear (NC) resistors among at least three resistance paths, allowing the NC resistors to be extracted from the three paths. First, the length ratio between the substrates in any two paths is determined. Then, a functional relationship between the substrate resistances in the at least three paths is determined using this length ratio. Finally, the NC resistor is determined based on this functional relationship and the at least three resistance paths.

[0128] When determining the length ratio, you can first determine the substrate with the shortest length, and then use the ratio of the length of the substrates of the remaining channels to the shortest length as the length ratio.

[0129] Consider the resistivity formula: Resistance R = Resistivity ρ × Length L / Cross-sectional Area S. In a scenario where the substrate distribution is uniform, meaning both the resistivity ρ and the cross-sectional area S are fixed, the substrate resistance is directly proportional to the substrate length L. Therefore, the resistance of the substrates in the remaining pathways can be expressed as the product of the resistance of the substrate with the shortest length and that length ratio. The resistance of each pathway can be represented by the resistance of the substrate with the shortest length, thus establishing a functional relationship between the substrate resistances.

[0130] Based on the functional relationship between the substrate resistances in the different pathways described above, the resistances of at least three pathways include three unknowns: the resistance of the main body, the resistance of the NC, and the resistance of the substrate with the minimum length. Thus, these three unknowns can be uniquely solved. However, this embodiment only focuses on the resistance of the NC, and the resistance of the main body and the resistance of the substrate with the minimum length are not required to be solved.

[0131] In some implementations, the process of determining the resistance of the NC based on the functional relationship between the resistances of the substrates and the resistances of at least three paths may include: first, creating a functional relationship for each path, the functional relationship being the correspondence between the path resistance and the resistance of the first body, the substrate, and the second component in the path; then, solving the functional relationship between the path and the functional relationship between the substrate resistances to obtain the resistance of the NC.

[0132] Specifically, the functional relationship between the substrate resistances can be substituted into the path resistance to solve for the resistance of NC.

[0133] For example, for Figures 6 to 8 The three pathways shown can be used to construct a functional relationship between them. Figure 6 The corresponding equivalent circuit corresponds to a functional relationship of a single path:

[0134] The resistance of the circuit is R_R1=R1+R2+R3 (1)

[0135] Figure 7 The corresponding equivalent circuit corresponds to a functional relationship of a single path:

[0136] The resistance of the circuit is R_R2=R1+R2+R3+R4=R1+R2+R34 (2)

[0137] Figure 8 The corresponding equivalent circuit corresponds to a functional relationship of a single path:

[0138] The resistance of the circuit R_R3=2×R1+R3+R4+R6+R5=2×R1+R35 (3)

[0139] Furthermore, a functional relationship between the resistances of substrates with different pathways can be constructed. Figure 6 The substrate length in the corresponding path is the shortest, and therefore can be represented by resistor R3. Figure 7 and Figure 8 The corresponding substrate resistances R34 and R35 in the path. When Figure 6 The substrate length in the corresponding pathway is L1, and Figure 7 When the substrate length in the corresponding pathway is L2, Figure 7 The functional relationship between the substrate resistances R34 and R3 in the corresponding path is as follows:

[0140] R34=(L2 / L1)×R3 (4)

[0141] when Figure 8 When the substrate length in the corresponding pathway is L3, Figure 8 The functional relationship between the substrate resistances R35 and R3 in the corresponding path is as follows:

[0142] R35=(L3 / L1)×R3 (5)

[0143] Among them, L3 is greater than L2, which is greater than L1. Based on the above functional relationships (1) to (5), the resistance R2 of NC can be obtained. The formula for the resistance R2 of NC is:

[0144]

[0145] In addition, it can also be found in the above Figures 6 to 8 In addition to the three pathways shown, it is also possible to combine Figure 9 Calculate the resistance of NC for the corresponding path.

[0146] in, Figure 9 The corresponding equivalent circuit corresponds to a functional relationship of a single path:

[0147] The resistance of the circuit is R_R4=R1+R2+R3+R4+R6=R1+R2+R36 (7)

[0148] when Figure 9 When the substrate length in the corresponding pathway is L4, Figure 9The functional relationship between the substrate resistances R36 and R3 in the corresponding path is as follows:

[0149] R36=(L4 / L1)×R3 (8)

[0150] When the third NC is located between the second NC and the second body, from Figure 5 As can be seen from this, L4 is greater than L2 and less than L3.

[0151] Based on the above functional relationships (1) to (5) and (7) and (8), the resistance R2 of NC can be obtained. The formula for the resistance R2 of NC is as follows:

[0152]

[0153] It is understandable that L1 is the distance between the first NC and the first main body, L2 is the distance between the second NC and the first main body, and L2-L1 can be the distance between the first NC and the second NC.

[0154] In practical applications, the resistance of NC can be calculated using either formula (7) or formula (9) according to actual needs. It can be seen that formula (7) corresponds to fewer paths, requiring less time to test the resistance of the paths, but with higher computational complexity. On the other hand, formula (9) corresponds to more paths, requiring more time to test the resistance of the paths, but with lower computational complexity. In addition, formula (9) can also eliminate differences by using a larger set of functional relationships and select an effective set of functional relationships for calculation.

[0155] Finally, it should be noted that L1 to L4 in this embodiment can be determined based on the spacing set during design, or can be obtained through measurement.

[0156] Corresponding to the above method embodiments, Figure 10 This is a schematic diagram of the structure of a resistance measuring device for node contacts provided in an embodiment of this disclosure. Please refer to... Figure 10 The resistance measuring device 200 for the aforementioned node contact includes:

[0157] The path determination module 201 is used to determine at least three paths from the DRAM, each path sequentially including: a first component, a substrate of a transistor on the DRAM, and a second component, wherein the first component is a first body of the DRAM, the second component is a node contact of the DRAM or a second body of the DRAM, and different paths include substrates of different lengths.

[0158] The path resistance test module 202 is used to test the path respectively to obtain the path resistance of the path.

[0159] Resistance determination module 203 is used to determine the resistance of the node contact based on at least three of the path resistances.

[0160] In some embodiments, the resistance determination module 203 is further configured to:

[0161] Determine the length ratio between the substrates in any two of the said pathways;

[0162] The functional relationship between the resistances of the substrates in the at least three paths is determined by the length ratio;

[0163] The resistance of the node contact is determined based on the functional relationship between the resistances of the substrates and at least three of the path resistances.

[0164] In some embodiments, the resistance determination module 203 is further configured to:

[0165] When determining the resistance of the node contact based on the functional relationship between the resistances of the substrate and the resistances of at least three of the pathways, a functional relationship is created for each of the pathways, which is the correspondence between the pathway resistance of the pathway and the resistance of the first body in the pathway, the resistance of the substrate, and the resistance of the second component.

[0166] The resistance of the node contact is obtained by solving the functional relationship between the path and the resistance of the substrate.

[0167] In some embodiments, the path determination module 201 is further configured to:

[0168] When determining at least three paths from the DRAM, a target region uniformly distributed on the substrate is selected from the DRAM;

[0169] Determine the at least three pathways from the target region.

[0170] In some implementations, the first components of different pathways share the same first body, and / or the first components of different pathways use different first bodies.

[0171] In some embodiments, the path determination module 201 is further configured to:

[0172] When determining the at least three pathways from the target region, two adjacent entities are selected from the target region, respectively as the first entity and the second entity;

[0173] Select at least two nodes to contact within the target region;

[0174] The at least three paths are determined based on the first body, the second body, and the at least two node contacts, wherein the first component and the second component of one path are the first body and the second body, respectively, and the first component and the second component of at least two paths are the first body and one node contact, respectively.

[0175] In some implementations, selecting at least two node contacts from the target region includes:

[0176] Select at least two node contacts from the node contacts between the adjacent entities, wherein the at least two node contacts are located on the same straight line as the adjacent entities.

[0177] In some implementations, the at least two node contacts are evenly distributed between the first body and the second body.

[0178] In some implementations, the selected node contacts are two or three, and the pathways are three or four.

[0179] In some embodiments, the path resistance testing module 202 is further used for:

[0180] When testing the pathways to obtain their resistance, for each pathway, a first test probe is connected to a first component of the pathway, and a second test probe is connected to a second component of the pathway.

[0181] The path is tested using the first test probe and the second test probe to obtain the voltage difference across the path and the current flowing through the path.

[0182] The path resistance of the path is determined based on the voltage difference and the current.

[0183] In some implementations, the connection position of the first test probe to the first body is the position closest to the node; when the second component is the second body, the connection position of the second test probe to the second body is the position closest to the node.

[0184] In some embodiments, the apparatus further includes:

[0185] A preprocessing module is used to process the DRAM to expose the polysilicon gate layer of the DRAM and allow it to enter the path determination module.

[0186] The above-described apparatus embodiment is an embodiment corresponding to the foregoing method embodiment, and has the same technical effects as the method embodiment. A detailed description of this apparatus embodiment can be found in the detailed description of the foregoing method embodiment, and will not be repeated here.

[0187] This disclosure also provides an electronic device, including at least one processor and a memory.

[0188] The memory stores computer-executed instructions.

[0189] The at least one processor executes computer execution instructions stored in the memory, causing the electronic device to implement the above-described method for measuring the resistance of node contacts.

[0190] Figure 11 This is a structural block diagram of an electronic device provided in an embodiment of the present disclosure. The electronic device 600 includes a memory 602 and at least one processor 601.

[0191] Among them, memory 602 stores computer-executed instructions.

[0192] At least one processor 601 executes computer execution instructions stored in memory 602, causing electronic device 601 to implement the aforementioned method for measuring the resistance of node contacts.

[0193] In addition, the electronic device may also include a receiver 603 and a transmitter 604, wherein the receiver 603 is used to receive information from other devices or equipment and forward it to the processor 601, and the transmitter 604 is used to send information to other devices or equipment.

[0194] This disclosure also provides a computer-readable storage medium storing computer-executable instructions that, when executed by a computing device, enable the computing device to implement a method for measuring the resistance of node contacts.

[0195] This disclosure also provides a computer program product for executing the above-described method for measuring the resistance of node contacts.

[0196] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0197] The sequence numbers of the embodiments disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0198] The above are merely preferred embodiments of the present disclosure and do not limit the patent scope of the present disclosure. Any equivalent structural or procedural transformations made based on the description and drawings of the present disclosure, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present disclosure.

Claims

1. A method for measuring the resistance of a node contact, characterized in that, The method includes: At least three pathways are defined on the DRAM, each pathway sequentially comprising: a first component, a substrate of a transistor on the DRAM, and a second component, wherein the first component is a first body of the DRAM, the second component is a node contact of the DRAM or a second body of the DRAM, and different pathways include substrates of different lengths; The path resistance of each path is obtained by testing the path individually. The resistance of the node contact is determined based on at least three of the said path resistances; Among them, at least three paths are identified from the DRAM, including: Select a target region uniformly distributed on the substrate from the DRAM; Determine the at least three pathways from the target region; The first components of different pathways share the same first body, and / or the first components of different pathways use different first bodies; Determining the at least three pathways from the target region includes: Two adjacent entities are selected from the target area, which are respectively designated as the first entity and the second entity; Select at least two of the nodes in the target area to make contact; The at least three paths are determined based on the first body, the second body, and the at least two node contacts, wherein the first component and the second component of one path are the first body and the second body, respectively, and the first component and the second component of at least two paths are the first body and one node contact, respectively.

2. The method according to claim 1, characterized in that, Determining the resistance of the node contact based on at least three of the path resistances includes: Determine the length ratio between the substrates in any two of the said pathways; The functional relationship between the resistances of the substrates in the at least three paths is determined by the length ratio; The resistance of the node contact is determined based on the functional relationship between the resistances of the substrates and at least three of the path resistances.

3. The method according to claim 2, characterized in that, Determining the resistance of the node contact based on the functional relationship between the resistances of the substrates and at least three of the path resistances includes: A functional relationship is created for each of the pathways, wherein the functional relationship of the pathway is the correspondence between the pathway resistance and the resistance of the first body, the substrate, and the second component in the pathway; The resistance of the node contact is obtained by solving the functional relationship between the path and the resistance of the substrate.

4. The method according to claim 1, characterized in that, Selecting at least two nodes to contact from the target region includes: Select at least two node contacts from the node contacts between the adjacent entities, wherein the at least two node contacts are located on the same straight line as the adjacent entities.

5. The method according to claim 4, characterized in that, The at least two node contacts are evenly distributed between the first body and the second body.

6. The method according to claim 4, characterized in that, The selected node contacts are two or three, and the paths are three or four.

7. The method according to any one of claims 1 to 3, characterized in that, The step of testing the pathways to obtain the pathway resistance includes: For each of the said pathways, a first test probe is connected to the first component of the pathway, and a second test probe is connected to the second component of the pathway. The path is tested using the first test probe and the second test probe to obtain the voltage difference across the path and the current flowing through the path. The path resistance of the path is determined based on the voltage difference and the current.

8. The method according to claim 7, characterized in that, The connection position of the first test probe to the first body is the position closest to the node; when the second component is the second body, the connection position of the second test probe to the second body is the position closest to the node.

9. The method according to any one of claims 1 to 3, characterized in that, The method further includes: The DRAM is processed to expose the polysilicon gate layer of the DRAM, and then proceeds to the step of determining at least three paths from the DRAM.

10. A resistance measuring device for node contacts, using the resistance measuring method for node contacts as described in any one of claims 1-9, characterized in that, include: A path determination module is used to determine at least three paths from the DRAM, each path sequentially including: a first component, a substrate of a transistor on the DRAM, and a second component, wherein the first component is a first body of the DRAM, the second component is a node contact of the DRAM or a second body of the DRAM, and different paths include substrates of different lengths; A path resistance testing module is used to test each path to obtain the path resistance. A resistance determination module is used to determine the resistance of the node contact based on at least three of the said path resistances.

11. An electronic device, characterized in that, include: At least one processor and memory; The memory stores computer-executed instructions; The at least one processor executes computer execution instructions stored in the memory, causing the electronic device to perform the method as described in any one of claims 1 to 9.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a computing device, cause the computing device to implement the method as described in any one of claims 1 to 9.

Images