Flip VCSEL chip structure and fabrication method thereof

Abstract

The application discloses a flip VCSEL chip structure and a manufacturing method thereof. The structure comprises a substrate, a first Bragg mirror layer, a quantum well layer, a second Bragg mirror layer and a dielectric film layer. The substrate has a first surface and a second surface arranged oppositely, and a microlens structure with a focusing function is formed on the first surface; the first Bragg mirror layer is arranged on the second surface of the substrate; the quantum well layer is arranged on the side of the first Bragg mirror layer away from the substrate; the second Bragg mirror layer is arranged on the side of the quantum well layer away from the first Bragg mirror layer; the dielectric film layer covers the sidewalls of the second Bragg mirror layer, the quantum well layer and the first Bragg mirror layer and extends to the second surface of the substrate, and the dielectric film layer partially covers the surface of the side of the second Bragg mirror layer away from the quantum well layer. The flip VCSEL chip structure has the microlens structure with the focusing function, and the packaging process of the VCSEL chip is simplified.

Description

Technical Field

[0001] This invention relates to the field of semiconductor laser chip technology, and in particular to a flip-chip VCSEL structure and its fabrication method. Background Technology

[0002] VCSEL, short for Vertical Cavity Surface Emitting Laser, is developed based on gallium arsenide semiconductor material. Unlike other light sources such as LED (Light Emitting Diode) and LD (Laser Diode), it has advantages such as small size, circular output spot, single vertical mode output, low threshold current, low cost, and easy integration into large-area arrays. It is widely used in optical communication, optical interconnect, optical storage and other fields.

[0003] Currently, in the VCSEL chip packaging process, to improve light coupling efficiency, a lens is usually added between the chip's light-emitting end and the optical fiber. This focuses the light emitted from the VCSEL chip before coupling it into the optical fiber. This process increases the number of packaging steps for the VCSEL chip, making the packaging process more complex.

[0004] The information disclosed in this background section is intended only to enhance the understanding of the overall background of the invention and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a flip-chip VCSEL structure and its fabrication method, which has a built-in microlens structure, simplifies the packaging process of VCSEL chips, and improves the heat dissipation effect of VCSEL chips.

[0006] To achieve the above objectives, embodiments of the present invention provide a flip-chip VCSEL structure, including a substrate, a first Bragg mirror layer, a quantum well layer, a second Bragg mirror layer, and a dielectric film layer.

[0007] The substrate has a first surface and a second surface disposed opposite to each other. A microlens structure is formed on the first surface. A first Bragg mirror layer is disposed on the second surface of the substrate and partially covers the second surface. A quantum well layer is disposed on the side of the first Bragg mirror layer away from the substrate. A second Bragg mirror layer is disposed on the side of the quantum well layer away from the first Bragg mirror layer. A dielectric film layer covers the sidewalls of the second Bragg mirror layer, the quantum well layer, and the first Bragg mirror layer, and extends to the second surface of the substrate. The dielectric film layer partially covers the surface of the second Bragg mirror layer away from the quantum well layer.

[0008] In one or more embodiments of the present invention, a high-alumina oxide layer is disposed on the side surface of the first Bragg mirror layer facing away from the substrate, and a window area corresponding to the microlens structure is formed through the high-alumina oxide layer.

[0009] In one or more embodiments of the present invention, the flip-chip VCSEL structure further includes a first electrode and a second electrode.

[0010] The first electrode is disposed on the surface of the second Bragg mirror layer away from the quantum well layer and covers the exposed surface of the second Bragg mirror layer; the second electrode is disposed on the second surface of the substrate and extends from the second surface of the substrate to the surface of the dielectric film layer away from the second Bragg mirror layer, the second electrode is electrically isolated from the first electrode, and the second electrode and the first electrode are located on the same plane.

[0011] In one or more embodiments of the present invention, the number of logs of the second Bragg reflector layer is greater than the number of logs of the first Bragg reflector layer.

[0012] In one or more embodiments of the present invention, the microlens structure is integrally formed with the substrate.

[0013] In one or more embodiments of the present invention, the microlens structure is a hemispherical structure that is convex relative to a first surface of the substrate.

[0014] In one or more embodiments of the present invention, the surface of the microlens structure is coated with an AR antireflection film.

[0015] In one or more embodiments of the present invention, the substrate is made of GaAs and the microlens structure is made of GaAs.

[0016] In one or more embodiments of the present invention, the first Bragg reflector layer is an N-DBR, the second Bragg reflector layer is a P-DBR, the first electrode is a P-type metal electrode, and the second electrode is an N-type metal electrode.

[0017] This invention also provides a method for fabricating a flip-chip VCSEL, comprising:

[0018] A substrate is provided, the substrate having a first surface and a second surface disposed opposite to each other;

[0019] A first Bragg mirror layer is formed on the second surface of the substrate;

[0020] A high-alumina oxide layer is formed on the surface of the first Bragg mirror layer facing away from the substrate, and the high-alumina oxide layer has a window area for current to flow through;

[0021] A quantum well layer is formed on the side of the high-aluminum oxide layer opposite to the first Bragg mirror layer;

[0022] A second Bragg mirror layer is formed on the side of the quantum well layer opposite to the high-alumina oxide layer;

[0023] A dielectric film is formed, which covers the sidewalls of the second Bragg mirror layer, the quantum well layer, and the first Bragg mirror layer, as well as the second surface extending to the substrate, and the dielectric film partially covers the surface of the second Bragg mirror layer opposite to the quantum well layer.

[0024] A first electrode and a second electrode are formed. The first electrode is located on the surface of the second Bragg mirror layer away from the quantum well layer and covers the exposed surface of the second Bragg mirror layer. The second electrode is located on the second surface of the substrate and extends from the second surface of the substrate to the surface of the dielectric film layer away from the second Bragg mirror layer. The second electrode is electrically isolated from the first electrode and the second electrode is located on the same plane as the first electrode.

[0025] The substrate is thinned, and a microlens structure corresponding to the window area on the high-alumina oxide layer is formed on the first surface of the substrate. An AR antireflection film is then deposited on the surface of the microlens structure.

[0026] In one or more embodiments of the present invention, a high-alumina oxide layer is formed on the surface of the first Bragg mirror layer facing away from the substrate, and the high-alumina oxide layer has a window region for current flow, including:

[0027] A high-alumina ALGaAs layer is formed on the surface of the first Bragg mirror layer facing away from the substrate. The high-alumina ALGaAs layer is kept unchanged at the position corresponding to the microlens structure to form the window region. The remaining portion of the high-alumina oxide layer is formed by wet oxygen oxidation.

[0028] In one or more embodiments of the present invention, the microlens structure corresponds to the window region of the high-alumina oxide layer.

[0029] In one or more embodiments of the present invention, the number of logs of the second Bragg reflector layer is greater than the number of logs of the first Bragg reflector layer.

[0030] In one or more embodiments of the present invention, the substrate is thinned by grinding and polishing processes; and the microlens structure is fabricated by photolithography and ICP etching processes.

[0031] In one or more embodiments of the present invention, the substrate is made of GaAs and the microlens structure is made of GaAs.

[0032] In one or more embodiments of the present invention, the first Bragg reflector layer is an N-DBR, the second Bragg reflector layer is a P-DBR, the first electrode is a P-type metal electrode, and the second electrode is an N-type metal electrode.

[0033] Compared with the prior art, the flip-chip VCSEL structure of the present invention has a microlens structure integrally formed on the substrate surface to focus light, improve the coupling efficiency between the chip and the external optical fiber, and eliminate the need to install other lenses during packaging, which greatly simplifies the packaging process.

[0034] In the flip-chip VCSEL structure of this invention, light is emitted from one side of the substrate. When the flip-chip is packaged, the P-side (the side away from the substrate) of the flip-chip contacts the packaging carrier. Compared with traditional chips, the active region of the quantum well layer is much closer to the packaging carrier, which helps the chip dissipate heat, thereby improving the chip's heat dissipation effect and enhancing its thermal performance. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of a flip-chip VCSEL structure according to an embodiment of the present invention;

[0036] Figure 2 This is a process flow diagram of the fabrication of a flip-chip VCSEL according to one embodiment of the present invention.

[0037] Figures 3a-3j This is a schematic diagram of the fabrication process of a flip-chip VCSEL according to an embodiment of the present invention. Detailed Implementation

[0038] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings, but it should be understood that the scope of protection of the present invention is not limited to the specific embodiments.

[0039] Unless otherwise expressly stated, throughout the specification and claims, the term "comprising" or its variations such as "including" or "comprises" shall be understood to include the stated elements or components without excluding other elements or other components.

[0040] like Figure 1As shown, an embodiment of the present invention provides a flip-chip VCSEL structure, including a substrate 10, a first Bragg mirror layer 20, a high-alumina oxide layer 30, a quantum well layer 40, a second Bragg mirror layer 50, a dielectric film layer 60, a first electrode 70, and a second electrode 80.

[0041] The substrate 10 includes a first surface 11 and a second surface 12 disposed opposite to each other. A microlens structure 111 with focusing function is integrally formed on the first surface 11. The microlens structure 111 is a hemispherical structure protruding from the first surface 11. An AR antireflection film 13 is deposited on the surface of the microlens structure 111 to increase the light transmittance on the surface of the microlens structure 111 by reducing reflected light. In this embodiment, the substrate 10 is made of GaAs, and the microlens structure is also made of GaAs.

[0042] The first Bragg mirror layer 20 is disposed on the second surface 12 of the substrate 10, covering the second surface 12 of the substrate 10. The first Bragg mirror layer 20, as an N-DBR, is a periodic structure composed of two materials with different refractive indices arranged alternately in an ABAB pattern, with the optical thickness of each layer being 1 / 4 of the central reflection wavelength. The first Bragg mirror layer 20 is used to select the lasing wavelength of the VCSEL chip.

[0043] A high-alumina oxide layer 30 is disposed on the surface of the first Bragg mirror layer 20 facing away from the substrate 10. A window region 31 corresponding to the microlens structure 111 is formed through the high-alumina oxide layer 30. Photons pass through the window region 31, penetrate the first Bragg mirror layer 20, and are focused by the microlens structure 111 on the substrate 10 before being emitted. The purpose of the high-alumina oxide layer 30 is to confine the current within a certain area after the wet oxygen oxidation process.

[0044] The quantum well layer 40 is disposed on the side of the high-alumina oxide layer 30 away from the first Bragg mirror layer 20. The quantum well layer 40 is used to generate the gain required by the laser (i.e., photons of different wavelengths).

[0045] The second Bragg mirror layer 50 is disposed on the side of the quantum well layer 40 facing away from the high-alumina oxide layer 30. As a P-DBR, the second Bragg mirror layer 50 is also a periodic structure composed of two materials with different refractive indices arranged alternately in an ABAB pattern. The optical thickness of each layer is 1 / 4 of the central reflection wavelength. The function of the second Bragg mirror layer 50 is the same as that of the first Bragg mirror 20: to select the lasing wavelength of the VCSEL chip. In this embodiment, the number of logarithms of the two materials with different refractive indices in the second Bragg mirror layer 50 is greater than that in the first Bragg mirror layer 50. In the above technical solution, the number of logarithms in the second Bragg mirror layer 50 is designed to be sufficiently large, so that 99.9% of photons are reflected back when passing through the second Bragg mirror layer 50; the number of logarithms in the first Bragg mirror layer 20 is designed to be relatively small, so that some photons leave the chip when passing through the first Bragg mirror layer 20, i.e., the chip generates light output through the first Bragg mirror layer 20. In this embodiment, the light from the VCSEL chip is emitted from the N-side (N-DBR), making it a flip-chip VCSEL chip.

[0046] The dielectric film 60 covers the sidewalls of the second Bragg mirror layer 50, the quantum well layer 40, the high-alumina oxide layer 30 and the first Bragg mirror layer 20, as well as the second surface 12 extending to the substrate 10, and the dielectric film 60 partially covers the surface of the second Bragg mirror layer 50 facing away from the quantum well layer 40.

[0047] The first electrode 70 is a p-polar metal electrode, which is disposed on the surface of the second Bragg mirror layer 50 facing away from the quantum well layer 40 and covers the exposed surface of the second Bragg mirror layer 50. The metal material of the first electrode 70 is not limited in the embodiments of the present invention.

[0048] The second electrode 80 is an N-polar metal electrode. It is disposed on the surface of the dielectric film layer 60 facing away from the second Bragg reflector layer 50, extending along the dielectric film layer 60 to the second surface 22 of the substrate 10, and partially covering the second surface 22. A gap is formed between the second electrode 80 and the first electrode 70 to form electrical isolation, and the second electrode 80 and the first electrode 70 are located on the same plane. Similarly, the metal material of the second electrode 80 is not limited in this embodiment of the invention.

[0049] The first electrode 70 and the second electrode 80 are used to inject current into the VCSEL chip. Holes injected from the first electrode 70 and electrons injected from the second electrode 80 recombine in the active region of the quantum well layer 40 to generate photons of different wavelengths. The gain of the VCSEL chip is composed of these photons. The photons generated by the quantum well layer 40 propagate to the surroundings. Only photons that meet the Bragg reflection condition can be reflected back by the first Bragg mirror layer 20 and the second Bragg mirror layer 50. The first Bragg mirror layer 20 and the second Bragg mirror layer 50 are used to select the lasing wavelength of the chip.

[0050] In this embodiment, the number of pairs of the second Bragg mirror layer 50 is designed to be large enough so that 99.9% of the photons are reflected back when passing through the second Bragg mirror layer 50; the number of pairs of the first Bragg mirror layer 20 is designed to be relatively small so that some photons leave the chip when passing through the first Bragg mirror layer 20, that is, the chip generates light output through the first Bragg mirror layer 20, forming a flip-chip VCSEL chip structure.

[0051] Based on the above embodiments of the present invention, a flip-chip VCSEL structure is provided, such as... Figure 2 As shown, another embodiment of the present invention also provides a method for fabricating a flip-chip VCSEL, the method comprising:

[0052] s1: such as Figure 3a As shown, a substrate 10 is provided.

[0053] The substrate 10 has a first surface 11 and a second surface 12 disposed opposite to each other, and the second surface 12 can be used to grow an epitaxial layer structure. The substrate 10 has a certain thickness to facilitate subsequent thinning and formation of a microlens structure 111. The material of the substrate 10 includes, but is not limited to, GaAs.

[0054] s2: such as Figure 3b As shown, a first Bragg mirror layer 20 is formed on the second surface 12 of the substrate 10.

[0055] The first Bragg mirror layer 20 partially covers the second surface 12 of the substrate 10. The first Bragg mirror layer 20, as an N-DBR, is a periodic structure composed of two materials with different refractive indices arranged alternately in an ABAB pattern, with the optical thickness of each layer being 1 / 4 of the central reflection wavelength. The first Bragg mirror layer 20 is used to select the lasing wavelength of the VCSEL chip.

[0056] s3: For example Figure 3c As shown, a high-aluminum ALGaAs layer 32 is formed on the surface of the first Bragg mirror layer 20 facing away from the substrate 10.

[0057] s4: For example Figure 3dAs shown, the portion of the high-alumina ALGaAs layer 32 located at the edge is oxidized by wet oxygen to form a high-alumina oxide layer 30, while the portion of the high-alumina ALGaAs layer 32 located in the middle is not oxidized, forming a window region 31 that penetrates the high-alumina oxide layer 30 to allow current to flow.

[0058] The high-alumina AlGaAs layer 32 is oxidized by a wet oxygen oxidation method, forming a high-alumina oxide layer 30. The oxidized parts are non-conductive, with only a small central portion (window region 31) remaining unoxidized. Current flows through this window region 31. Photons pass through the window region 31, penetrate the first Bragg reflector layer 20, and are then focused by the microlens structure 111 on the substrate 10 before being emitted. The purpose of the high-alumina oxide layer 30 is to confine the current within a specific area.

[0059] s5: For example Figure 3e As shown, a quantum well layer 40 is formed on the side of the high-alumina oxide layer 30 opposite to the first Bragg mirror layer 20. Holes and electrons recombine at the quantum well layer 40 to generate photons of different wavelengths, and the gain of the chip is composed of these photons.

[0060] s6: For example Figure 3f As shown, a second Bragg mirror layer 50 is formed on the side of the quantum well layer 40 opposite to the high-alumina oxide layer 30.

[0061] The second Bragg reflector layer 50, acting as a P-DBR, is also a periodic structure composed of two materials with different refractive indices arranged alternately in an ABAB pattern. The optical thickness of each layer is 1 / 4 of the central reflection wavelength. The second Bragg reflector layer 50 is used to select the lasing wavelength of the VCSEL chip. In this embodiment, the number of pairs of materials with different refractive indices in the second Bragg reflector layer 50 is greater than that in the first Bragg reflector layer 50. The number of pairs in the second Bragg reflector layer 50 is designed to be sufficiently large, so that 99.9% of photons are reflected back when passing through the second Bragg reflector layer 50. The number of pairs in the first Bragg reflector layer 20 is designed to be relatively small, so that some photons leave the chip when passing through the first Bragg reflector layer 20. That is, the chip generates light output through the first Bragg reflector layer 20, forming a flip-chip VCSEL chip.

[0062] s7: For example Figure 3g As shown, a dielectric film layer 60 is formed.

[0063] The dielectric film 60 covers the sidewalls of the second Bragg mirror layer 50, the quantum well layer 40, the high-alumina oxide layer 30 and the first Bragg mirror layer 20, as well as the second surface 12 extending to the substrate 10, and the dielectric film 60 partially covers the surface of the second Bragg mirror layer 50 facing away from the quantum well layer 40.

[0064] s8: For example Figure 3h As shown, a first electrode 70 and a second electrode 80 are formed.

[0065] The first electrode 70 is a p-polar metal electrode located on the surface of the second Bragg mirror layer 50 facing away from the quantum well layer 40, and covering the exposed surface of the second Bragg mirror layer 50. Holes can be injected from the first electrode 70.

[0066] The second electrode 80 is an N-polar metal electrode located on the second surface 12 of the substrate 10 and extending from the second surface 12 of the substrate 10 to the surface of the dielectric film layer 60 opposite to the second Bragg reflector layer 50. A gap is formed between the second electrode 80 and the first electrode 70 to form electrical isolation, and the second electrode 80 and the first electrode 70 are located on the same plane. Electrons can be injected from the second electrode 80.

[0067] s9: For example Figure 3i As shown, the substrate 10 is thinned and polished, and a microlens structure is formed on the first surface 11 of the substrate 10.

[0068] The substrate 10 is thinned by grinding and polishing processes, and a microlens structure 111 is fabricated using photolithography and ICP etching processes. The microlens structure 111 corresponds to the window region 31 of the high-alumina oxide layer 30. Specifically, the microlens structure 111 and the window region 31 are aligned in a direction perpendicular to the layer structure. The microlens structure 111 is a hemispherical structure that protrudes relative to the first surface 11 of the substrate and has the function of focusing light.

[0069] s10: such as Figure 3j As shown, an AR antireflective film 13 is deposited on the surface of the microlens structure 111.

[0070] Compared with the prior art, the flip-chip VCSEL structure of the present invention has a microlens structure integrally formed on the substrate surface to focus light, improve the coupling efficiency between the chip and the external optical fiber, and eliminate the need to install other lenses during packaging, which greatly simplifies the packaging process.

[0071] In the flip-chip VCSEL structure of this invention, light is emitted from one side of the substrate. When the flip-chip is packaged, the P-side (the side away from the substrate) of the flip-chip contacts the packaging carrier. Compared with traditional chips, the active region of the quantum well layer is much closer to the packaging carrier, which helps the chip dissipate heat, thereby improving the chip's heat dissipation effect and enhancing its thermal performance.

[0072] The foregoing description of specific exemplary embodiments of the invention is for illustrative and explanatory purposes. These descriptions are not intended to limit the invention to the precise forms disclosed, and it will be apparent that many changes and variations can be made in accordance with the foregoing teachings. The exemplary embodiments were chosen and described in order to explain the specific principles of the invention and its practical application, thereby enabling those skilled in the art to implement and utilize various different exemplary embodiments of the invention, as well as various different choices and variations. The scope of the invention is intended to be defined by the claims and their equivalents.

Claims

1. A flip-chip VCSEL chip structure, characterized by, The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof.

2. The flip-chip VCSEL chip structure of claim 1, wherein, The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof.

3. The flip-chip VCSEL chip structure of claim 1, wherein, The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof.

4. A method of fabricating a flip-chip VCSEL chip, the method comprising: providing a substrate; providing a VCSEL chip; and bonding the VCSEL chip to the substrate. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip vertical cavity surface emitting laser (VCSEL) chip and a manufacturing method thereof. The application relates to a flip-chip VCSEL chip and a manufacturing method thereof. A first electrode and a second electrode are formed. The first electrode is located on the surface of the second Bragg mirror layer away from the quantum well layer and covers the exposed surface of the second Bragg mirror layer. The second electrode is located on the second surface of the substrate and extends from the second surface of the substrate to the surface of the dielectric film layer away from the second Bragg mirror layer. The second electrode is electrically isolated from the first electrode and the second electrode is located on the same plane as the first electrode. The substrate is thinned, and a microlens structure corresponding to the window area on the high-alumina oxide layer is formed on the first surface of the substrate. An AR antireflection film is then deposited on the surface of the microlens structure.

5. The method of claim 4, wherein the method further comprises: A high-alumina oxide layer is formed on the surface of the first Bragg mirror layer facing away from the substrate, and the high-alumina oxide layer has a window region for current flow, including: A high-alumina ALGaAs layer is formed on the surface of the first Bragg mirror layer facing away from the substrate. The high-alumina ALGaAs layer is kept unchanged at the position corresponding to the microlens structure to form the window region. The remaining part of the high-alumina ALGaAs layer is formed into the high-alumina oxide layer by wet oxygen oxidation.

6. The method of claim 4, wherein the method further comprises: The substrate is thinned by grinding and polishing processes; the microlens structure is fabricated using photolithography and ICP etching processes.

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