Power amplifier circuit

Abstract

Provided is a power amplification circuit that can effectively improve modulation accuracy. A power amplification circuit (1) includes an amplification transistor (Tr1) that amplifies and outputs a high-frequency signal, and a bias circuit (3) that supplies a bias current (Ibb) to a base of the amplification transistor (Tr1). The bias circuit (3) includes a bias current supply transistor (Tr2) and an electrostatic capacitor circuit (31) whose electrostatic capacitance changes in accordance with a temperature of the amplification transistor (Tr1), is charged during a non-supply period of the bias current (Ibb), and discharges to a supply path of the bias current (Ibb) during a supply period of the bias current (Ibb). The supply period of the bias current (Ibb) includes an amplification period in which the amplification transistor (Tr1) amplifies the high-frequency signal. The bias current (Ibb) is started to be supplied before the amplification of the amplification transistor (Tr1) is started.

Description

TECHNICAL FIELD

[0001] The present application relates to a power amplification circuit. BACKGROUND

[0002] In recent years, with the transition to the fifth generation mobile communication system, in order to secure the number of channels, TDD (Time Division Duplex) has become mainstream. In addition, in order to improve the communication speed, improvement of the modulation accuracy (EVM: Error Vector Magnitude) of the transmission signal has become a problem.

[0003] When power amplification is started, the transistor for power amplification generates heat, and in conjunction therewith, the hfe of the transistor for power amplification fluctuates. In the following Patent Literature 1, it is described that when power amplification is started, the bias supplied to the transistor for power amplification is temporarily increased, and the power amplification rate of the transistor for power amplification is temporarily increased.

[0004] PRIOR ART LITERATURE

[0005] PATENT LITERATURE

[0006] Patent Literature 1: Japanese Patent Application Publication No. 2009-200770 SUMMARY

[0007] PROBLEMS TO BE SOLVED BY THE INVENTION

[0008] In the power amplification circuit described in Patent Literature 1, the case where the hfe of the transistor for power amplification depends on the temperature is not considered. Therefore, it can not be possible to sufficiently obtain the improvement effect of the EVM depending on the ambient temperature.

[0009] The present disclosure was completed in view of the above circumstances, and aims to achieve a power amplification circuit capable of effectively improving the modulation accuracy.

[0010] MEANS FOR SOLVING THE PROBLEMS

[0011] The power amplification circuit of one aspect of the present disclosure includes a transistor for amplification that amplifies and outputs a high-frequency signal, and a bias circuit that supplies a bias current to a base of the transistor for amplification, the bias circuit including a transistor for bias current supply, and an electrostatic capacitance circuit whose electrostatic capacitance changes depending on the temperature of the transistor for amplification, is charged during a non-supply period of the bias current, and discharges to a supply path of the bias current during a supply period of the bias current, the supply period of the bias current including an amplification period in which the transistor for amplification amplifies the high-frequency signal, and the supply of the bias current is started before the start of amplification of the transistor for amplification.

[0012] The power amplification circuit of one aspect of the present disclosure includes an amplification transistor that amplifies and outputs a high-frequency signal, and a bias circuit that supplies a bias current to a base of the amplification transistor, the bias circuit including a bias current supply transistor, a temperature compensation diode connected in series between a base of the bias current supply transistor and a reference potential, and a first thermistor whose resistance value changes according to a temperature of the amplification transistor and is connected in series with the temperature compensation diode, the supply of the bias current including an amplification period in which the amplification transistor amplifies the high-frequency signal, the supply of the bias current being started before the amplification of the amplification transistor is started.

[0013] Effects of Invention

[0014] According to the present disclosure, a power amplification circuit that can effectively improve modulation accuracy can be realized. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 FIG. 1 is a diagram showing a configuration example of a power amplification circuit of Embodiment 1.

[0016] Figure 2 FIG. 2 is a diagram showing a configuration example of a power amplification circuit of a comparative example.

[0017] Figure 3A FIG. 3 is a diagram showing an example of a timing chart of the power amplification circuit of the comparative example.

[0018] Figure 3B FIG. 4 is a diagram showing an example of a timing chart of the power amplification circuit of the comparative example.

[0019] Figure 4 FIG. 5 is a diagram showing an example of a timing chart of the power amplification circuit of Embodiment 1.

[0020] Figure 5 FIG. 6 is a diagram showing a configuration example of a power amplification circuit of a first modified example of Embodiment 1.

[0021] Figure 6 FIG. 7 is a diagram showing a configuration example of a power amplification circuit of a second modified example of Embodiment 1.

[0022] Figure 7 FIG. 8 is a diagram showing a configuration example of a power amplification circuit of Embodiment 2.

[0023] Figure 8 FIG. 9 is a diagram showing an example of a timing chart of the power amplification circuit of Embodiment 2.

[0024] Figure 9 FIG. 10 is a diagram showing a configuration example of a power amplification circuit of Embodiment 3.

[0025] Figure 10 FIG. 4 is an example of a timing chart showing the power amplification circuit of Embodiment 3.

[0026] Figure 11 FIG. 5 is a configuration example of the power amplification circuit of the first modification of Embodiment 3.

[0027] Figure 12 FIG. 6 is a configuration example of the power amplification circuit of the second modification of Embodiment 3.

[0028] Explanation of Reference Numerals

[0029] 1, 1a, 1b, 1c, 1d, 1e, 1f Power amplification circuit

[0030] 2 Amplifier

[0031] 3, 3a, 3b, 3c, 3d, 3e, 3f Bias circuit

[0032] 10 Power amplification circuit

[0033] 30 Bias circuit

[0034] 31, 31a, 31b, 31d, 31e, 31f Electrostatic capacitance circuit

[0035] C1 First capacitor

[0036] C2 Second capacitor

[0037] Cin Input coupling capacitor

[0038] Cout Output coupling capacitor

[0039] CV Variable capacitor

[0040] D1 First diode

[0041] D2 Second diode

[0042] L Choke inductor

[0043] R Resistance

[0044] Rb Resistance

[0045] RFin Input signal

[0046] RFout Output signal

[0047] Rth Thermistor

[0048] Rth1 First thermistor

[0049] Rth2 Second thermistor

[0050] Tr1 amplification transistor;

[0051] Tr2 bias current supply transistor;

[0052] Tr3 switching transistor;

[0053] SW1, SW2, SW3, SW4 switching circuit. DETAILED DESCRIPTION

[0054] Hereinafter, the power amplification circuit of the embodiments will be described in detail based on the drawings. Note that the present disclosure is not limited to this embodiment. The embodiments are examples, and partial substitution or combination of the structures shown in different embodiments is of course possible. After Embodiment 2, the description of matters common to Embodiment 1 will be omitted, and only the different points will be described. In particular, the same effects resulting from the same structures will not be mentioned in each embodiment in turn.

[0055] (Embodiment 1)

[0056] Figure 1 is a diagram showing a structure example of the power amplification circuit of Embodiment 1. The power amplification circuit 1 can be used for transmitting various signals such as voice, data, and the like to a base station in a mobile communication terminal device exemplified by a portable telephone or a smartphone.

[0057] The power amplification circuit 1 takes, as an amplification object, a high-frequency signal within a transmission frequency band having a prescribed bandwidth including one or a plurality of frequency bands (multi-band) in accordance with a communication system to which the mobile communication terminal device corresponds. As the communication system, for example, a third generation mobile communication system (3G), a fourth generation mobile communication system (4G) is exemplified. As the transmission frequency band which is the amplification object of the power amplification circuit 1, for example, a 2 GHz band (HB) of 3G / 4G is exemplified, specifically, a frequency band "1" (B1: transmission frequency band 1920 to 1980 MHz), a frequency band "2" (B2: transmission frequency band 1850 to 1910 MHz), a frequency band "3" (B3: transmission frequency band 1710 to 1785 MHz), and a frequency band "4" (B4: transmission frequency band 1710 to 1755 MHz), and a frequency band "34" (B34: transmission frequency band 2010 to 2025 MHz) and a frequency band "39" (B39: transmission frequency band 1880 to 1920 MHz) used in a TDD communication system, frequency bands "n40", "n41" (HB: transmission frequency band 2.3 to 2.7 GHz), frequency bands "n77", "n78", "n79" (UHB: transmission frequency band 3.3 to 5.0 GHz). Note that the above-described transmission frequency band is an example, and the transmission frequency band which is the amplification object of the power amplification circuit 1 is not limited thereto.

[0058] Power amplifier circuit 1 receives a high-frequency signal within the transmission band, i.e., input signal RFin, from the preceding circuit and amplifies it. Then, power amplifier circuit 1 outputs the amplified high-frequency signal, i.e., output signal RFout, to the subsequent circuit. An example of the preceding circuit is a transmission power control circuit that adjusts the power of the modulation signal, but it is not limited to this. An example of the subsequent circuit is a front-end circuit that performs filtering on the output signal RFout and transmits it to the antenna, but it is not limited to this.

[0059] like Figure 1 As shown, the power amplifier circuit 1 includes an amplifier 2, a bias circuit 3, an input coupling capacitor Cin, an output coupling capacitor Cout, and a choke inductor L.

[0060] Amplifier 2 amplifies the input signal RFin received from the preceding stage circuit via the input coupling capacitor Cin, and outputs the amplified output signal RFout to the subsequent stage circuit via the output coupling capacitor Cout. The input coupling capacitor Cin cuts off the DC component between the preceding stage circuit and amplifier 2. The output coupling capacitor Cout cuts off the DC component between amplifier 2 and the subsequent stage circuit.

[0061] Amplifier 2 includes an amplification transistor Tr1. An example of the amplification transistor Tr1 is a heterojunction bipolar transistor (HBT), but it is not limited to this.

[0062] The emitter of the amplifying transistor Tr1 is connected to a reference potential. The base of the amplifying transistor Tr1 is connected to one end of the input coupling capacitor Cin. An input signal RFin is input from the preceding circuit to the other end of the input coupling capacitor Cin. The collector of the amplifying transistor Tr1 is connected to one end of the output coupling capacitor Cout. An output signal RFout is output from the other end of the output coupling capacitor Cout to the following circuit. Additionally, a power supply potential Vcc is applied to the collector of the amplifying transistor Tr1 via a choke inductor L to supply DC power. The reference potential here is ground, but is not limited to this.

[0063] The choke inductor L has sufficiently high impedance relative to the transmission frequency band.

[0064] The bias circuit 3 includes a first diode D1 and a second diode D2 for temperature compensation, and a bias current supply transistor Tr2. The bias current supply transistor Tr2 is illustrated similarly to the amplification transistor Tr1, but is not limited thereto.

[0065] The cathode of the second diode D2 is connected to a reference potential. The anode of the first diode Dl is connected to the cathode of the second diode D2. The base of the bias current supply transistor Tr2 is connected to the anode of the first diode Dl.

[0066] The bias control current Icont is supplied from the current source to the connection point of the anode of the first diode Dl and the base of the bias current supply transistor Tr2. By the current Idd flowing in the series circuit including the first diode Dl and the second diode D2, a voltage corresponding to the voltage drop in the first diode Dl and the second diode D2 is applied to the base of the bias current supply transistor Tr2. Note that the first diode Dl and the second diode D2 can also be constituted by connecting the diodes of the transistors whose collectors and bases are connected.

[0067] The collector of the bias current supply transistor Tr2 is supplied with the first bias power supply potential Vbl. The emitter of the bias current supply transistor Tr2 is connected to the base of the amplification transistor Trl via the first switch circuit SWl, the third switch circuit SW3, and the resistor Rb.

[0068] The bias current supply transistor Tr2 operates as an emitter follower circuit. The bias current Ibb is supplied to the base of the amplification transistor Trl via the resistor Rb. The input signal RFin is amplified in accordance with the bias current Ibb, and the output signal RFout is output.

[0069] In addition, in the present embodiment, the bias circuit 3 is provided with an electrostatic capacitance circuit 31 between the connection point of the first switch circuit SWl and the third switch circuit SW3, which is the supply path of the bias current Ibb, and a reference potential (here, a ground potential). The first capacitor Cl and the second capacitor C2 are connected in parallel in the electrostatic capacitance circuit 31. The second capacitor C2 is provided so as to be able to be disconnected by the fourth switch circuit SW4. The capacitance value of the first capacitor Cl is exemplified as being about 1 μF, for example, and the capacitance value of the second capacitor C2 is exemplified as being about 1 μF to 2 μF, for example.

[0070] In addition, in the present embodiment, the bias circuit 3 is provided with the second switch circuit SW2 that is able to supply the second bias power supply potential Vb2 to the connection point of the first switch circuit SWl and the third switch circuit SW3.

[0071] Figure 2 FIG. 1 is a diagram showing a configuration example of a power amplification circuit of a comparative example. Figure 3A and Figure 3B FIG. 2 is a diagram showing an example of a timing chart of the power amplification circuit of the comparative example. In Figure 2 In the power amplification circuit 10 of the comparative example shown in FIG. 1, the bias circuit 30 does not have the electrostatic capacitance circuit 31. Figure 1The first switch circuit SW1, the second switch circuit SW2, the fourth switch circuit SW4, the first capacitor C1, and the second capacitor C2 of the power amplification circuit 1 of Embodiment 1 shown.

[0072] In Figure 3A and Figure 3B , the RFon period from the time t1 to the time t2 corresponds to a transmission period in TDD. That is, the RFon period is an amplification period in which the amplification transistor Tr1 amplifies the input signal RFin. In addition, the RFoff period is an amplification action stop period in which the amplification transistor Tr1 does not perform the amplification action of the input signal RFin. The RFon period differs depending on the subcarrier spacing SCS, but is, for example, about 0.5 ms. The RFon period is constituted by, for example, 14 OFDMA (Orthogonal Frequency Division Multiple Access) symbols. Within the RFon period, the input signal RFin is input.

[0073] In Figure 3A In the example shown, at the start time t1 of the RFon period, the third switch circuit SW3 is controlled to be on by the first control signal Cont1, and thereby the bias current Ibb is supplied to the base of the amplification transistor Tr1. That is, at the start time t1 of the RFon period, the amplification transistor Tr1 starts the amplification action of the input signal RFin. Note that, in Figure 2 In the comparative example shown, the third switch circuit SW3 is not necessarily required. In a structure in which the third switch circuit SW3 is not present, the following manner is adopted: at the start time t1 of the RFon period, the bias control current Icont is started to be supplied from the current source, and thereby the bias current Ibb is supplied to the base of the amplification transistor Tr1.

[0074] When the amplification transistor Tr1 starts the amplification action of the input signal RFin at the start time t1 of the RFon period, the temperature of the amplification transistor Tr1 rises, and the hfe changes. Specifically, the hfe is high in a state in which the temperature is relatively low, and the hfe becomes low in a state in which the temperature is relatively high. Therefore, the collector current Icc of the amplification transistor Tr1 easily flows gradually from the start time point of the amplification action at the start time t1 of the RFon period in correspondence with the temperature rise. Therefore, immediately after the amplification action of the amplification transistor Tr1 in which the temperature is relatively low is started (in a period from the start time t1 of the RFon period to the time t11 at which the temperature of the amplification transistor Tr1 becomes a steady state in the example shown), the EVM of the output signal RFout can deteriorate. Figure 3A

[0075] ​For example, by flowing the bias current Ibb in the base of the amplification transistor Tr1 during the RFoff period, i.e., during which the amplification operation of the amplification transistor Tr1 is stopped, and preheating the amplification transistor Tr1 as an operation state, it is possible to suppress the deterioration of the EVM immediately after the start of the amplification operation. Specifically, as shown in Figure 3B , for example, the period from the time t01 before the start time t1 of the RFon period to the start time t1 of the RFon period is made as a preheating period of the amplification transistor Tr1, and the bias current Ibb for preheating is made to flow in advance. Thereby, it is possible to make the period from the start time t1 of the RFon period to the time t11 at which the temperature of the amplification transistor Tr1 becomes a state of equilibrium shorter than the period shown by the dotted line shown in Figure 3A , and suppress the deterioration of the EVM. Figure 3B

[0076] In the TDD of the fifth-generation mobile communication system, the length of the preheating period from the preheating start time t01 to the start time t1 of the RFon period is limited. Figure 3B For example, when the preheating period from the preheating start time t01 to the start time t1 of the RFon period is about 3 to 5 μsec, it is possible that the improvement effect of the EVM is not obtained.

[0077] Figure 4 is a drawing showing an example of a timing chart of the power amplification circuit of Embodiment 1. In the power amplification circuit 1 of Embodiment 1 (refer to Figure 1 ), in the RFoff period, the first switch circuit SW1 and the third switch circuit SW3 are controlled to be turned off by the first control signal Cont1, and the second switch circuit SW2 is controlled to be turned on by the second control signal Cont2.

[0078] The bias current Ibb is supplied during the preheating period of the amplification transistor Tr1 and the amplification period (RFon period) in which the amplification transistor Tr1 amplifies the input signal RFin. In the present disclosure, the period including the preheating period of the amplification transistor Tr1 and the amplification period in which the amplification transistor Tr1 amplifies the input signal RFin is also referred to as the "supply period of the bias current Ibb". In addition, the period after the preheating period of the amplification transistor Tr1 from the amplification operation stop period (RFoff period) in which the amplification operation of the amplification transistor Tr1 is not performed is also referred to as the "non-supply period of the bias current Ibb".

[0079] ​In the power amplification circuit 1 of the present embodiment, for example, when the temperature of the amplification transistor Trl is equal to or higher than a prescribed threshold value, the fourth switch circuit SW4 is controlled to be off by the third control signal Cont3. In addition, when the temperature of the amplification transistor Trl is lower than the prescribed threshold value, the fourth switch circuit SW4 is controlled to be on. Therefore, when the temperature of the amplification transistor Trl is equal to or higher than the prescribed threshold value, the first capacitor Cl is charged during the non-supply period of the bias current Ibb, and when the temperature of the amplification transistor Trl is lower than the prescribed threshold value, the first capacitor Cl and the second capacitor C2 are charged during the non-supply period of the bias current Ibb. It is also possible to adopt a method of detecting the temperature of the amplification transistor Trl by a thermistor, which is provided, for example, on a chip of a semiconductor device constituting an IC or a module in which the amplification transistor Trl is provided.

[0080] At time t01 during the RFoff period, the first switch circuit SWl and the third switch circuit SW3 are controlled to be on by the first control signal Contl, and the second switch circuit SW2 is controlled to be off by the second control signal Cont2. Thereby, the charge charged to the first capacitor Cl or the first capacitor Cl and the second capacitor C2 is discharged, overlapping with the bias current Ibb. As a result, a bias current Ibb larger than that of the comparative example shown in FIG. 8 is supplied to the base of the amplification transistor Trl, and the amplification transistor Trl can be effectively preheated. Thereby, compared with the comparative example shown in FIG. 8, the rise of the output signal RFout becomes steep, and the period until time tll at which the temperature of the amplification transistor Trl becomes a steady state is shortened, and thus the improvement effect of the EVM can be improved. Figure 3B Figure 3B

[0081] Figure 4 The solid line shown in FIG. 9 shows the bias current Ibb, the collector current Icc of the amplification transistor Trl, and the output signal RFout in a case where the temperature of the amplification transistor Trl is equal to or higher than a prescribed threshold value, that is, in a case where the fourth switch circuit SW4 is controlled to be off and only the first capacitor Cl is charged during the non-supply period of the bias current Ibb, and the broken line shows the bias current Ibb, the collector current Icc of the amplification transistor Trl, and the output signal RFout in a case where the temperature of the amplification transistor Trl is lower than the prescribed threshold value, that is, in a case where the fourth switch circuit SW4 is controlled to be on and the first capacitor Cl and the second capacitor C2 are charged during the non-supply period of the bias current Ibb.

[0082] In the present embodiment, in a case where the temperature of the amplification transistor Trl is lower than the prescribed threshold value, the first capacitor Cl and the second capacitor C2 are charged during the non-supply period of the bias current Ibb. Thereby, as shown in FIG. 9, compared with the comparative example shown in FIG. 8, the bias current Ibb supplied to the base of the amplification transistor Trl is larger, and the rise of the output signal RFout becomes steep, and thus the improvement effect of the EVM can be improved. Figure 4 ​​As shown, compared to the case where the temperature of the amplification transistor Trl is above the prescribed threshold value, the discharge characteristics of the first capacitor Cl and the second capacitor C2 become mild, and the improvement effect on the EVM can be improved even in the case where the temperature of the amplification transistor Trl is relatively low.

[0083] Note that, in Figure 1 , a configuration in which one second capacitor C2 is provided is exemplified, but the number of second capacitors C2 can also be plural. Also, a configuration in which a fourth switch circuit SW4 that can disconnect the plural second capacitors C2 is provided with respect to the plural second capacitors C2 can also be adopted. Further, in this case, a configuration in which the threshold value with respect to the temperature of the amplification transistor Trl is plural, and the plural fourth switch circuits SW4 are controlled to be on / off by different threshold values can also be adopted.

[0084] Also, the second bias power supply potential Vb2 can also be the same potential as the first bias power supply potential Vbl, and the first bias power supply potential Vbl and the second bias power supply potential Vb2 can also be different potentials respectively. If the second bias power supply potential Vb2 is set to a relatively high potential, the improvement effect on the EVM can be further improved. Therefore, it is desirable that the second bias power supply potential Vb2 is a higher potential than the first bias power supply potential Vbl.

[0085] (First Modified Example)

[0086] Figure 5 is a diagram showing a configuration example of a power amplification circuit of the first modified example of Embodiment 1. In Figure 5 The bias circuit 3a of the power amplification circuit la of the first modified example of Embodiment 1 shown is provided with an electrostatic capacity circuit 31a. The electrostatic capacity circuit 31a is configured to have a switching transistor Tr3, a resistor R, and a thermistor Rth, as a configuration that can disconnect the second capacitor C2. The resistor R and the thermistor Rth are connected in series between a third bias power supply potential Vb3 and a reference potential (ground potential), and the connection point potential of the resistor R and the thermistor Rth is connected to the base of the switching transistor Tr3 that is inserted in series to the second capacitor C2.

[0087] In Figure 5In the illustrated structure, the thermistor Rth is provided on a chip of a semiconductor device that constitutes an IC or a module provided with the transistor Trl for amplification, for example. The thermistor Rth has a temperature characteristic in which the resistance value changes according to temperature, and the resistance value becomes relatively high at a relatively low temperature and becomes relatively low at a relatively high temperature. In this structure, the switching transistor Tr3 is controlled to be on / off by the resistance ratio of the resistance R and the thermistor Rth. Specifically, the switching transistor Tr3 is controlled to be on when the temperature relatively decreases and the connection point potential of the resistance R and the thermistor Rth exceeds the Vbe of the switching transistor Tr3, and the switching transistor Tr3 is controlled to be off when the temperature relatively increases and the connection point potential of the resistance R and the thermistor Rth is lower than the Vbe of the switching transistor Tr3.

[0088] (Second Modification Example)

[0089] Figure 6 is a diagram showing a structure example of the power amplification circuit of the second modification example of Embodiment 1. In Figure 6 In the bias circuit 3b of the power amplification circuit lb of the second modification example of Embodiment 1 illustrated, a structure in which a variable capacitor CV provided with a capacitance value that changes according to a third control signal Cont3 is adopted as the electrostatic capacitance circuit 31b instead of the first capacitor Cl and the second capacitor C2.

[0090] In this structure, the third control signal Cont3 can be a voltage signal of 2 values, or can be a voltage signal of 3 or more values. By setting the third control signal Cont3 to a voltage signal of 3 or more values, the capacitance value of the variable capacitor CV can be flexibly set. Specifically, by making the capacitance value of CV change according to temperature change, an optimal EVM improvement effect corresponding to temperature change can be obtained.

[0091] In addition, as with the first modification example of Embodiment 1, in the case where the structure provided with the resistance R and the thermistor Rth is adopted and the resistance ratio of the resistance R and the thermistor Rth is changed steplessly, an optimal EVM improvement effect corresponding to temperature change can be obtained.

[0092] (Embodiment 2)

[0093] Figure 7 is a diagram showing a structure example of the power amplification circuit of Embodiment 2. In Figure 7 In the bias circuit 3c of the power amplification circuit lc of Embodiment 2 illustrated, the emitter of the transistor Tr2 for bias current supply is connected to the base of the transistor Trl for amplification via the third switching circuit SW3 and the resistance Rb. In this embodiment, the bias circuit 3c is provided with a first thermistor Rthl between the first diode Dl and the second diode D2.

[0094] exist Figure 7 In the structure shown, the first thermistor Rth1 is disposed, for example, on the chip of a semiconductor device constituting an IC or module equipped with an amplification transistor Tr1. It should be noted that the first thermistor Rth1 is not limited to being disposed between the first diode D1 and the second diode D2. The first thermistor Rth1 can also be connected to the anode of the first diode D1 or to the cathode of the second diode D2.

[0095] Figure 8 This is a diagram showing an example of the timing diagram of the power amplifier circuit of Embodiment 2. In the power amplifier circuit 1c of Embodiment 2, at time t01 during the RFoff period, the third switching circuit SW3 is turned on by the first control signal Cont1. As a result, a current Idd corresponding to the resistance value of the first thermistor Rth1 flows, supplying a bias current Ibb to the base of the amplification transistor Tr1. This initiates the preheating of the amplification transistor Tr1.

[0096] In the structure of embodiment 2, by setting a first thermistor Rth1, during the preheating period from the start time t01 to the start time t1 of RFon, the thermistor Rth1 is compared with the first thermistor Rth1. Figure 3B In the comparative example shown, a large bias current Ibb is supplied to the base of the amplification transistor Tr1, which can effectively preheat the amplification transistor Tr1.

[0097] Furthermore, during the preheating period from the start time t01 to the start time t1 of RFon, the resistance value of the first thermistor Rth1 decreases as the temperature of the amplification transistor Tr1 rises. Therefore, with... Figure 3B Compared to the comparative example shown, the time until the temperature of the amplification transistor Tr1 reaches equilibrium can be shortened, thereby improving the EVM.

[0098] (Implementation Method 3)

[0099] Figure 9 This is a diagram illustrating a structural example of the power amplifier circuit according to Embodiment 3. Figure 9In the bias circuit 3d of the power amplification circuit Id of Embodiment 3 shown, the emitter of the bias current supply transistor Tr2 is connected to the base of the amplification transistor Trl via the third switch circuit SW3 and the resistor Rb. In this embodiment, the bias circuit 3d is provided with the first thermistor Rthl between the first diode Dl and the second diode D2, as in the structure of Embodiment 2. The first thermistor Rthl is provided on a chip of a semiconductor device that constitutes an IC or a module provided with the amplification transistor Trl, for example. Note that the first thermistor Rthl is not limited to the manner of being provided between the first diode Dl and the second diode D2. The first thermistor Rthl can be connected to the anode of the first diode Dl or to the cathode of the second diode D2.

[0100] In addition, the bias circuit 3d is provided with the electrostatic capacitance circuit 31d between the connection point of the anode of the first diode Dl and the base of the bias current supply transistor Tr2 and a reference potential (ground potential in this case). The first capacitor Cl and the second capacitor C2 are connected in parallel to the electrostatic capacitance circuit 31d via the first switch circuit SWl. The second capacitor C2 is provided to be able to be disconnected by the fourth switch circuit SW4.

[0101] In addition, in this embodiment, the bias circuit 3d is provided with the second switch circuit SW2 that can supply the second bias power supply potential Vb2 at the connection point of the first switch circuit SWl, the first capacitor Cl, and the second capacitor C2.

[0102] Figure 10 Fig. 16 is an example of a timing chart showing the power amplification circuit of Embodiment 3. In the power amplification circuit Id of Embodiment 3, during the RFoff period, the first switch circuit SWl and the third switch circuit SW3 are controlled to be off by the first control signal Contl, and the second switch circuit SW2 is controlled to be on by the second control signal Cont2.

[0103] In the power amplification circuit 1d of the present embodiment, for example, when the temperature of the amplification transistor Trl is equal to or higher than a prescribed threshold value, the fourth switch circuit SW4 is controlled to be turned off by the third control signal Cont3, and when the temperature of the amplification transistor Trl is lower than the prescribed threshold value, the fourth switch circuit SW4 is controlled to be turned on. Therefore, when the temperature of the amplification transistor Trl is equal to or higher than the prescribed threshold value, the first capacitor Cl is charged during the non-supply period of the bias current Ibb, and when the temperature of the amplification transistor Trl is lower than the prescribed threshold value, the first capacitor Cl and the second capacitor C2 are charged during the non-supply period of the bias current Ibb. It is also possible to employ a configuration in which the temperature of the amplification transistor Trl is detected by a thermistor, which is provided, for example, on a chip of a semiconductor device that constitutes an IC or a module in which the amplification transistor Trl is provided.

[0104] In the configuration of Embodiment 3, by providing the first thermistor Rthl, a bias current Ibb that is larger than that of the comparative example shown in FIG. 6 is supplied to the base of the amplification transistor Trl during the warm-up period from the warm-up start time tO1 to the start time tl of the RFon period, as in Embodiment 2. Figure 3B

[0105] In addition, at the time tO1 during the RFoff period, the first switch circuit SWl and the third switch circuit SW3 are controlled to be turned on by the first control signal Contl, and the second switch circuit SW2 is controlled to be turned off by the second control signal Cont2. Thereby, the charge charged to the first capacitor Cl or the first capacitor Cl and the second capacitor C2 is discharged, overlapping with the bias current Ibb. As a result, a bias current Ibb that is larger than that of Embodiment 2 shown in FIG. 5 (dotted line) is supplied to the base of the amplification transistor Trl, and warm-up of the amplification transistor Trl can be promoted. Figure 8 Figure 10

[0106] (First Modified Example)

[0107] Figure 11 FIG. 7 is a diagram showing a configuration example of a power amplification circuit of a first modified example of Embodiment 3. In the power amplification circuit 1d of the present embodiment, the first switch circuit SWl and the third switch circuit SW3 are controlled to be turned on by the first control signal Contl, and the second switch circuit SW2 is controlled to be turned off by the second control signal Cont2 at the time tO1 during the RFoff period. Figure 11 ​​​The bias circuit 3e of the power amplification circuit 1e of the first modification of the embodiment 3 is provided with an electrostatic capacitance circuit 31e. The electrostatic capacitance circuit 31e is configured to have the switching transistor Tr3, the resistor R, and the second thermistor Rth2 as in the first modification of the embodiment 1, as a structure capable of disconnecting the second capacitor C2. The resistor R and the second thermistor Rth2 are connected in series between the third bias power supply potential Vb3 and a reference potential (ground potential), and the connection point potential of the resistor R and the second thermistor Rth2 is connected to the base of the switching transistor Tr3 inserted in series to the second capacitor C2.

[0108] In Figure 11 In the structure, the second thermistor Rth2 is provided on a chip of a semiconductor device that configures an IC or a module provided with the transistor Tr1 for amplification, for example. The second thermistor Rth2 has a temperature characteristic in which the resistance value changes according to temperature, and the resistance value becomes relatively high at a relatively low temperature, and the resistance value becomes relatively low at a relatively high temperature. In this structure, the switching transistor Tr3 is controlled to be on / off by the resistance ratio of the resistor R and the second thermistor Rth2. Specifically, when the connection point potential of the resistor R and the second thermistor Rth2 exceeds the Vbe of the switching transistor Tr3 as the temperature relatively decreases, the switching transistor Tr3 is controlled to be on, and when the connection point potential of the resistor R and the second thermistor Rth2 is lower than the Vbe of the switching transistor Tr3 as the temperature relatively increases, the switching transistor Tr3 is controlled to be off.

[0109] (Second Modification)

[0110] Figure 12 is a diagram showing a structure example of the power amplification circuit of the second modification of the embodiment 3. In Figure 12 In the bias circuit 3f of the power amplification circuit 1f of the second modification of the embodiment 3, as in the second modification of the embodiment 1, a structure provided with a variable capacitor CV having a capacitance value that changes according to a third control signal Cont3 is adopted as the electrostatic capacitance circuit 31f instead of the first capacitor C1 and the second capacitor C2.

[0111] In this structure, the third control signal Cont3 can be a voltage signal of 2 values, or can be a voltage signal of 3 or more values. By setting the third control signal Cont3 to a voltage signal of 3 or more values, the capacitance value of the variable capacitor CV can be flexibly set. Specifically, by making the capacitance value of the CV changeable according to temperature change, an optimal EVM improvement effect corresponding to temperature change can be obtained.

[0112] Also, in the case where the configuration including the resistor R and the second thermistor Rth2 is adopted and the resistance ratio of the resistor R to the second thermistor Rth2 is changed steplessly, as with the first modification example of Embodiment 3, an optimum EVM improvement effect corresponding to a temperature change can be obtained.

[0113] Note that the above-described embodiments are used to make the understanding of the present disclosure easy, and are not intended to limit the interpretation of the present application. The present disclosure can be changed / modified within the scope of the gist thereof, and equivalents thereof are included in the present disclosure.

[0114] The present disclosure can adopt the following configuration instead of or in addition to the above.

[0115] (1) A power amplification circuit according to one aspect of the present disclosure includes: an amplification transistor that amplifies and outputs a high-frequency signal; and a bias circuit that supplies a bias current to a base of the amplification transistor, the bias circuit including: a bias current supply transistor; and an electrostatic capacitance circuit whose electrostatic capacitance changes according to a temperature of the amplification transistor, is charged during a non-supply period of the bias current, and is discharged to a supply path of the bias current during a supply period of the bias current, the supply period of the bias current including an amplification period in which the amplification transistor amplifies the high-frequency signal, the bias current being started to be supplied before the amplification of the amplification transistor is started.

[0116] In this configuration, the amplification transistor can be preheated according to the temperature of the amplification transistor before the amplification transistor starts to amplify the high-frequency signal. Thus, regardless of the temperature of the amplification transistor before amplification is started, the period until the temperature of the amplification transistor becomes a steady state can be shortened, and modulation accuracy can be effectively improved.

[0117] (2) The power amplification circuit according to the above (1), wherein the electrostatic capacitance circuit includes: a first capacitor provided between the supply path of the bias current and a reference potential; and a second capacitor connected in parallel with the first capacitor when the temperature of the amplification transistor is less than a prescribed threshold value, and disconnected from the first capacitor when the temperature of the amplification transistor is equal to or greater than the prescribed threshold value.

[0118] In this configuration, in the case where the temperature of the amplification transistor is less than the prescribed threshold value, the capacitance value of the electrostatic capacitance circuit becomes a combined capacitance value of the first capacitor and the second capacitor. Thus, even in the case where the temperature of the amplification transistor is relatively low, the improvement effect of modulation accuracy can be improved.

[0119] (3) The power amplifier circuit according to (1) above, wherein the static capacitance circuit includes a variable capacitor whose capacitance value varies according to the temperature of the amplifying transistor.

[0120] In this configuration, the improvement effect on the modulation accuracy can be optimized according to the temperature variation of the amplifying transistor.

[0121] (4) The power amplifier circuit according to (2) or (3) above, wherein the static capacitance circuit includes a thermistor whose resistance value varies according to the temperature of the amplifying transistor.

[0122] In this configuration, the improvement effect on the modulation accuracy can be optimized using the case where the resistance value of the thermistor varies steplessly according to the temperature of the amplifying transistor.

[0123] (5) A power amplifier circuit according to an aspect of the present disclosure includes: an amplifying transistor that amplifies and outputs a high-frequency signal; and a bias circuit that supplies a bias current to a base of the amplifying transistor, the bias circuit including: a bias current supply transistor; a temperature compensation diode connected in series between a base of the bias current supply transistor and a reference potential; and a first thermistor whose resistance value varies according to the temperature of the amplifying transistor and that is connected in series with the temperature compensation diode, the supply period of the bias current including an amplification period in which the amplifying transistor amplifies the high-frequency signal, the bias current being started to be supplied before the amplification of the amplifying transistor is started.

[0124] In this configuration, the amplifying transistor can be preheated according to the temperature of the amplifying transistor before the amplifying transistor starts to amplify the high-frequency signal. Thus, regardless of the temperature of the amplifying transistor before the amplification is started, the period until the temperature of the amplifying transistor becomes a steady state can be shortened, and the modulation accuracy can be effectively improved.

[0125] (6) The power amplifier circuit according to (5) above, wherein the bias circuit further includes a static capacitance circuit whose static capacitance varies according to the temperature of the amplifying transistor, the static capacitance circuit being charged during a non-supply period of the bias current and being discharged to the base of the bias current supply transistor during a supply period of the bias current.

[0126] In this configuration, the amplifying transistor can be preheated more effectively.

[0127] (7) The power amplifier circuit according to (6) above, wherein the static capacitance circuit includes a first capacitor provided between the base of the transistor for supplying a bias current and a reference potential, and a second capacitor connected in parallel with the first capacitor when the temperature of the transistor for amplification is less than a prescribed threshold value, and disconnected from the first capacitor when the temperature of the transistor for amplification is equal to or greater than the prescribed threshold value.

[0128] In this configuration, the capacitance value of the static capacitance circuit becomes the combined capacitance value of the first and second capacitors when the temperature of the transistor for amplification is less than the prescribed threshold value. Thus, even when the temperature of the transistor for amplification is relatively low, the improvement effect on the modulation accuracy can be improved.

[0129] (8) The power amplifier circuit according to (6) above, wherein the static capacitance circuit includes a variable capacitor whose capacitance value changes in accordance with the temperature of the transistor for amplification.

[0130] In this configuration, the improvement effect on the modulation accuracy can be optimized in accordance with changes in the temperature of the transistor for amplification.

[0131] (9) The power amplifier circuit according to (7) or (8) above, wherein the static capacitance circuit includes a second thermistor whose resistance value changes in accordance with the temperature of the transistor for amplification.

[0132] In this configuration, the improvement effect on the modulation accuracy can be optimized using the fact that the resistance value of the second thermistor changes steplessly in accordance with the temperature of the transistor for amplification.

[0133] (10) The power amplifier circuit according to any one of (1) to (4), (6) to (9) above, wherein the power supply potential when charging the static capacitance circuit is higher than the power supply potential supplied to the transistor for supplying a bias current.

[0134] In this configuration, the improvement effect on the modulation accuracy can be further improved.

[0135] According to the present disclosure, a power amplifier circuit that can effectively improve the modulation accuracy can be implemented.

Claims

1. A power amplifier circuit, wherein, The power amplifier circuit includes: Amplifying transistors amplify high-frequency signals before outputting them; and A bias circuit that supplies bias current to the base of the amplifying transistor. The bias circuit includes: Bias current supply transistor; as well as An electrostatic capacitor circuit, the electrostatic capacitance of which varies according to the temperature of the amplifying transistor, is charged during the non-supply period of the bias current and discharges into the supply path of the bias current during the supply period of the bias current. The supply period of the bias current includes the amplification period during which the amplifying transistor amplifies the high-frequency signal. The bias current is supplied before the amplification of the amplification transistor begins.

2. The power amplifier circuit according to claim 1, wherein, The electrostatic capacitor circuit includes: A first capacitor is disposed between the bias current supply path and the reference potential; and The second capacitor is connected in parallel with the first capacitor when the temperature of the amplifying transistor is below a predetermined threshold, and is disconnected from the first capacitor when the temperature of the amplifying transistor is above the predetermined threshold.

3. The power amplifier circuit according to claim 1, wherein, The electrostatic capacitor circuit includes a variable capacitor whose capacitance value varies according to the temperature of the amplification transistor.

4. The power amplifier circuit according to claim 2 or 3, wherein, The electrostatic capacitor circuit includes a thermistor whose resistance value varies according to the temperature of the amplification transistor.

5. A power amplifier circuit, wherein, The power amplifier circuit includes: Amplifying transistors amplify high-frequency signals before outputting them; and A bias circuit that supplies bias current to the base of the amplifying transistor. The bias circuit includes: Bias current supply transistor; A temperature compensation diode, connected in series between the base of the bias current supply transistor and a reference potential; and A first thermistor, the resistance of which varies according to the temperature of the amplification transistor, is connected in series with the temperature compensation diode. The supply period of the bias current includes the amplification period during which the amplifying transistor amplifies the high-frequency signal. The bias current is supplied before the amplification of the amplification transistor begins.

6. The power amplifier circuit according to claim 5, wherein, The bias circuit also includes an electrostatic capacitor circuit whose capacitance varies according to the temperature of the amplification transistor, is charged during the non-supply period of the bias current, and discharges to the base of the bias current supply transistor during the supply period of the bias current.

7. The power amplifier circuit according to claim 6, wherein, The electrostatic capacitor circuit includes: A first capacitor is disposed between the base of the bias current supply transistor and a reference potential; and The second capacitor is connected in parallel with the first capacitor when the temperature of the amplifying transistor is below a predetermined threshold, and is disconnected from the first capacitor when the temperature of the amplifying transistor is above the predetermined threshold.

8. The power amplifier circuit according to claim 6, wherein, The electrostatic capacitor circuit includes a variable capacitor whose capacitance value varies according to the temperature of the amplification transistor.

9. The power amplifier circuit according to claim 7 or 8, wherein, The electrostatic capacitor circuit includes a second thermistor whose resistance value varies according to the temperature of the amplification transistor.

10. The power amplifier circuit according to any one of claims 1 to 4, 6 to 9, wherein, The power supply potential when the electrostatic capacitor circuit is charged is higher than the power supply potential supplied to the bias current supply transistor.

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