Method and apparatus for configuring software registers in a chip

Abstract

The present disclosure provides a configuration method and device of software registers in a chip, wherein the method comprises: determining a target module in the chip and a plurality of configurable parameters of the target module; grouping software registers required by the target module according to correlations between the plurality of configurable parameters to generate a plurality of software register groups; determining a target address space of each software register group, and respectively instantiating the plurality of software register groups according to the corresponding configurable parameters, so that the number of required software registers is instantiated according to the actual specifications of the configurable parameters, rather than implementing all related software registers according to the maximum specifications, thereby reducing the area overhead of software registers in the target module.

Description

Technical Field

[0001] This disclosure relates to the field of integrated circuit technology, and in particular to a method and apparatus for configuring software registers in a chip. Background Technology

[0002] In the field of chip design, some general-purpose modules are usually designed, and software registers are usually designed on these general-purpose modules.

[0003] In related technologies, software registers are designed according to the maximum specifications supported by the module. However, this direct design of software registers based on the maximum specifications means that these redundant software registers will not be optimized away in other smaller product forms, thus wasting chip area. Summary of the Invention

[0004] This disclosure aims to at least partially address one of the technical problems in the related art.

[0005] This disclosure proposes a method and apparatus for configuring software registers in a chip, in order to solve the problem in related technologies where software registers are designed directly according to the maximum specifications, resulting in these redundant software registers not being optimized away in other smaller product forms, thus wasting chip area.

[0006] According to a first aspect of this disclosure, a method for configuring software registers in a chip is provided, comprising: determining a target module in the chip and a plurality of configurable parameters of the target module; grouping the software registers required by the target module according to the correlation between the plurality of configurable parameters to generate a plurality of software register groups; determining the target address space of each software register group, and instantiating the plurality of software register groups respectively according to the corresponding configurable parameters.

[0007] Optionally, determining the target address space of each software register group and instantiating the plurality of software register groups according to the corresponding configurable parameters includes: obtaining the target number of software registers in each software register group; determining the target address space of each software register group according to the target number of software registers in each software register group; and instantiating the plurality of software register groups according to the target address space of each software register group and the configurable parameters corresponding to each software register group.

[0008] Optionally, the method further includes configuring corresponding decoding logic for each instantiated software register group to decode each software register in each software register group.

[0009] Optionally, the decoding logic includes out-of-bounds detection logic, and the method further includes: determining, according to the out-of-bounds detection logic, whether the address space of any instantiated software register group matches the corresponding target address space; when the instantiated address space of any instantiated software register group does not match the corresponding target address space, generating out-of-bounds configuration information and reporting the out-of-bounds configuration information, wherein the out-of-bounds configuration information is used to indicate that the instantiation of any software register group is incorrect.

[0010] Optionally, determining the target module within the chip and multiple configurable parameters of the target module includes: acquiring a data processing task of a target device adapted to the chip; determining a target module matching the data processing task and multiple configurable parameters of the target module based on the data processing task.

[0011] Optionally, the method further includes: reporting the plurality of configurable parameters, wherein the plurality of configurable parameters are used to query the software register group corresponding to each of the configurable parameters and determine the target address space matching the software register group.

[0012] According to a second aspect of the present disclosure, a configuration apparatus for software registers in a chip is provided, comprising: a determining module, configured to determine a target module in the chip and a plurality of configurable parameters of the target module; a processing module, configured to group the software registers required by the target module according to the correlation between the plurality of configurable parameters to generate a plurality of software register groups; and an instantiation module, configured to determine the target address space of each software register group and instantiate the plurality of software register groups respectively according to the corresponding configurable parameters.

[0013] According to a third aspect of this disclosure, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform a method for configuring software registers in a chip according to an embodiment of the first aspect of this disclosure.

[0014] According to a fourth aspect of this disclosure, a computer-readable storage medium is provided that, when instructions in the computer-readable storage medium are executed by a processor of an electronic device, enables the electronic device to perform a method for configuring software registers in a chip according to an embodiment of the first aspect of this disclosure.

[0015] According to a fifth aspect of this disclosure, a computer program product is provided, including a computer program that, when executed by a processor of an electronic device, enables the electronic device to perform the method for configuring software registers in a chip according to the first aspect embodiment.

[0016] The technical solution disclosed herein determines a target module within a chip and multiple configurable parameters of the target module; based on the correlation between the multiple configurable parameters, the software registers required by the target module are grouped to generate multiple software register groups; the target address space of each software register group is determined, and the multiple software register groups are instantiated according to the corresponding configurable parameters. Thus, the required number of software registers is instantiated according to the actual specifications of the configurable parameters, rather than implementing all related software registers according to the maximum specifications, thereby reducing the area overhead of software registers in the target module.

[0017] Additional aspects and advantages of this disclosure will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this disclosure. Attached Figure Description

[0018] The above and / or additional aspects and advantages of this disclosure will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, in which:

[0019] Figure 1 This is a flowchart illustrating a method for configuring software registers in a chip according to an exemplary embodiment.

[0020] Figure 2 This is a flowchart illustrating a method for configuring software registers in a chip according to another exemplary embodiment;

[0021] Figure 3 This is a flowchart illustrating a method for configuring software registers in a chip according to another exemplary embodiment;

[0022] Figure 4 This is a schematic diagram of software registers in a chip according to an exemplary embodiment;

[0023] Figure 5 This is a schematic diagram of the address space of each software register group according to an exemplary embodiment;

[0024] Figure 6 This is a schematic diagram of the structure of a configuration device for software registers in a chip according to an exemplary embodiment;

[0025] Figure 7This is a block diagram of an electronic device with software registers configured in a chip, according to an exemplary embodiment. Detailed Implementation

[0026] Embodiments of this disclosure are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this disclosure, and should not be construed as limiting this disclosure.

[0027] Related technologies design software registers according to the maximum specifications supported by the module. However, this direct design of software registers according to the maximum specifications means that these redundant software registers will not be optimized away in other smaller product forms, wasting chip area. Furthermore, if the software incorrectly configures redundant software registers while omitting the software registers that should be configured normally, such software problems are difficult to debug.

[0028] To address the aforementioned issues, this disclosure proposes a method and apparatus for configuring software registers in a chip.

[0029] The following detailed description, with reference to the accompanying drawings, illustrates a method and apparatus for configuring software registers in a chip according to this disclosure.

[0030] Figure 1 This is a flowchart illustrating a method for configuring software registers in a chip according to an exemplary embodiment. It should be noted that this method for configuring software registers in a chip can be applied to a device for configuring software registers in a chip. This device can be, for example, a hardware device that can be connected to the chip via a bus, a controller within the hardware device, or control software within the hardware device, etc., and can be configured according to actual needs; this disclosure does not impose any limitations on this.

[0031] like Figure 1 As shown, the method for configuring the software registers in the chip includes the following steps:

[0032] Step 101: Determine the target module in the chip and its multiple configurable parameters.

[0033] Optionally, the data processing task of the target device adapted to the chip is obtained; based on the data processing task, the target module matching the data processing task and multiple configurable parameters of the target module are determined.

[0034] As one possible implementation of this disclosure, a corresponding data processing task can be determined according to the business data processing requirements of the target device adapted to the chip. The chip can pre-set the mapping relationship between the data processing task and each module and multiple configurable parameters of the corresponding module. According to the data processing task, the pre-set mapping relationship can be queried to determine the target module matching the data processing task and multiple configurable parameters of the target module.

[0035] Step 102: Based on the correlation between multiple configurable parameters, group the software registers required by the target module to generate multiple software register groups.

[0036] In this embodiment of the disclosure, it can be determined whether multiple configurable parameters are related, and based on the multiple related configurable parameters, the software registers required by the corresponding target module are placed in the same group.

[0037] For example, multiple configurable parameters include: port transmission rate, port interrupt enable, and port transmission attributes. It can be determined that multiple configurable parameters are related to port settings, and the software registers required by the target module can be placed in the same group.

[0038] Step 103: Determine the target address space for each software register group, and instantiate multiple software register groups according to the corresponding configurable parameters.

[0039] Furthermore, the corresponding target address space is determined based on the number of registers within each software register group. It should be noted that the number of registers within each software register group can be 2. n The target address space of each software register group can be the product of the address space of each software register and the number of target software registers. For example, if the number of target software registers in a software register group is 64 and the address space of each software register is 4 bytes, the target address space of the software register group is [0, 255].

[0040] Furthermore, based on the target address space of each software register group and the corresponding configurable parameters, multiple software register groups are instantiated separately. For example, if the module supports a maximum of 128 ports, the software registers related to port settings are divided into 4 groups, i.e., PORT_NUM is 4, and the target address space size of each group of software registers is 256 bytes, only 4 groups need to be instantiated (e.g., port_reg_group 0, port_reg_group 1, port_reg_group 2, and port_reg_group 3), with a target address space size of 256 bytes for the software registers.

[0041] In summary, the target module within the chip and its multiple configurable parameters are determined. Based on the correlation between these configurable parameters, the software registers required by the target module are grouped to generate multiple software register groups. The target address space of each software register group is determined, and the multiple software register groups are instantiated according to the corresponding configurable parameters. Thus, the required number of software registers is instantiated according to the actual specifications of the configurable parameters, rather than implementing all relevant software registers according to the maximum specifications, which reduces the area overhead of software registers in the target module.

[0042] To clearly illustrate how to determine the target address space of each software register group and how to instantiate the multiple software register groups according to the corresponding configurable parameters, the following section combines... Figure 2 The method for configuring software registers in the chip provided in this embodiment will be further explained.

[0043] Figure 2 This is a flowchart illustrating a method for configuring software registers in a chip according to another exemplary embodiment. For example... Figure 2 As shown, the method for configuring the software registers in the chip includes the following steps:

[0044] Step 201: Determine the target module in the chip and its multiple configurable parameters.

[0045] Step 202: Obtain the target number of software registers in each software register group.

[0046] In this embodiment of the disclosure, the software registers required by the target module can be grouped according to the correlation between multiple configurable parameters, and the target number of software registers in each software register group can be counted. It should be noted that the target number of software registers in each software register group is not equal to 2. n When the target number of software registers in the software register group is reached, the number can be rounded up to 2. n indivual.

[0047] Step 203: Determine the target address space of each software register group based on the target number of software registers in each software register group.

[0048] Furthermore, based on the address space of each software register in each software register group and the corresponding target number of software registers, the target address space of each software register group is determined. For example, the target address space of each software register group = the address space of each software register in the corresponding software register group * the corresponding target number of software registers. For instance, if the address space of each software register in a software register group is 4 bytes and the corresponding target number of software registers is 64, then the target address space of this software register group is [0, 255], a total of 256 bytes.

[0049] Step 204: Instantiate multiple software register groups according to the target address space of each software register group and the configurable parameters corresponding to each software register group.

[0050] Furthermore, based on the target address space of each software register group and the configurable parameters corresponding to each software register group, the multiple software register groups that need to be instantiated and the address space of each software register group can be determined, thereby enabling the instantiation of multiple software register groups separately.

[0051] It should be noted that the execution process of step 201 can be implemented in any of the various embodiments of this disclosure. This disclosure does not limit this and will not elaborate further.

[0052] In summary, by obtaining the target number of software registers in each software register group; determining the target address space of each software register group based on the target number of software registers in each software register group; and instantiating multiple software register groups separately based on the target address space of each software register group and the configurable parameters corresponding to each software register group, the required number of software registers can be instantiated according to the actual specifications of the configurable parameters, rather than implementing all relevant software registers according to the maximum specifications, which can reduce the area overhead of software registers in the target module.

[0053] To verify the instantiated register grouping, the following section combines... Figure 3 The method for configuring software registers in the chip provided in this embodiment will be further explained.

[0054] Figure 3 This is a flowchart illustrating a method for configuring software registers in a chip according to another exemplary embodiment. For example... Figure 3 As shown, the method for configuring the software registers in the chip includes the following steps:

[0055] Step 301: Determine the target module in the chip and its multiple configurable parameters.

[0056] Step 302: Based on the correlation between multiple configurable parameters, the software registers required by the target module are grouped to generate multiple software register groups.

[0057] Step 303: Determine the target address space for each software register group, and instantiate multiple software register groups respectively according to the corresponding configurable parameters.

[0058] Step 304: Configure corresponding decoding logic for each instantiated software register group to decode each software register in each software register group. The decoding logic includes out-of-bounds detection logic.

[0059] In this embodiment of the disclosure, corresponding decoding logic can be configured for each instantiated software register group in the address decoder, so that the address decoder decodes the software registers in each instantiated software register group according to the decoding logic. Furthermore, the decoding logic may also include out-of-bounds detection logic to perform out-of-bounds detection for each instantiated software register group.

[0060] Step 305: Based on the out-of-bounds detection logic, determine whether the address space of any instantiated software register group matches the corresponding target address space.

[0061] As one possible implementation of this disclosure, according to the out-of-bounds detection logic, the address space of any instantiated software register group can be compared with the corresponding target address space to determine whether the address space of any instantiated software register group matches the corresponding target address space.

[0062] Step 306: When the instantiated address space of any instantiated software register group does not match the corresponding target address range, generate out-of-bounds configuration information and report the out-of-bounds configuration information.

[0063] The out-of-bounds configuration information is used to indicate any software register group instantiation error.

[0064] Furthermore, if the instantiation address space of any instantiated software register group does not match the corresponding target address range, it can be determined that the instantiation of any software register group is incorrect, and corresponding out-of-bounds configuration information is generated, reported, and an interrupt is triggered for that software register group. Thus, by reporting an interrupt, the software register with configuration problems can be located.

[0065] In addition, it should be noted that, in order to facilitate the query of the specific specifications of the module, configurable parameters can be reported. Multiple configurable parameters are used to query the software register group corresponding to each configurable parameter and determine the target address space that matches the corresponding software register group. For example, by querying the read-only register corresponding to the number of ports PORT_NUM, the address space size of the corresponding register group can be obtained. Since the configurable parameter itself is a constant value, it will not introduce any area overhead as a read-only register.

[0066] It should be noted that the execution process of steps 301 to 303 can be implemented in any of the embodiments of this disclosure. This disclosure does not limit this and will not elaborate further.

[0067] In summary, by configuring corresponding decoding logic for each instantiated software register group, each software register within each software register group is decoded. This decoding logic includes out-of-bounds detection logic. Based on this logic, it is determined whether the address space of any instantiated software register group matches the corresponding target address space. When the instantiated address space of any instantiated software register group does not match the corresponding target address range, out-of-bounds configuration information is generated and reported. This out-of-bounds configuration information indicates an instantiation error in any software register group. Therefore, by setting out out-of-bounds detection logic in the decoding logic, out-of-bounds detection can be performed on multiple instantiated software register groups to locate software registers with configuration problems.

[0068] To clearly illustrate the above embodiments, examples are given below.

[0069] For example, to achieve such Figure 4 The specific process for configuring the software registers shown is as follows:

[0070] The first step is to categorize registers associated with the same parameter (e.g., port) into the same group;

[0071] The second step, as Figure 5 As shown, determine the size of the address space for each group of registers;

[0072] The third step is to instantiate the register set according to the parameters and implement the decoding logic at the same time.

[0073] The fourth step is to add out-of-bounds detection to the decoding logic and report out-of-bounds errors (i.e., configuring software registers outside the actual specifications) via interrupts.

[0074] The fifth step is to provide parameter-related read-only software registers for the software to reference in order to determine the effective register address space.

[0075] The method for configuring software registers in a chip according to embodiments of this disclosure involves determining a target module in the chip and multiple configurable parameters of the target module; grouping the software registers required by the target module according to the correlation between the multiple configurable parameters to generate multiple software register groups; determining the target address space of each software register group; and instantiating the multiple software register groups respectively according to the corresponding configurable parameters. Therefore, by instantiating the required number of software registers according to the actual specifications of the configurable parameters, rather than implementing all related software registers to the maximum specification, the area overhead of software registers in the target module can be reduced.

[0076] To implement the above embodiments, this disclosure also proposes a configuration device for software registers in a chip.

[0077] Figure 6 This is a schematic diagram of the structure of a configuration device for software registers in a chip according to an exemplary embodiment.

[0078] like Figure 6 As shown, the software register configuration device 600 in the chip includes: a determination module 610, a processing module 620, and an instantiation module 630.

[0079] The determination module 610 is used to determine the target module in the chip and multiple configurable parameters of the target module; the processing module 620 is used to group the software registers required by the target module according to the correlation between the multiple configurable parameters to generate multiple software register groups; the instantiation module 630 is used to determine the target address space of each software register group and instantiate the multiple software register groups respectively according to the corresponding configurable parameters.

[0080] As a possible implementation of this disclosure, the instantiation module 630 is further configured to: obtain the target number of software registers in each software register group; determine the target address space of each software register group based on the target number of software registers in each software register group; and instantiate multiple software register groups respectively based on the target address space of each software register group and the configurable parameters corresponding to each software register group.

[0081] As one possible implementation of this disclosure, the configuration device 600 for the software registers in the chip further includes a configuration module.

[0082] The configuration module is used to configure the corresponding decoding logic for each instantiated software register group, so as to decode each software register in each software register group.

[0083] As one possible implementation of this disclosure, the decoding logic includes out-of-bounds detection logic, and the configuration device 600 of the software register in the chip further includes: a detection module and a first reporting module.

[0084] The detection module is used to determine whether the address space of any instantiated software register group matches the corresponding target address space according to the out-of-bounds detection logic. The first reporting module is used to generate out-of-bounds configuration information and report the out-of-bounds configuration information when the instantiated address space of any instantiated software register group does not match the corresponding target address space. The out-of-bounds configuration information is used to indicate that any software register group has been instantiated incorrectly.

[0085] As one possible implementation of this disclosure, the determining module is further configured to: acquire the data processing task of the target device adapted to the chip; and determine the target module matching the data processing task and multiple configurable parameters of the target module based on the data processing task.

[0086] As one possible implementation of this disclosure, the configuration device 600 for the software register in the chip further includes a second reporting module.

[0087] The second reporting module is used to report multiple configurable parameters, wherein the multiple configurable parameters are used to query the software register group corresponding to each configurable parameter and determine the target address space that matches the corresponding software register group.

[0088] The software register configuration apparatus in a chip according to embodiments of this disclosure determines a target module in the chip and multiple configurable parameters of the target module; groups the software registers required by the target module according to the correlation between the multiple configurable parameters to generate multiple software register groups; determines the target address space of each software register group; and instantiates the multiple software register groups respectively according to the corresponding configurable parameters. Therefore, by instantiating the required number of software registers according to the actual specifications of the configurable parameters, rather than implementing all relevant software registers to the maximum specification, the area overhead of software registers in the target module can be reduced.

[0089] To implement the above embodiments, this disclosure also proposes an electronic device, such as... Figure 7 As shown, Figure 7 This is a block diagram of an electronic device illustrating the configuration of software registers in a chip according to an exemplary embodiment. For example... Figure 7 As shown, the above-mentioned electronic device 700 may include:

[0090] The memory 710 and processor 720 are connected by a bus 730, which connects different components (including the memory 710 and the processor 720). The memory 710 stores a computer program, and when the processor 720 executes the program, it implements the method for configuring software registers in the chip according to the embodiments of this disclosure.

[0091] Bus 730 represents one or more of several bus architectures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor, or a local bus using any of the various bus architectures. Examples of these architectures include, but are not limited to, the Industry Standard Architecture (ISA) bus, the Micro Channel Architecture (MAC) bus, the Enhanced ISA bus, the Video Electronics Standards Association (VESA) local bus, and the Peripheral Component Interconnect (PCI) bus.

[0092] Electronic device 700 typically includes a variety of computer-readable media. These media can be any available media that can be accessed by electronic device 700, including volatile and non-volatile media, removable and non-removable media.

[0093] The memory 710 may also include computer system readable media in the form of volatile memory, such as random access memory (RAM) 740 and / or cache memory 750. The electronic device 700 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, the storage system 760 can be used to read and write non-removable, non-volatile magnetic media (…). Figure 7 Not shown; usually referred to as a "hard drive"). Although Figure 7 Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk") and an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In these cases, each drive may be connected to bus 730 via one or more data media interfaces. Memory 710 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments of this disclosure.

[0094] A program / utility 780 having a set (at least one) of program modules 770 may be stored in, for example, memory 710. Such program modules 770 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. Program modules 770 typically perform the functions and / or methods described in the embodiments of this disclosure.

[0095] Electronic device 700 can also communicate with one or more external devices 790 (e.g., keyboard, pointing device, display 791, etc.), and with one or more devices that enable a user to interact with the electronic device 700, and / or with any device that enables the electronic device 700 to communicate with one or more other computing devices (e.g., network card, modem, etc.). This communication can be performed through input / output (I / O) interface 792. Furthermore, electronic device 700 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) through network adapter 793. Figure 7 As shown, network adapter 793 communicates with other modules of electronic device 700 via bus 730. It should be understood that, although... Figure 7 As not shown in the diagram, other hardware and / or software modules may be used in conjunction with the electronic device 700, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0096] The processor 720 executes various functional applications and data processing by running programs stored in the memory 710.

[0097] It should be noted that the implementation process and technical principles of the electronic device in this embodiment are explained in the foregoing description of the configuration method of the software register in the chip of this disclosure embodiment, and will not be repeated here.

[0098] The electronic device provided in this disclosure determines a target module within a chip and multiple configurable parameters of the target module; based on the correlation between the multiple configurable parameters, it groups the software registers required by the target module to generate multiple software register groups; it determines the target address space of each software register group, and instantiates the multiple software register groups respectively according to the corresponding configurable parameters. Therefore, by instantiating the required number of software registers according to the actual specifications of the configurable parameters, rather than implementing all related software registers to the maximum specification, the area overhead of the software registers in the target module can be reduced.

[0099] To implement the above embodiments, this disclosure also proposes a computer-readable storage medium.

[0100] Specifically, when the instructions in the computer-readable storage medium are executed by the processor of the electronic device, the electronic device is able to execute the configuration method of the software registers in the chip as described above.

[0101] To implement the above embodiments, this disclosure also provides a computer program product that, when executed by the processor of an electronic device, enables the electronic device to execute the configuration method of the software registers in the chip as described above.

[0102] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0103] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A method for configuring software registers in a chip, characterized by, include: Identify the target module within the chip, and several configurable parameters of the target module; Based on the correlation between the multiple configurable parameters, the software registers required by the target module are grouped to generate multiple software register groups; Determine the target address space for each software register group and obtain the target number of software registers in each software register group; Determine the target address space for each of the software register groups based on the number of targets; The multiple software register groups are instantiated according to the target address space and corresponding configurable parameters of each software register group.

2. The method of claim 1, wherein, The method further includes: Configure corresponding decoding logic for each instantiated software register group to decode each software register in each software register group.

3. The method of claim 2, wherein, The decoding logic includes out-of-bounds detection logic, and the method further includes: Based on the out-of-bounds detection logic, determine whether the address space of any instantiated software register group matches the corresponding target address space; When the instantiation address space of any instantiated software register group does not match the corresponding target address space, out-of-bounds configuration information is generated and reported, wherein the out-of-bounds configuration information is used to indicate that the instantiation of any software register group is incorrect.

4. The method according to any one of claims 1-3, characterized in that, The determination of the target module within the chip, and the multiple configurable parameters of the target module, include: Acquire data processing tasks from the target device that is compatible with the chip; Based on the data processing task, a target module matching the data processing task and multiple configurable parameters of the target module are determined.

5. The method of claim 4, wherein, The method further includes: The plurality of configurable parameters are reported, wherein the plurality of configurable parameters are used to query the software register group corresponding to each configurable parameter and determine the target address space that matches the corresponding software register group.

6. An apparatus for configuring software registers in a chip, comprising: include: A determination module is used to determine a target module within the chip, as well as multiple configurable parameters of the target module; The processing module is used to group the software registers required by the target module according to the correlation between the multiple configurable parameters, so as to generate multiple software register groups; An instantiation module is used to determine the target address space of each software register group and obtain the target number of software registers in each software register group; Determine the target address space for each of the software register groups based on the number of targets; The multiple software register groups are instantiated according to the target address space and corresponding configurable parameters of each software register group.

7. The apparatus of claim 6, wherein, The device further includes: The configuration module is used to configure corresponding decoding logic for each instantiated software register group to decode each software register in each software register group.

8. The apparatus of claim 7, wherein, The decoding logic includes out-of-bounds detection logic, and the device further includes: The detection module is used to determine, based on the out-of-bounds detection logic, whether the address space of any instantiated software register group matches the corresponding target address space; The first reporting module is used to generate out-of-bounds configuration information and report the out-of-bounds configuration information when the instantiation address space of any instantiated software register group does not match the corresponding target address space. The out-of-bounds configuration information is used to indicate that the instantiation of any software register group is incorrect.

9. The apparatus of any one of claims 6-8, wherein, The determining module is further configured to: Acquire data processing tasks from the target device that is compatible with the chip; Based on the data processing task, a target module matching the data processing task and multiple configurable parameters of the target module are determined.

10. The apparatus of claim 9, wherein, The device further includes: The second reporting module is used to report the plurality of configurable parameters, wherein the plurality of configurable parameters are used to query the software register group corresponding to each configurable parameter and determine the target address space that matches the corresponding software register group.

11. An electronic device, characterized in that, include: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform the configuration method of the software registers in the chip according to any one of claims 1-5.

12. A computer-readable storage medium, wherein when instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to perform a method for configuring software registers in a chip as described in any one of claims 1-5.

13. A computer program product comprising a computer program that, when executed by a processor of an electronic device, enables the electronic device to perform a method for configuring software registers in a chip as described in any one of claims 1-5.

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