Signal detection circuit

Abstract

The present invention provides a signal detection circuit. The signal detection circuit includes a first capacitor and a first detection point. The signal detection circuit increases the voltage of the first capacitor based on an input signal; when the voltage of the first capacitor is greater than 0V, the first capacitor discharges; when the voltage of the first capacitor is greater than a first preset voltage, the first detection point operates in a first state, and when the voltage of the first capacitor is less than the first preset voltage, the first detection point operates in a second state. With this configuration, the capacitor is used to convert short-duration, small-amplitude signals, and an output signal is generated based on the duration of the capacitor discharge. This allows subsequent circuits to determine whether a small signal exists, solving the problem of small signals being difficult to perceive in the technology.

Description

Technical Field

[0001] The present invention relates to the field of signal detection, and in particular to a signal detection circuit. Background Art

[0002] Small signal detection has always been a major challenge in the field of signal detection. Such signals are usually short-lived, low-amplitude, and fleeting, making them difficult to be detected by ADCs (Analog-to-Digital Converters). However, in some specific scenarios, people need to know whether such tiny signals exist in the loop. Therefore, how to amplify small signals so that they can be perceived by the ADC is a very important issue. Summary of the Invention

[0003] The object of the present invention is to provide a signal detection circuit to solve the problem in the prior art that small signals are difficult to perceive.

[0004] In order to solve the above technical problems, the present invention provides a signal detection circuit, which is used to work in conjunction with a signal processing circuit. The signal detection circuit is used to receive a signal of a first pulse width and output a signal of a second pulse width to the signal processing circuit. The first pulse width is less than the minimum response time of the signal processing circuit, and the second pulse width is greater than the minimum response time of the signal processing circuit.

[0005] The signal detection circuit includes a first capacitor and a first detection point. The signal detection circuit increases the voltage of the first capacitor based on the input signal; when the voltage of the first capacitor is greater than 0V, the first capacitor is discharged; when the voltage of the first capacitor is greater than a first preset voltage, the first detection point operates in a first state, and when the voltage of the first capacitor is less than the first preset voltage, the first detection point operates in a second state.

[0006] The signal detection circuit generates an output signal based on the operating status of the first detection point.

[0007] Optionally, the signal detection circuit also includes a second capacitor and a second detection point. When the first detection point operates in the first state, the voltage of the second capacitor drops to 0V; when the voltage of the second capacitor is less than the second preset voltage, the second capacitor is charged; when the voltage of the second capacitor is greater than the third preset voltage, the level of the second detection point is the first level, and when the voltage of the second capacitor is less than the third preset voltage, the level of the second detection point is the second level; the first level and the second level are opposite.

[0008] The second detection point is configured as an output terminal of the signal detection circuit, or the signal detection circuit generates an output signal based on the level of the second detection point.

[0009] Optionally, the signal detection circuit further includes an input signal amplification module, and the input signal amplification module is used to amplify the input signal to drive the voltage of the first capacitor to increase.

[0010] Optionally, the signal detection circuit further includes an input signal amplification module, and the input signal amplification module is used to amplify the input signal to drive the voltage of the first capacitor to increase.

[0011] The input signal amplification module includes a first switch element, a second switch element, a first resistor and a second resistor, wherein:

[0012] The first switch element is configured such that when the control terminal of the first switch element receives a high level, the first switch element is turned on; when the control terminal of the first switch element receives a low level, the first switch element is turned off.

[0013] The second switch element is configured such that, when the control terminal of the second switch element receives a low level, the second switch element is turned on; and when the control terminal of the second switch element receives a high level, the second switch element is turned off.

[0014] The control end of the first switching element is configured as the input end of the input signal amplification module; the first connection end of the first switching element is connected to the first end of the first resistor, the second connection end of the first switching element is used for grounding, and the second end of the first resistor is used for connecting to a power supply.

[0015] The control end of the second switch element is connected to the first end of the first resistor, the first connection end of the second switch element is used to connect to a power supply, and the second connection end of the second switch element is connected to the first end of the first capacitor.

[0016] A first end of the second resistor is connected to a second end of the first capacitor, and a second end of the second resistor is grounded.

[0017] Optionally, the signal detection circuit further includes a third switch element and a third resistor, wherein:

[0018] The working logic of the third switching element is the same as that of the first switching element. The control end of the third switching element is connected to the first end of the first capacitor, the first connection end of the third switching element is connected to the second end of the third resistor, and the second end of the third resistor is used to connect to a power supply.

[0019] The first connection end of the third switching element is configured as the first detection point, the first detection point is connected to the ground and is configured as the first working state, the first detection point is disconnected from the ground and is configured as the second working state, and the start-up voltage of the third switching element is configured as the first preset voltage.

[0020] Optionally, the signal detection circuit further includes a fourth switch element, wherein:

[0021] The working logic of the fourth switching element is the same as the working logic of the second switching element; the first connection end of the fourth switching element is used to connect to the power supply, the second connection end of the fourth switching element is configured as the second detection point, and the control end of the fourth switching element is connected to the first end of the third resistor.

[0022] The second end of the third resistor is connected to the first end of the second capacitor, and the second end of the second capacitor is grounded.

[0023] The voltage of the power supply is configured as the second preset voltage, the turn-on voltage of the fourth switch element is configured as the third preset voltage, the low level is configured as the first level, and the high level is configured as the second level.

[0024] Optionally, the first switching element, the second switching element, the third switching element and the fourth switching element are at least one of a MOS tube, a transistor, a thyristor, an IGBT and a logic device.

[0025] Optionally, the first switch element and the third switch element are NMOS tubes, and the second switch element and the fourth switch element are PMOS tubes.

[0026] Compared to the prior art, the present invention provides a signal detection circuit comprising a first capacitor and a first detection point. The signal detection circuit increases the voltage of the first capacitor based on an input signal; when the voltage of the first capacitor is greater than 0V, the first capacitor discharges; when the voltage of the first capacitor is greater than a first preset voltage, the first detection point operates in a first state; and when the voltage of the first capacitor is less than the first preset voltage, the first detection point operates in a second state. With this configuration, the capacitor is used to convert short-duration, small-amplitude signals, and an output signal is generated based on the duration of the capacitor's discharge. This allows subsequent circuits to determine whether a small signal exists, resolving the problem of small signals being difficult to perceive in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

[0028] Figure 1 is a circuit diagram of a signal detection circuit according to an embodiment of the present invention;

[0029] Figure 2 4 is a waveform diagram of key nodes of a signal detection circuit according to an embodiment of the present invention.

[0030] In the attached figure:

[0031] 100-Input signal amplification module. DETAILED DESCRIPTION

[0032] To make the objects, advantages, and features of the present invention more clearly apparent, the present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale. They are only used to conveniently and clearly assist in illustrating the purposes of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to illustrate different focuses and sometimes use different scales.

[0033] As used in the present invention, the singular forms "a", "an", and "the" include plural referents, the term "or" is generally used to include "and / or", the term "several" is generally used to include "at least one", and the term "at least two" is generally used to include "two or more". In addition, the terms "first", "second", and "third" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features specified as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features, "one end" and "the other end" and "proximal end" and "distal end" generally refer to two corresponding parts, which not only include endpoints, and the terms "mounted", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be a communication between two elements or an interaction relationship between two elements. In addition, as used in the present invention, "one element is disposed on another element" generally only indicates that there is a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements may be direct or indirect through an intermediate element. It should not be understood as indicating or implying a spatial positional relationship between the two elements. That is, one element can be in any orientation, such as inside, outside, above, below, or to one side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0034] The core idea of the present invention is to provide a signal detection circuit to solve the problem in the prior art that small signals are difficult to perceive.

[0035] The following description is given with reference to the accompanying drawings.

[0036] In order to solve the above technical problems, the present invention provides a signal detection circuit, which is used to work in conjunction with a signal processing circuit. The signal detection circuit is used to receive a signal of a first pulse width and output a signal of a second pulse width to the signal processing circuit. The first pulse width is less than the minimum response time of the signal processing circuit, and the second pulse width is greater than the minimum response time of the signal processing circuit.

[0037] The term "signal processing circuit" should be understood broadly; any circuit capable of responding to and executing an action in response to a signal of the second pulse width should be considered a signal processing circuit. The minimum response time refers to the time that, when the duration of the signal is less than this time, the signal processing circuit cannot operate, and when the duration of the signal is greater than this time, the signal processing circuit can operate. For example, when the signal processing circuit is an ADC, the minimum response time is the ADC's sampling period.

[0038] The signal detection circuit includes a first capacitor C1 and a first detection point. The signal detection circuit increases the voltage of the first capacitor C1 based on the input signal; when the voltage of the first capacitor is greater than 0V, the first capacitor discharges. It can be understood that 0V refers to a reference value. In different embodiments, different voltage values can be selected as 0V. When the voltage of the first capacitor C1 is greater than a first preset voltage, the first detection point operates in a first state. When the voltage of the first capacitor C1 is less than the first preset voltage, the first detection point operates in a second state. The first state and the second state should be understood as two clearly different working states, such as: high level and low level, circuit on and off, current greater than a certain value and less than a certain value, etc. As long as they are two states that can drive at least one electrical component to make different responses, they should be regarded as the first state and the second state described.

[0039] The signal detection circuit generates an output signal based on the operating status of the first detection point.

[0040] Please refer to Figure 1 ,exist Figure 1 In the embodiment shown, the first detection point is point E in the figure, the first state, namely point E, is a grounded state, and the second state, namely point E, is a disconnected grounded state. Figure 1 All components and working principles of the embodiment are introduced below.

[0041] Furthermore, in order to ensure the duration of the subsequent signal, the discharge rate of the first voltage is relatively slow. With this configuration, a longer discharge time can be maintained, thereby extending the duration of the output signal.

[0042] Furthermore, the signal detection circuit further includes a second capacitor C2 and a second detection point. When the first detection point operates in the first state, the voltage of the second capacitor C2 drops to 0V; the 0V here can also be selected according to actual needs and can be different from the 0V of the first capacitor C1. When the voltage of the second capacitor C2 is less than a second preset voltage, the second capacitor C2 is charged. When the voltage of the second capacitor C2 is greater than a third preset voltage, the level of the second detection point is a first level (in this embodiment, a low level), and when the voltage of the second capacitor C2 is less than the third preset voltage, the level of the second detection point is a second level; the first level and the second level are opposite.

[0043] In this embodiment, the second detection point is configured as the output end of the signal detection circuit; in other embodiments, other logic circuits can also be set after the second detection point to further process the final output signal, that is, the signal detection circuit generates an output signal based on the level of the second detection point.

[0044] In order to further increase the duration of the output signal, the charging rate of the second capacitor C2 is relatively slow. This configuration can maintain a longer charging time, thereby extending the duration of the output signal.

[0045] like Figure 1 As shown, the signal detection circuit further includes an input signal amplifying module 100 , and the input signal amplifying module 100 is used to amplify the input signal to drive the voltage of the first capacitor C1 to increase.

[0046] The input signal amplifying module 100 includes a first switch element T1 , a second switch element T2 , a first resistor R1 , and a second resistor R2 .

[0047] The first switch element T1 is configured to be turned on when a high level is received at the control end of the first switch element T1, and to be turned off when a low level is received at the control end of the first switch element T1. When the level of the control end of the first switch element T1 is between a high level and a low level, the specific on / off state of the first switch element T1 is determined by the turn-on voltage of the first switch element T1.

[0048] The second switch element T2 is configured to be turned on when a low level is received at the control end of the second switch element T2, and to be turned off when a high level is received at the control end of the second switch element T2. When the level at the control end of the second switch element T2 is between a high level and a low level, the specific on / off state of the second switch element T2 is determined by the turn-on voltage of the second switch element T2.

[0049] The control end of the first switching element T1 is configured as the input end of the input signal amplification module 100; the first connection end of the first switching element T1 is connected to the first end of the first resistor R1, the second connection end of the first switching element T1 is used for grounding, and the second end of the first resistor R1 is used for connecting to a power supply.

[0050] The control end of the second switch element T2 is connected to the first end of the first resistor R1 , the first connection end of the second switch element T2 is used to connect to the power supply Battery, and the second connection end of the second switch element T2 is connected to the first end of the first capacitor C1 .

[0051] A first end of the second resistor R2 is connected to a second end of the first capacitor C2 , and a second end of the second resistor R2 is grounded.

[0052] Assume that a narrow pulse with an amplitude of V0 and a pulse width of t0 is input to the input terminal. The duration of this pulse is shorter than the sampling period of the ADC, so that the ADC cannot detect it.

[0053] However, since V0 is greater than the turn-on voltage of the first switch element T1, when the pulse is input, T1 is turned on, and the voltage at point B is pulled down through T1, that is, the control end of T2 is at a low level, and T2 is turned on. At this time, a pulse with an amplitude of Battery and a pulse width of t0 (the length of t0 can be referred to Figure 2 The pulse signal (for understanding) is the input signal at point C, which has undergone the first amplitude amplification.

[0054] The pulse at point C then discharges through the path of the first capacitor C1 and resistor R2. The discharge time is determined by the values of C1 and R2. At this point, a pulse signal with a maximum voltage of battery and a pulse width of approximately 3*R2*C1 can be detected at point D. This means that the input signal has undergone the first time amplification at point D.

[0055] Furthermore, the signal detection circuit further includes a third switch element T3 and a third resistor R3.

[0056] Wherein: the working logic of the third switching element T3 is the same as the working logic of the first switching element T1, the control end of the third switching element T3 is connected to the first end of the first capacitor C1, the first connection end of the third switching element T3 is connected to the second end of the third resistor R3, and the second end of the third resistor R3 is used to connect to the power supply Battery.

[0057] The first connection end of the third switching element T3 is configured as the first detection point (i.e., point E in the figure), the first detection point is connected to the ground and is configured as the first working state, the first detection point is disconnected from the ground and is configured as the second working state, and the turn-on voltage Von3 of the third switching element T3 is configured as the first preset voltage.

[0058] The third switch element T3 may be used to implement switching of the first detection point between the first state and the second state.

[0059] The signal detection circuit further includes a fourth switch element T4.

[0060] In which: the working logic of the fourth switch element T4 is the same as the working logic of the second switch element T2; the first connection end of the fourth switch element T4 is used to connect to the power supply Battery, the second connection end of the fourth switch element T4 is configured as the second detection point (i.e., point F in the figure), and the control end of the fourth switch element T4 is connected to the first end of the third resistor R3.

[0061] The second end of the third resistor R3 is connected to the first end of the second capacitor C2, and the second end of the second capacitor C2 is grounded.

[0062] The voltage of the power supply Battery is configured as the second preset voltage. The turn-on voltage Von4 of the fourth switch element T4 is configured as the third preset voltage. The low level is configured as the first level, and the high level is configured as the second level.

[0063] The pulse width of point D is from 0 to t1 (the position of t1 can be referred to Figure 2 (understanding) time, the amplitude is greater than the turn-on voltage of T3, so T3 is turned on, the voltage at point E is pulled down, and the charge on the second capacitor C2 is quickly discharged through T3. After the pulse amplitude at point D drops below the turn-on voltage of T3, that is, after t1, T3 is turned off, and the power battery charges the second capacitor C2 through the path of R3 and C2. The charging time depends on the values of R3 and C2, which is approximately 3*R3*C2. At this time, we can detect a downward pulse at point E with a maximum voltage of Battery, a minimum voltage of 0V and a pulse width of t1+t2. The input signal undergoes a second time amplification at point E.

[0064] At the position from 0 to t'(t', you can refer to Figure 2 During the time period (to understand), T4 is turned on, and an upward pulse with a maximum voltage of Battery, a minimum voltage of 0V, and a pulse width of t' can be detected at point F.

[0065] That is, the input signal is a small narrow pulse signal with an amplitude of V0 and a pulse width of t0. After one amplitude amplification and two time amplifications, a signal with an amplitude of Battery and a pulse width of t' can be obtained at point F. The signal amplitude is large enough and the duration is long enough to be detected by the ADC, and then it is known that a small narrow pulse signal has been input into the entire system.

[0066] That is, the signal detection circuit is configured to receive an input signal of the first pulse width and the first amplitude and output a signal of the second pulse width to the signal processing circuit.

[0067] The first pulse width is smaller than the minimum response time of the signal processing circuit, and the second pulse width is larger than the minimum response time of the signal processing circuit; and / or the first amplitude is smaller than the minimum response amplitude of the signal processing circuit, and the second amplitude is larger than the minimum response amplitude of the signal processing circuit.

[0068] In this embodiment, the first and third switching elements are NMOS transistors, and the second and fourth switching elements are PMOS transistors. In other embodiments, the first, second, third, and fourth switching elements may be at least one of a MOS transistor, a transistor, a thyristor, an IGBT (Insulated Gate Bipolar Transistor), and a logic device. Furthermore, the four switching elements may be of different types.

[0069] Please refer to Figure 2 , Figure 2 The waveform diagram of the key nodes of the signal detection circuit is shown in Figure 1. The key nodes are A to F, and their specific locations are in Figure 1 Understandably, although Figure 2 The coordinate system is not shown, but Figure 2 The vertical axis represents voltage value, and the horizontal axis represents time. The specific voltage value and time value do not affect the content to be described in this application, so the coordinate system is omitted for a more intuitive understanding.

[0070] from Figure 2 It can be seen that the waveforms of each node meet the design expectations and can solve the problem of small signals being difficult to perceive.

[0071] In summary, this embodiment provides a signal detection circuit. The signal detection circuit includes a first capacitor and a first detection point. The signal detection circuit increases the voltage of the first capacitor based on the input signal; when the voltage of the first capacitor is greater than 0V, the first capacitor discharges; when the voltage of the first capacitor is greater than a first preset voltage, the first detection point operates in a first state, and when the voltage of the first capacitor is less than the first preset voltage, the first detection point operates in a second state. With this configuration, the capacitor is used to convert signals with short duration and small amplitude, and an output signal is generated based on the discharge duration of the capacitor, so that the subsequent circuit can determine whether a small signal exists, thereby solving the problem of small signals being difficult to perceive in the technology.

[0072] The above description is only a description of the preferred embodiment of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure are within the scope of protection of the technical solution of the present invention.

Claims

1. A signal detection circuit, characterized in that: The signal detection circuit is configured to cooperate with a signal processing circuit, the signal detection circuit being configured to receive a signal of a first pulse width and output a signal of a second pulse width to the signal processing circuit, wherein the first pulse width is less than a minimum response time of the signal processing circuit, and the second pulse width is greater than the minimum response time of the signal processing circuit; The signal detection circuit includes a first capacitor and a first detection point. The signal detection circuit increases the voltage of the first capacitor based on an input signal. When the voltage of the first capacitor is greater than 0V, the first capacitor is discharged. When the voltage of the first capacitor is greater than a first preset voltage, the first detection point operates in a first state. When the voltage of the first capacitor is less than the first preset voltage, the first detection point operates in a second state. The signal detection circuit generates an output signal based on the working state of the first detection point; The signal detection circuit further includes a second capacitor and a second detection point, and when the first detection point operates in the first state, the voltage of the second capacitor drops to 0V; When the voltage of the second capacitor is less than the second preset voltage, the second capacitor is charged; when the voltage of the second capacitor is greater than the third preset voltage, the level of the second detection point is the first level; when the voltage of the second capacitor is less than the third preset voltage, the level of the second detection point is the second level; The first level is opposite to the second level; The second detection point is configured as an output terminal of the signal detection circuit, or the signal detection circuit generates an output signal based on the level of the second detection point; The signal detection circuit further includes an input signal amplifying module, wherein the input signal amplifying module is used to amplify the input signal to drive the voltage of the first capacitor to increase; The input signal amplification module includes a first switch element, a second switch element, a first resistor and a second resistor, wherein: The first switch element is configured such that when the control terminal of the first switch element receives a high level, the first switch element is turned on, and when the control terminal of the first switch element receives a low level, the first switch element is turned off; The second switch element is configured such that when the control terminal of the second switch element receives a low level, the second switch element is turned on, and when the control terminal of the second switch element receives a high level, the second switch element is turned off; The control end of the first switching element is configured as the input end of the input signal amplifying module; the first connection end of the first switching element is connected to the first end of the first resistor, the second connection end of the first switching element is used for grounding, and the second end of the first resistor is used for connecting to a power supply; The control end of the second switch element is connected to the first end of the first resistor, the first connection end of the second switch element is used to connect to a power supply, and the second connection end of the second switch element is connected to the first end of the first capacitor; The first end of the second resistor is connected to the second end of the first capacitor, and the second end of the second resistor is grounded; The signal detection circuit further includes a third switch element and a third resistor, wherein: The operating logic of the third switching element is the same as that of the first switching element, the control end of the third switching element is connected to the first end of the first capacitor, the first connection end of the third switching element is connected to the second end of the third resistor, and the second end of the third resistor is used to connect to a power supply; The first connection end of the third switch element is configured as the first detection point, the first detection point is connected to the ground and is configured as the first state, and the first detection point is disconnected from the ground and is configured as the second state, and the turn-on voltage of the third switch element is configured as the first preset voltage; The signal detection circuit further includes a fourth switch element, wherein: The operating logic of the fourth switch element is the same as that of the second switch element; the first connection end of the fourth switch element is used to connect to the power supply, the second connection end of the fourth switch element is configured as the second detection point, and the control end of the fourth switch element is connected to the first end of the third resistor; The second end of the third resistor is connected to the first end of the second capacitor, and the second end of the second capacitor is grounded; The voltage of the power supply is configured as the second preset voltage, the turn-on voltage of the fourth switch element is configured as the third preset voltage, the low level is configured as the first level, and the high level is configured as the second level.

2. The signal detection circuit according to claim 1, wherein: The signal detection circuit further includes an input signal amplifying module, which is configured to amplify an input signal to drive the voltage of the first capacitor to increase.

3. The signal detection circuit according to claim 1, wherein: The first switching element, the second switching element, the third switching element and the fourth switching element are at least one of a MOS tube, a transistor, a thyristor, an IGBT and a logic device.

4. The signal detection circuit according to claim 1, wherein: The first switch element and the third switch element are NMOS transistors, and the second switch element and the fourth switch element are PMOS transistors.

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