Control system for improving load response rate of coal-fired thermal power unit based on ACE mode

Abstract

The application discloses a control system for improving load response rate of a coal-fired thermal power unit under an ACE mode, which comprises a PID controller with feedforward, a first adder, a first analog AI input module, a second analog AI input module, a first analog AO output module, a second adder, a third analog AI input module, a fourth analog AI input module and a fifth analog AI input module; the output end of the fourth analog AI input module and the output end of the fifth analog AI input module are connected with the input end of the second adder, the output end of the third analog AI input module and the output end of the second adder are connected with the input end of the first adder, and the output end of the first analog AI input module, the output end of the second analog AI input module and the output end of the first adder are connected with the input end of the PID controller with feedforward; the system can realize the purpose of fast response of the coal-fired thermal power unit to load instruction change.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of thermal power generator set control and relates to a control system for improving load response rate of a coal-fired thermal power generator set under an ACE mode. BACKGROUND

[0002] Interconnection of power systems can not only improve the safe operation level of power grids, but also coordinate the imbalance of energy structures among different sub-control regions. The sub-control region can be a province or a district, and the sub-control regions are interconnected through tie lines. On the basis of the planned power exchange, each control region is responsible for handling the load disturbance occurring in the region, and only in an emergency situation, temporary support is given to the adjacent region. Area Control Error (ACE) is an important parameter for judging the performance of the regional power grid. The tie line bias control (TBC) mode is generally used in China to realize the tie line control of the regional power grid, and the ACE calculation formula of the TBC control mode is as follows:

[0003] ACE = ΔP + B * ΔF

[0004] In the formula, ΔP is the difference between the actual exchange power and the planned exchange power of the tie line; B is the load frequency response characteristic, which is a constant value; and ΔF is the difference between the measured frequency and the reference frequency of the power system, and the reference frequency of the power system in China is 50 Hz.

[0005] The area control error (ACE) is real-time changeable and reflects the real-time balance relationship between supply and demand of the power system. Ideally, the ACE should be kept at zero, but in fact, this is impossible; therefore, under normal circumstances, the ACE should fluctuate above and below zero and should periodically pass through zero, and it is hoped that the amplitude of the ACE is less than a certain limit.

[0006] The generator set in China generally has the function of automatic generation control (AGC), that is, according to the power value or the planned curve set by the dispatching center, each generator set adjusts the power in real time according to a certain regulation rate. Through real-time sampling of the frequency of the power system and the tie line power between the sub-control regions and calculating the ACE value of each control region, the dispatching center distributes the expected value for eliminating the ACE deviation to the generator set participating in the AGC control of the control region, and the controlled generator set adjusts its power to eliminate the deviation of the frequency of the power system and the tie line exchange power, so as to realize that the ACE tends to be zero.

[0007] New energy power generation such as wind energy and solar energy gradually increases in the proportion in the power system in China, and the uncertainty factors such as fluctuation of wind energy and solar energy power generation will bring short-time large change of regional power system load, so it is required that the controlled generator set with strong load regulation rate quickly adjusts the output according to the instruction of the dispatching center to meet the requirements of power system frequency and tie-line power control. SUMMARY

[0008] The purpose of the present application is to overcome the shortcomings of the prior art and provide a control system for improving the load response rate of a coal-fired thermal generator set under an ACE mode, which can achieve the purpose of quickly responding to load instruction changes of the coal-fired thermal generator set.

[0009] To achieve the above purpose, the control system for improving the load response rate of a coal-fired thermal generator set under an ACE mode comprises a PID controller with feedforward, a first adder, a first analog AI input module, a second analog AI input module, a first analog AO output module, a second adder, a third analog AI input module, a fourth analog AI input module and a fifth analog AI input module.

[0010] The output end of the fourth analog AI input module and the output end of the fifth analog AI input module are connected with the input end of the second adder, the output end of the third analog AI input module and the output end of the second adder are connected with the input end of the first adder, and the output end of the first analog AI input module, the output end of the second analog AI input module and the output end of the first adder are connected with the input end of the PID controller with feedforward.

[0011] It also comprises a second analog AO output module, a third analog AO output module, a first analog selector, a sixth analog AI input module, a seventh analog AI input module, an eighth analog AI input module, a subtractor, a divider, a first fold line function module, a first switching quantity DI input module, a second switching quantity DI input module, a ninth analog AI input module, a third switching quantity DI input module, a first high value judge, a low value judge, a first logic and module, a second logic and module, a logic or module, a logic not module, a delay breaker, a third logic and module, a first absolute value module, a second high value judge, a fourth logic and module, a pulse generator, a second fold line function module and a first constant block.

[0012] The output end of the sixth analog AI input module and the output end of the seventh analog AI input module are connected with the input end of the subtractor, the output end of the eighth analog AI input module and the output end of the subtractor are connected with the input end of the divider, the output end of the divider is connected with the input end of the first fold line function module, the input end of the third analog AO output module, the input end of the first absolute value module and the input end of the second fold line function module, the output end of the first absolute value module is connected with the input end of the second high value judge, the output end of the third logic and module and the output end of the second high value judge are connected with the input end of the fourth logic and module, the output end of the second fold line function module and the output end of the fourth logic and module are connected with the input end of the pulse, the output end of the pulse, the output end of the first fold line function module and the output end of the first constant block are connected with the input end of the first analog selector, and the output end of the first analog selector is connected with the input end of the second analog AO output module.

[0013] The output end of the ninth analog AI input module is connected with the input end of the first high value judge and the input end of the low value judge, the output end of the second switch quantity DI input module and the output end of the first high value judge are connected with the input end of the first logic and module, the output end of the low value judge and the output end of the third switch quantity DI input module are connected with the input end of the second logic and module, the output end of the first logic and module and the output end of the second logic and module are connected with the input end of the logic or module, the output end of the logic or module is connected with the input end of the logic not module, the output end of the logic not module is connected with the input end of the delay breaker, and the output end of the delay breaker and the output end of the first switch quantity DI input module are connected with the input end of the third logic and module.

[0014] The output end of the second analog AO output module is connected with the input end of the third analog AI input module.

[0015] The tenth analog AI input module, the third fold line function module, the eleventh analog AI input module, the fourth fold line function module, the first multiplier, the second constant block, the large selector, the third adder, the fifth fold line function module, the second multiplier, the small selector, the twelfth analog AI input module, the sixth fold line function module, the second analog selector, the third constant block, the second absolute value module, the third high value judge, the inertia module and the fourth analog AO output module are further included.

[0016] The output end of the tenth analog AI input module is connected with the input end of the third fold line function module, the output end of the eleventh analog AI input module is connected with the input end of the fourth fold line function module and the input end of the fifth fold line function module, the output end of the third fold line function module and the output end of the fourth fold line function module are connected with the input end of the first multiplier, the output end of the third fold line function module and the output end of the fifth fold line function module are connected with the input end of the second multiplier, the output end of the second constant block and the output end of the first multiplier are connected with the input end of the large selector, the output end of the second constant block and the output end of the second multiplier are connected with the input end of the small selector, the output end of the small selector and the output end of the large selector are connected with the input end of the third adder, the output end of the third adder and the output end of the second analog selector are connected with the input end of the inertia module, and the output end of the inertia module is connected with the input end of the fourth analog AO output module.

[0017] The output end of the twelfth analog AI input module is connected with the input end of the sixth fold line function module and the input end of the second absolute value module, the output end of the second absolute value module is connected with the input end of the third high value judge, the output end of the third high value judge, the output end of the third constant block and the output end of the sixth fold line function module are connected with the input end of the second analog selector.

[0018] The output end of the fourth analog AO output module is connected with the input end of the second analog AI input module, and the output end of the third analog AO output module is connected with the input end of the twelfth analog AI input module.

[0019] The output signal of the fourth analog AI input module is the load command after rate limiting, the output signal of the fifth analog AI input module is the primary frequency regulation load command, and the output signal of the first analog AI input module is the actual power of the unit.

[0020] The output signal of the sixth analog AI input module is the target load of the unit, the output signal of the seventh analog AI input module is the load command after rate limiting, the output signal of the eighth analog AI input module is the load change rate of the unit, the output signal of the first switch quantity DI input module is the feedback signal of AGC being put into, that is, when AGC is put into, the output is 1, otherwise, the output is 0, the output signal of the second switch quantity DI input module is the feedback signal of the load reduction process, that is, the unit is in the load reduction process, the output is 1, otherwise, the output is 0, the output signal of the ninth analog AI input module is the primary frequency regulation load command, and the output signal of the third switch quantity DI input module is the feedback signal of the load increase process, that is, when the unit is in the load increase process, the output is 1, otherwise, the output is 0.

[0021] The given value of the first constant block is 0, the given value of the second constant block is 0, the given value of the third constant block is ≥0, the given value of the first high value detector is >0, the given value of the low value detector is <0, the given value of the second high value detector is ≥0, the given value of the third high value detector is >0, and the given value of the time delay disconnector is >0.

[0022] The present invention has the following beneficial effects:

[0023] The control system for improving the load response rate of coal-fired power units based on ACE mode, as described in this invention, in specific operation, superimposes ACE load correction commands into the setpoint of the turbine main control PID and adds ACE feedforward to the turbine main control PID. When the target load of the unit issued by the dispatch center changes, the turbine control valve can act quickly, and the unit load responds quickly accordingly. This enables coal-fired power units to quickly respond to changes in dispatch center commands and promptly eliminate grid area control deviation (ACE), improving the rate and response time of coal-fired power units to load command changes from the dispatch center. Power generation companies can obtain considerable frequency regulation ancillary service compensation benefits. In addition, it should be noted that this invention can be easily implemented in the generator set DCS system without additional equipment or costs. Attached Figure Description

[0024] Fig. 1 This is a schematic diagram of the structure of the present invention;

[0025] Fig. 2 This is a partial structural diagram of the present invention;

[0026] Fig. 3 This is a partial structural diagram of the present invention.

[0027] Wherein, 1 is a PID controller with feedforward, 2 is the first adder, 3 is the first analog AI input module, 4 is the second analog AI input module, 5 is the first analog AO output module, 6 is the second adder, 7 is the third analog AI input module, 8 is the fourth analog AI input module, 9 is the fifth analog AI input module, 10 is the second analog AO output module, 11 is the third analog AO output module, 12 is the first analog selector, 13 is the sixth analog AI input module, 14 is the seventh analog AI input module, and 15 is the eighth analog AI input module. Module 16 is a subtractor, 17 is a divider, 18 is the first piecewise linear function module, 19 is the first digital input (DI) module, 20 is the second digital input (DI) module, 21 is the ninth analog input (AI) module, 22 is the third digital input (DI) module, 23 is the first high-value detector, 24 is the low-value detector, 25 is the first AND module, 26 is the second AND module, 27 is the OR module, 28 is the NOT module, 29 is the time-delay disconnector, 30 is the third AND module, 31 is the first absolute value module, 32 is the second high-value detector, and 33 is the fourth AND module. Module 34 is a pulse generator, 35 is the second piecewise linear function module, 36 is the first constant block, 37 is the tenth analog AI input module, 38 is the third piecewise linear function module, 39 is the eleventh analog AI input module, 40 is the fourth piecewise linear function module, 41 is the first multiplier, 42 is the second constant block, 43 is the large selector, 44 is the third adder, 45 is the fifth piecewise linear function module, 46 is the second multiplier, 47 is the small selector, 48 is the twelfth analog AI input module, 49 is the sixth piecewise linear function module, 50 is the second analog selector, 51 is the third constant block, 52 is... The second absolute value module, 53 is the third high value judge, 54 is the inertia module, 55 is the fourth analog quantity AO output module, a is the ACE load correction command, b is the turbine main control PID setpoint, c is the ACE turbine main control PID feedforward, d is the turbine regulating valve control command, e is the ACE load command deviation, f is the generation condition of the ACE load correction command, g is the effective time of the ACE load correction command, h is the ACE turbine main control PID feedforward during the load increase process, i is the ACE turbine main control PID feedforward during the load decrease process, and j is the inertia time of the ACE turbine main control PID feedforward. Detailed Implementation

[0028] To enable those skilled in the art to better understand the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of the present invention, not all embodiments, and are not intended to limit the scope of the present invention. Furthermore, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion regarding the concepts disclosed in the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort should fall within the scope of protection of the present invention.

[0029] The accompanying drawings show structural schematic diagrams according to embodiments disclosed in this invention. These drawings are not drawn to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0030] refer to Figs. 1 to 3The control system for improving the load response rate of coal-fired power units based on ACE mode, as described in this invention, includes a PID controller with feedforward 1, a first adder 2, a first analog AI input module 3, a second analog AI input module 4, a first analog AO output module 5, a second adder 6, a third analog AI input module 7, a fourth analog AI input module 8, a fifth analog AI input module 9, a second analog AO output module 10, a third analog AO output module 11, a first analog selector 12, a sixth analog AI input module 13, a seventh analog AI input module 14, an eighth analog AI input module 15, a subtractor 16, a divider 17, a first piecewise linear function module 18, a first digital input module 19, a second digital input module 20, a ninth analog AI input module 21, a third digital input module 22, and a first high-value detector 23. 24. Low value judge; 25. First logic AND module; 26. Second logic AND module; 27. Logic OR module; 28. Logic NOT module; 29. ​​Delay disconnector; 30. Third logic AND module; 31. First absolute value module; 32. Second high value judge; 33. Fourth logic AND module; 34. Pulse generator; 35. Second piecewise linear function module; 36. First constant block; 37. Tenth analog AI input module; 38. Third piecewise linear function module; 39. Eleventh analog AI input module; 40. Fourth piecewise linear function module; 41. First multiplier; 42. Second constant block; 43. Large selector; 44. Third adder; 45. Fifth piecewise linear function module; 46. Second multiplier; 47. Small selector; 48. Twelfth analog AI input module; 49. Sixth piecewise linear function module; 50. Second analog selector; 51. Third constant block; 52. Second absolute value module; 53. Third high value judge; 54. Inertia module; and 55. Fourth analog AO output module.

[0031] The output terminals of the fourth analog AI input module 8 and the fifth analog AI input module 9 are connected to the input terminal of the second adder 6. The output terminals of the third analog AI input module 7 and the second adder 6 are connected to the input terminal of the first adder 2. The output terminals of the first analog AI input module 3, the second analog AI input module 4, and the first adder 2 are connected to the input terminal of the PID controller 1 with feedforward.

[0032] The output terminals of the sixth analog AI input module 13 and the seventh analog AI input module 14 are connected to the input terminal of the subtractor 16. The output terminals of the eighth analog AI input module 15 and the subtractor 16 are connected to the input terminal of the divider 17. The output terminal of the divider 17 is connected to the input terminal of the first piecewise linear function module 18, the input terminal of the third analog AO output module 11, the input terminal of the first absolute value module 31, and the input terminal of the second piecewise linear function module 35. The output terminal of the first absolute value module 31 is connected to the second high value judge 3. The input terminals of module 2 are connected to each other. The output terminals of the third logic AND module 30 and the second high value judge 32 are connected to the input terminals of the fourth logic AND module 33. The output terminals of the second piecewise linear function module 35 and the fourth logic AND module 33 are connected to the input terminals of the pulse generator 34. The output terminals of the pulse generator 34, the first piecewise linear function module 18, and the first constant block 36 are connected to the input terminals of the first analog selector 12. The output terminal of the first analog selector 12 is connected to the input terminal of the second analog AO output module 10.

[0033] The output of the ninth analog AI input module 21 is connected to the input of the first high-value detector 23 and the input of the low-value detector 24. The output of the second digital DI input module 20 and the output of the first high-value detector 23 are connected to the input of the first logic AND module 25. The output of the low-value detector 24 and the output of the third digital DI input module 22 are connected to the input of the second logic AND module 26. The output of the first logic AND module 25 and the output of the second logic AND module 26 are connected to the input of the logic OR module 27. The output of the logic OR module 27 is connected to the input of the logic NOT module 28. The output of the logic NOT module 28 is connected to the input of the time-delay disconnector 29. The output of the time-delay disconnector 29 and the output of the first digital DI input module 19 are connected to the input of the third logic AND module 30.

[0034] The output of the tenth analog AI input module 37 is connected to the input of the third piecewise linear function module 38. The output of the eleventh analog AI input module 39 is connected to the inputs of the fourth piecewise linear function module 40 and the fifth piecewise linear function module 45. The outputs of the third piecewise linear function module 38 and the fourth piecewise linear function module 40 are connected to the input of the first multiplier 41. The outputs of the third piecewise linear function module 38 and the fifth piecewise linear function module 45 are connected to the input of the second multiplier 46. The output of constant block 42 and the output of first multiplier 41 are connected to the input of big multiplier 43. The output of second constant block 42 and the output of second multiplier 46 are connected to the input of small multiplier 47. The output of small multiplier 47 and the output of big multiplier 43 are connected to the input of third adder 44. The output of third adder 44 and the output of second analog selector 50 are connected to the input of inertial module 54. The output of inertial module 54 is connected to the input of fourth analog AO output module 55.

[0035] The output of the twelfth analog AI input module 48 is connected to the input of the sixth piecewise linear function module 49 and the input of the second absolute value module 52. The output of the second absolute value module 52 is connected to the input of the third high value judge 53. The output of the third high value judge 53, the output of the third constant block 51 and the output of the sixth piecewise linear function module 49 are connected to the input of the second analog selector 50.

[0036] Among them, the output terminal of the fourth analog AO output module 55 is connected to the input terminal of the second analog AI input module 4, the output terminal of the third analog AO output module 11 is connected to the input terminal of the twelfth analog AI input module 48, and the output terminal of the second analog AO output module 10 is connected to the input terminal of the third analog AI input module 7.

[0037] It should be noted that the output signal of the fourth analog AI input module 8 is the load command after rate limiting, the output signal of the fifth analog AI input module 9 is the primary frequency regulation load command, and the output signal of the first analog AI input module 3 is the actual power of the unit.

[0038] The output signal of the sixth analog AI input module 13 is the target load of the unit; the output signal of the seventh analog AI input module 14 is the load command after rate limiting; the output signal of the eighth analog AI input module 15 is the load change rate of the unit; the output signal of the first digital DI input module 19 is the feedback signal that AGC has been put into operation, that is, when AGC has been put into operation, the output is 1, otherwise the output is 0; the output signal of the second digital DI input module 20 is the feedback signal of the load reduction process, that is, when the unit is in the load reduction process, the output is 1, otherwise the output is 0; the output signal of the ninth analog AI input module 21 is the primary frequency regulation load command; the output signal of the third digital DI input module 22 is the feedback signal of the load increase process, when the unit is in the load increase process, the output is 1, otherwise the output is 0.

[0039] The working process of this invention is as follows:

[0040] 1) Set the given value of the first constant block 36 = 0, the given value of the second constant block 42 = 0, the given value of the third constant block 51 ≥ 0, the given value of the first high value judge 23 > 0, the given value of the low value judge 24 < 0, the given value of the second high value judge 32 ≥ 0, the given value of the third high value judge 53 > 0, and the given value of the delay disconnector 29 > 0;

[0041] 2) Acquire the unit's target load, load change rate, load command after rate limit, AGC activation signal, load increase process signal, load decrease process signal, primary frequency regulation load command, main steam pressure deviation, and actual power;

[0042] 3) Calculate the ACE load command deviation e based on the target load, the load command after rate limit, and the load change rate;

[0043] 4) Obtain the ACE load correction command a based on the ACE load command deviation e; obtain the generation condition f of the ACE load correction command a based on the AGC activation signal, load increase process signal, load decrease process signal, primary frequency regulation load command, and ACE load command deviation e; obtain the effective time g of the ACE load correction command a based on the ACE load command deviation e.

[0044] 5) Based on the ACE load correction command a and the main steam pressure deviation, obtain the ACE turbine main control PID feedforward h during the load increase process and the ACE turbine main control PID feedforward i during the load decrease process. Then, based on the ACE turbine main control PID feedforward h during the load increase process and the ACE turbine main control PID feedforward i during the load decrease process, obtain the ACE turbine main control PID feedforward c. Based on the ACE load command deviation e, obtain the inertia time j of the ACE turbine main control PID feedforward c.

[0045] 6) Obtain the setpoint b of the turbine main control PID based on the rate limiting load command, the primary frequency regulation load command, and the ACE load correction command a;

[0046] 7) Calculate the turbine control valve command d based on the set value b of the turbine main control PID, the actual power, and the ACE turbine main control PID feedforward c.

Claims

1. A control system for improving the load response rate of coal-fired power units based on ACE mode, characterized in that, It includes a PID controller with feedforward (1), a first adder (2), a first analog AI input module (3), a second analog AI input module (4), a first analog AO output module (5), a second adder (6), a third analog AI input module (7), a fourth analog AI input module (8), and a fifth analog AI input module (9); The output terminals of the fourth analog AI input module (8) and the fifth analog AI input module (9) are connected to the input terminal of the second adder (6). The output terminals of the third analog AI input module (7) and the second adder (6) are connected to the input terminal of the first adder (2). The output terminals of the first analog AI input module (3), the second analog AI input module (4), and the first adder (2) are connected to the input terminal of the PID controller (1) with feedforward. It also includes a second analog AO output module (10), a third analog AO output module (11), a first analog selector (12), a sixth analog AI input module (13), a seventh analog AI input module (14), an eighth analog AI input module (15), a subtractor (16), a divider (17), a first piecewise linear function module (18), a first digital input module (19), a second digital input module (20), a ninth analog AI input module (21), a third digital input module (22), a first high value judge (23), a low value judge (24), a first logic AND module (25), a second logic AND module (26), a logic OR module (27), a logic NOT module (28), a delay disconnector (29), a third logic AND module (30), a first absolute value module (31), a second high value judge (32), a fourth logic AND module (33), a pulse generator (34), a second piecewise linear function module (35), and a first constant block (36); The output terminals of the sixth analog AI input module (13) and the seventh analog AI input module (14) are connected to the input terminal of the subtractor (16). The output terminals of the eighth analog AI input module (15) and the subtractor (16) are connected to the input terminal of the divider (17). The output terminal of the divider (17) is connected to the input terminal of the first piecewise linear function module (18), the input terminal of the third analog AO output module (11), the input terminal of the first absolute value module (31), and the input terminal of the second piecewise linear function module (35). The output terminal of the first absolute value module (31) is connected to the second high value judge (35). 2) The input terminal is connected to the third logic AND module (30) and the output terminal of the second high value judge (32) are connected to the input terminal of the fourth logic AND module (33). The output terminal of the second piecewise linear function module (35) and the output terminal of the fourth logic AND module (33) are connected to the input terminal of the pulse generator (34). The output terminal of the pulse generator (34), the output terminal of the first piecewise linear function module (18) and the output terminal of the first constant block (36) are connected to the input terminal of the first analog selector (12). The output terminal of the first analog selector (12) is connected to the input terminal of the second analog AO output module (10). The output of the ninth analog AI input module (21) is connected to the input of the first high value judge (23) and the input of the low value judge (24). The output of the second digital DI input module (20) and the output of the first high value judge (23) are connected to the input of the first logic AND module (25). The output of the low value judge (24) and the output of the third digital DI input module (22) are connected to the input of the second logic AND module (26). The output of the first logic AND module (25) and the output of the second logic AND module (26) are connected to the input of the logic OR module (27). The output of the logic OR module (27) is connected to the input of the logic NOT module (28). The output of the logic NOT module (28) is connected to the input of the time delay disconnector (29). The output of the time delay disconnector (29) and the output of the first digital DI input module (19) are connected to the input of the third logic AND module (30). The output terminal of the second analog AO output module (10) is connected to the input terminal of the third analog AI input module (7); It also includes the tenth analog AI input module (37), the third piecewise linear function module (38), the eleventh analog AI input module (39), the fourth piecewise linear function module (40), the first multiplier (41), the second constant block (42), the big selector (43), the third adder (44), the fifth piecewise linear function module (45), the second multiplier (46), the small selector (47), the twelfth analog AI input module (48), the sixth piecewise linear function module (49), the second analog selector (50), the third constant block (51), the second absolute value module (52), the third high value judge (53), the inertia module (54), and the fourth analog AO output module (55); The output of the tenth analog AI input module (37) is connected to the input of the third piecewise linear function module (38). The output of the eleventh analog AI input module (39) is connected to the input of the fourth piecewise linear function module (40) and the fifth piecewise linear function module (45). The outputs of the third piecewise linear function module (38) and the fourth piecewise linear function module (40) are connected to the input of the first multiplier (41). The outputs of the third piecewise linear function module (38) and the fifth piecewise linear function module (45) are connected to the input of the second multiplier (46). The second constant block... The output of (42) and the output of the first multiplier (41) are connected to the input of the big multiplier (43). The output of the second constant block (42) and the output of the second multiplier (46) are connected to the input of the small selector (47). The output of the small selector (47) and the output of the big multiplier (43) are connected to the input of the third adder (44). The output of the third adder (44) and the output of the second analog selector (50) are connected to the input of the inertial module (54). The output of the inertial module (54) is connected to the input of the fourth analog AO output module (55). The output of the twelfth analog AI input module (48) is connected to the input of the sixth piecewise linear function module (49) and the input of the second absolute value module (52). The output of the second absolute value module (52) is connected to the input of the third high value judge (53). The output of the third high value judge (53), the output of the third constant block (51) and the output of the sixth piecewise linear function module (49) are connected to the input of the second analog selector (50). Among them, the output terminal of the fourth analog AO output module (55) is connected to the input terminal of the second analog AI input module (4), and the output terminal of the third analog AO output module (11) is connected to the input terminal of the twelfth analog AI input module (48). The output signal of the fourth analog AI input module (8) is the load command after rate limiting, the output signal of the fifth analog AI input module (9) is the primary frequency regulation load command, and the output signal of the first analog AI input module (3) is the actual power of the unit. The output signal of the sixth analog AI input module (13) is the target load of the unit; the output signal of the seventh analog AI input module (14) is the load command after rate limiting; the output signal of the eighth analog AI input module (15) is the load change rate of the unit; the output signal of the first digital DI input module (19) is the feedback signal that AGC has been put into operation, that is, when AGC has been put into operation, the output is 1, otherwise the output is 0; the output signal of the second digital DI input module (20) is the feedback signal of the load reduction process, that is, when the unit is in the load reduction process, the output is 1, otherwise the output is 0; the output signal of the ninth analog AI input module (21) is the primary frequency regulation load command; the output signal of the third digital DI input module (22) is the feedback signal of the load increase process, when the unit is in the load increase process, the output is 1, otherwise the output is 0.

2. The control system for improving the load response rate of coal-fired power units based on ACE mode according to claim 1, characterized in that, The given value of the first constant block (36) is 0.

3. The control system for improving the load response rate of coal-fired power units based on ACE mode according to claim 1, characterized in that, The given value of the second constant block (42) is 0.

4. The control system for improving the load response rate of coal-fired power units based on ACE mode according to claim 1, characterized in that, The given value of the third constant block (51) is ≥0.

5. The control system for improving the load response rate of coal-fired power units based on ACE mode according to claim 1, characterized in that, The given value of the first high value judge (23) is >0.

6. The control system for improving the load response rate of coal-fired power units based on ACE mode according to claim 1, characterized in that, The given value of the low value judge (24) is <0, and the given value of the second high value judge (32) is ≥0.

7. The control system for improving the load response rate of coal-fired power units based on ACE mode according to claim 1, characterized in that, The given value of the third high value judge (53) is >0, and the given value of the delay disconnector (29) is >0.

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