Phase change junction film, phase change memory and preparation method thereof

Abstract

The present invention discloses a phase change junction film, a phase change memory and a preparation method thereof. The phase change junction film comprises a structural phase change layer and a structural stabilization layer alternately stacked; wherein the structural phase change layer is a cubic phase M x Sb2Te3 layer, the structural stabilizing layer is a hexagonal Ti y Te 1‑y layer, M is one of scandium and yttrium. The present invention is based on the cubic phase of M x Sb2Te3 structure phase change layer and hexagonal Ti y Te 1‑y The phase-shifting heterojunction film, formed by alternating stacking of structurally stable layers, offers faster operating speeds, lower operating power consumption, and improved fatigue cycle life. It also possesses the performance advantages common to heterojunction materials, namely, extremely low resistance drift and resistance fluctuation under weaker atomic diffusion conditions.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor materials, and in particular to a phase change junction thin film, a phase change memory and a preparation method thereof. Background Art

[0002] Memory is a crucial component of the current semiconductor market and a cornerstone of information technology, playing a vital role in both our daily lives and the national economy. With the rapid growth of technology, data volumes have increased dramatically, creating an urgent need for high-speed, high-density, low-power non-volatile memory devices. Phase-change memory, with its advantages of high read speed, high rewritable endurance, non-volatility, small size, low power consumption, and resistance to strong vibration and radiation, holds enormous potential for high-speed and massive information storage. It is a formidable contender among emerging storage technologies and is considered by the Semiconductor Industry Association (SIA) to be the device most likely to replace current flash memory and become the mainstream memory product of the future, as well as the first to become a commercially viable product.

[0003] The basic principle of phase-change memory (PCM) is to utilize the reversible transition of the storage material between high and low resistance within the device to store "1" and "0." By using electrical signals to control the continuous change in the high resistance of the storage material, multi-level storage can be achieved, significantly increasing the memory's information storage capacity. In PCM, this resistance change is achieved by utilizing the reversible transition of the phase-change material between amorphous and polycrystalline states.

[0004] Commonly used phase-change memory material systems are primarily tellurium-based, such as Ge-Sb-Te (GST), Si-Sb-Te, and Ag-In-Sb-Te. GST, in particular, has been widely used in phase-change optical disks and phase-change memories. However, it also suffers from the following challenges: 1) slow write speeds, requiring further improvement in phase change speed; 2) high erase power consumption hinders increased storage density. Given these shortcomings, the search for storage materials with improved performance is ongoing.

[0005] Therefore, the existing technology still needs to be improved and developed. Summary of the Invention

[0006] In view of the above-mentioned deficiencies in the prior art, the object of the present invention is to provide a phase change junction thin film, a phase change memory and a preparation method thereof, aiming to solve the technical problem of low availability of the existing phase change memory.

[0007] The technical solutions of the present invention are as follows:

[0008] The first aspect of the present invention provides a phase change junction thin film, wherein the phase change junction thin film comprises a structural phase change layer and a structural stabilization layer alternately stacked; wherein the structural phase change layer is a cubic phase M xSb2Te3 layer, the structural stabilizing layer is a hexagonal Ti y Te 1-y layer, M is one of scandium and yttrium.

[0009] Optionally, 0.1≤x≤1.6, 0.3≤y≤0.5.

[0010] Optionally, the thickness of the structural phase change layer is 4 to 10 nm; the thickness of the structural stabilization layer is 3 to 9 nm.

[0011] Optionally, the phase change junction film includes N+1 layers of the structural phase change layer and N layers of the structural stabilization layer, and both the bottom layer and the top layer of the phase change junction film are structural phase change layers; wherein N≥2.

[0012] Optionally, the total thickness of the phase-change junction thin film is less than or equal to 90 nm.

[0013] A second aspect of the present invention provides a phase change memory, comprising a bottom electrode, a top electrode and a phase change material layer, wherein the phase change material layer is located between the bottom electrode and the top electrode, wherein the phase change material layer is the phase change heterojunction film described in the present invention.

[0014] Optionally, the phase change memory is a confined structure or a T-type structure.

[0015] Optionally, the material of the top electrode is one of Al, W, and TiN; the material of the bottom electrode is one of Al, W, and TiN;

[0016] The thickness of the bottom electrode is 100 to 200 nm;

[0017] The thickness of the top electrode is 100-200 nm.

[0018] A third aspect of the present invention provides a method for preparing the phase change memory of the present invention, comprising the steps of:

[0019] Providing a growth substrate having a bottom electrode, wherein the bottom electrode partially covers a surface of the growth substrate;

[0020] depositing a dielectric coating layer on the surface of the growth substrate;

[0021] Etching the dielectric coating layer until a deposition cavity exposing the bottom electrode is formed in the dielectric coating layer;

[0022] A phase change material layer and a top electrode are sequentially deposited in the deposition cavity, wherein the phase change material layer is the phase change heterojunction thin film described in the present invention.

[0023] Optionally, the material of the dielectric coating layer is SiO2 or Si3N4.

[0024] Beneficial effect: The present invention ensures that the hexagonal phase Ti is prepared by adjusting the M content. y Te 1-y Under the temperature conditions, cubic phase M can be obtained. x Sb2Te3, and Ti y Te 1-y Growing along its <0 0 1> direction, M x Sb2Te3 grows along its <1 1 1> direction, and the interaction between the two materials is between the van der Waals force and the covalent bond. x Sb2Te3 itself has good speed, power consumption, and cycle characteristics during the reversible phase transition process. On the other hand, the force at the interface is weaker than the covalent bond and stronger than the van der Waals force, which increases the lattice mismatch tolerance, helps improve device reliability, and can induce crystallization, further increasing the crystallization speed. y Te 1-y It also helps to improve heating efficiency, reduce power consumption and extend the cycle life of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Schematic diagram of the phase change memory structure of the restrictive structure of the present invention.

[0026] Figure 2 Schematic diagram of the T-type phase change memory structure of the present invention.

[0027] Figure 3 The electrical operating performance curve of the phase change memory based on the compound GST phase change material.

[0028] Figure 4 1 is a graph showing the electrical operating performance of the phase change memory based on the phase change junction material in Example 1. DETAILED DESCRIPTION

[0029] The present invention provides a phase-change junction thin film, a phase-change memory, and a method for preparing the same. To clarify the objectives, technical solutions, and effects of the present invention, the present invention is described in further detail below. It should be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention.

[0030] The embodiment of the present invention provides a phase change junction thin film, wherein the phase change junction thin film comprises a structural phase change layer and a structural stabilization layer alternately stacked; wherein the structural phase change layer is a cubic phase M x Sb2Te3 layer, the structural stabilizing layer is a hexagonal Ti y Te 1-y layer, M is one of scandium Sc and yttrium Y.

[0031] First, there is no stable nucleation point inside the existing GST material, and the nucleation process is random, which limits the improvement of the crystallization speed. x MTe6 inside the Sb2Te3 material can act as a stable nucleation point during the phase transition process, reducing the randomness of nucleation and increasing the crystallization rate. y Te 1-y Layer and M x The force at the interface of Sb2Te3 layer is a special force between van der Waals force and covalent bond, which can also induce M x The role of Sb2Te3 crystallization.

[0032] Secondly, due to the poor thermal stability of Sb2Te3, it is difficult to obtain hexagonal Ti y Te 1-y At the growth temperature, the grown Sb2Te3 also has a hexagonal phase structure. Sb2Te3 has two reversible phase transition modes, one is amorphous phase → cubic phase → amorphous phase, and the other is amorphous phase → cubic phase → hexagonal phase → cubic phase → amorphous phase. It can be seen that the amorphous phase → cubic phase → amorphous phase has lower power consumption and faster speed. Therefore, M-doped Sb2Te3 is designed to improve the thermal stability of the material and ensure that the hexagonal phase Ti is obtained. y Te 1-y At the growth temperature, M x Sb2Te3 is a cubic phase. At the same time, in order to ensure that the two materials with different phase structures match each other, it is necessary to adjust the preparation process parameters to ensure that Ti y Te 1-y grows along its <0 0 1> direction, while M x Sb2Te3 grows along its <1 1 1> direction.

[0033] The above aspects can make the cubic phase based M x Sb2Te3 structure phase change layer and hexagonal Ti y Te 1-y The phase-shifting heterojunction film, formed by alternating stacking of structurally stable layers, offers faster operating speeds, lower operating power consumption, and improved fatigue cycle life. It also possesses the performance advantages common to heterojunction materials, namely, extremely low resistance drift and resistance fluctuation under weaker atomic diffusion conditions.

[0034] In one embodiment, the phase change junction film is composed of alternating structural phase change layers and structural stabilization layers. That is, the phase change junction film of this embodiment is composed of cubic phase M x Sb2Te3 structure phase change layer and hexagonal Ti y Te1-y A phase-shifting junction film is formed by alternating stacking and growth of structurally stable layers.

[0035] It should be noted that in this embodiment, the structural phase change layer M x Sb2Te3 is replaced by Sc-Ge2Sb2Te5 in the preparation of hexagonal Ti y Te 1-y Under temperature conditions, cubic phase Sc-Ge2Sb2Te5 can be obtained, and Ti y Te 1-y It grows along its <00 1> direction, and Sc-Ge2Sb2Te5 grows along its <1 1 1> direction.

[0036] In one embodiment, 0.1≤x≤1.6, 0.3≤y≤0.5, for example, x is 0.3, and y is 0.33.

[0037] In one embodiment, the thickness of the structural phase change layer is 4 to 10 nm; the thickness of the structural stabilization layer is 3 to 9 nm. It should be noted that the above thicknesses refer to the thickness of a single-layer structural phase change layer and a single-layer structural stabilization layer, respectively. Furthermore, the thickness of the single-layer structural phase change layer is 5 nm to 5 nm, and the thickness of the single-layer structural stabilization layer is 6 nm to 6 nm.

[0038] In one embodiment, the phase change junction film comprises N+1 layers of the structural phase change layer and N layers of the structural stabilization layer. The bottom layer and the top layer of the phase change junction film are both structural phase change layers, and at least two layers of structural stabilization layers are required to sandwich the structural phase change layer; wherein N≥2. That is, in the phase change junction film, M x Sb2Te3 structure phase change layer and Ti y Te 1-y The number of cycles of alternately stacking the structural stabilizing layers is greater than or equal to 2. Furthermore, 15≥N≥3.

[0039] In one embodiment, the total thickness of the phase change junction film is less than or equal to ~90nm. The bottom electrode of the phase change memory selected in this embodiment is prepared based on the 65nm semiconductor process node, and its maximum diameter is ~90nm. When the phase change junction film undergoes a reversible transition between the crystalline and amorphous states, a mushroom-shaped hemispherical region is usually formed above the bottom electrode. The radius of this region is approximately twice the radius of the bottom electrode, so the maximum height of this region is ~90nm. When the phase change junction film exceeds 90nm, the excess part does not participate in the phase change process. In order to save costs, the total thickness of the phase change junction film is less than or equal to ~90nm. Furthermore, the total thickness of the phase change junction film is less than or equal to 90nm and greater than or equal to 18nm.

[0040] An embodiment of the present invention provides a phase change memory, comprising a bottom electrode, a top electrode and a phase change material layer, wherein the phase change material layer is located between the bottom electrode and the top electrode, wherein the phase change material layer is the phase change heterojunction thin film described in the embodiment of the present invention.

[0041] In one embodiment, the bottom electrode is made of a conductive material such as Al, W, or TiN, but is not limited thereto.

[0042] In one embodiment, the material of the top electrode is one of conductive materials such as Al, W, TiN, etc., but is not limited thereto.

[0043] In one embodiment, the bottom electrode has a thickness of 100-200 nm, such as 100 nm.

[0044] In one embodiment, the thickness of the top electrode is 100-200 nm, such as 100 nm.

[0045] In one embodiment, the phase change memory is a confined-type structure or a T-type structure.

[0046] When the phase change memory is a restricted structure, the preparation method of the phase change memory according to the embodiment of the present invention is as follows: Figure 1 As shown, the steps include:

[0047] S1. Providing a growth substrate (not shown) having a bottom electrode 103, wherein the bottom electrode 103 partially covers the surface of the growth substrate;

[0048] S2, depositing a dielectric coating layer 104 on the surface of the growth substrate;

[0049] S3, etching the dielectric coating layer 104 until a deposition cavity exposing the bottom electrode 103 is formed in the dielectric coating layer 104;

[0050] S4. Depositing a phase change material layer 102 and a top electrode 101 in the deposition cavity in sequence, wherein the phase change material layer 102 is the phase change heterojunction thin film as described above.

[0051] The phase change junction film comprises a structural phase change layer and a structural stabilization layer stacked alternately; wherein the structural phase change layer is a cubic phase M x Sb2Te3, the structural stabilizing layer is a hexagonal Ti y Te 1-y , M is one of scandium Sc and yttrium Y.

[0052] In this embodiment, the phase change material layer 102 is formed on the bottom electrode 103 and is used to store information. It is the core part of the phase change memory. x Sb2Te3 and single-layer structure stabilizing layer Ti y Te 1-y The phase change material layer is a phase change junction film formed by alternating vertical stacking growth. That is, the phase change material layer is a phase change junction film, such as Figure 1 As shown, the phase-variant junction thin film includes a first M x Sb2Te3 layer 1 (a), located in the first M x The first Ti on the Sb2Te3 layer 1(a) y Te 1-y Layer 1(b), located in the first Ti y Te 1-y The second M on layer 1(b) x Sb2Te3 layer 2 (a), located in the second M x The second Ti on the Sb2Te3 layer 2(a) y Te 1-y Layer 2 (b) ... and so on, the structure can be repeated periodically until the thickness of the phase change junction film meets the requirements. In addition, the phase change layer M of the single-layer structure in the phase change junction film x Sb2Te3 and single-layer structure stabilizing layer Ti y Te 1-y They grow along the <11 1> and <0 0 1> directions respectively.

[0053] In step S1, in one embodiment, the growth substrate is a silicon oxide substrate, etc., but is not limited thereto.

[0054] In step S2, in one embodiment, before depositing the dielectric coating layer on the surface of the growth substrate, the step of cleaning the growth substrate is also included to remove impurities such as organic matter, metal ions, oxides, etc. on the surface of the growth substrate, which is beneficial to improving the stability of the device.

[0055] In one embodiment, the material of the dielectric coating layer is SiO2 or Si3N4, but is not limited thereto.

[0056] In step S3, in one embodiment, an exposure-etching process is used to etch the dielectric coating layer until a deposition cavity exposing the bottom electrode is formed in the dielectric coating layer. Further, the exposure method used in the exposure-etching process is electron beam exposure, and the etching method is reactive ion etching.

[0057] In one embodiment, the deposition cavity may be a deposition hole, etc., that is, the phase change memory is cylindrical as a whole, but is not limited to this shape. The aperture of the deposition hole is equal to the diameter of the bottom electrode. The deposition hole may be a small hole with an aperture of 100 nm or less, or, of course, a through hole greater than or equal to 100 nm. In one embodiment, the aperture of the deposition hole is 30 to 100 nm, such as 90 nm. In another embodiment, the aperture of the deposition hole is 20 to 60 nm, such as 50 nm.

[0058] In step S4, in one embodiment, physical vapor deposition, chemical vapor deposition or metal organic deposition process is used to deposit the phase heterojunction thin film. Further, physical vapor deposition is used to form the desired thin film using two-target sputtering or alloy target sputtering.

[0059] In one embodiment, a co-sputtering M target and Sb2Te3 target can be used to form a structural phase change layer M x Of course, in other embodiments, M can also be directly sputtered. x Sb2Te3 alloy target is used to grow the structural phase change layer M x Sb2Te3, by controlling the sputtering temperature, a crystalline structural phase change layer M of the desired thickness is obtained. x Sb2Te3.

[0060] In one embodiment, a Ti target and a Te target may be co-sputtered to form a structurally stable layer Ti. y Te 1-y Of course, in other embodiments, Ti can also be directly sputtered. y Te 1-y Alloy target to grow the structural stable layer Ti y Te 1-y By controlling the sputtering temperature, the desired thickness of the amorphous or crystalline structure-stabilizing layer Ti is obtained. y Te 1-y .

[0061] It should be noted that before depositing the top electrode, a TiN adhesion electrode may be grown on the surface of the phase-shifting junction film to increase adhesion between the top electrode and the phase-shifting junction film.

[0062] When the phase change memory is a T-type structure, the preparation method of the phase change memory of the embodiment of the present invention is as follows: Figure 2 As shown, the steps include:

[0063] S1. Providing a growth substrate (not shown) having a bottom electrode 203, wherein the bottom electrode 203 partially covers the surface of the growth substrate;

[0064] S2, depositing a dielectric coating layer 204 on the surface of the growth substrate;

[0065] S3, etching the dielectric coating layer 204 until a deposition cavity exposing the bottom electrode 203 is formed in the dielectric coating layer 204;

[0066] S4. Depositing a phase change material layer 202 and a top electrode 201 in the deposition cavity in sequence, wherein the phase change material layer 202 is the phase change heterojunction thin film as described above.

[0067] The phase change junction film comprises a structural phase change layer and a structural stabilization layer stacked alternately; wherein the structural phase change layer is a cubic phase M x Sb2Te3, the structural stabilizing layer is a hexagonal Ti y Te 1-y , M is one of scandium Sc and yttrium Y.

[0068] In this embodiment, the phase change material layer 202 is formed on the bottom electrode 203 and is used to store information. It is the core part of the phase change memory. x Sb2Te3 and single-layer structure stabilizing layer Ti y Te 1-y The phase change material layer is a phase change junction film formed by alternating vertical stacking growth. That is, the phase change material layer is a phase change junction film, such as Figure 2 As shown, the phase-variant junction thin film includes a first M x Sb2Te3 layer 1 (a), located in the first M x The first Ti on the Sb2Te3 layer 1(a) y Te 1-y Layer 1(b), located in the first Ti y Te 1-y The second M on layer 1(b) x Sb2Te3 layer 2 (a), located in the second M x The second Ti on the Sb2Te3 layer 2(a) y Te 1-y Layer 2 (b) ... and so on, the structure can be repeated periodically until the thickness of the phase change junction film meets the requirements. In addition, the phase change layer M of the single-layer structure in the phase change junction film x Sb2Te3 and single-layer structure stabilizing layer Ti y Te 1-y They grow along the <11 1> and <0 0 1> directions respectively.

[0069] In one embodiment, the deposition cavity may be a deposition hole, etc., that is, the phase change memory is cylindrical as a whole, but is not limited to this shape. The diameter of the deposition hole is larger than the diameter of the bottom electrode.

[0070] In this embodiment, the specific preparation details of the above steps are similar to those of the phase change memory with a confined structure and will not be further described here.

[0071] In this embodiment, the preparation process of the phase-change heterojunction thin film in the phase-change memory is compatible with the existing CMOS process and has a phase change mechanism different from that of the GST (Ge-Sb-Te) material, which has the following advantages:

[0072] First, there is no stable nucleation point inside the existing GST material, and the nucleation process is random, which limits the improvement of the crystallization speed. x MTe6 inside the Sb2Te3 material can act as a stable nucleation point during the phase transition process, reducing the randomness of nucleation and increasing the crystallization rate. y Te 1-y Layer and M x The force at the interface of Sb2Te3 layer is a special force between van der Waals force and covalent bond, which can also induce M x The role of Sb2Te3 crystallization.

[0073] Secondly, due to the poor thermal stability of Sb2Te3, it is difficult to obtain hexagonal Ti y Te 1-y At the growth temperature, the grown Sb2Te3 also has a hexagonal phase structure. Sb2Te3 has two reversible phase transition modes, one is amorphous phase → cubic phase → amorphous phase, and the other is amorphous phase → cubic phase → hexagonal phase → cubic phase → amorphous phase. It can be seen that the amorphous phase → cubic phase → amorphous phase has lower power consumption and faster speed. Therefore, M-doped Sb2Te3 is designed to improve the thermal stability of the material and ensure that the hexagonal phase Ti is obtained. y Te 1-y At the growth temperature, M x Sb2Te3 is a cubic phase. At the same time, in order to ensure that the two materials with different phase structures match each other, it is necessary to adjust the preparation process parameters to ensure that Ti y Te 1-y grows along its <0 0 1> direction, while M x Sb2Te3 grows along its <1 1 1> direction.

[0074] The above aspects can make the cubic phase based M x Sb2Te3 structure phase change layer and hexagonal Ti y Te1-y The phase-shifting heterojunction film, formed by alternating stacking of structurally stable layers, offers faster operating speeds, lower operating power consumption, and improved fatigue cycle life. It also possesses the performance advantages common to heterojunction materials, namely, extremely low resistance drift and resistance fluctuation under weaker atomic diffusion conditions.

[0075] The present invention will be further described below with reference to specific examples.

[0076] Example 1

[0077] like Figure 1 As shown, this embodiment provides a phase change memory with a confined structure, which includes a growth substrate, a bottom electrode 103 , a dielectric coating layer 104 , a phase-change heterojunction film 102 , and a top electrode 101 .

[0078] The method for preparing the above-mentioned phase change memory with a restricted structure comprises the following steps:

[0079] First, a growth substrate having a bottom electrode 103 is provided.

[0080] Before the subsequent processes, the growth substrate is cleaned to remove organic matter, metal ions, oxides and other impurities on the surface of the growth substrate, which is beneficial to improving the stability of the device. The bottom electrode 103 is a tungsten electrode with a thickness of 100 nm.

[0081] Then, a dielectric coating layer 104 is deposited on the surface of the growth substrate. The material of the dielectric coating layer is Si3N4.

[0082] Next, the dielectric coating layer 104 is etched using an exposure-etching process until a deposition hole is formed in the dielectric coating layer 104 that exposes the bottom electrode 103. The exposure method used in the exposure-etching process is electron beam exposure, and the etching method is reactive ion etching. The diameter of the deposition hole is equal to the diameter of the bottom electrode 103. The diameter of the deposition hole is 90 nm.

[0083] Finally, a phase change junction film 102 and a top electrode 101 are sequentially deposited in the deposition hole. The phase change junction film is composed of a single-layer phase change layer M. x Sb2Te3 and single-layer structure stabilizing layer Ti y Te 1-y Phase-shifting heterojunction film formed by alternating vertical stacking growth, where x=0.3 and y=0.33.

[0084] Specifically, the structure obtained above is sent into a magnetron sputtering reaction chamber for physical vapor deposition, and then two targets are used for sputtering to form the desired phase heterojunction thin film 102 .

[0085] In this embodiment, the sputtering power of the Sc target is set to 7W, the sputtering power of the Sb2Te3 target is set to 8W, and the sputtering rate is set to 0.5nm / min. When the background vacuum is lower than 3×10 -4 Pa, turn on the RF power supply. Open the two target covers and start timing. After the sputtering is completed, turn off the two target RF power supplies and target covers. At this time, the single-layer structure phase change layer formed by sputtering is Sc 0.3 Sb2Te3, the single-layer phase change layer Sc 0.3 The thickness of Sb2Te3 is 5nm.

[0086] Get Sc 0.3 After the Sb2Te3 structure phase change layer is formed, Ti is sputtered on the structure phase change layer. 0.33 Te 0.67 layer.

[0087] In this embodiment, the sputtering power of the Ti target is set to 50W, the sputtering power of the Te target is set to 12W, and the sputtering rate is set to 1.0nm / min. When the background vacuum is lower than 3×10 -4 pa, turn on the RF power supply. Open the two target covers and start timing. After the sputtering is completed, turn off the two target RF power supplies and target covers. At this time, the single-layer structure stability layer formed by sputtering is Ti 0.33 Te 0.67 , the single-layer structure stabilizing layer Ti 0.33 Te 0.67 The thickness is 6nm.

[0088] Repeat the above steps to prepare a single-layer phase change layer Sc 0.3 Sb2Te3 and the single layer structure stabilization layer is Ti 0.33 Te 0.67 until five single-layer phase change layers Sc are formed in the deposition hole by sputtering. 0.3 Sb2Te3 and single-layer structure stabilizing layer Ti 0.33 Te 0.67 Circularly stacked phase-shifting junction films.

[0089] In this embodiment, the material of the top electrode is Al material, and the thickness of the top electrode is 100 nm.

[0090] Example 2

[0091] like Figure 2 As shown, this embodiment provides a T-type phase change memory, which includes a growth substrate, a bottom electrode 203 , a dielectric coating layer 204 , a phase-change heterojunction film 202 , and a top electrode 201 .

[0092] The method for preparing the T-type phase change memory comprises the following steps:

[0093] First, a growth substrate having a bottom electrode 203 is provided.

[0094] Before the subsequent processes, the growth substrate is cleaned to remove organic matter, metal ions, oxides and other impurities on the surface of the growth substrate, which is beneficial to improving the stability of the device. The bottom electrode 203 is a tungsten electrode with a thickness of 100 nm.

[0095] Then, a dielectric coating layer 204 is deposited on the surface of the growth substrate. The material of the dielectric coating layer is Si 3 N 4 .

[0096] Next, the dielectric coating layer 204 is etched using an exposure-etching process until a deposition hole is formed in the dielectric coating layer 204, exposing the bottom electrode 203. The exposure method used in the exposure-etching process is electron beam exposure, and the etching method is reactive ion etching. The diameter of the deposition hole is larger than the diameter of the bottom electrode 203. The diameter of the deposition hole is 200 nm.

[0097] Finally, a phase change junction film 202 and a top electrode 201 are sequentially deposited in the deposition hole. The phase change junction film is composed of a single-layer phase change layer M. x Sb2Te3 and single-layer structure stabilizing layer Ti y Te 1-y Phase-shifting heterojunction film formed by alternating vertical stacking growth, where x=0.3 and y=0.33.

[0098] Specifically, the structure obtained above is sent into a magnetron sputtering reaction chamber, and then two targets are used for sputtering to form the desired phase-shifting heterojunction thin film 202 .

[0099] In this embodiment, the sputtering power of the Sc target is set to 7W, the sputtering power of the Sb2Te3 target is set to 8W, and the sputtering rate is set to 0.5nm / min. When the background vacuum is lower than 3×10 -4 Pa, turn on the RF power supply. Open the two target covers and start timing. After the sputtering is completed, turn off the two target RF power supplies and target covers. At this time, the single-layer structure phase change layer Sc 0.3 Sb2Te3, the single-layer phase change layer Sc 0.3 The thickness of Sb2Te3 is 5nm.

[0100] Get Sc 0.3 After the Sb2Te3 structure phase change layer, a structure stabilization layer Ti is sputtered on the structure phase change layer. 0.33 Te 0.67 .

[0101] In this embodiment, the sputtering power of the Ti target is set to 50W, the sputtering power of the Te target is set to 12W, and the sputtering rate is set to 1.0nm / min. When the background vacuum is lower than 3×10 -4 Pa, turn on the RF power supply. Open the two target covers and start timing. After the sputtering is completed, turn off the two target RF power supplies and target covers. At this time, the single-layer structure stable layer Ti formed by sputtering 0.33 Te 0.67 , the single-layer structure stabilizing layer Ti 0.33 Te 0.67 The thickness is 6nm.

[0102] Repeat the above steps to prepare a single-layer phase change layer Sc 0.3 Sb2Te3 layer and single layer structure stabilizing layer Ti 0.33 Te 0.67 The steps of layering are performed until five single-layer phase change layers Sc are formed in the deposition hole by sputtering. 0.3 Sb2Te3 layer and single layer structure stabilizing layer Ti 0.33 Te 0.67 Phase-shifting junction thin films with cyclic stacking of layers.

[0103] The top electrode 201 is made of Al material with a thickness of 100 nm.

[0104] Figure 3 It is a phase change memory based on the T-type structure of GST, and the resistance-voltage characteristic curve under the action of different pulse widths. The device is initially in a high-resistance state. When a pulse that can achieve reversible phase change is applied, as the pulse amplitude increases, the SET operation is first realized, that is, the resistance changes from high resistance to low resistance. As the pulse amplitude further increases, the device realizes the RESET operation, that is, the resistance changes from low resistance to high resistance. Generally speaking, as the pulse width decreases, the SET and RESET voltages of the device increase, but if the pulse width is too small, the device will not be able to achieve SET / RESET reversible operation. Figure 3 It can be seen that GST can achieve reversible phase transition under the action of a 100ns pulse at the fastest, and its corresponding SET voltage is ~2.7V and RESET voltage is 3.9V.

[0105] Figure 4 It is based on phase-shifting junction thin films with Figure 3 The resistance-voltage characteristic curves of the phase change memory with the same geometric shape as that used in the T-type structure (ie, the phase change memory prepared in Example 1) under the action of pulses with different pulse widths. Figure 4 It can be seen that the device can achieve reversible phase transition under the action of a 0.8ns pulse at the fastest, and its corresponding SET voltage is ~0.7V and RESET voltage is 1.9V. Figure 3It can be inferred that under the action of pulses of the same pulse width, the SET / RESET voltage of the device can be greatly reduced compared with that of GST, reflecting the high speed and low power consumption characteristics of the phase change junction.

[0106] It should be understood that the application of the present invention is not limited to the above examples. For those skilled in the art, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A phase-change junction thin film, characterized in that: The phase change junction film comprises a structural phase change layer and a structural stabilization layer stacked alternately; wherein the structural phase change layer is a cubic phase M x Sb2Te3 layer, the structural stabilizing layer is a hexagonal Ti y Te 1-y layer, M is one of scandium and yttrium; 0.1≤x≤1.6, 0.3≤y≤0.

5.

2. The phase-change junction thin film according to claim 1, characterized in that: The thickness of the structural phase change layer is 4-10 nm; the thickness of the structural stabilization layer is 3-9 nm.

3. The phase-shifting junction thin film according to claim 1, characterized in that: The phase change junction film includes N+1 layers of the structural phase change layer and N layers of the structural stabilization layer, and both the bottom layer and the top layer of the phase change junction film are structural phase change layers; wherein N≥2.

4. The phase-shifting junction thin film according to claim 1, characterized in that: The total thickness of the phase-shifting junction film is less than or equal to 90 nm.

5. A phase change memory, comprising a bottom electrode, a top electrode and a phase change material layer, wherein the phase change material layer is located between the bottom electrode and the top electrode, characterized in that: The phase change material layer is the phase change junction thin film according to any one of claims 1 to 4.

6. The phase change memory according to claim 5, characterized in that The phase change memory has a restricted structure or a T-type structure.

7. The phase change memory according to claim 5, wherein: The material of the top electrode is one of Al, W, and TiN; the material of the bottom electrode is one of Al, W, and TiN; The thickness of the bottom electrode is 100 to 200 nm; The thickness of the top electrode is 100-200 nm.

8. A method for preparing a phase change memory according to claim 5, characterized in that: Including steps: Providing a growth substrate having a bottom electrode, wherein the bottom electrode partially covers a surface of the growth substrate; depositing a dielectric coating layer on the surface of the growth substrate; Etching the dielectric coating layer until a deposition cavity exposing the bottom electrode is formed in the dielectric coating layer; A phase change material layer and a top electrode are sequentially deposited in the deposition cavity, wherein the phase change material layer is the phase change junction thin film according to any one of claims 1 to 4.

9. The method for preparing a phase change memory according to claim 8, wherein: The material of the dielectric coating layer is SiO2 or Si3N4.

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