Current sharing control method and device of interleaved parallel pfc circuit, air conditioner and medium

Abstract

The application provides a current sharing control method and device of a staggered parallel PFC circuit, an air conditioner and a medium. The staggered parallel PFC circuit comprises a first PFC branch and a second PFC branch arranged symmetrically. The control method comprises the following steps: acquiring an AC input voltage, an actual bus voltage, a target bus voltage, a total current and a branch current of the first PFC branch or the second PFC branch of the staggered parallel PFC circuit; obtaining an initial duty ratio and a corrected duty ratio according to the AC input voltage, the actual bus voltage, the target bus voltage, the branch current and the total current; obtaining a first PWM signal for driving a switch tube of the first PFC branch according to the initial duty ratio; and obtaining a second PWM signal for driving a switch tube of the second PFC branch according to the corrected duty ratio. The current sharing control method and the required hardware circuit of the application are relatively simple and low in cost.

Description

Technical Field

[0001] This application relates to the field of air conditioner technology, specifically to a current sharing control method, device, air conditioner, and medium for an interleaved parallel PFC circuit. Background Technology

[0002] Interleaved parallel PFC circuits, characterized by low input and output current ripple and low branch power ratings, are widely used in equipment such as variable frequency air conditioners. Interleaved parallel PFC circuits must ensure that the total input current is in phase with the input voltage and also meet the requirement of current sharing among the inductors in each branch. However, due to the differences and dispersion in the parameters of components between the two power branches in practical applications, the inductor current in each branch becomes uneven, resulting in an unbalanced distribution of total power between the two branches. This not only increases the power margin required for each branch but also leads to overcurrent or overtemperature faults, significantly reducing the reliability of the system.

[0003] Chinese patent CN202011552792.5 discloses a Boost-PFC control circuit and its control method. This invention uses branch current difference for PI control to output a compensated duty cycle, which is directly added to the duty cycle calculated by APFC (Active Power Factor Correction) to output a PWM waveform. Because this invention uses the same reference current, the two branches can independently achieve average current control, and the duty cycles of the two branch switches can be adjusted independently, achieving current sharing between the two inductor currents. However, since this invention compensates for the same duty cycle at both current peaks and troughs, while the actual duty cycle varies, compensating for the same duty cycle can easily lead to current distortion. Furthermore, it suffers from complex hardware circuitry, high cost, and increased harmonics. Summary of the Invention

[0004] This application provides a current sharing control method, device, air conditioner, and storage medium for interleaved parallel PFC circuits to solve one or more of the above-mentioned technical problems.

[0005] On the one hand, this application provides a current sharing control method for an interleaved parallel PFC circuit, wherein the interleaved parallel PFC circuit includes a first PFC branch and a second PFC branch arranged symmetrically, and the control method includes the following steps:

[0006] Obtain the AC input voltage, actual bus voltage, target bus voltage, total current, and branch current of the first or second PFC branch of the interleaved parallel PFC circuit.

[0007] The initial duty cycle and the corrected duty cycle are obtained based on the AC input voltage, the actual bus voltage, the target bus voltage, the branch current, and the total current.

[0008] The first PWM signal for driving the switching transistor of the first PFC branch is obtained based on the initial duty cycle.

[0009] The second PWM signal driving the switching transistor of the second PFC branch is obtained based on the corrected duty cycle.

[0010] In some embodiments of this application, the step of obtaining the corrected duty cycle includes:

[0011] The gain is obtained based on a given current or input current and the branch current;

[0012] The corrected duty cycle is calculated according to a preset algorithm model, wherein the algorithm model includes a product term that uses the gain as a correction coefficient.

[0013] In some embodiments of this application, the step of calculating the corrected duty cycle according to a preset algorithm model includes:

[0014] An updated algorithm model is generated based on the obtained update algorithm model parameters, wherein the algorithm model parameters include the gain and the initial duty cycle;

[0015] Duty 2 = 1 - Gain * (1 - Duty 1)

[0016] Where Duty2 is the corrected duty cycle; Gain is the gain; and Duty1 is the initial duty cycle.

[0017] In some embodiments of this application, the control method further includes:

[0018] The feedforward duty cycle is obtained based on the AC input voltage and the bus voltage.

[0019] The step of calculating the corrected duty cycle according to the preset algorithm model includes:

[0020] An updated algorithm model is generated based on the obtained update algorithm model parameters, wherein the algorithm model parameters include the gain, the feedforward duty cycle, and the initial duty cycle;

[0021] Duty 2=Duty 11+1-Gain*(1-Duty 12)

[0022] Where Duty2 is the corrected duty cycle; Gain is the gain; Duty11 is the initial duty cycle; and Duty12 is the feedforward duty cycle.

[0023] In some embodiments of this application, the step of obtaining the first PWM signal includes:

[0024] The first PWM signal is obtained based on the initial duty cycle and the feedforward duty cycle.

[0025] In some embodiments of this application, the step of obtaining the feedforward duty cycle includes:

[0026] Obtain the ratio of the AC input voltage to the actual bus voltage;

[0027] The feedforward duty cycle is obtained by subtracting the preset value from the ratio.

[0028] In some embodiments of this application, the step of obtaining gain includes:

[0029] The target current is obtained based on the target bus voltage and the actual bus voltage; the gain is obtained based on the target current and the branch current; or...

[0030] The gain is obtained based on the input current and the branch current.

[0031] In some embodiments of this application, the step of obtaining the initial duty cycle includes:

[0032] The target current maximum value is obtained based on the target bus voltage and the actual bus voltage;

[0033] Dividing the AC input voltage by the peak value of the AC input voltage yields a sinusoidal half-wave with a peak value of 1;

[0034] The target current is obtained by multiplying the maximum value of the target current by the half-wave of the sine wave.

[0035] The initial duty cycle is obtained based on the target current and the total current.

[0036] A second aspect of this application provides a current sharing control device for an interleaved parallel PFC circuit, comprising:

[0037] The circuit module includes a first PFC branch and a second PFC branch that are symmetrically arranged.

[0038] The acquisition module is used to acquire the AC input voltage, actual bus voltage, target bus voltage, total current, and branch current of the first PFC branch or the second PFC branch of the interleaved parallel PFC circuit.

[0039] The processing module is used to obtain the initial duty cycle and the corrected duty cycle based on the AC input voltage, the actual bus voltage, the target bus voltage, the branch current, and the total current.

[0040] The driving module is configured to obtain a first PWM signal for driving the switching transistor of the first PFC branch according to the initial duty cycle; and to obtain a second PWM signal for driving the switching transistor of the second PFC branch according to the corrected duty cycle.

[0041] A third aspect of this application provides an air conditioner including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, the memory being coupled to the processor, and the processor executing the computer program to implement the steps in the current sharing control method of the interleaved parallel PFC circuit described above.

[0042] A fourth aspect of this application provides a computer-readable storage medium storing a computer program, wherein, when the computer program is executed, it controls the device where the computer-readable storage medium is located to perform the steps of the current sharing control method for the interleaved parallel PFC circuit described above.

[0043] This application provides a current sharing control method for an interleaved parallel PFC circuit. By obtaining an initial duty cycle and a corrected duty cycle, a first PWM signal driving the switch of the first PFC branch is obtained based on the initial duty cycle, and a second PWM signal driving the switch of the second PFC branch is obtained based on the corrected duty cycle. That is, this application only needs to adjust the duty cycle of the second branch. Compared with the control method in the prior art that adjusts the duty cycles of both the first and second branches at the same time, the current sharing control method and the required hardware circuit of this application are simpler and less expensive. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0045] Figure 1 This is a schematic diagram of the structure of one embodiment of the interleaved parallel PFC circuit provided in this application;

[0046] Figure 2 This is a schematic flowchart of an embodiment of the flow sharing control method provided in this application.

[0047] Figure 3 This is a schematic diagram of an embodiment of obtaining the initial duty cycle provided in this application.

[0048] Figure 4This is a schematic flowchart of an embodiment of obtaining the modified duty cycle provided in this application.

[0049] Figure 5 This is a schematic flowchart of an embodiment of obtaining gain provided in this application;

[0050] Figure 6 This is a schematic diagram of the first embodiment of the control topology provided in this application.

[0051] Figure 7 This is a schematic diagram of the second embodiment of the control topology provided in this application.

[0052] Figure 8 This is a schematic diagram of the third embodiment of the control topology provided in this application.

[0053] Figure 9 This is a schematic diagram of the fourth embodiment of the control topology provided in this application.

[0054] Figure 10 This is a schematic diagram of the fifth embodiment of the control topology provided in this application.

[0055] Figure 11 This is a schematic diagram of the sixth embodiment of the control topology provided in this application. Detailed Implementation

[0056] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0057] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0058] In this application, the term "exemplary" is used to mean "serving as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as being more preferred or advantageous than other embodiments. The following description is provided to enable any person skilled in the art to make and use the invention. Details are set forth in the following description for purposes of explanation. It should be understood that those skilled in the art will recognize that the invention can be made without using these specific details. In other instances, well-known structures and processes will not be described in detail to avoid obscuring the description of the invention with unnecessary detail. Therefore, the invention is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed in this application.

[0059] This application provides a current sharing control method, apparatus, air conditioner, and storage medium for an interleaved parallel PFC circuit. The control method includes: acquiring the AC input voltage, actual bus voltage, target bus voltage, total current, and branch current of a first PFC branch or a second PFC branch of the interleaved parallel PFC circuit; obtaining an initial duty cycle and a corrected duty cycle based on the AC input voltage, the actual bus voltage, the target bus voltage, the branch current, and the total current; obtaining a first PWM signal driving the switch of the first PFC branch based on the initial duty cycle; and obtaining a second PWM signal driving the switch of the second PFC branch based on the corrected duty cycle.

[0060] In this embodiment, a first PWM signal driving the switch of the first PFC branch can be obtained based on the initial duty cycle, and a second PWM signal driving the switch of the second PFC branch can be obtained based on the corrected duty cycle. The current sharing control method in this application only needs to adjust the duty cycle of the second branch. Compared to the prior art control method that simultaneously adjusts the duty cycles of both the first and second branches, the current sharing control method and the required hardware circuitry in this application are simpler and less expensive.

[0061] The present application will be described in detail below with reference to specific embodiments.

[0062] like Figure 1 As shown, the interleaved parallel PFC circuit in this application includes two symmetrically arranged Boost-type PFC branches, namely the first PFC branch and the second PFC branch. Each of the first and second PFC branches includes an inductor, a diode, and a switching transistor. The first and second PFC branches operate in a 180° interleaved state, each bearing half of the total output power of the interleaved parallel PFC circuit. Because the parameters of the corresponding components in the first and second PFC branches may differ and vary, the inductor current in each PFC branch may be uneven, leading to unbalanced power distribution and affecting the stable operation of equipment such as air conditioners.

[0063] It should be noted that, Figure 1 This is merely a schematic diagram of one embodiment of the interleaved parallel PFC circuit in this application. The interleaved parallel PFC circuit in this application may also have other structures, which are not limited here.

[0064] like Figure 2 The diagram shown is a flowchart illustrating an embodiment of the current sharing control method for interleaved parallel PFC circuits in this application. The current sharing control method includes the following steps:

[0065] Step S1: Obtain the AC input voltage, actual bus voltage, target bus voltage, total current, and branch current of the first PFC branch or the second PFC branch of the interleaved parallel PFC circuit.

[0066] In this application, the AC input voltage, actual bus voltage, target bus voltage, total current, and branch current of the first or second PFC branch of the interleaved parallel PFC circuit can be obtained through a signal detection device. It should be noted that how to obtain the AC input voltage, actual bus voltage, target bus voltage, total current, and branch current of the first or second PFC branch of the interleaved parallel PFC circuit is not within the scope of this invention. Those skilled in the art can use existing signal detection devices to obtain the above parameters, or design them according to actual needs; no limitation is made here.

[0067] Please refer to it again. Figure 1 For ease of explanation and understanding, this application will use the example of obtaining the branch current of the second branch to illustrate the concept. Hereinafter, the switching transistor of the first PFC branch will be Q1, the switching transistor of the second PFC branch will be Q2, the AC input voltage will be Vdb, the actual bus voltage will be Vdc, the target bus voltage will be Vref, the total current will be Iac, and the second branch current will be I2.

[0068] Step S2: Obtain the initial duty cycle and the corrected duty cycle based on the AC input voltage, the actual bus voltage, the target bus voltage, the branch current, and the total current.

[0069] Please see Figure 3 This is a schematic diagram of a process for obtaining the initial duty cycle in one embodiment of this application. The method includes:

[0070] Step S210: Obtain the target current maximum value (Irefmax) based on the target bus voltage (Vref) and the actual bus voltage (Vdc).

[0071] For details, please refer to Figure 6 First, Vdc and Vref are input to the comparator, and the comparison result is input to the voltage loop regulator (PI) to obtain the maximum value of the target current (Irefmax).

[0072] Step S211: Divide the AC input voltage (Vdb) by the peak value of the AC input voltage to obtain a sine half-wave with a peak value of 1.

[0073] Step S212: Multiply the maximum value of the target current by the half-wave of the sine wave to obtain the target current.

[0074] Step S213: Obtain the initial duty cycle based on the target current and the total current.

[0075] Specifically, the target current and the total current Iac are input into the comparator, and the comparison result is input into the current loop regulator (PI) to output the initial duty cycle Duty11.

[0076] It should be noted that, unless otherwise specified below, the comparator, voltage regulator and current regulator in this application can all be implemented through the software function of the control device, or they can be implemented by building corresponding hardware circuits.

[0077] Please see Figure 4The diagram below illustrates a flowchart of an embodiment for obtaining the corrected duty cycle in this application. The method includes: Step S22, obtaining a gain based on a given current or input current and the branch current; Step S23, calculating the corrected duty cycle according to a preset algorithm model, wherein the algorithm model includes a product term that uses the gain as a correction coefficient.

[0078] It should be noted that existing methods for current sharing control in interleaved parallel PFC circuits generally obtain the compensation duty cycle of each branch based on the current error of each branch, and then obtain the current sharing control signal for each branch. However, this control method suffers from distortion near the zero-crossing point. In this embodiment, a new algorithm model is designed, which includes a product term that uses the gain as a correction coefficient, so that the corrected duty cycle can follow the change of the initial duty cycle. This achieves current sharing while also optimizing harmonics, effectively solving the distortion problem near the zero-crossing point in existing current sharing control methods.

[0079] In one embodiment of this application, the modified duty cycle can be obtained using the following formula:

[0080] Duty 2 = 1 - Gain * (1 - Duty 11)

[0081] Wherein, Duty2 is the corrected duty cycle; Gain is the gain; and Duty11 is the initial duty cycle.

[0082] Step S3: Obtain the first PWM signal driving the switch of the first PFC branch according to the initial duty cycle. Specifically, as shown... Figures 6 to 10 As shown, a first PWM signal can be obtained according to the initial duty cycle Duty11 (Duty1 and Duty11 are equal in this embodiment), and the first PWM signal is used to drive the switching transistor Q1 in the first PFC branch.

[0083] Step S4: Obtain the second PWM signal to drive the switch Q2 in the second PFC branch based on the corrected duty cycle. Specifically, the second PWM signal can be obtained based on the corrected duty cycle Duty2, and the second PWM signal is used to drive the switch Q2 in the second PFC branch.

[0084] In this embodiment, a first PWM signal can be obtained based on the initial duty cycle Duty11, and a second PWM signal can be obtained based on the corrected duty cycle Duty12, thereby simplifying the current sharing control process and improving the response speed.

[0085] In another embodiment of this application, the modified duty cycle can also be obtained according to the following formula:

[0086] Duty 2=Duty 11+1-Gain*(1-Duty 12)

[0087] Where Duty2 is the corrected duty cycle; Gain is the gain; Duty11 is the initial duty cycle; and Duty12 is the feedforward duty cycle.

[0088] Further, the step of obtaining the feedforward duty cycle (Duty12) includes: obtaining the ratio of the AC input voltage to the actual bus voltage. The feedforward duty cycle is obtained by subtracting a preset value from the ratio. Specifically, the feedforward duty cycle is obtained according to the following formula:

[0089] Duty 12 = 1 - Vdb / Vdc

[0090] Where Vdb is the AC input voltage; Vdc is the actual bus voltage.

[0091] Further, a first PWM signal is obtained based on the initial duty cycle Duty11 and the feedforward duty cycle.

[0092] In the embodiments of this application, such as Figure 11 As shown, the first PWM signal driving the switch of the first PFC branch can be obtained by adding the initial duty cycle Duty11 and the feedforward duty cycle, and the second PWM signal driving the switch of the second PFC branch can be obtained by adding the corrected duty cycle Duty2. Only the duty cycle of the second branch needs to be adjusted. Compared with the control method in the prior art that simultaneously adjusts the duty cycles of both the first and second branches, the current sharing control method of this application is simpler and has lower cost than the required hardware circuit. Furthermore, in this embodiment, a duty cycle feedforward unit is added, which can effectively improve the adjustment bandwidth of the current loop and optimize the current waveform.

[0093] Please see Figure 5 The diagram below illustrates a flowchart of one embodiment of obtaining gain in this application. The method includes: S220, obtaining a target current based on the target bus voltage and the actual bus voltage; S221, obtaining the gain based on the target current and the branch current.

[0094] Specifically, please refer to [the relevant document] again. Figure 6 After obtaining the target current maximum value (Irefmax), divide Irefmax by The effective value of the given current (Irefrmshalf) is obtained. The effective value of the branch current I2 is obtained by passing it through the periodic effective value calculation module (rms). Then, I2rms and Irefrmshalf are passed through a comparator, and the result of the comparator is used for PI calculation to obtain the gain.

[0095] Please see Figure 7 This is a topology diagram of another embodiment of this application, which is related to... Figure 6 The difference is that after obtaining the target current maximum value (Irefmax), Irefmax is multiplied by a sine half-wave to obtain the target current value (Iref), and then Iref is passed through the periodic effective value calculation module (rms) and multiplier to obtain half of the given current effective value (Irefrmshalf).

[0096] Please see Figure 8 This is a topology diagram of another embodiment of this application, which is related to... Figure 7 The difference is that the periodic effective value calculation module (rms) is omitted.

[0097] In some other embodiments of this application, the gain can also be obtained based on the input current and the branch current.

[0098] Specifically, please refer to Figure 10 Divide Iac by 2 to get half of the total current (Iachalf). Then, pass Iachalf and I2 through a comparator, and use the comparator output to perform a PI calculation to obtain the gain. (See also...) Figure 9 Alternatively, Iac can be processed through a periodic effective value calculation module (rms) and a multiplier to obtain half of the total effective current value (Iacrmshalf). The branch current I2 can be processed through the periodic effective value calculation module (rms) to obtain the effective value of the branch current I2 (I2rms). Then, I2rms and Iacrmshalf are passed through a comparator, and the comparator output is used for PI calculation to obtain the gain.

[0099] A second aspect of this application provides a current sharing control device for an interleaved parallel PFC circuit, the current sharing control device comprising:

[0100] The circuit module includes a first PFC branch and a second PFC branch that are symmetrically arranged.

[0101] The acquisition module is used to acquire the AC input voltage, actual bus voltage, target bus voltage, total current, and branch current of the first PFC branch or the second PFC branch of the interleaved parallel PFC circuit.

[0102] The processing module is used to obtain the initial duty cycle and the corrected duty cycle based on the AC input voltage, the actual bus voltage, the target bus voltage, the branch current, and the total current.

[0103] The driving module is configured to obtain a first PWM signal for driving the switching transistor of the first PFC branch according to the initial duty cycle; and to obtain a second PWM signal for driving the switching transistor of the second PFC branch according to the corrected duty cycle.

[0104] A third aspect of this application provides an air conditioner including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, the memory being coupled to the processor, and the processor executing the computer program to implement the steps in the current sharing control method of the interleaved parallel PFC circuit as described above.

[0105] A fourth aspect of this application provides a computer-readable storage medium storing a computer program, wherein, when the computer program is executed, it controls the device in which the computer-readable storage medium is located to perform the steps of the current sharing control method for the interleaved parallel PFC circuit described above.

[0106] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the detailed descriptions of other embodiments above, which will not be repeated here.

[0107] The basic concepts have been described above. Obviously, for those skilled in the art, the detailed disclosure above is merely illustrative and does not constitute a limitation of this application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and corrections to this application. Such modifications, improvements, and corrections are suggested in this application, and therefore remain within the spirit and scope of the exemplary embodiments of this application.

[0108] Furthermore, this application uses specific terms to describe embodiments of the application. For example, "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic associated with at least one embodiment of the application. Therefore, it should be emphasized and noted that "an embodiment," "one embodiment," or "an alternative embodiment" mentioned twice or more in different locations in this specification do not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of the application can be appropriately combined.

[0109] Similarly, it should be noted that, in order to simplify the description of the present application and thus aid in the understanding of one or more embodiments of the invention, the foregoing description of the embodiments of the present application sometimes combines multiple features into a single embodiment, drawing, or description thereof. However, this disclosure method does not imply that the subject matter of the application requires more features than those mentioned in the claims. In fact, the embodiments contain fewer features than all the features of the single embodiments disclosed above.

[0110] For each patent, patent application, patent application publication, and other material such as articles, books, specifications, publications, and documents referenced in this application, the entire contents of that patent application are incorporated herein by reference, except for historical application documents that are inconsistent with or conflict with the content of this application, and documents that limit the broadest scope of the claims of this application (currently or subsequently appended to this application). It should be noted that if there are any inconsistencies or conflicts between the descriptions, definitions, and / or terminology used in the supplementary materials of this application and the content of this application, the descriptions, definitions, and / or terminology used in this application shall prevail.

[0111] The foregoing has provided a detailed description of the current sharing control method, apparatus, air conditioner, and storage medium for an interleaved parallel PFC circuit provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A current sharing control method for an interleaved parallel PFC circuit, the interleaved parallel PFC circuit comprising a first PFC branch and a second PFC branch symmetrically arranged, characterized in that, The control method comprises the following steps: Obtaining the AC input voltage, the actual bus voltage, the target bus voltage, the total current and the branch current of the first PFC branch or the second PFC branch of the interleaved parallel PFC circuit; Obtaining the initial duty ratio and the corrected duty ratio according to the AC input voltage, the actual bus voltage, the target bus voltage, the branch current and the total current; Obtaining the first PWM signal of the switch tube of the first PFC branch according to the initial duty ratio; Obtaining the second PWM signal of the switch tube of the second PFC branch according to the corrected duty ratio; The step of obtaining the corrected duty ratio comprises: Obtaining the gain according to the total current and the branch current, or obtaining the gain according to the actual bus voltage, the target bus voltage and the branch current; Generating the updated algorithm model according to the obtained updated algorithm model parameters, wherein the algorithm model parameters comprise the gain and the initial duty ratio; The control method comprises the following steps:

2. A current sharing control method of an interleaved parallel PFC circuit, the interleaved parallel PFC circuit comprising a first PFC branch and a second PFC branch symmetrically arranged, characterized in that, Obtaining the AC input voltage, the actual bus voltage, the target bus voltage, the total current and the branch current of the first PFC branch or the second PFC branch of the interleaved parallel PFC circuit; Obtaining the initial duty ratio and the corrected duty ratio according to the AC input voltage, the actual bus voltage, the target bus voltage, the branch current and the total current; Obtaining the first PWM signal of the switch tube of the first PFC branch according to the initial duty ratio; Obtaining the second PWM signal of the switch tube of the second PFC branch according to the corrected duty ratio; The step of obtaining the corrected duty ratio comprises: Obtaining the gain according to the total current and the branch current, or obtaining the gain according to the actual bus voltage, the target bus voltage and the branch current; Obtaining the feedforward duty ratio according to the AC input voltage and the actual bus voltage; Generating the updated algorithm model according to the obtained updated algorithm model parameters, wherein the algorithm model parameters comprise the gain, the feedforward duty ratio and the initial duty ratio; The control method comprises the following steps: The step of obtaining the first PWM signal comprises:

3. The control method according to claim 2, characterized by, Obtaining the first PWM signal according to the initial duty ratio and the feedforward duty ratio. The step of obtaining the feedforward duty ratio comprises:

4. The control method according to claim 2, characterized by, Obtaining the ratio of the AC input voltage to the actual bus voltage; Obtaining the feedforward duty ratio by subtracting the preset value from the ratio. The step of obtaining the gain comprises:

5. The control method according to claim 1 or 2, characterized by, Obtaining the target current according to the target bus voltage and the actual bus voltage, and obtaining the gain according to the target current and the branch current; or Obtaining the gain according to the total current and the branch current. The step of obtaining the initial duty ratio comprises:

6. The control method according to claim 1 or 2, characterized by, Obtaining the maximum value of the target current according to the target bus voltage and the actual bus voltage; ​ divide the AC input voltage by the AC input voltage peak to obtain a sine half wave with a peak of 1; multiply the target current maximum value by the sine half wave to obtain a target current; obtain the initial duty ratio according to the target current and the total current.

7. A current sharing control apparatus for an interleaved parallel PFC circuit, characterized by, Comprise: a circuit module comprising a first PFC branch and a second PFC branch arranged symmetrically; an acquisition module configured to acquire an AC input voltage, an actual bus voltage, a target bus voltage, a total current, and a branch current of the first PFC branch or the second PFC branch of the interleaved parallel PFC circuit; a processing module configured to obtain an initial duty ratio and a corrected duty ratio according to the AC input voltage, the actual bus voltage, the target bus voltage, the branch current, and the total current; a driving module configured to obtain a first PWM signal for driving a switch tube of the first PFC branch according to the initial duty ratio, and obtain a second PWM signal for driving a switch tube of the second PFC branch according to the corrected duty ratio; the driving module is specifically configured to obtain a gain according to the total current and the branch current, or obtain the gain according to the actual bus voltage, the target bus voltage, and the branch current; generate an updated algorithm model according to obtained updated algorithm model parameters, the algorithm model parameters comprising the gain and the initial duty ratio; wherein Duty2 is the corrected duty ratio, Gain is the gain, and Duty1 is the initial duty ratio. Comprise:

8. A current sharing control apparatus for an interleaved parallel PFC circuit, characterized by, a circuit module comprising a first PFC branch and a second PFC branch arranged symmetrically; an acquisition module configured to acquire an AC input voltage, an actual bus voltage, a target bus voltage, a total current, and a branch current of the first PFC branch or the second PFC branch of the interleaved parallel PFC circuit; a processing module configured to obtain an initial duty ratio and a corrected duty ratio according to the AC input voltage, the actual bus voltage, the target bus voltage, the branch current, and the total current; a driving module configured to obtain a first PWM signal for driving a switch tube of the first PFC branch according to the initial duty ratio, and obtain a second PWM signal for driving a switch tube of the second PFC branch according to the corrected duty ratio; the driving module is specifically configured to obtain a gain according to the total current and the branch current, or obtain the gain according to the actual bus voltage, the target bus voltage, and the branch current; generate an updated algorithm model according to obtained updated algorithm model parameters, the algorithm model parameters comprising the gain and the initial duty ratio; wherein Duty2 is the corrected duty ratio, Gain is the gain, and Duty1 is the initial duty ratio. Comprise: a circuit module comprising a first PFC branch and a second PFC branch arranged symmetrically; an acquisition module configured to acquire an AC input voltage, an actual bus voltage, a target bus voltage, a total current, and a branch current of the first PFC branch or the second PFC branch of the interleaved parallel PFC circuit; a processing module configured to obtain an initial duty ratio and a corrected duty ratio according to the AC input voltage, the actual bus voltage, the target bus voltage, the branch current, and the total current; a driving module configured to obtain a first PWM signal for driving a switch tube of the first PFC branch according to the initial duty ratio, and obtain a second PWM signal for driving a switch tube of the second PFC branch according to the corrected duty ratio; the driving module is specifically configured to obtain a gain according to the total current and the branch current, or obtain the gain according to the actual bus voltage, the target bus voltage, and the branch current; generate an updated algorithm model according to obtained updated algorithm model parameters, the algorithm model parameters comprising the gain and the initial duty ratio; wherein Duty2 is the corrected duty ratio, Gain is the gain, and Duty1 is the initial duty ratio.

9. An air conditioner characterized by comprising: The computer readable storage medium stores a computer program, wherein the computer program controls a device where the computer readable storage medium is located to perform the steps in the current-sharing control method of the interleaved parallel PFC circuit according to any one of claims 1 to 6 when the computer program runs.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, wherein the computer program controls a device where the computer readable storage medium is located to perform the steps in the current-sharing control method of the interleaved parallel PFC circuit according to any one of claims 1 to 6 when the computer program runs.

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