An erasing method of flash memory and related device

Abstract

The application discloses an erasing method of flash memory, which is applied to a terminal or flash memory. The method comprises the following steps: firstly, obtaining the number of target storage units storing charges in a target page, wherein the target page is a page to be erased in the flash memory; then, determining the erasing duration of the target page according to the number of the target storage units; finally, performing an erasing operation on the target page according to the erasing duration of the target page. In the scheme, the actual erasing duration of the target page is determined based on the number of the storage units storing charges in the target page, so that the erasing duration of the page in the flash memory can be effectively reduced, and the erasing efficiency of the page is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data storage, and particularly relates to a flash memory erasing method and related device. BACKGROUND

[0002] With the rapid development and wide application of various electronic devices, such as computers, smart phones, digital cameras and other electronic devices, non-volatile memories are widely used. Among the non-volatile memories, flash memories are most widely used.

[0003] Limited by the data storage mode of the flash memory, the write operation of the flash memory can only be performed in the storage unit with empty charge in the flash memory. Therefore, in most cases, before performing the data write operation on the flash memory, the erasing operation needs to be performed on the flash memory to empty the charge of the storage unit in the flash memory.

[0004] At present, the erasing operation is usually performed on the flash memory with a single page in the flash memory as the minimum erasing unit. In the related art, the process of performing the erasing operation on the page in the flash memory is: discharging the storage unit in the whole page according to the default erasing duration. Since in the related art, the default erasing duration needs to be performed for each page in the flash memory, the erasing operation of the flash memory needs to consume more time and the erasing efficiency is low. SUMMARY

[0005] The embodiment of the present application provides a flash memory erasing method, which determines the actual erasing duration of the page by acquiring the number of storage units with charge in the page of the flash memory. Since in most cases, only part of the storage units in the page store the charge, the actual erasing duration of the page is less than the default erasing duration of the page. Through the present solution, the erasing duration of the page in the flash memory can be effectively reduced and the erasing efficiency of the page is improved.

[0006] The first aspect of the present application provides an erasing method of a flash memory, which can be applied to a terminal or a flash memory. In the case of applying the method to a terminal, the terminal acquires the number of target storage units, the target storage units being storage units storing charges in a target page, the target page being any one of pages to be erased in the flash memory. The flash memory includes a large number of storage units, each of which includes a floating gate field effect transistor capable of storing charges. The flash memory stores data by changing the number of charges in the floating gate. The terminal can be an instruction sender to the flash memory to query the charge storage condition of all storage units in the target page of the flash memory, thereby acquiring the number of target storage units. The terminal determines the erasing duration of the target page according to the number of target storage units. The more the number of target storage units, the longer the erasing duration of the target page; the less the number of target storage units, the shorter the erasing duration of the target page. Finally, the terminal performs an erasing operation on the target page according to the erasing duration of the target page, so that the duration of performing the erasing operation on the target page is the erasing duration of the target page. The erasing duration of the target page is actually the duration of discharging the storage units in the target page.

[0007] In the present solution, the actual erasing duration of a page is determined by acquiring the number of storage units storing charges in the page of the flash memory. Since in most cases only part of the storage units in the page store charges, the actual erasing duration of the page is less than the default erasing duration of the page. Through the present solution, the erasing duration of the page in the flash memory can be effectively reduced, and the erasing efficiency of the page can be improved.

[0008] In a possible implementation, the terminal determines the erasing duration of the target page according to the number of target storage units, including: the terminal acquires a target ratio according to the number of target storage units, the target ratio being the ratio of the number of target storage units to the total number of storage units in the target page. Then, the terminal determines the erasing duration of the target page according to the target ratio and a first duration, the first duration being a preset erasing duration of the target page (i.e. the default erasing duration of the target page), and the erasing duration of the target page being less than or equal to the first duration. Specifically, the terminal can determine the erasing duration of the target page by multiplying the target ratio and the first duration.

[0009] In a possible implementation, the terminal determines the erasing duration of the target page according to the number of the target storage units, including: the terminal determines the erasing duration of the target page according to the number of the target storage units and a second duration, the second duration being a preset erasing duration of a single storage unit. That is, the terminal determines the erasing duration of the target page according to the number of the target storage units and the default erasing duration of each storage unit.

[0010] In a possible implementation, the method further includes: the terminal acquires a first message, the first message being used to indicate that a storage unit in the target page is in an unstable state. The first message is a message sent by the flash memory to the terminal after detecting that the value of any storage unit in the target page changes. The terminal performs an erasing operation on the target page for a third duration according to the first message. That is, the terminal performs the erasing operation on the target page again according to the first message, and the duration of the erasing operation is the third duration.

[0011] In this solution, by continuing to perform the erasing operation on the target page when the target page is in the unstable state, it can be ensured that the storage units in the target page are in a stable state, and the problem of data errors when the target page is used to store data can be avoided.

[0012] In a possible implementation, the third duration is determined according to a preset erasing duration of the target page. For example, the third duration is 10% or 20% of the preset erasing duration of the target page. Alternatively, the third duration is determined according to the erasing duration of the target page. For example, the duration can be the same as the erasing duration of the target page, or half of the erasing duration of the target page.

[0013] In a possible implementation, the terminal acquires the number of the target storage units, including: the terminal divides the storage units in the target page into k storage unit sets, each storage unit set including m storage units, and every n storage units in the m storage units being a group. Then, the terminal acquires the number of storage units without electric charge (i.e., the value of the number is 1) in each group of storage units in the k storage unit sets. Next, the terminal determines the sum of the number of storage units without electric charge in the storage units of the same group in the k storage unit sets, to obtain a sum of numbers of multiple groups. The terminal adds the sum of numbers of two adjacent groups to obtain a new sum of numbers of multiple groups. Finally, based on the n, the terminal performs a remainder operation on the new sum of numbers of multiple groups and 2 2n -1 to obtain the number of the target storage units.

[0014] In this embodiment, the target data corresponding to the plurality of storage unit sets is merged, thereby saving the number of remainder operations performed on the target data, and improving the calculation efficiency.

[0015] In a possible implementation, the terminal acquires the number of target storage units, including: the terminal acquires the number of target storage units in the target page by using a traversal method, a branch method, or a Hakmem algorithm. The traversal method, the branch method, or the Hakmem algorithm can be used to calculate the number of digits with a value of 1 in a binary number. After the terminal calculates the number of digits with a value of 1 in the data fed back by the flash memory by using the traversal method, the branch method, or the Hakmem algorithm, the terminal further determines the number of digits with a value of 0, and thereby determines the number of storage units storing charges.

[0016] In a possible implementation, the flash memory is a NOR type flash memory or a NAND type flash memory.

[0017] The second aspect of the present application provides an erasing device of a flash memory, including: an acquisition unit and a processing unit. The acquisition unit is configured to acquire the number of target storage units, the target storage units being storage units storing charges in a target page, and the target page being a page to be erased in a flash memory. The processing unit is configured to determine the erasing duration of the target page according to the number of target storage units. The processing unit is further configured to perform an erasing operation on the target page according to the erasing duration of the target page.

[0018] In a possible implementation, the processing unit is further configured to acquire a target ratio according to the number of target storage units, the target ratio being the ratio of the number of target storage units to the total number of storage units in the target page. The processing unit is further configured to determine the erasing duration of the target page according to the target ratio and a first duration, the first duration being a preset erasing duration of the target page, and the erasing duration of the target page being less than or equal to the first duration.

[0019] In a possible implementation, the processing unit is further configured to determine the erasing duration of the target page according to the number of target storage units and a second duration, the second duration being a preset erasing duration of a single storage unit.

[0020] In a possible implementation, the acquisition unit is further configured to acquire a first message, the first message being used to indicate that the storage units in the target page are in an unstable state. The processing unit is further configured to perform an erasing operation on the target page for a third duration according to the first message.

[0021] In a possible implementation, the third time length is determined according to a preset erasing time length of the target page; or the third time length is determined according to an erasing time length of the target page.

[0022] In a possible implementation, the obtaining unit is further configured to: divide the storage units in the target page into k storage unit sets, each of which includes m storage units, and each n storage units in the m storage units form a group; obtain the number of storage units without electric charges in each group of storage units in the k storage unit sets; determine the sum of the number of storage units without electric charges in the same group of storage units in the k storage unit sets, to obtain a plurality of group number sums; and perform a modulo operation on the plurality of group number sums based on the n, to obtain the number of target storage units.

[0023] In a possible implementation, the obtaining unit is further configured to obtain the number of target storage units in the target page by using a traversal method, a branch method, or a Hakmem algorithm.

[0024] In a possible implementation, the flash memory is a NOR type flash memory or a NAND type flash memory.

[0025] The third aspect of the present application provides a terminal, which includes a processor, a non-volatile memory, and a volatile memory; the non-volatile memory or the volatile memory stores computer readable instructions; and the processor reads the computer readable instructions to enable the terminal to implement the method in any of the implementation manners of the first aspect.

[0026] The fourth aspect of the present application provides a flash memory, which includes a processor, a non-volatile memory, and a volatile memory; the non-volatile memory or the volatile memory stores computer readable instructions; and the processor reads the computer readable instructions to enable the flash memory to implement the method in any of the implementation manners of the first aspect.

[0027] The fifth aspect of the present application provides a computer readable storage medium, which stores a computer program; when the computer program runs on a computer, the computer program enables the computer to execute the method in any of the implementation manners of the first aspect.

[0028] The sixth aspect of the present application provides a computer program product, which enables a computer to execute the method in any of the implementation manners of the first aspect when the computer program product runs on the computer.

[0029] The seventh aspect of the present application provides a chip, which includes one or more processors. Part or all of the processors are configured to read and execute a computer program stored in a memory, to execute the method in any of the possible implementation manners of any of the aspects.

[0030] Optionally, the chip includes a memory, and the memory is connected with the processor by a circuit or a wire. Optionally, the chip further includes a communication interface, and the processor is connected with the communication interface. The communication interface is used to receive data and / or information to be processed, the processor obtains the data and / or information from the communication interface, processes the data and / or information, and outputs the processing result through the communication interface. The communication interface can be an input / output interface. The method provided in the present application can be implemented by one chip, or can be implemented by multiple chips in cooperation. BRIEF DESCRIPTION OF DRAWINGS

[0031] Figure 1 An architecture schematic diagram of an application scenario provided by an embodiment of the present application is shown in the following figure;

[0032] Figure 2 An architecture schematic diagram of another application scenario provided by an embodiment of the present application is shown in the following figure;

[0033] Figure 3 A structure schematic diagram of a terminal 101 provided by an embodiment of the present application is shown in the following figure;

[0034] Figure 4 A flow schematic diagram of a flash memory erasing method 400 provided by an embodiment of the present application is shown in the following figure;

[0035] Figure 5 A flow schematic diagram of a flash memory erasing method 500 provided by an embodiment of the present application is shown in the following figure;

[0036] Figure 6 A schematic diagram of a Hakmem algorithm provided by an embodiment of the present application is shown in the following figure;

[0037] Figure 7 A schematic diagram of a Hakmem+ algorithm provided by an embodiment of the present application is shown in the following figure;

[0038] Figure 8 A structure schematic diagram of a flash memory erasing device 800 provided by an embodiment of the present application is shown in the following figure;

[0039] Figure 9 A structure schematic diagram of a computer program product 900 provided by an embodiment of the present application is shown in the following figure. DETAILED DESCRIPTION

[0040] The embodiments of the present application are described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments. Those skilled in the art can know that, with the development of technology and the appearance of new scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0041] The terms "first", "second", and the like, as used in the specification and claims of this application, and the aforementioned drawings, are intended to modify, respectively, any mentioned object, but do not by themselves indicate a specific order or sequence of operations. It must be understood that any such terms so used are interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of efficient implementation in either order. Moreover, the terms "include", "have", and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, product, or apparatus that comprises a list of steps or modules does not include only those steps or modules that are literally recited, but can also include other steps or modules that are not expressly listed or inherent to such process, method, system, product, or apparatus. The designation of steps in the present application by name or number does not imply that the steps must be performed in the order or sequence indicated by the name or number, and the order or sequence of the steps designated by name or number can be changed to achieve the same or similar technical result.

[0042] Flash memory, also known as flash storage, is a type of non-volatile memory, i.e., the data in the flash memory will not be lost after power-off. The flash memory allows data to be written or erased multiple times in operation. Limited by the data storage mode of the flash memory, the write operation on the flash memory can only be performed in the storage cell with empty charge in the flash memory. Therefore, in most cases, an erase operation needs to be performed on the flash memory to empty the charge of the storage cell in the flash memory before the data write operation is performed on the flash memory.

[0043] The flash memory includes a large number of storage cells, each of which includes a floating gate field effect transistor capable of storing charge. The flash memory stores data by changing the amount of charge in the floating gate. Specifically, the principle of storing data by the storage cell in the flash memory is as follows: when the charge is injected into the floating gate of a storage cell, the threshold voltage of the storage cell increases, at which time the storage cell is in a programmed state; after the charge trapped in the floating gate of the storage cell is removed, the threshold voltage of the storage cell decreases, at which time the storage cell is in an erased state. Therefore, if there is charge in the floating gate of a storage cell, the storage cell is in a programmed state and can be written with data; if there is no charge in the floating gate of a storage cell, the storage cell is in an erased state.

[0044] Digital "0" and "1" are usually represented by whether there is charge in the storage cell. "0" represents that there is charge in the storage cell, and "1" represents that there is no charge in the storage cell. The write operation performed on the flash memory is a process of injecting charge into the storage cell, i.e., the transformation of the number is: "1"→"0". The erase operation performed on the flash memory is a process of removing the charge in the storage cell, i.e., the transformation of the number is: "0"→"1".

[0045] The erase operation of the flash memory is page erase, and each erase operation is performed on a certain number of storage units in a region at the same time, and no individual erase operation is performed on each storage unit. The erase operation performed on the flash memory is to apply a negative voltage to the floating gate of a certain number of storage units in a region and apply a positive voltage to the substrate. Each time a negative voltage is applied to the floating gate of a certain number of storage units in a region and a positive voltage is applied to the substrate, it is called one "erase".

[0046] Since the storage units in different pages in the flash memory store charges in different ways each time an erase operation is performed on the pages in the flash memory, in order to ensure that the erase operation on the pages in the flash memory can be successfully completed each time, in the related art, the storage units in the entire page are discharged according to a default erase duration. The default erase duration is calculated under the condition that the storage units in the entire page store charges, to ensure that each erase operation can be successfully completed. Therefore, since the default erase duration needs to be performed for each page in the flash memory in the related art, a relatively long time is required to perform the erase operation on the flash memory, and the erase efficiency is low.

[0047] However, in most cases in actual applications, only part of the storage units in the page of the flash memory store charges when the erase operation is performed on the page in the flash memory. That is, in most cases, the storage units in the page of the flash memory do not all store charges. For example, refer to Table 1 below, which shows the proportion of storage units storing charges (represented by the number "0") in the entire page, i.e., the ratio between the number of storage units storing charges in the page and the number of storage units in the entire page, when the flash memory is used to store different data.

[0048] Table 1

[0049]

[0050] As shown in Table 1, this table lists the distribution of pages in flash memory across different percentage ranges when the flash memory is used to store different types of data. Specifically, when the flash memory is used to store operating system-related data, there are 2 pages where the percentage of charged storage cells in the entire page (hereinafter referred to as percentage) falls within the range [0, 10), 2 pages where the percentage falls within the range [20, 30), 34 pages where the percentage falls within the range [30, 40), and 1 page where the percentage falls within the range [40, 50). Table 1 shows that when the flash memory is used to store machine control-related data, night scene photos, or daytime photos, the percentage of charged storage cells in a flash memory page is less than 60% of the total page size. In other words, in most cases, the number of charged storage cells in a flash memory page does not exceed 60% of all storage cells in the entire page.

[0051] Thus, when performing an erase operation on a page in flash memory, the memory cells within that page that do not store charge do not actually need to be discharged. Therefore, related technologies that perform erase operations on each page based on a default erase duration require a long time and result in low page erasure efficiency.

[0052] In view of this, this application provides a flash memory erasure method that determines the actual page erasure time by the number of storage cells storing charge in a flash memory page. The fewer storage cells storing charge in a page, the shorter the page erasure time. This embodiment effectively reduces the page erasure time in flash memory and improves page erasure efficiency.

[0053] The flash memory erasure method provided in this application can be applied to a terminal or a flash memory. When the method provided in this application is applied to a terminal, the processor in the terminal executes the method to determine the erasure duration of the target page in the flash memory, and controls the flash memory to perform an erasure operation on the target page based on the erasure duration of the target page. See also... Figure 1 , Figure 1 This is a schematic diagram of an application scenario provided by an embodiment of this application. For example... Figure 1 As shown, the terminal includes an erase duration calculation module, an erase duration control module, and a flash memory driver module. The erase duration calculation module calculates the page erase duration; the erase duration control module, based on the erase duration calculated by the erase duration calculation module, controls the flash memory to perform the page erase operation by sending control signals; the flash memory driver module writes data to or reads data from the flash memory. The flash memory includes a controller and pages for storing data. The controller receives control signals sent by the terminal and executes the page erase operation according to the control signals.

[0054] When the method provided in the embodiments of the present application is applied to a flash memory, the method is executed by a controller in the flash memory to determine an erasing time length of a target page in the flash memory, and perform an erasing operation on the target page based on the erasing time length of the target page. For details, refer to Figure 2 , Figure 2 The figure shows another application scenario provided in the embodiments of the present application. As shown in the figure, a terminal includes a flash memory driving module, which is configured to write data into a flash memory or read data from the flash memory. The flash memory includes a controller and a page configured to store data. The controller includes an erasing time length calculation module and an erasing time length control module. The erasing time length calculation module is configured to calculate an erasing time length of the page, and the erasing time length control module is configured to perform an erasing operation on the page based on the erasing time length calculated by the erasing time length calculation module. Figure 2

[0055] Exemplarily, the flash memory involved in the embodiments of the present application can be a memory card, a U disk or a memory integrated in a microcontroller unit (MCU).

[0056] Exemplarily, the terminal involved in the embodiments of the present application can be, for example, a personal computer (PC), a notebook computer, a server, a mobile phone, a tablet computer, a mobile internet device (MID), a wearable device, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a wireless terminal in self driving, a wireless terminal in remote medical surgery, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart city, a wireless terminal in smart home, etc. The terminal can be a device running an Android system, an IOS system, a windows system and other systems.

[0057] For details, refer to Figure 3 , Figure 3 The figure shows a structure of a terminal 101 provided in the embodiments of the present application. As shown in the figure, the terminal 101 includes a flash memory driving module, which is configured to write data into a flash memory or read data from the flash memory. The flash memory includes a controller and a page configured to store data. The controller includes an erasing time length calculation module and an erasing time length control module. The erasing time length calculation module is configured to calculate an erasing time length of the page, and the erasing time length control module is configured to perform an erasing operation on the page based on the erasing time length calculated by the erasing time length calculation module. Figure 3 ​As shown, terminal 101 includes a processor 103 coupled to a system bus 105. Processor 103 can be one or more processors, each of which can include one or more processor cores. A video adapter 107 can drive a display 109 coupled to system bus 105. System bus 105 is coupled via a bus bridge 111 to an input / output (I / O) bus. An I / O interface 115 is coupled to the I / O bus. I / O interface 115 communicates with various I / O devices, such as input devices 117 (e.g., touch screen, etc.), a media tray 121 (e.g., compact disc read-only memory (CD-ROM), media interface, etc.), a transceiver 123 (which can send and / or receive wireless radio signals), a camera 155 (which can capture still and moving digital video images), and an external USB port 125. Optionally, the interface to I / O interface 115 can be a USB interface.

[0058] Processor 103 can be any conventional processor, including a reduced instruction set computing (RISC) processor, a complex instruction set computing (CISC) processor, or a combination of both. Alternatively, processor can be a special-purpose device such as an ASIC.

[0059] Terminal 101 can communicate with a software deployment server 149 via a network interface 129. Exemplary network interface 129 is a hardware network interface, such as a network card. Network 127 can be an external network, such as the Internet, or an internal network, such as an Ethernet or virtual private network (VPN). Alternatively, network 127 can be a wireless network, such as a WiFi network, a cellular network, etc.

[0060] A hard drive interface 131 is coupled to system bus 105. A hardware drive interface and a hard drive 133 are coupled to hard drive interface 131. System memory 135 is coupled to system bus 105. Data residing in system memory 135 can include an operating system (OS) 137 for terminal 101, an application 143, and a schedule.

[0061] The operating system includes a shell 139 and a kernel 141. The shell 139 is an interface between a user and the kernel of the operating system. The shell is the outermost layer of the operating system. The shell manages the interaction between the user and the operating system: waits for the user's input, interprets the user's input to the operating system, and processes various outputs of the operating system.

[0062] The kernel 141 consists of those parts of the operating system that manage memory, files, peripherals, and system resources. The kernel 141 directly interacts with the hardware, and the operating system kernel usually runs processes and provides inter-process communication, provides CPU time slice management, interrupts, memory management, and IO management, etc.

[0063] Exemplarily, in the case of the terminal 101 being a smartphone, the application program 143 includes an instant messaging related program. In one embodiment, when the application program 143 needs to be executed, the terminal 101 can download the application program 143 from the software deployment server 149.

[0064] For ease of description, the erasing method of the flash memory provided by the embodiments of the present application will be described in detail below with the terminal as an example.

[0065] Reference can be made to Figure 4 , Figure 4 A flowchart of an erasing method 400 of a flash memory provided by the embodiments of the present application. As shown in Figure 4 , the method 400 includes the following steps 401-403.

[0066] Step 401, obtaining the number of target storage units, the target storage units being storage units storing charges in a target page, the target page being a page to be erased in the flash memory.

[0067] In the embodiment, before performing the erasing operation on the target page in the flash memory, the terminal first obtains the number of storage units storing charges in the target page, so as to determine the erasing duration of the target page according to the number of storage units storing charges. The target page can be any page in the flash memory that needs to perform the erasing operation.

[0068] Specifically, before performing the erasing operation on the target page, the terminal can send an instruction to the flash memory to query the charge storage condition of all storage units in the target page of the flash memory. After obtaining the instruction from the terminal, the flash memory feeds back to the terminal whether each storage unit in the target page stores charges. In this way, the terminal can calculate the number of storage units storing charges in the target page based on the information fed back by the flash memory.

[0069] Exemplarily, the flash memory can be in a form that a storage unit stores an electric charge in a number "0" and does not store an electric charge in a number "1". For example, the flash memory feeds back a piece of data "00111" to the terminal, which indicates that the first two storage units of the five storage units store electric charges and the last three storage units of the five storage units do not store electric charges. The flash memory can also be in other forms to indicate whether the storage unit stores an electric charge, which is not limited in the embodiment.

[0070] Optionally, the flash memory mentioned in the embodiment is a NOR type flash memory or a NAND type flash memory. NOR and NAND are currently two main non-volatile flash memory technologies. In most cases, the NOR type flash memory is used to store codes and the NAND type flash memory is used to store high-density data. The NOR type flash memory is characterized by in-chip execution (XIP, eXecute In Place), so that an application program can run directly in the NOR type flash memory without reading the code into the system memory. The NOR type flash memory has a high reading speed and is cost-effective in a small capacity chip of 1-4 MB, but the low writing and erasing speed greatly affects its performance. Therefore, in an embedded system, the NOR type flash memory is often used to store the running program of the system (such as system firmware) and read-only configuration data to ensure reliable operation of the program.

[0071] In step 402, the erasing time length of the target page is determined according to the number of the target storage units.

[0072] In actual application, the storage capacity of each page in the flash memory is fixed, for example, the storage capacity of the page is 512 bytes or 4 kilobytes (kB). The total number of the storage units in the target page of the flash memory is determined according to the storage capacity of the target page, so the total number of the storage units in the target page is also usually fixed. The embodiment does not limit the total number of the storage units in the target page.

[0073] Exemplarily, in the case that the storage capacity of the target page is 512 bytes (i.e. 4096 bits), the total number of the storage units in the target page is 4096, wherein 1 byte is equal to 8 bits (bit). In the case that the storage capacity of the target page is 4 kB, the total number of the storage units in the target page is 4*1024*8=32,768.

[0074] Generally, in the case that the total number of the storage units in each page of the flash memory is fixed, the default erasing time length of each page is also fixed. Therefore, after the number of the target storage units storing electric charges in the page is determined, the erasing time length of the page can be determined according to the number of the target storage units.

[0075] In this embodiment, the terminal can determine the erasing duration of the target page in multiple ways.

[0076] In a possible implementation, the terminal determines the erasing duration of the target page according to the proportion of the target storage unit in the target page and the default erasing duration of the target page.

[0077] For example, assuming that the number of target storage units is 2048 and the total number of storage units in the target page is 4096, the target ratio is 2048 / 4096=50%. Then, the terminal determines the erasing duration of the target page according to the target ratio and a first duration, where the first duration is a preset erasing duration of the target page (i.e., the default erasing duration of the target page), and the erasing duration of the target page is less than or equal to the first duration. Specifically, the terminal can determine the erasing duration of the target page by multiplying the target ratio and the first duration. For example, assuming that the preset erasing duration of the target page is 27 ms and the target ratio is 50% as described above, the erasing duration of the target page is 27*50%=13.5 ms.

[0078] In another possible implementation, the terminal determines the erasing duration of the target page according to the number of target storage units and the default erasing duration of each storage unit.

[0079] For example, assuming that the number of target storage units is 2048 and the preset erasing duration of each storage unit is 6.59 μs, the erasing duration of the target page is 2048*6.59 μs≈13.5 ms.

[0080] Step 403: performing an erasing operation on the target page according to the erasing duration of the target page.

[0081] After determining the erasing duration of the target page, the terminal can perform an erasing operation on the target page according to the erasing duration of the target page, so that the duration of performing the erasing operation on the target page is the erasing duration of the target page. In fact, the erasing duration of the target page is the duration of discharging the storage units in the target page.

[0082] Exemplarily, after determining the erasing duration of the target page, the terminal sends an erasing start instruction to the flash memory to instruct the flash memory to perform the erasing operation on the target page; after a certain duration, the terminal sends an erasing end instruction to the flash memory to instruct the flash memory to terminate the erasing operation on the target page. The duration between the sending of the erasing start instruction and the erasing end instruction by the terminal is the erasing duration of the target page.

[0083] In this embodiment, the actual erasing duration of a page is determined by obtaining the number of storage cells in the page of the flash memory that store charges. Since in most cases only part of the storage cells in a page store charges, the actual erasing duration of a page is less than the default erasing duration of the page. By this solution, the erasing duration of a page in the flash memory can be effectively reduced, and the erasing efficiency of the page can be improved.

[0084] In this embodiment, in the case of shortening the erasing duration of a page, part of the storage cells in the page can be in a critical state, i.e., the storage cells are unstable. For example, at a previous moment, the value of a storage cell is "1"; at the next moment, the value of the storage cell can change to "0". In this way, when the page stores normal data, the unstable state of the storage cells in the page can cause errors in the data; when the page stores system code, the unstable state of the storage cells in the page can cause errors in the system operation. Therefore, in some cases, on the basis of shortening the erasing duration of a page, it is also necessary to ensure that the storage cells in the page are in a stable state.

[0085] In one possible embodiment, the flash memory has the function of real-time detection of the state of a page, i.e., the flash memory can real-time detect whether the value of a storage cell in the page changes. In this case, when the flash memory detects that the value of a storage cell in the page changes, the flash memory notifies the processor in the terminal, and the processor instructs the flash memory to continue to perform the erasing operation on the page.

[0086] Exemplarily, the terminal obtains a first message sent by the flash memory, and the first message is used to indicate that the storage cells in the target page are in an unstable state. The first message is a message sent by the flash memory to the terminal after detecting that the value of any storage cell in the target page changes. The terminal performs an erasing operation on the target page for a third duration according to the first message. That is, the terminal performs the erasing operation on the target page again according to the first message, and the duration of the erasing operation is the third duration.

[0087] Optionally, the third time length can be determined according to a preset erasing time length of the target page. For example, the third time length is 10% or 20% of the preset erasing time length of the target page. That is, in the case where the preset erasing time length of the target page is 27 ms, the third time length can be 2.7 ms or 5.4 ms.

[0088] Alternatively, the third time length is determined according to the erasing time length of the target page. For example, the time length can be the same as the erasing time length of the target page, or half of the erasing time length of the target page. For example, assuming that the preset erasing time length of the target page is 27 ms, and the calculated erasing time length of the target page is 15 ms, the third time length can be 15 ms or 7.5 ms.

[0089] Alternatively, the third time length is determined according to the erasing time length of the target page and the preset erasing time length of the target page. For example, the third time length is the difference between the preset erasing time length of the target page and the erasing time length of the target page. For example, assuming that the preset erasing time length of the target page is 27 ms, and the calculated erasing time length of the target page is 15 ms, the third time length can be 12 ms.

[0090] By continuing to perform the erasing operation on the target page when the target page is in an unstable state, it can be ensured that the storage units in the target page are in a stable state, and the problem of data errors when the target page is used to store data can be avoided.

[0091] Specifically, reference can be made to Figure 5 , Figure 5 A flowchart of an erasing method 500 of a flash memory provided by the embodiments of the present application is shown in FIG. 5. As shown in FIG. 5, the method 500 includes the following steps 501-506. Figure 5

[0092] Step 501, determining a page to be erased.

[0093] Before the terminal needs to write data into the flash memory, the terminal can determine a page to be erased (i.e., a target page) in the flash memory, so as to perform an erasing operation on the page.

[0094] Step 502, calculating a proportion of storage units storing electric charges in the page to be erased.

[0095] After determining the page to be erased, the terminal calculates the proportion of storage units storing electric charges in the page to be erased based on the information fed back by the flash memory. Specifically, the process of calculating the proportion of storage units storing electric charges in the page to be erased by the terminal can refer to the step 402 described above, and will not be described here. ​

[0096] Step 503, set the erase duration T, and start erasing.

[0097] After determining the proportion of the storage cells storing charges in the page to be erased, the terminal sets the erase duration T corresponding to the page to be erased based on the proportion, and performs the erasing operation on the page to be erased.

[0098] Step 504, determine whether the erased page is in a stable state.

[0099] After performing the erasing operation on the page, the terminal can determine whether the erased page is in a stable state. Specifically, the terminal can determine whether a message indicating that the erased page is unstable is fed back by the flash memory within a preset duration. If the terminal receives the message indicating that the erased page is unstable fed back by the flash memory within the preset duration after performing the erasing operation on the page, the terminal can determine that the erased page is in an unstable state; if the terminal does not receive the message indicating that the erased page is unstable fed back by the flash memory within the preset duration after performing the erasing operation on the page, the terminal can determine that the erased page is in a stable state.

[0100] Step 505, if the erased page is in an unstable state, continue erasing for a duration of ΔT.

[0101] In the case where the erased page is in an unstable state, the terminal continues to perform the erasing operation on the erased page, and the duration for which the erasing operation is continued is ΔT. After the erasing operation on the erased page is completed again, go to step 504, i.e., re-determine whether the erased page is in a stable state, and perform the corresponding steps according to the determination result. That is, in the case where the erased page is in an unstable state all the time, the terminal continues to perform the erasing operation on the erased page for a duration of ΔT for multiple times.

[0102] Step 506, if the erased page is in a stable state, end the erasing.

[0103] In the case where the erased page is in a stable state, the terminal ends the erasing operation on the erased page, i.e., the terminal no longer performs the erasing operation on the erased page.

[0104] The above introduces the erasing method of the flash memory provided by the embodiments of the present application, and the process in which the terminal calculates the number of target storage cells in a target page will be described in detail below.

[0105] Optionally, the terminal acquires the number of target storage units, including: the terminal acquires the number of target storage units in the target page by using a traversal method, a branch method or a Hakmem algorithm. Specifically, before performing an erasing operation on the target page, the terminal can send an instruction to the flash memory to query the charge storage status of all storage units in the target page of the flash memory. After the flash memory acquires the instruction from the terminal, the flash memory feeds back to the terminal whether each storage unit in the target page stores charge. Since the information fed back by the flash memory indicates whether each storage unit stores charge, and whether each storage unit stores charge is represented by the numbers "0" and "1", the terminal needs to calculate the number of storage units that store charge in the entire page based on the information fed back by the flash memory.

[0106] Briefly, in the case that the target page has 4096 storage units, the information fed back by the flash memory to the terminal includes 4096 bits, and each bit is used to represent the charge storage status of a storage unit. When the value of a bit is "0", the bit represents that the storage unit stores charge; when the value of a bit is "1", the bit represents that the storage unit does not store charge. Therefore, the terminal needs to determine the number of bits with a value of "0" among the 4096 bits, so as to determine the number of storage units that store charge.

[0107] wherein the traversal method, the branch method or the Hakmem algorithm can be used to calculate the number of digits with a value of 1 in a binary number. After the terminal calculates the number of digits with a value of 1 in the data fed back by the flash memory by using the traversal method, the branch method or the Hakmem algorithm, the terminal further determines the number of digits with a value of 0, so as to determine the number of storage units that store charge.

[0108] Specifically, the traversal method refers to: for a binary number, the terminal judges the value of each digit in the binary number and accumulates the number of digits with a value of 1. For example, for a binary number "01101", the terminal starts from the right end of the binary number to judge whether the value of each digit in the binary number is 1; if the value of each digit in the binary number is 1, the terminal performs a plus 1 operation, until all the digits in the binary number are judged. In this way, the terminal can calculate that the number of digits with a value of 1 in the binary number "01101" is 3 by using the traversal method.

[0109] The branch method refers to: for a binary number, the terminal divides the binary number into multiple binary numbers, and calculates the number of digits with a value of 1 in each of the multiple binary numbers by using the traversal method; finally, the terminal adds the number of digits with a value of 1 in each of the multiple binary numbers to obtain the final result.

[0110] The traversal method and the branch method are introduced above, and the Hakmem algorithm will be introduced in detail below. In this embodiment, ^ represents exponentiation.

[0111] For a binary number i, the binary number i converted into a decimal number can be expressed as: i = A0*2^0 + A1*2^1 + A2*2^2 +... + Ak*2^k. Therefore, when a binary number is to be found, how many 1s are there, only the 2^m (0 <= m <= k) in the above 2-based polynomial is removed, and the sum of the remaining polynomial coefficients sum = A0 + A1 +... + Ak is the number of 1s required.

[0112] A mathematical property is introduced as follows: for any natural number n, nN is taken modulo n-1, and the result is 1, that is, nN%(n-1) = 1. Specifically, based on mathematical induction, the proof of the mathematical property is as follows:

[0113] If n^(k-1)%(n-1) = 1 is true, then n^k%(n-1) = ((n-1)*n^(k-1) + n^(k-1))%(n-1) = 0 + n^(k-1)%(n-1) = 1 is also true. Because n^(1-1)%(n-1) = 1, n^N%(n-1) = 1 for any non-negative integer N.

[0114] Based on the above mathematical property, for an n-based polynomial P(N) with coefficients {Ai}, P(N)%(n-1) = (sum({Ai}))%(n-1). If sum({Ai}) < (n-1) can be guaranteed, then P(N)%(n-1) = (sum({Ai})). That is, at this time, only the modulus of the polynomial with n-1 can be taken to complete the weight removal and obtain the coefficient sum.

[0115] Therefore, the problem is converted into converting a 2-based polynomial into an n-based polynomial, where n is large enough to make n-1 > sum({Ai}) always true.

[0116] For a 32-bit binary number, Ai = 0 or 1, sum({Ai}) <= 32. n-1 > 32, n needs to be greater than 33. Therefore, take n = 2^6 = 64 > 33 as the base of the new polynomial.

[0117] Finally, each 6-bit of the 32-bit binary number is taken as a unit to obtain a 64-based polynomial:

[0118] i = t0*64^0 + t1*64^1 + t2*64^2 + t3*64^3 +...

[0119] Wherein, the coefficient ti of each term is the value of each 6-bit binary number.

[0120] In this way, by means of operation, the 6-bit number in each unit is changed into the number of "1"s contained in the 6 bits, and then 63 is taken as the modulus, the total number of "1"s can be obtained.

[0121] Specifically, refer to Figure 6 , Figure 6 A schematic diagram of the Hakmem algorithm provided by the embodiment of the present application.

[0122] In Figure 6 , the target data is a 16-bit binary number, and the target data is specifically "1001110101110101". For the 16-bit number in the target data, each 3-bit number can be taken as a group, and a total of 6 groups of numbers are divided. That is, the target data "1001110101110101" can be divided into: 1 / 001 / 110 / 101 / 110 / 101.

[0123] In step 1, the number of numbers with a value of "1" in each group of numbers is calculated, and intermediate data 1 is obtained, that is, 1 / 001 / 010 / 010 / 010 / 010. Each group of numbers in the intermediate data 1 actually represents the number of numbers with a value of "1" in the group of numbers.

[0124] In step 2, the adjacent two groups of numbers in the intermediate data 1 are added to obtain intermediate data 2, that is, 0 / 010 / 000 / 100 / 000 / 100.

[0125] In step 3, the intermediate data 2 is taken as the modulus of 63 to obtain the calculation result: 0000000000001010 (i.e. 10). The calculation result is the total number of numbers with a value of "1" in the target data.

[0126] It is worth noting that in the Hakmem algorithm, the modulus operation is a relatively time-consuming operation. Especially for some embedded systems, the processor used by these embedded systems does not have hardware instruction support, and the modulus operation will be more time-consuming. Generally, the size of a page in a flash memory is 512 bytes or 4 KB, so when the Hakmem algorithm is used to calculate the number of "1"s in the page, 256 or 2048 target data are often divided, and therefore 256 or 2048 modulus operations are required, resulting in low calculation efficiency.

[0127] Based on this, the embodiment of the application improves the Hakmem algorithm on the basis of the Hakmem algorithm to obtain the Hakmem+ algorithm to improve the calculation efficiency. Specifically, the embodiment of the application combines the remainder operations of the plurality of target data based on the Hakmem+ algorithm, thereby reducing the number of remainders in the calculation process of the number of "1"s in the entire FLASH page and improving the operation efficiency.

[0128] Exemplarily, the terminal obtains the number of target storage units, including: the terminal divides the storage units in the target page into k storage unit sets, each storage unit set including m storage units, and every n storage units in the m storage units being a group. Then, the terminal obtains the number of storage units without electric charge (i.e. the number with a value of 1) in each group of storage units in the k storage unit sets. Next, the terminal determines the sum of the number of storage units without electric charge in the storage units of the same group in the k storage unit sets to obtain the sum of the numbers of multiple groups. The terminal then adds the sum of the numbers of two adjacent groups to obtain the sum of the numbers of new multiple groups. Finally, based on the n, the terminal performs a remainder operation on the sum of the numbers of new multiple groups with respect to 2 2n -1 to obtain the number of target storage units.

[0129] In this embodiment, the plurality of storage unit sets are combined to save the number of remainder operations performed on the target data, thereby improving the calculation efficiency.

[0130] For ease of understanding, the Hakmem+ algorithm provided by the embodiment of the application will be described in detail below with reference to the accompanying drawings. Specifically, reference can be made to Figure 7 , Figure 7 a schematic diagram of a Hakmem+ algorithm provided by the embodiment of the application.

[0131] As shown in Figure 7 , the storage units in the target page are divided into k storage unit sets, and each storage unit set can be represented by a target data. Therefore, the k storage unit sets correspond to k target data. Each target data includes m binary numbers, and every n binary numbers in the m binary numbers is a group of numbers, and there are x groups of numbers in total.

[0132] In step 1, for the k target data, the number of numbers with a value of "1" in each group of numbers in each target data is calculated to obtain k intermediate data 1. The first intermediate data 1 can be represented as: Cnt1_1 / Cnt2_1 / Cnt3_1 / …Cntx_1. The kth intermediate data 1 can be represented as: Cnt1_k / Cnt2_k / Cnt3_k / …Cntx_k. Each group of numbers in the plurality of intermediate data 1 actually represents the number of numbers with a value of "1" in the group of numbers.

[0133] In step 2, the numbers in the same group in the k intermediate data 1 are added to obtain intermediate data 2. The intermediate data 2 can be expressed as: Cnt1 / Cnt2 / Cnt3 / …Cntx. Wherein, Cnt1=Cnt1_1+Cnt1_2+Cnt1_3…+Cnt1_k; Cnt2=Cnt2_1+Cnt2_2+Cnt2_3…+Cnt2_k; Cntx=Cntx_1+Cntx2_2+Cntx_3…+Cntx_k.

[0134] In step 3, the two adjacent groups of numbers in the intermediate data 2 are added to obtain intermediate data 3. The intermediate data 3 can be expressed as: Tmp_1 / Tmp_2..Tmp_y. Wherein, Tmp_y=Cntx+Cntx-1.

[0135] In step 4, the intermediate data 3 is taken modulo 63 to obtain the target value. The target value is the total number of k target data whose value is "1".

[0136] In addition, in order to ensure that the target value corresponding to the k target data can be calculated, the values of k, m and n need to be constrained.

[0137] Specifically, when m can be divided by n, the values of k, m and n need to satisfy constraint condition 1 and constraint condition 2.

[0138] Constraint 1: k*n≤2^n-1, that is, the number of values "1" in the k n-bit data is not more than the maximum value that can be expressed by n bits.

[0139] Constraint 2: k*m≤2^2n-1.

[0140] When m cannot be divided by n, the values of k, m and n need to satisfy constraint condition 3 and constraint condition 4.

[0141] Constraint 3: k*(m%n)≤2^((m%n))-1, that is, the number of values "1" in the k m%n-bit data is not more than the maximum value that can be expressed by m%n bits. Wherein, % represents the modulo operation.

[0142] Constraint 4: k*m≤2^2n-1.

[0143] Exemplarily, refer to Table 2 for some combinations of the values of k, m and n.

[0144] Table 2

[0145] Number of data bits m Number of bits per group n Data parallelism k Combination example 1 32 4 2 Combination example 2 32 4 3 Combination example 3 32 7 2 Combination example 4 32 7 3

[0146] To facilitate understanding of the effect of the flash memory erasing method provided by the embodiments of the present application on improving page erasing efficiency, the time consumed by the flash memory erasing method provided by the embodiments of the present application will be illustrated below.

[0147] Specifically, it is assumed that the storage capacity of a page in the flash memory is 512 bytes, and the firmware of the entire system needs to occupy 39 pages. The method for calculating the number of storage units without electric charges in the page is the Hakmem+ algorithm. Table 3 is the time consumption for erasing a page.

[0148] Table 3

[0149]

[0150] As can be seen from Table 3, for the two pages in which the proportion of storage units with electric charges in the entire page (hereinafter referred to as the proportion) is in the interval [0, 10), the actual erasing time of the two pages is 2.7 ms, the calculation time consumption is 1.35 ms, the data verification time consumption is 0.25 ms, and the total time consumption is 2.7+1.35+0.25=4.3 ms. Compared with the default erasing time of 27 ms, both of the two pages save 22.7 ms. The data verification time consumption refers to the time required for verifying whether the page is stable after erasing the page.

[0151] For the 34 pages in which the proportion is in the interval [30, 40), the actual erasing time of the 34 pages is 10.8 ms, the calculation time consumption is 1.35 ms, the data verification time consumption is 0.25 ms, and the total time consumption is 10.8+1.35+0.25=12.4 ms. Compared with the default erasing time of 27 ms, the 34 pages save 14.6 ms.

[0152] Specifically, for the 39 pages, the total firmware update time consumption when erasing based on the default erasing time is: 1411 ms=1053 ms+355 ms+3 ms. Among them, 1053 ms is the erasing time of the page in the flash memory, 355 ms is the time for writing data in the page in the flash memory, and 3 ms is the code execution time consumption of the related runtime system.

[0153] For the 39 pages, the total firmware update time consumption when erasing based on the method provided by the embodiments of the present application is: 830 ms=472 ms+355 ms+3 ms. Among them, 472 ms is the shortened erasing time of the page in the flash memory (including calculation time consumption and data verification time consumption), 355 ms is the time for writing data in the page in the flash memory, and 3 ms is the code execution time consumption of the related runtime system.

[0154] Comparing 1411 ms and 830 ms, it can be seen that after adopting the method provided by the embodiments of the present application, the firmware update time is saved by about 41% compared with the original.

[0155] In Figures 1 to 7 To better implement the above scheme of the embodiments of the present application, the related device for implementing the above scheme is also provided below based on the corresponding embodiments.

[0156] For details, please refer to Figure 8 , Figure 8 A structural schematic diagram of an erasing device 800 of a flash memory provided by the embodiments of the present application is shown in the figure, which comprises an obtaining unit 801 and a processing unit 802. The obtaining unit 801 is configured to obtain the number of target storage units, the target storage units being storage units in a target page that store charges, and the target page being a page in the flash memory to be erased. The processing unit 802 is configured to determine the erasing duration of the target page according to the number of the target storage units. The processing unit 802 is further configured to perform an erasing operation on the target page according to the erasing duration of the target page.

[0157] In a possible implementation, the processing unit 802 is further configured to obtain a target ratio according to the number of the target storage units, the target ratio being the ratio of the number of the target storage units to the total number of storage units in the target page. The processing unit 802 is further configured to determine the erasing duration of the target page according to the target ratio and a first duration, the first duration being a preset erasing duration of the target page, and the erasing duration of the target page being less than or equal to the first duration.

[0158] In a possible implementation, the processing unit 802 is further configured to determine the erasing duration of the target page according to the number of the target storage units and a second duration, the second duration being a preset erasing duration of a single storage unit.

[0159] In a possible implementation, the obtaining unit 801 is further configured to obtain a first message, the first message being used to indicate that the storage units in the target page are in an unstable state. The processing unit 802 is further configured to perform an erasing operation on the target page for a third duration according to the first message.

[0160] In a possible implementation, the third duration is determined according to a preset erasing duration of the target page, or the third duration is determined according to the erasing duration of the target page.

[0161] In a possible implementation, the obtaining unit 801 is further configured to divide the storage units in the target page into k storage unit sets, each of which includes m storage units, and each n storage units in the m storage units form a group; obtain the number of storage units without electric charges in each group of storage units in the k storage unit sets; determine the sum of the number of storage units without electric charges in the storage units of the same group in the k storage unit sets, to obtain a plurality of group number sums; and perform a remainder operation on the plurality of group number sums based on the n, to obtain the number of the target storage units.

[0162] In a possible implementation, the obtaining unit 801 is further configured to obtain the number of the target storage units in the target page by using a traversal method, a branch method, or a Hakmem algorithm.

[0163] In a possible implementation, the flash memory is a NOR type flash memory or a NAND type flash memory.

[0164] The data storage method provided by the embodiments of the present application can be executed by a terminal or a chip in a flash memory. The chip includes a processing unit, for example, a processor, and a communication unit, for example, an input / output interface, a pin, or a circuit. The processing unit can execute computer execution instructions stored in a storage unit, so that the terminal or the chip in the flash memory executes the above-mentioned Figures 1 to 7 The embodiments shown in the drawings describe the erasing method of the flash memory. Optionally, the storage unit is a storage unit in a chip, such as a register or a cache. The storage unit can also be a storage unit outside the chip in a wireless access device, such as a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM), and the like.

[0165] Referring to Figure 9 The present application also provides a computer program product. In some embodiments, the above-mentioned Figure 4 The disclosed method can be implemented as computer program instructions coded in a machine-readable format on a computer-readable storage medium or on other non-transitory media or articles of manufacture.

[0166] Figure 9 A conceptual partial view of an example computer program product arranged in accordance with at least some of the embodiments presented herein is schematically shown, the example computer program product including a computer program for executing a computer process on a computing device.

[0167] In one embodiment, the computer program product 900 is provided using a signal bearing medium 901. The signal bearing medium 901 can include one or more program instructions 902, which when executed by one or more processors can provide the functionality or some portion thereof described above with respect to Figure 2 the embodiments illustrated in FIG. 6. Thus, for example, one or more features of steps 301-306 can be undertaken by one or more instructions associated with the signal bearing medium 901. Further, the program instructions 902 in the signal bearing medium 901 also describe example instructions. Figure 3 Figure 9

[0168] In some examples, the signal bearing medium 901 can comprise a computer- readable medium 903, such as, but not limited to, a hard disk drive, a compact disk (CD), a digital video disk (DVD), a memory, a ROM, a RAM, or the like.

[0169] In some embodiments, the signal bearing medium 901 can comprise a computer- recordable medium 904, such as, but not limited to, a memory, a read / write (R / W) CD, a R / W DVD, and the like. In some embodiments, the signal bearing medium 901 can comprise a communications medium 905, such as, but not limited to, a digital and / or an analog communication medium (e.g., a fiber optic cable, a waveguide, a wired communication link, a wireless communication link, and the like). Thus, for example, the signal bearing medium 901 can be conveyed by a wireless form of the communication medium 905 (e.g., a wireless communication medium complying with the IEEE 802.9 standard or other transmission protocol).

[0170] The one or more program instructions 902 can be, for example, computer- executable instructions or logic-implemented instructions. In some examples, a computing device of a computing device can be configured to provide various operations, functions, or actions in response to the program instructions 902 conveyed to the computing device by one or more of the computer-readable medium 903, the computer-recordable medium 904, and / or the communication medium 905.

[0171] It should be understood that the arrangements described herein are for exemplary purposes only. As such, those skilled in the art will appreciate that other arrangements and other elements (e.g., machines, interfaces, functions, orders, and the like) can be used instead, and some elements can also be omitted altogether according to the desired results. Additionally, many of the described elements can be implemented as functional entities that can be realized as discrete or distributed components, or in conjunction with other components in any suitable combinations and locations.

[0172] ​​Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

[0173] In several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interfaces, devices or units, and can be electrical, mechanical or other forms.

[0174] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed on a plurality of network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0175] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0176] When the integrated unit is realized in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk, and various program code storage media.

Claims

1. An erasing method of a flash memory, characterized by, The method comprises: obtaining the number of target storage units, the target storage units being storage units in a target page that store charges, the target page being a page to be erased in a flash memory; determining the erasing duration of the target page according to the number of target storage units; performing an erasing operation on the target page according to the erasing duration of the target page; the determination of the erasing duration of the target page according to the number of target storage units comprises: obtaining a target ratio according to the number of target storage units, and determining the erasing duration of the target page according to the target ratio and a first duration, the target ratio being the ratio of the number of target storage units to the total number of storage units in the target page, the first duration being a preset erasing duration of the target page, the erasing duration of the target page being less than or equal to the first duration; or, determining the erasing duration of the target page according to the number of target storage units and a second duration, the second duration being a preset erasing duration of a single storage unit.

2. The method of claim 1, wherein, The method further comprises: obtaining a first message, the first message being used to indicate that the storage units in the target page are in an unstable state; performing an erasing operation on the target page for a third duration according to the first message.

3. The method of claim 2, wherein, The third duration is determined according to a preset erasing duration of the target page; or, the third duration is determined according to the erasing duration of the target page.

4. The method of claim 1, wherein, The obtaining of the number of target storage units comprises: dividing the storage units in the target page into k storage unit sets, each storage unit set comprising m storage units, and every n storage units in the m storage units being a group; obtaining the number of storage units without charges in each group of storage units in the k storage unit sets; determining the sum of the number of storage units without charges in the same group of storage units in the k storage unit sets, to obtain a sum of numbers of groups; performing a remainder operation on the sum of numbers of groups based on the n, to obtain the number of target storage units.

5. The method of claim 1, wherein, The obtaining of the number of target storage units comprises: obtaining the number of target storage units in the target page by using a traversal method, a branch method or a Hakmem algorithm.

6. The method of claim 1, wherein, The flash memory is a NOR-type flash memory or a NAND-type flash memory.

7. A terminal, characterized by comprising: The terminal comprises a memory and a processor; the memory stores a code, and the processor is configured to execute the code, when the code is executed, the terminal executes the method according to any one of claims 1 to 6.

8. A flash memory, comprising: The controller is used to execute the method according to any one of claims 1 to 6, to perform an erasing operation on the target page in the memory.

9. A computer-readable storage medium, characterized in that, The computer readable instructions, when running on a computer, make the computer execute the method according to any one of claims 1 to 6.

10. A computer program product, characterised in that, The computer readable instructions, when running on a computer, make the computer execute the method according to any one of claims 1 to 6.

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