A method and apparatus for calculating a quantum computing task and a quantum computer operating system

Abstract

The present invention discloses a method, apparatus and quantum computer operating system for quantum computing tasks, belonging to the field of quantum computing. The method includes obtaining the current topology of a quantum chip; obtaining multiple quantum computing tasks in a task queue and determining the priority and qubit requirements of each of the quantum computing tasks; determining each of the quantum computing tasks supported by the current topology as a scheduling task according to the priority and qubit requirements of each of the quantum computing tasks; processing the quantum circuit corresponding to each of the scheduling tasks to obtain an executable quantum circuit; performing quantum computing on the executable quantum circuit based on the quantum chip of the current topology, and determining the calculation results corresponding to each of the scheduling tasks according to the execution results, realizing synchronous parallel computing of multiple quantum computing tasks, thereby maximizing the utilization of the computing resources of the quantum chip and improving the quantum computing efficiency.

Description

Technical Field

[0001] This application belongs to the field of quantum computing, and particularly relates to a method and device for calculating quantum computing tasks and a quantum computer operating system. Background Art

[0002] A quantum computer is a physical device that performs high-speed mathematical and logical operations, stores, and processes quantum information in accordance with the laws of quantum mechanics. When a device processes and calculates quantum information and runs quantum algorithms, it is a quantum computer. Because a quantum computer has the ability to process mathematical problems more efficiently than ordinary computers, for example, it can accelerate the time to crack RSA keys from hundreds of years to a few hours, it has become a key technology under research.

[0003] When executing calculations for current quantum computing tasks, only the waiting time of the quantum computing tasks submitted by users and the release time of completely idle quantum chips are considered, and the quantum computing tasks in the task queue are scheduled one by one in the form of first-come, first-served to the quantum chips to perform quantum computing. This method has low computing efficiency, wastes the computing resources of quantum chips, and also affects the quantum computing efficiency. Summary of the Invention

[0004] The purpose of the present invention is to provide a method and device for calculating quantum computing tasks, a storage medium, and an electronic device, as well as a quantum computer operating system and a quantum computer.

[0005] The method for calculating quantum computing tasks provided by one aspect of the present invention includes:

[0006] Obtain the current topological structure of the quantum chip;

[0007] Obtain multiple quantum computing tasks in the task queue, and determine the priority and bit requirements of each quantum computing task;

[0008] According to the priority and bit requirements of each quantum computing task, determine each quantum computing task supported by the current topological structure as a scheduling task;

[0009] Process the quantum circuit corresponding to each scheduling task to obtain an executable quantum circuit;

[0010] Based on the quantum chip with the current topological structure, perform quantum computing on the executable quantum circuit, and determine the calculation results corresponding to each scheduling task according to the execution results.

[0011] For the method as described above, the step of determining the priority of each quantum computing task includes:

[0012] Obtain the type of each quantum computing task;

[0013] If all the types are unspecified bit types, the priorities of the quantum computing tasks are determined according to the principle of highest response ratio first.

[0014] For the method as described above, the step of determining the priorities of the quantum computing tasks further includes:

[0015] If all the types are specified bit types, the priorities of the quantum computing tasks are determined according to the first-come-first-served principle.

[0016] For the method as described above, the step of determining the priorities of the quantum computing tasks further includes:

[0017] If the types include specified bit types and unspecified bit types, the priorities of the quantum computing tasks corresponding to the specified bit types are higher than those corresponding to the unspecified bit types.

[0018] For the method as described above, the step of determining the quantum computing tasks supported by the current topology as scheduling tasks according to the priorities and bit requirements of the quantum computing tasks includes:

[0019] Obtain the quantum computing task with the highest priority in the task queue;

[0020] According to the bit requirements of the currently obtained quantum computing task, determine whether the current topology meets the corresponding bit requirements and the remaining physical bits in the current topology;

[0021] If so, determine the currently obtained quantum computing task as a scheduling task and update the current topology using the remaining physical bits; if not, do not determine the currently obtained quantum computing task as a scheduling task;

[0022] Obtain the quantum computing task with the next highest priority in the task queue and return to the step of determining whether the current topology meets the corresponding bit requirements and the remaining bits in the current topology according to the bit requirements of the currently obtained quantum computing task.

[0023] For the method as described above, the step of processing the quantum circuits corresponding to the scheduling tasks to obtain an executable quantum circuit includes:

[0024] Merge the quantum circuits corresponding to the scheduling tasks to obtain an executable quantum circuit.

[0025] For the method as described above, the step of merging the quantum circuits corresponding to the scheduling tasks to obtain an executable quantum circuit includes:

[0026] Determine the mapped bits corresponding to the qubits included in each of the quantum circuits in the current topology according to the quantum circuits corresponding to the respective scheduling tasks;

[0027] Update the qubits in each of the quantum circuits using the mapped bits to obtain corresponding updated quantum circuits;

[0028] Integrate the respective updated quantum circuits according to the execution timing of the quantum logic gates to obtain the executable quantum circuit.

[0029] For the method as described above, the step of performing quantum computing on the executable quantum circuit includes:

[0030] Compile the executable quantum circuit to obtain corresponding waveform instructions;

[0031] Send the signals corresponding to the waveform instructions to the quantum chip of the current topology to implement quantum computing.

[0032] For the method as described above, the step of determining the calculation results respectively corresponding to the respective scheduling tasks according to the execution results includes:

[0033] Obtain the quantum state representing the execution result;

[0034] Determine the sub - quantum states corresponding to the mapped bits corresponding to the respective scheduling tasks in the quantum state;

[0035] Take the probabilities corresponding to the respective sub - quantum states as the calculation results corresponding to the respective scheduling tasks.

[0036] For the method as described above, the step of obtaining the quantum state representing the execution result includes:

[0037] Determine the eigenstates of all the mapped bits corresponding to each of the quantum circuits;

[0038] Obtain the measurement probabilities corresponding to the respective eigenstates.

[0039] The quantum computing task calculation device provided in the second aspect of the present invention includes:

[0040] A first acquisition module, configured to acquire the current topology of the quantum chip;

[0041] A second acquisition module, configured to acquire multiple quantum computing tasks in the task queue, and determine the priorities and qubit requirements of the respective quantum computing tasks

[0042] A task determination module, configured to determine the respective quantum computing tasks supported by the current topology as scheduling tasks according to the priorities and qubit requirements of the respective quantum computing tasks;

[0043] A circuit processing module, configured to process the quantum circuits corresponding to the scheduling tasks to obtain an executable quantum circuit;

[0044] An execution calculation module, configured to perform quantum calculation on the executable quantum circuit based on the quantum chip with the current topology, and determine the calculation results corresponding to the scheduling tasks according to the execution results.

[0045] The storage medium provided in the third aspect of the present invention stores a computer program, wherein the computer program is set to execute the method when running.

[0046] The electronic device provided in the fourth aspect of the present invention includes a memory and a processor. The memory stores a computer program, and the processor is set to run the computer program to execute the method.

[0047] The quantum computer operating system provided in the fifth aspect of the present invention implements quantum computing task calculation according to the method.

[0048] The quantum computer provided in the sixth aspect of the present invention includes the quantum computer operating system.

[0049] Compared with the prior art, the present invention obtains the current topology of the quantum chip, obtains multiple quantum computing tasks in the task queue, and determines the priority and qubit requirements of each quantum computing task; then, according to the priority and qubit requirements of each quantum computing task, determines the quantum computing tasks supported by the current topology as scheduling tasks; then processes the quantum circuits corresponding to the scheduling tasks to obtain an executable quantum circuit; finally, performs quantum calculation on the executable quantum circuit based on the quantum chip with the current topology, and determines the calculation results corresponding to the scheduling tasks according to the execution results, which helps to implement synchronous parallel calculation of multiple quantum computing tasks on the current topology. It should be emphasized that the present invention determines the optimal combination method of the quantum computing tasks scheduled this time based on the current topology of the quantum chip according to the priority and qubit requirements of each quantum computing task in the task queue, so as to make full use of the computing resources of the current topology, and when the qubit requirements corresponding to multiple quantum computing tasks are different, realize parallel calculation of multiple quantum computing tasks on the same quantum chip, thereby maximizing the use of the computing resources of the quantum chip and improving the quantum computing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 It is a hardware structure block diagram of a computer terminal for a quantum computing task calculation method provided by an embodiment of the present invention;

[0051] Figure 2 Schematic diagram of graphical display of the 1# quantum circuit provided in the embodiment of the present invention;

[0052] Figure 3 Schematic flow chart of a quantum computing task calculation method provided in the embodiment of the present invention;

[0053] Figure 4 Schematic structural diagram of a quantum computing task calculation device provided in the embodiment of the present invention. Detailed implementation manners

[0054] The embodiments described below by referring to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0055] The embodiment of the present invention first provides a quantum computing task calculation method, which can be applied to an electronic device, such as a computer terminal, specifically, such as an ordinary computer, a quantum computer, etc.

[0056] The following takes running on a computer terminal as an example to describe it in detail.

[0057] Figure 1 Hardware structure block diagram of a computer terminal for a quantum computing task calculation method provided in the embodiment of the present invention.

[0058] See Figure 1 As shown, the computer terminal may include one or more ( Figure 1 only one is shown in Figure 1 a processor 102 (the processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data. Optionally, the above computer terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those of ordinary skill in the art can understand that Figure 1 the structure shown in Figure 1 is only schematic and does not limit the structure of the above computer terminal. For example, the computer terminal may further include more or fewer components than those shown in

[0059] The memory 104 can be used to store software programs and modules of application software, such as program instructions / modules corresponding to the quantum computing task calculation method in the embodiments of the present application. The processor 102 executes various functional applications and data processing by running the software programs and modules stored in the memory 104, that is, to implement the above-mentioned method. The memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memories. In some instances, the memory 104 may further include a memory remotely disposed relative to the processor 102, and these remote memories can be connected to the computer terminal 10 through a network. Examples of the above-mentioned network include but are not limited to the Internet, enterprise intranet, local area network, mobile communication network, and their combinations.

[0060] The transmission device 106 is used to receive or send data via a network. Specific examples of the above-mentioned network may include a wireless network provided by a communication provider of the computer terminal 10. In one instance, the transmission device 106 includes a network adapter (Network Interface Controller, NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one instance, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0061] It should be noted that the quantum program referred to in the embodiments of the present invention is a program written in a classical language to represent quantum bits and their evolution, and quantum bits, quantum logic gates, etc. related to quantum computing all have corresponding classical code representations.

[0062] As an embodiment of a quantum program, a quantum circuit, also known as a quantum logic circuit, is the most commonly used general quantum computing model, representing a circuit for operating on quantum bits under an abstract concept. Its composition includes quantum bits, a circuit (timeline), and various quantum logic gates. Finally, the result often needs to be read out through a quantum measurement operation. The display mode of a quantum circuit can be a sequence of quantum logic gates arranged in a certain execution time sequence.

[0063] Specifically, for example, a quantum program:

[0064] QCircuit cir;

[0065] cir << H(q[0]) << H(q[1]) << H(q[2]) << H(q[3]) << RZ(q[0], PI / 2) << RY(q[1], PI / 4) << RZ(q[2], PI / 4) << CNOT(q[0], q[1]) << CR(q[1], q[2], PI / 3) << CNOT(q[2], q[3]) << CNOT(q[0], q[3]).

[0066] The corresponding quantum circuit (denoted as Quantum Circuit 1#) can be expressed as:

[0067] q[0]: H(q[0]), RZ(q[0], PI / 2)

[0068] q[1]: H(q[1]), RY(q[1], PI / 4), CNOT(q[0], q[1])

[0069] q[2]: H(q[2]), RZ(q[2], -PI / 4), CR(q[1], q[2], PI / 3)

[0070] q[3]: H(q[3]), CNOT(q[2], q[3]), CNOT(q[0], q[3])

[0071] Among them, q[0], q[1], q[2], and q[3] refer to the quantum bits with bit positions from 0 to 3, and can usually also be denoted as q0, q1, q2, and q3.

[0072] A more vivid way of presentation, the quantum circuit diagram corresponding to the above quantum logic gate sequence is shown in Figure 2 as follows.

[0073] Different from traditional circuits that are connected by metal wires to transmit voltage signals or current signals, in a quantum circuit, the circuit can be regarded as being connected by time, that is, the state of the quantum bit evolves naturally over time and is operated according to the instructions of the Hamiltonian operator until it encounters a quantum logic gate.

[0074] A quantum program as a whole corresponds to a total quantum circuit. The quantum program described in the present invention refers to this total quantum circuit. Among them, the total number of quantum bits in the total quantum circuit is the same as the total number of quantum bits in the quantum program. It can be understood that a quantum program can be composed of a quantum circuit, measurement operations on the quantum bits in the quantum circuit, registers for storing measurement results, and control flow nodes (jump instructions). A quantum circuit can contain dozens, hundreds, or even thousands of quantum logic gate operations. The execution process of a quantum program is a process of executing all quantum logic gates in a certain time sequence. It should be noted that the time sequence is the time order in which individual quantum logic gates are executed.

[0075] It should be noted that in classical computing, the most basic unit is the bit, and the most basic control mode is the logic gate. The purpose of controlling a circuit can be achieved through the combination of logic gates. Similarly, the way to process qubits is the quantum logic gate. Using quantum logic gates can evolve quantum states. Quantum logic gates are the basis for constructing quantum circuits. Quantum logic gates include single-bit quantum logic gates (or single-qubit logic gates, simply referred to as "single gates"), such as the Hadamard gate (H gate, Hadamard gate), Pauli-X gate (X gate), Pauli-Y gate (Y gate), Pauli-Z gate (Z gate), RX gate, RY gate, RZ gate, etc.; two-bit quantum logic gates (or two-qubit logic gates, simply referred to as "double gates"), such as the CNOT gate, CR gate, SWAP gate, iSWAP gate, etc.; multi-bit quantum logic gates (or multi-qubit logic gates, simply referred to as "multi gates"), such as the Toffoli gate, etc. Quantum logic gates are generally represented by unitary matrices, and unitary matrices are not only in matrix form but also a kind of operation and transformation. Generally, the action of a quantum logic gate on a quantum state is calculated by multiplying the unitary matrix on the left by the matrix corresponding to the quantum state right vector.

[0076] For example, the matrix corresponding to the quantum state right vector |0> is The matrix corresponding to the quantum state right vector |1> is

[0077] The quantum state, that is, the logical state of the qubit. In a quantum algorithm (or quantum program), for the quantum states of a group of qubits contained in a quantum circuit, a binary representation method is adopted. For example, a group of qubits is q0, q1, q2, representing the 0th, 1st, and 2nd qubits. In the binary representation method, the sorting from high to low is q2q1q0. The total number of quantum states corresponding to this group of qubits is 2 to the power of the total number of qubits, that is, 8 eigenstates (definite states): |000>, |001>, |010>, |011>, |100>, |101>, |110>, |111>. The bits of each quantum state correspond to the qubits consistently. For example, for the |001> state, 001 corresponds to q2q1q0 from high to low, and |> is the Dirac symbol. For a quantum circuit containing N qubits q0, q1, …, q n 、…、q N-1 The bit-order sorting of the binary representation of the quantum state for the quantum circuit of、…、q N-1 q N-2 …、q1q0.

[0078] Taking a single qubit as an example, the logical state ψ of a single qubit may be in the |0> state, the |1> state, or a superposition state (uncertain state) of the |0> state and the |1> state, which can be specifically expressed as ψ = a|0> + b|1>, where a and b are complex numbers representing the amplitudes (probability amplitudes) of the quantum states, and the square of the amplitude represents the probability. a 2 , b 2 respectively represent the probabilities that the logical state is in the |0> state and the |1> state, and a 2 + b 2 = 1. In short, a quantum state is a superposition state composed of eigenstates. When the probabilities of other states are 0, it is in a uniquely determined eigenstate.

[0079] A quantum chip is a processor that performs quantum computing in a quantum computer. The qubit structure included in the quantum chip is the processing unit of the processor. Due to the constraints of quantum chip hardware manufacturing technology, the increase and utilization of the number of qubit structures included in the quantum chip are one of the factors restricting the computing power of quantum computing. Therefore, it is necessary to reasonably and fully call the qubits on the quantum chip in quantum computing task scheduling.

[0080] It should be noted that in the process of quantum computing, the physical signal sent to the quantum chip is used to drive the qubits to work and thus achieve quantum computing. The physical hardware device used to generate this physical signal needs to match the qubits included in the quantum chip. The quantum chip and this physical hardware device can only be controlled and driven once at any moment. Currently, in the process of computing quantum computing tasks, usually taking any quantum computing task as a unit, the above physical hardware device is scheduled in sequence to implement the computing of this quantum computing task. That is, when a quantum computing task is performing computing, only the waiting time of the quantum computing task submitted by the user and the release time of the completely idle quantum chip (that is, the time waiting for the occupied qubits on the quantum chip to be completely released) are considered, and the quantum computing tasks in the task queue are scheduled one by one in the form of first-come, first-served to the quantum chip to perform quantum computing. This method wastes the computing resources of the quantum chip and also reduces the quantum computing efficiency.

[0081] The following further introduces a quantum computing task computing method provided by an embodiment of the present invention in conjunction with the accompanying drawings.

[0082] For the convenience of distinction, in the following introduction, the objects of operations such as quantum logic gates in quantum programs and quantum circuits are called qubits, and the qubit structures in the quantum chip are called physical qubits.

[0083] Figure 3 It is a schematic flowchart of a quantum computing task computing method provided by an embodiment of the present invention.

[0084] See Figure 3, an embodiment of the present invention provides a method for calculating a quantum computing task, including steps S100 to S500, where:

[0085] S100. Obtain the current topological structure of the quantum chip.

[0086] The topological structure of the quantum chip reflects the spatial characteristics of the physical qubits on the quantum chip. The spatial characteristics include the number, positions of the physical qubits included in the quantum chip, and the connection relationships between the physical qubits, which determine the available situation of the quantum chip.

[0087] The current topological structure of the quantum chip contains information about the currently available physical qubits on the quantum chip, specifically including the number of currently available physical qubits, their positions and connection relationships. This information can be determined according to the usage situation of the physical qubits on the quantum chip. The usage situation of the physical qubits on the quantum chip, by way of example, includes: the occupied situation of the physical qubits, the situation of whether they can be used determined by the fidelity of the physical qubits, etc.

[0088] S200. Obtain multiple quantum computing tasks in the task queue and determine the priorities and qubit requirements of each of the quantum computing tasks.

[0089] In the field of quantum computing, quantum computing tasks are usually represented by quantum circuits. The qubits included in the quantum circuit corresponding to a quantum computing task are the qubit requirements of the quantum computing task, which represent the physical qubits required for the quantum chip to execute the quantum computing task. And the priority of a quantum computing task is the order in which each quantum computing task in the task queue is executed for calculation.

[0090] Generally, after the quantum computing operating system receives multiple quantum computing tasks submitted by a user, it places them in the task queue and waits for scheduling to execute quantum computing. Limited by physical factors such as the fact that the state of physical qubits cannot be copied and the coherence time of physical qubits is relatively short, switching operations cannot be performed between multiple quantum computing tasks. Therefore, it is necessary to execute each quantum computing task in a certain order, that is, execute them in sequence according to the priority levels of the quantum computing tasks.

[0091] Considering that when the quantum circuit corresponding to a quantum computing task is executed on the quantum chip, the following situations are included: specifying specific physical qubits on the quantum chip to execute the corresponding quantum circuit, and not specifying the physical qubits on the quantum chip but having the system allocate physical qubits according to the usage situation of the physical qubits on the chip to execute the corresponding quantum circuit. Based on this, the step of determining the priorities of each of the quantum computing tasks in step S200 may include the following several situations.

[0092] In some embodiments of the present invention, the step of determining the priorities of each of the quantum computing tasks in step S200 includes step S201 and step S202:

[0093] S201. Obtain the types of each of the quantum computing tasks, where the types include at least one of the unspecified bit type and the specified bit type; S202. If all the types are of the unspecified bit type, determine the priorities of each of the quantum computing tasks according to the principle of highest response ratio first.

[0094] It should be noted that the principle of highest response ratio first is the principle of determining the task priority order according to the highest response ratio first scheduling algorithm (HRRN). The priority of the quantum computing tasks in the task queue will increase as the waiting time increases, where:

[0095]

[0096] In some other embodiments of the present invention, in the step of determining the priorities of each of the quantum computing tasks in step S200, in addition to steps S201 and S202, it further includes step S203:

[0097] S203. If all the types are of the specified bit type, determine the priorities of each of the quantum computing tasks according to the first-come-first-served principle.

[0098] It should be noted that the first-come-first-served principle is the principle of determining the task priority order according to the first-come-first-served scheduling algorithm (FCFS). In order to avoid the bits specified by the quantum circuits corresponding to the quantum computing tasks from crossing and affecting each other, the priorities of the quantum computing tasks are determined according to the order of submission to the task queue, which can avoid the mutual influence between the executions of the quantum computing tasks.

[0099] Since there may be a situation where some of the multiple quantum computing tasks submitted by the user to the task queue are of the specified bit type and the other part is of the unspecified bit type, in order to clarify the relative priorities between these two parts, in some other embodiments of the present invention, in the step of determining the priorities of each of the quantum computing tasks in step S200, in addition to steps S201, S202 and S203, it further includes step S204:

[0100] S204. If the types include the specified bit type and the unspecified bit type, the priority of the quantum computing task corresponding to the specified bit type is higher than that of the quantum computing task corresponding to the unspecified bit type.

[0101] As an implementation manner of step S200, steps S201 to S204 first obtain the types of each of the quantum computing tasks in the task queue, and then determine the priorities of the quantum computing tasks in the task queue according to different principles based on whether all the types of each of the quantum computing tasks are of the unspecified bit type, or are all of the specified bit type, or there are both the specified bit type and the unspecified bit type.

[0102] S300. Determine each of the quantum computing tasks supported by the current topology as a scheduling task according to the priorities and qubit requirements of the respective quantum computing tasks.

[0103] This step determines the quantum computing tasks that need to be scheduled and executed from the task queue for the current topology, that is, based on the current topology of the quantum chip, according to the priorities and qubit requirements of the respective quantum computing tasks in the task queue, to determine the optimal combination method of the quantum computing tasks for this scheduling, so as to achieve parallel computing of multiple quantum computing tasks on the same quantum chip when the qubit requirements corresponding to multiple quantum computing tasks are different, thereby maximizing the use of the computing resources of the quantum chip and improving the quantum computing efficiency.

[0104] Exemplarily, it is possible to first determine the task groups supported by the current topology, where each task group includes at least one of the quantum computing tasks, then determine the priorities of the respective task groups according to the priorities of the respective quantum computing tasks included in each task group, and finally determine the quantum computing tasks included in the task group with the highest priority as the scheduling tasks.

[0105] In some embodiments of the present invention, step S300 can also determine whether each quantum computing task is a scheduling task supported by the current topology by traversing multiple quantum computing tasks in the task queue. Step S300 specifically includes steps S301 to S304, where:

[0106] S301. Obtain the quantum computing task with the highest priority in the task queue; S302. According to the qubit requirement of the currently obtained quantum computing task, determine whether the current topology meets the corresponding qubit requirement and the remaining qubits in the current topology, where the remaining qubits refer to the physical qubits remaining in the current topology after meeting the corresponding qubit requirement; S303. If so, determine the currently obtained quantum computing task as a scheduling task and update the current topology using the remaining qubits; if not, do not determine the currently obtained quantum computing task as a scheduling task; S304. Obtain the quantum computing task with the next highest priority in the task queue and return to the step of determining whether the current topology meets the corresponding qubit requirement and the remaining qubits in the current topology according to the qubit requirement of the currently obtained quantum computing task.

[0107] Steps S301 to S304 obtain each quantum computing task in the task queue in the order of decreasing priority. When the current topology can support the execution of the currently obtained quantum computing task (i.e., can meet the qubit requirements of the currently obtained quantum computing task), then determine the currently obtained quantum computing task as the scheduling task, and lock the physical qubits in the current topology that support the execution of the currently obtained quantum computing task for quantum computing. Then, update the current topology using the remaining physical qubits, and continue to obtain the quantum computing task of the next priority, and determine whether the current topology can support the execution of the currently obtained quantum computing task for quantum computing, so as to screen out the quantum computing tasks in the task queue that are suitable for performing quantum computing on the current topology as the scheduling tasks. It should be emphasized that whether the scheduling tasks include one of the quantum computing tasks, two of the quantum computing tasks, or multiple quantum computing tasks entirely depends on how many quantum computing tasks the current topology can support for simultaneous execution of quantum computing.

[0108] S400. Process the quantum circuit corresponding to each of the scheduling tasks to obtain an executable quantum circuit, where the executable quantum circuit is a quantum circuit composed of quantum logic gates that can be directly executed on the quantum chip.

[0109] As an implementation manner of step S400, the quantum circuits corresponding to each of the scheduling tasks can be directly merged to obtain an executable quantum circuit, or the quantum circuits corresponding to each of the scheduling tasks can be first optimized and then merged. The quantum circuit can be directly executed on the current topology of the quantum chip, and two conditions need to be met: one is that the number of physical qubits in the current topology meets the number of qubit requirements of the quantum circuit, and the other is the implementability of the quantum logic gates included in the quantum circuit on the physical qubits of the quantum chip, which depends on the relationship between the physical qubits in the current topology. Therefore, after screening out the quantum computing tasks in the task queue that are suitable for performing quantum computing on the current topology as the scheduling tasks, the quantum circuits corresponding to the scheduling tasks can be processed according to different situations.

[0110] As an example, the optimization processing includes the simplification optimization of the quantum circuit and the decomposition optimization of the quantum logic gates; exemplarily, the simplification optimization of the quantum circuit includes the removal of redundant quantum logic gates in the quantum circuit, and the decomposition optimization of the quantum logic gates includes, but is not limited to, the decomposition of multi-qubit logic gates, single-qubit logic gates, and two-qubit logic gates included in the quantum circuit. As an example, the merging processing can be the sequential splicing and merging processing of the quantum circuits corresponding to each of the scheduling tasks, that is, the quantum circuits corresponding to each of the scheduling tasks are connected in sequence as a whole to form a quantum circuit.

[0111] In some embodiments of the present invention, the step of merging the quantum circuits corresponding to each of the scheduling tasks to obtain an executable quantum circuit specifically includes the following steps S401 to S403:

[0112] S401. Determine the mapped bits corresponding to the qubits included in each of the quantum circuits in the current topology according to the quantum circuits corresponding to each of the scheduling tasks; S402. Update the qubits in each of the quantum circuits by using the mapped bits to obtain the corresponding updated quantum circuits; S403. Integrate each of the updated quantum circuits according to the execution timing of the quantum logic gates to obtain the executable quantum circuit.

[0113] It can be understood that by mapping the qubits included in the quantum circuits corresponding to each of the scheduling tasks to the physical bits included in the current topology of the quantum chip, and determining the physical bits corresponding to the qubits included in each of the quantum circuits as the mapped bits, the computing resources of the current topology can be allocated to match each scheduling task.

[0114] S500. Perform quantum computing on the executable quantum circuit based on the quantum chip with the current topology, and determine the calculation results corresponding to each of the scheduling tasks according to the execution results.

[0115] In one embodiment of the present invention, the step of performing quantum computing on the executable quantum circuit in step S500 specifically includes:

[0116] S501. Compile the executable quantum circuit to obtain the corresponding waveform instruction; S502. Send the signal corresponding to the waveform instruction to the quantum chip with the current topology to implement quantum computing.

[0117] It can be understood that the physical bits on the quantum chip work according to the received physical signals, and each physical signal sent to the quantum chip corresponds to a waveform instruction. Steps S501 to S502 obtain the corresponding waveform instruction by compiling the executable quantum circuit, and then send the waveform instruction to the physical hardware device. The physical hardware device sends the corresponding signal to the quantum chip with the current topology according to the received waveform instruction, thereby driving the physical bits on the quantum chip to work to implement quantum computing.

[0118] In another embodiment, the step of determining the calculation results corresponding to each of the scheduling tasks according to the execution results in step S500 specifically includes:

[0119] S503. Obtain the quantum state representing the execution result, where the quantum state of the execution result is the quantum state of all mapped bits of the executable quantum circuit, which can be represented by the eigenstates of the mapped bits and the amplitudes corresponding to each eigenstate; S504. Determine the sub - quantum states corresponding to the mapped bits corresponding to each scheduling task in the quantum state, that is, the states of all mapped bits corresponding to each scheduling task, which can be represented by the eigenstates of the mapped bits corresponding to each scheduling task and the corresponding amplitudes; S505. Use the probabilities corresponding to each sub - quantum state as the calculation results corresponding to the scheduling tasks.

[0120] It should be noted that the execution result of quantum computing needs to be obtained through statistical measurement. What statistical measurement obtains is the probability that a physical bit is in an eigenstate, and the probability is the square of the above - mentioned amplitude.

[0121] As an implementation manner, the step of obtaining the quantum state representing the execution result in step S503 includes step S5031 and step S5032:

[0122] S5031. Determine the eigenstates of all mapped bits corresponding to each quantum circuit; S5032. Obtain the measurement probabilities corresponding to each eigenstate.

[0123] Compared with the prior art, the quantum computing task calculation method provided by the embodiments of the present invention helps to realize synchronous parallel computing of multiple quantum computing tasks on the current topological structure. Combining the embodiments of the present invention, it should be emphasized that the embodiments of the present invention determine the best combination method of the quantum computing tasks scheduled this time based on the current topological structure of the quantum chip according to the priorities and bit requirements of each quantum computing task in the task queue, so as to make full use of the computing resources of the current topological structure. When the bit requirements corresponding to multiple quantum computing tasks are different, parallel computing of multiple quantum computing tasks on the same quantum chip is realized, thereby maximizing the use of the computing resources of the quantum chip and improving the quantum computing efficiency.

[0124] Figure 4 It is a schematic structural diagram of a quantum computing task calculation device provided by an embodiment of the present invention.

[0125] See Figure 4 , the embodiments of the present invention provide a quantum computing task calculation device corresponding to the above - mentioned quantum computing task calculation method, including:

[0126] The first acquisition module 601 is used to acquire the current topological structure of the quantum chip;

[0127] The second acquisition module 602 is used to acquire multiple quantum computing tasks in the task queue and determine the priorities and bit requirements of each quantum computing task

[0128] A task determination module 603, configured to determine, according to the priorities and qubit requirements of the quantum computing tasks, each of the quantum computing tasks supported by the current topology as a scheduling task;

[0129] A circuit processing module 604, configured to process the quantum circuits corresponding to the scheduling tasks to obtain an executable quantum circuit;

[0130] An execution computing module 605, configured to perform quantum computing on the executable quantum circuit based on the quantum chip of the current topology, and determine the computing results corresponding to the scheduling tasks according to the execution results.

[0131] Corresponding to the quantum computing task computing method provided in an embodiment of the present invention, the quantum computing task computing device provided in an embodiment of the present invention, compared with the prior art, helps to implement synchronous parallel computing of multiple quantum computing tasks on the current topology, thereby maximizing the utilization of the computing resources of the quantum chip and improving the quantum computing efficiency.

[0132] An embodiment of the present invention further provides a storage medium, in which a computer program is stored, wherein the computer program is set to execute the steps in the method embodiment in any one of the above when running.

[0133] Specifically, in this embodiment, the above storage medium may be set to store a computer program for executing the following steps:

[0134] S100. Obtain the current topology of the quantum chip;

[0135] S200. Obtain multiple quantum computing tasks in the task queue, and determine the priorities and qubit requirements of the quantum computing tasks;

[0136] S300. According to the priorities and qubit requirements of the quantum computing tasks, determine each of the quantum computing tasks supported by the current topology as a scheduling task;

[0137] S400. Process the quantum circuits corresponding to the scheduling tasks to obtain an executable quantum circuit;

[0138] S500. Perform quantum computing on the executable quantum circuit based on the quantum chip of the current topology, and determine the computing results corresponding to the scheduling tasks according to the execution results.

[0139] Specifically, in this embodiment, the above storage medium may include, but is not limited to: various media such as USB flash drives, read-only memories (ROM for short), random access memories (RAM for short), external hard drives, magnetic disks, or optical discs that can store computer programs.

[0140] An embodiment of the present invention further provides an electronic device, including a memory and a processor. A computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in the method embodiment in any one of the above.

[0141] Specifically, the above electronic device may further include a transmission device and input / output devices. Among them, the transmission device is connected to the above processor, and the input / output devices are connected to the above processor.

[0142] Specifically, in this embodiment, the above processor may be configured to execute the following steps through a computer program:

[0143] S100. Obtain the current topology of the quantum chip;

[0144] S200. Obtain multiple quantum computing tasks in the task queue, and determine the priority and qubit requirements of each of the quantum computing tasks;

[0145] S300. According to the priority and qubit requirements of each of the quantum computing tasks, determine each of the quantum computing tasks supported by the current topology as a scheduling task;

[0146] S400. Process the quantum circuit corresponding to each of the scheduling tasks to obtain an executable quantum circuit;

[0147] S500. Based on the quantum chip with the current topology, perform quantum computing on the executable quantum circuit, and determine the calculation results corresponding to each of the scheduling tasks according to the execution results.

[0148] An embodiment of the present invention further provides a quantum computer operating system, and the quantum computer operating system implements quantum computing task calculations according to any one of the method embodiments provided in the embodiments of the present invention.

[0149] An embodiment of the present invention further provides a quantum computer, and the quantum computer includes the above quantum computer operating system.

[0150] Compared with the prior art, in the embodiment of the present invention, by obtaining the current topological structure of the quantum chip, obtaining multiple quantum computing tasks in the task queue, and determining the priority and qubit requirements of each of the quantum computing tasks; then, according to the priority and qubit requirements of each of the quantum computing tasks, determining each of the quantum computing tasks supported by the current topological structure as a scheduling task; further processing the quantum circuit corresponding to each of the scheduling tasks to obtain an executable quantum circuit; finally, based on the quantum chip with the current topological structure, performing quantum computing on the executable quantum circuit, and determining the calculation results corresponding to each of the scheduling tasks according to the execution results, which helps to realize synchronous parallel computing of multiple quantum computing tasks on the current topological structure. It should be emphasized that based on the current topological structure of the quantum chip, according to the priority and qubit requirements of each of the quantum computing tasks in the task queue, the present invention determines the optimal combination mode of the quantum computing tasks scheduled this time, so as to make full use of the computing resources of the current topological structure. When the qubit requirements corresponding to multiple quantum computing tasks are different, parallel computing of multiple quantum computing tasks on the same quantum chip is realized, thereby maximizing the use of the computing resources of the quantum chip and improving the quantum computing efficiency.

[0151] It should be understood that the "some embodiments", "an embodiment", and "an implementation manner" mentioned throughout the specification mean that the specific features, structures, or characteristics related to the embodiments are included in at least one embodiment of the present application. Therefore, the appearances of "in some embodiments", "in an embodiment", or "in an implementation manner" throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures, or characteristics can be combined in one or more embodiments in any suitable manner.

[0152] It should be noted that in this article, the term "comprising", "including", or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article, or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such a process, method, article, or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of another identical element in the process, method, article, or device including that element.

[0153] In several embodiments provided in the present application, it should be understood that the disclosed methods, apparatuses, and systems can be implemented in other ways. The embodiments described above are merely illustrative. For example, the division of the modules and units is only a logical functional division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or connection between the various components shown or discussed with each other can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical, mechanical, or other forms.

[0154] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units; they can be located in one place or distributed to multiple network units; some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0155] In addition, each functional unit in the embodiments of the present application can be all integrated in a processing unit, or each unit can be separately used as a unit, or two or more units can be integrated in one unit; the above-mentioned integrated units can be implemented in the form of hardware or in the form of a combination of hardware and software functional units.

[0156] Those of ordinary skill in the art can understand that all or part of the steps for implementing the above method embodiments can be completed by hardware related to program instructions. The foregoing program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps including the above method embodiments; and the foregoing storage medium includes: removable storage devices, read-only memory (ROM), magnetic disks, or optical disks, etc., which can store program codes of various media.

[0157] Alternatively, if the above-mentioned integrated units of the present application are implemented in the form of software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiments of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a device for implementing resource change (which can be a computer, a server, etc.) to execute all or part of the methods described in the various embodiments of the present application. And the foregoing storage medium includes: removable storage devices, ROM, magnetic disks, or optical disks, etc., which can store program codes of various media.

[0158] As described above, it is only the implementation mode of the present application, but the protection scope of the present application is not limited thereto. Any changes made in accordance with the concept of the present invention, or equivalent embodiments modified to equivalent changes, which still do not exceed the spirit covered by the specification and the drawings, shall fall within the protection scope of the present invention.

Claims

1. A method for calculating a quantum computing task, characterized in that, Including: Obtain the current topology of the quantum chip; Obtain multiple quantum computing tasks in the task queue, and determine the priority and qubit requirements of each of the quantum computing tasks; According to the priority and qubit requirements of each of the quantum computing tasks, determine each of the quantum computing tasks supported by the current topology as a scheduling task; Process the quantum circuit corresponding to each of the scheduling tasks to obtain an executable quantum circuit; Based on the quantum chip with the current topology, perform quantum computing on the executable quantum circuit, and determine the calculation results corresponding to each of the scheduling tasks according to the execution results.

2. The method for calculating a quantum computing task according to claim 1, wherein The step of determining the priority of each of the quantum computing tasks includes: Obtain the type of each of the quantum computing tasks; If the types are all unspecified qubit types, determine the priority of each of the quantum computing tasks according to the principle of highest response ratio first.

3. The quantum computing task calculation method according to claim 2, characterized in that, The step of determining the priority of each of the quantum computing tasks further includes: If the types are all specified qubit types, determine the priority of each of the quantum computing tasks according to the first-come-first-served principle.

4. The quantum computing task calculation method according to claim 3, wherein The step of determining the priority of each of the quantum computing tasks further includes: If the types include specified qubit types and unspecified qubit types, the priority of the quantum computing tasks corresponding to the specified qubit types is higher than that of the quantum computing tasks corresponding to the unspecified qubit types.

5. The method for calculating a quantum computing task according to claim 1, characterized in that The step of determining each of the quantum computing tasks supported by the current topology as a scheduling task according to the priority and qubit requirements of each of the quantum computing tasks includes: Obtain the quantum computing task with the highest priority in the task queue; According to the qubit requirements of the currently obtained quantum computing task, determine whether the current topology meets the corresponding qubit requirements and the remaining physical qubits in the current topology; If so, determine the currently obtained quantum computing task as a scheduling task, and update the current topology using the remaining physical qubits; if not, do not determine the currently obtained quantum computing task as a scheduling task; Obtain the quantum computing task with the next highest priority in the task queue, and return the step of determining whether the current topology meets the corresponding qubit requirements and the remaining qubits in the current topology according to the qubit requirements of the currently obtained quantum computing task.

6. The method for calculating a quantum computing task according to claim 1, wherein The step of processing the quantum circuit corresponding to each of the scheduling tasks to obtain an executable quantum circuit includes: Merge the quantum circuits corresponding to each of the scheduling tasks to obtain an executable quantum circuit.

7. The quantum computing task calculation method according to claim 6, wherein The step of merging the quantum circuits corresponding to each of the scheduling tasks to obtain an executable quantum circuit includes: According to the quantum circuits corresponding to each of the scheduling tasks, determine the mapping qubits in the current topology corresponding to the quantum qubits included in each of the quantum circuits; Update the quantum qubits in each of the quantum circuits using the mapping qubits to obtain the corresponding updated quantum circuits; Integrate each of the updated quantum circuits according to the execution timing of the quantum logic gates to obtain the executable quantum circuit.

8. The method for calculating a quantum computing task according to claim 1, characterized in that, The step of performing quantum computing on the executable quantum circuit includes: Compile the executable quantum circuit to obtain the corresponding waveform instruction; Send the signal corresponding to the waveform instruction to the quantum chip of the current topology to implement quantum computing.

9. The quantum computing task calculation method according to claim 7, characterized in that, The step of determining the calculation result corresponding to each scheduling task according to the execution result includes: Obtain the quantum state representing the execution result; Determine the sub-quantum states corresponding to the mapping bits corresponding to each scheduling task in the quantum state; Use the probabilities corresponding to each sub-quantum state as the calculation results corresponding to the scheduling tasks.

10. The quantum computing task calculation method according to claim 9, wherein The step of obtaining the quantum state representing the execution result includes: Determine the eigenstates of all mapping bits corresponding to each quantum circuit; Obtain the measurement probabilities corresponding to each eigenstate.

11. A quantum computing task computing device, characterized in that, Includes: A first acquisition module for acquiring the current topology of the quantum chip; A second acquisition module for acquiring a plurality of quantum computing tasks in the task queue and determining the priority and bit requirements of each quantum computing task A task determination module for determining each quantum computing task supported by the current topology as a scheduling task according to the priority and bit requirements of each quantum computing task; A circuit processing module for processing the quantum circuit corresponding to each scheduling task to obtain an executable quantum circuit; An execution calculation module for performing quantum computing on the executable quantum circuit based on the quantum chip of the current topology and determining the calculation result corresponding to each scheduling task according to the execution result.

12. A storage medium, characterized in that, A computer program is stored in the storage medium, wherein the computer program is configured to execute the method according to any one of claims 1 to 10 when running.

13. An electronic device, comprising a memory and a processor, characterized in that, A computer program is stored in the memory, and the processor is configured to run the computer program to execute the method according to any one of claims 1 to 10.

14. A quantum computer operating system, characterized in that, The quantum computer operating system implements quantum computing task calculation according to the method according to any one of claims 1 to 10.

15. A quantum computer, characterized in that, The quantum computer includes the quantum computer operating system according to claim 14.

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