Bump packaging structure and method for manufacturing bump packaging structure

Abstract

Embodiments of the present application provide a bump packaging structure and a preparation method thereof, and relate to the technical field of semiconductor packaging. The bump packaging structure comprises a wafer, a protective layer, a first electrically combined layer, a conductive column, a second electrically combined layer and a solder cap. The conductive column has an outer convex arc surface structure at both ends, so that the contact area of the conductive column with the first electrically combined layer and the second electrically combined layer is greatly improved, thereby improving the bonding force between the conductive column and the first electrically combined layer and the bonding force between the conductive column and the second electrically combined layer, and improving the overall structural strength of the solder bump. Meanwhile, the first electrically combined layer covers the pad opening, which can alleviate the undercut problem of the bottom metal layer during the micro-etching process, and further avoid the phenomenon of falling of the bump structure.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor packaging, in particular to a bump packaging structure and a preparation method of the bump packaging structure. BACKGROUND

[0002] With the rapid development of the semiconductor industry, flip-chip packaging structures are widely used in the semiconductor industry. Flip-chip wafer packaging uses bumps to electrically connect the wafer and the substrate. The bump includes a copper column, a metal layer (UBM: under bump metalization), a protective layer (polyimide), and a tin cap (Sn Cap). In conventional technology, after the metal layer UBM is made, the excess metal layer needs to be etched and removed. Since the polyimide material is extremely easy to absorb water, the UBM sidewall etching liquid remains at the bottom of the copper column bump, resulting in excessive corrosion undercut openings at the bottom of the copper column bump. In addition, the bump, the bottom metal layer, and the solder cap are connected using a planar structure, which has a small contact area and poor bonding force. During reliability testing, the bump is prone to falling off, affecting the soldering strength and soldering effect. SUMMARY

[0003] The present application aims to, for example, provide a bump packaging structure and a preparation method of the bump packaging structure, which alleviates the phenomenon of excessive corrosion forming undercut openings, and can improve the bonding force between the metal layers of the soldering bump, ensuring the soldering strength and soldering effect of the soldering bump.

[0004] Embodiments of the present application can be implemented as follows:

[0005] In a first aspect, the present application provides a bump packaging structure, comprising:

[0006] a wafer, one side of the wafer being provided with a solder pad;

[0007] a protective layer provided on one side of the wafer, the protective layer being provided with a pad opening corresponding to the solder pad;

[0008] a first electrical combination layer provided in the pad opening and covering the pad opening;

[0009] a conductive column provided on the first electrical combination layer;

[0010] a second electrical combination layer provided on the conductive column;

[0011] and a solder cap provided on the second electrical combination layer.

[0012] The two ends of the conductive column are respectively connected to the surfaces of the first and second electrically combined layers. At least part of the first electrically combined layer away from the one side surface of the wafer is an inner concave arc surface. At least part of the second electrically combined layer close to the one side surface of the wafer is also an inner concave arc surface. Thus, at least part of the conductive column close to the one side surface of the wafer and at least part of the conductive column away from the one side surface of the wafer are both outer convex arc surfaces.

[0013] In an optional embodiment, the first electrically combined layer comprises a first adhesive layer, a first barrier layer and a wetting layer. The first adhesive layer is arranged in the pad opening and in contact with the pad. The first adhesive layer away from the one side of the wafer is provided with an arc-shaped groove. The inner surface of the arc-shaped groove is an inner concave arc surface. The first barrier layer covers the surface of the first adhesive layer. The wetting layer covers the surface of the first barrier layer.

[0014] In an optional embodiment, the edge of the first adhesive layer extends outwardly to the surface of the protective layer and covers the edge of the pad opening. The width of the arc-shaped groove is the same as the width of the pad opening.

[0015] In an optional embodiment, the thickness H1 of the part of the first adhesive layer covering the protective layer, the thickness H2 of the first barrier layer and the thickness H3 of the wetting layer are the same.

[0016] In an optional embodiment, the first adhesive layer comprises a multi-layer graphene structure.

[0017] In an optional embodiment, the second electrically combined layer comprises a second adhesive layer and a second barrier layer. The second adhesive layer covers the one side surface of the conductive column away from the wafer. The second barrier layer covers the surface of the second adhesive layer. The cap covers the surface of the second barrier layer. The second barrier layer is used to block diffusion atoms between the cap and the conductive column. The second adhesive layer is used to improve the adhesion between the second barrier layer and the conductive column.

[0018] In an optional embodiment, the one side of the conductive column away from the wafer has an arc-shaped protrusion. The surface of the arc-shaped protrusion is an outer convex arc surface. The edge of the conductive column is provided with a stop platform. The stop platform is annularly arranged on the arc-shaped protrusion. The surface of the stop platform is a flat surface. The second adhesive layer covers the stop platform and the arc-shaped protrusion.

[0019] In an optional embodiment, the width L1 of the stop platform is 4-8 μm.

[0020] In an optional embodiment, the conductive pillar comprises a base portion and an extension portion, the base portion is disposed on the first electrically combined layer, the extension portion is disposed on the base portion and has the arc-shaped protrusion, and the extension portion has a width greater than that of the base portion, so that the extension portion extends outward relative to the base portion, and the second adhesive layer covers the surface of the extension portion.

[0021] In an optional embodiment, the second adhesive layer and the second barrier layer are both arched towards the direction away from the wafer, and the thickness of the middle of the second adhesive layer is greater than that of the edge of the second adhesive layer, and the thickness of the middle of the second barrier layer is greater than that of the edge of the second barrier layer.

[0022] In a second aspect, the present application provides a preparation method of a bump package structure, for preparing the bump package structure according to any one of the preceding embodiments, the preparation method comprising:

[0023] providing a wafer provided with a solder pad on one side;

[0024] forming a protective layer on the surface of the one side of the wafer;

[0025] slotting the protective layer to form a solder pad opening corresponding to the position of the solder pad;

[0026] forming a first electrically combined layer in the solder pad opening;

[0027] forming a conductive pillar on the first electrically combined layer;

[0028] forming a second electrically combined layer on the conductive pillar;

[0029] forming a solder cap on the second electrically combined layer;

[0030] wherein the two ends of the conductive pillar are respectively joined to the surfaces of the first electrically combined layer and the second electrically combined layer, and at least part of the first electrically combined layer away from the one side of the wafer and at least part of the second electrically combined layer close to the one side of the wafer are both concave arc surfaces, so that at least part of the conductive pillar close to the one side of the wafer and at least part of the conductive pillar away from the one side of the wafer are both convex arc surfaces.

[0031] The beneficial effects of the embodiments of the present application include, for example:

[0032] The bump packaging structure provided by the embodiment of the present application forms a pad opening on the protection layer, then sets a first electric property combination layer in the pad opening, the first electric property combination layer covers the pad opening, then sets a conductive column and a second electric property combination layer on the first electric property combination layer, then sets a solder cap on the second electric property combination layer, and the setting of the soldering bump is completed, wherein the two ends of the conductive column are respectively jointed on the surfaces of the first electric property combination layer and the second electric property combination layer, at least part of the side surface of the first electric property combination layer away from the wafer and at least part of the side surface of the second electric property combination layer close to the wafer are both arc surfaces concave inward, so that at least part of the side surface of the conductive column close to the wafer and at least part of the side surface of the conductive column away from the wafer are both arc surfaces convex outward. Since the two ends of the conductive column are both formed into the arc surface structure convex outward, the contact area of the conductive column with the first electric property combination layer and the second electric property combination layer is greatly improved, so that the bonding force between the conductive column and the first electric property combination layer and the bonding force between the conductive column and the second electric property combination layer are improved, and the structural strength of the soldering bump as a whole is improved. Meanwhile, the first electric property combination layer completely covers the pad opening, so that when the micro-etching process is performed, whether chemical etching or plasma etching is adopted, the undercut problem caused by the bottom metal layer can be relieved, and the phenomenon of falling of the bump structure is further avoided. Compared with the prior art, the bump packaging structure provided by the present application can relieve the phenomenon of forming the undercut opening caused by excessive corrosion, has good bonding force, and avoids falling. BRIEF DESCRIPTION OF DRAWINGS

[0033] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0034] Figure 1 The schematic diagram of the bump packaging structure provided by the first embodiment of the present application;

[0035] Figure 2 The schematic diagram of the bump packaging structure provided by the first embodiment of the present application; Figure 1 The partial enlarged schematic diagram of the second embodiment of the present application;

[0036] Figure 3 The schematic diagram of the bump packaging structure provided by the first embodiment of the present application; Figure 1 The partial enlarged schematic diagram of the third embodiment of the present application;

[0037] Figure 4 The schematic diagram of the bump packaging structure provided by the first embodiment of the present application before reflow;

[0038] Figure 5 The schematic diagram of the bump packaging structure provided by the first embodiment of the present application during reflow;

[0039] Figures 6 to 12 Process flow chart of the preparation method of the bump package structure provided by the first embodiment of the present application;

[0040] Figure 13 Schematic diagram of the bump package structure provided by the second embodiment of the present application;

[0041] Figure 14 Schematic diagram of the bump package structure provided by the second embodiment of the present application.

[0042] Figure: 100-bump package structure; 110-wafer; 111-solder pad; 120-protection layer; 121-solder pad opening; 130-first electrically combined layer; 131-first adhesive layer; 133-first barrier layer; 135-wetting layer; 140-conductive column; 141-arc-shaped protrusion; 143-stop platform; 145-base part; 147-extension part; 150-second electrically combined layer; 151-second adhesive layer; 153-second barrier layer; 160-solder cap; 200-substrate; 210-filling adhesive layer. DETAILED DESCRIPTION

[0043] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0044] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative labor are within the scope of protection of the present application.

[0045] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0046] In the description of the present application, it should be noted that, if the terms "upper", "lower", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship when the product of the present application is usually placed, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, therefore, it cannot be understood as a limitation on the present application.

[0047] In addition, if the terms "first", "second" and the like are used herein, they are merely used to distinguish one entity from another, and do not imply or suggest relative importance.

[0048] As disclosed in the background art, the existing bump packaging technology usually has the following disadvantages:

[0049] 1. The protective layer is usually made of polyimide material. Since polyimide material is extremely easy to absorb water, residual etching liquid is easy to appear when the sidewall of the UBM at the bottom of the metal column is etched, which causes the existence of over-etch undercut opening at the bottom of the copper column bump, and then the copper column bump is easy to fall off during the reliability test, which affects the soldering reliability.

[0050] 2. The UBM layer is usually a flat structure, that is, the adjacent metal layers are connected in a planar structure, which causes the contact area to be small and the bonding force to be weak, and the same is easy to fall off during the reliability test.

[0051] 3. The bottom of the copper column bump in the prior art is completely connected with the wafer electrode, which causes the stress on the copper column bump to directly act on the wafer electrode, and the stress release capacity is weak, and the wafer electrode is prone to crack.

[0052] 4. As the pitch of the copper column bump becomes smaller and smaller, the bottom filling glue is often used to fill and protect the bottom of the flip chip. In order to increase the adhesion strength of the bottom filling glue and the surface protective layer of the chip, plasma bombardment of the organic surface is often used to improve the roughness of the organic surface and improve the adhesion strength of the filling glue. However, if silicon nitride or silicon nitride is used as the protective layer, the effect of plasma bombardment on the roughness of the surface is not good.

[0053] In order to solve the above problems, the present application provides a new type of bump packaging structure and a preparation method of the bump packaging structure. It should be noted that the features in the embodiments of the present application can be combined with each other without conflict.

[0054] First embodiment

[0055] Referring to Figures 1 to 3 The present embodiment provides a bump packaging structure 100 which can alleviate the phenomenon of over-etching to form an undercut opening, has good bonding force and avoids falling off. In addition, the bump packaging structure 100 can buffer the acting force between the bump and the solder pad 111, has good stress release capacity, avoids the problem of electrode cracking, and has better conductivity and thermal conductivity.

[0056] The bump package structure 100 provided by the embodiment includes a wafer 110, a protective layer 120, a first electrically conductive layer 130, a conductive pillar 140, a second electrically conductive layer 150, and a solder cap 160. The wafer 110 is provided with a solder pad 111 on one side. The protective layer 120 is arranged on one side of the wafer 110, and the protective layer 120 is provided with a solder pad opening 121 corresponding to the solder pad 111. The first electrically conductive layer 130 is arranged in the solder pad opening 121 and covers the solder pad opening 121. The conductive pillar 140 is arranged on the first electrically conductive layer 130. The second electrically conductive layer 150 is arranged on the conductive pillar 140. The solder cap 160 is arranged on the second electrically conductive layer 150. The two ends of the conductive pillar 140 are respectively connected to the surfaces of the first electrically conductive layer 130 and the second electrically conductive layer 150. At least part of the side surface of the first electrically conductive layer 130 away from the wafer 110 and at least part of the side surface of the second electrically conductive layer 150 close to the wafer 110 are concave arc surfaces, so that at least part of the side surface of the conductive pillar 140 close to the wafer 110 and at least part of the side surface of the conductive pillar 140 away from the wafer 110 are convex arc surfaces.

[0057] In the embodiment, the end of the conductive pillar 140 away from the wafer 110 protrudes in a direction away from the wafer 110, and the end of the conductive pillar 140 close to the wafer 110 protrudes in a direction close to the wafer 110, so that the first electrically conductive layer 130 and the second electrically conductive layer 150 are respectively arched in opposite directions. On the one hand, this arrangement makes the end surface of the conductive pillar 140 have a larger contact area and a better bonding force. On the other hand, this arrangement makes the conductive pillar 140 have a larger volume and occupy a larger volume in the entire structure, so that the conductive performance and the support performance are better, and the structural strength is ensured. Specifically, in the embodiment, because the two ends of the conductive pillar 140 are both formed into convex arc surface structures, the contact areas of the conductive pillar 140 with the first electrically conductive layer 130 and the second electrically conductive layer 150 are greatly increased, so that the bonding force between the conductive pillar 140 and the first electrically conductive layer 130 is improved, and the bonding force between the conductive pillar 140 and the second electrically conductive layer 150 is improved, and the structural strength of the solder bump is improved. At the same time, the first electrically conductive layer 130 completely covers the solder pad opening 121. When the micro-etching process is performed, whether chemical etching or plasma etching is used, the undercut problem of the bottom metal layer can be alleviated, and the phenomenon of the bump structure falling off is further avoided.

[0058] The first electrically conductive combination layer 130 comprises a first adhesive layer 131, a first barrier layer 133, and a wetting layer 135. The first adhesive layer 131 is arranged in the pad opening 121 and in contact with the pad 111. The first adhesive layer 131 is provided with an arc-shaped groove on the side away from the wafer 110. The inner surface of the arc-shaped groove is concave. The first barrier layer 133 covers the surface of the first adhesive layer 131. The second barrier layer 153 covers the surface of the first barrier layer 133. The wetting layer 135 covers the surface of the second barrier layer 153. The first adhesive layer 131 comprises a multi-layer graphene structure. Specifically, the first adhesive layer 131 can play an adhesive role to improve adhesion. The first barrier layer 133 can play a barrier role to block the diffusion atoms generated at the conductive pillar 140. The material of the wetting layer 135 is the same as that of the conductive pillar 140, which can infiltrate the conductive pillar 140 to achieve better combination. The arc-shaped groove does not penetrate the first adhesive layer 131. The first adhesive layer 131 covers the arc-shaped groove and extends outward toward the edge of the arc-shaped groove, so that the first adhesive layer 131 can completely cover the entire pad opening 121. The first barrier layer 133 covers the surface of the first adhesive layer 131. The wetting layer 135 covers the surface of the first barrier layer 133.

[0059] In the embodiment, the first adhesive layer 131 comprises a multi-layer graphene structure. The first barrier layer 133 can be at least one of nickel, vanadium, and chromium. The wetting layer 135 is a copper layer. The conductive pillar 140 is a copper pillar. Specifically, the first adhesive layer 131 adopts graphene material and has a multi-layer structure. The first adhesive layer 131 made of graphene material is arranged as a base structure of the conductive pillar 140. The thermal expansion coefficient CTE of graphene is only 1 / 10-1 / 20 of that of copper and aluminum, which can better avoid deformation stress of the UBM layer at the bottom of the conductive pillar 140, so that the first adhesive layer 131 plays a buffering role to protect the pad 111 on the wafer 110, achieve better stress release, and avoid the problem of cracking of the pad 111 (electrode). At the same time, the first adhesive layer 131 made of graphene material covers the pad opening 121. The multi-layer graphene has good hydrophobicity and stability. During the micro-etching process, whether chemical etching or plasma etching is adopted, the undercut problem of the bottom metal layer can be avoided. Moreover, the conductivity of graphene is 100 times higher than that of other metals. The multi-layer graphene structure formed with the increase of the volume of graphene has good local stability, conductivity, and heat dissipation, thereby further improving the conductivity and heat conduction performance of the overall connection structure.

[0060] In the embodiment, the edge of the first adhesive layer 131 extends outward to the surface of the protection layer 120 and covers the edge of the pad opening 121, and the width of the arc-shaped groove is the same as the width of the pad opening 121. Specifically, the width of the arc-shaped groove is the same as the width of the pad opening 121, so that a flat structure is formed at the edge, and the first barrier layer 133 and the wetting layer 135 are sequentially stacked on the first adhesive layer 131, and a flat structure can also be formed at the edge, which can better achieve coverage of the pad opening 121. In addition, in the embodiment, the first adhesive layer 131, the first barrier layer 133 and the wetting layer 135 have the same width and flush edges, so that the same mask can be used for etching, and multiple etching processes are avoided.

[0061] In the embodiment, the thickness H1 of the part of the first adhesive layer 131 covering the protection layer 120, the thickness H2 of the first barrier layer 133 and the thickness H3 of the wetting layer 135 are the same. Specifically, the first adhesive layer 131 not only covers the pad opening 121, but also protrudes outward relative to the pad opening 121. Due to the arc-shaped groove, the highest part of the first adhesive layer 131 relative to the wafer 110 is located at the edge, that is, the thickness of the edge part of the first adhesive layer 131 is H1. The first barrier layer 133 and the wetting layer 135 are both equal-thickness layers, and the thicknesses of the two layers are the same as the edge thickness of the first adhesive layer 131. While ensuring functionality, the height of the bump structure is prevented from being too high, and the first adhesive layer 131, the first barrier layer 133 and the wetting layer 135 can be more uniformly stressed.

[0062] It should be further noted that in the embodiment, the first adhesive layer 131 is made of graphene material, which has excellent conductivity. In addition, the arc-shaped groove is provided on the first adhesive layer, so that the first barrier layer 133 and the wetting layer 135 can cover the arc-shaped groove and increase the contact area, thereby improving the bonding force. In addition, due to the increase in the contact area, the conductivity is also improved, which solves the problem of poor conductivity of the titanium layer in the prior art.

[0063] The second electrically conductive combination layer 150 includes a second adhesive layer 151 and a second barrier layer 153. The second adhesive layer 151 covers the side surface of the conductive column 140 away from the wafer 110, and the second barrier layer 153 covers the surface of the second adhesive layer 151. The cap 160 covers the surface of the second barrier layer 153. The second barrier layer 153 is used to block diffusion atoms between the cap 160 and the conductive column 140, and the second adhesive layer 151 is used to improve the adhesion between the second barrier layer 153 and the conductive column 140. Specifically, the second adhesive layer 151 can be a titanium layer, and the second barrier layer 153 can be at least one of nickel, vanadium and chromium.

[0064] In the embodiment, the conductive pillar 140 has an arc-shaped protrusion 141 on the side away from the wafer 110, the surface of the arc-shaped protrusion 141 is convex, and the edge of the conductive pillar 140 is provided with a stop platform 143, the stop platform 143 is annularly arranged on the arc-shaped protrusion 141, and the surface of the stop platform 143 is a flat surface, and the second adhesive layer 151 covers the stop platform 143 and the arc-shaped protrusion 141. Specifically, by arranging the stop platform 143 on the edge of the conductive pillar 140, the phenomenon of solder climbing along the side of the conductive pillar 140 during soldering can be slowed down, and electronic migration of the solder with other metal layers can be avoided, thereby improving the stability of the structure.

[0065] It should be noted that the stop platform 143 can also serve as a structure for supporting the edge of the solder cap 160, and the use of a flat edge can improve the bonding force between the solder cap 160 and the conductive pillar 140, thereby making the overall structure stronger. In addition, the stop platform 143 is arranged within the edge range of the copper pillar and does not protrude outward, which can facilitate the etching of the stop platform 143 together with the formation of the conductive pillar 140, and also ensures good support for the solder cap 160.

[0066] It should be noted that the end of the conductive pillar 140 has an arc-shaped protrusion 141 in the embodiment, which can reduce the volume of solder of the top solder cap 160 and prevent overflow of the solder during soldering due to excessive solder. In combination with the arc-shaped protrusions 141 at both ends of the conductive pillar 140, the stress release effect of the overall conductive pillar 140 is better.

[0067] In the embodiment, the width L1 of the stop platform 143 is 4-8 μm. Preferably, the width L1 of the stop platform 143 is 6 μm, and the stop platform 143 is embedded between the solder cap 160 and the end surface of the conductive pillar 140, which can reduce the distance between the conductive pillars 140, thereby realizing the distribution of smaller-pitch conductive pillars 140.

[0068] In the embodiment, the second barrier layer 153 and the second adhesive layer 151 are both equal-thickness layers, and the thicknesses thereof are the same as those of the first barrier layer 133 and the first adhesive layer 131, respectively. The equal thicknesses facilitate the manufacturing and better functionality.

[0069] In actual mounting, referring to Figure 4 and Figure 5 , Figure 4 is a schematic diagram before reflow, Figure 5As a schematic diagram of reflow, when the wafer 110 is flip-chip mounted on the substrate 200, the solder cap 160 on the wafer 110 is combined with the substrate 200 pad, and the end surface of the conductive column 140 is designed as an arc-shaped bump structure, so that the back surface of the wafer 110 can better conduct the mounting pressure when the back surface of the wafer 110 is subjected to the mounting pressure F1, so that the solder cap is deformed by stress, and the bonding force between the solder cap and the substrate 200 pad is improved. The problem of poor bonding between the solder cap and the substrate 200 before reflow of the solder cap of the copper column bump of the wafer 110 is solved.

[0070] In addition, when the flip-chip wafer 110 is reflowed, because the substrate 200 is heated in a high-temperature environment, the thermal expansion coefficients of the substrate 200 material and the solder material of the wafer 110 are inconsistent, and the substrate 200 is warped by heat, thereby generating a back surface extrusion stress F2, which forces the pressure to be conducted to the surface of the arc-shaped bump, and the arc-shaped bump surface is in an arch structure, thereby avoiding the problem of offset of the solder pad 111 of the wafer 110 caused by the extrusion stress. In addition, the arc-shaped bump shape of the conductive column 140 also has a stress release problem in the solder reflow process of the solder cap 160, and the arch structure can also avoid the solder offset problem, thereby ensuring the soldering effect.

[0071] In addition, in the solder reflow soldering process of the solder cap 160, the arc-shaped bump increases the soldering area A area, which can increase the soldering area of the A area, thereby improving the strength of the soldering structure, and the arc-shaped bump structure reduces the thickness of the solder on the surface of the conductive column 140, and the arc-shaped bump structure can improve the strength of the soldering structure.

[0072] The embodiment also provides a preparation method of the bump packaging structure 100, which is used for preparing the aforementioned bump packaging structure 100, and the preparation method comprises the following steps:

[0073] S1: providing a wafer 110 provided with a solder pad 111 on one side.

[0074] For reference Figure 6 First, a wafer 110 prepared in advance is provided, and the front surface of the wafer 110 is provided with a solder pad 111, and the solder pad 111 is electrically connected to the internal circuit layer of the wafer 110.

[0075] S2: forming a protective layer 120 on one side surface of the wafer 110.

[0076] For reference Figure 7 A liquid protective material such as polyimide is spin-coated on the front surface of the wafer through a spin coating process, and then cured through an oven soft-baking process.

[0077] S3: Slotting the protective layer 120 to form a pad opening 121 corresponding to the position of the solder pad 111.

[0078] Referring to Figure 8 In particular, the position of the predetermined opening of the protective layer 120 can be covered by a mask, and then the unexposed area can be removed by spraying a developing solution, and the aluminum pad opening position can be exposed, and then the protective layer 120 can be cured to a stable state by using an oven for heating. The surface of the protective layer 120 can be cleaned of contaminants or residues by using a plasma residue removal machine. Of course, the protective layer 120 here can also be a silicon nitride material.

[0079] S4: Forming a first electrical combination layer 130 in the pad opening 121.

[0080] Referring to Figures 9 to 11 After forming the pad opening 121 and the protective layer 120 is cured to a stable state, graphene material can be coated on the protective layer 120 to form a multilayer graphene structure and form a first adhesive layer 131, wherein the graphene material fills the pad opening 121 and covers the surface of the protective layer 120 with a thickness of 4-8 μm, and then the graphene material is accelerated to a stable state by using an oven for heating to form the first adhesive layer 131.

[0081] Then, an etching process is used to etch an arc-shaped groove on the surface of the first adhesive layer 131, and the first adhesive layer 131 is recessed away from the side surface of the wafer 110.

[0082] Then, a plating process is used to form a first barrier layer 133 and a wetting layer 135 on the first adhesive layer 131.

[0083] S4: Forming a conductive column 140 on the first electrical combination layer 130.

[0084] Referring to Figure 12 In particular, after forming the wetting layer 135, protective glue can be coated first, and then the wetting layer 135 is exposed by opening, and a copper column is formed on the wetting layer 135 by electroplating to form a conductive column 140, and then an arc-shaped protrusion 141 and a stop platform 143 are formed by etching the conductive column 140, and then the protective glue is removed, and the excess first electrical combination layer 130 is etched and removed.

[0085] S5: Forming a second electrical combination layer 150 on the conductive column 140.

[0086] In particular, after forming the conductive column 140, protective glue is coated again, and the conductive column 140 is exposed by opening, and a second adhesive layer 151 and a second barrier layer 153 are formed on the end surface of the conductive column 140 by electroplating.

[0087] The two ends of the conductive column 140 are respectively connected to the surfaces of the first electric combination layer 130 and the second electric combination layer 150. At least part of the side surface of the first electric combination layer 130 away from the wafer 110 is concave, and at least part of the side surface of the second electric combination layer 150 close to the wafer 110 is also concave. Thus, at least part of the side surface of the conductive column 140 close to the wafer 110 is convex, and at least part of the side surface of the conductive column 140 away from the wafer 110 is also convex.

[0088] S6: Forming a solder cap 160 on the second electric combination layer 150.

[0089] Please continue to see Figure 1 The solder is filled into the opening by electroplating or printing process, and the excess photoresist is removed by the plasma residue removal machine to form a copper column with solder. After reflow, the solder cap 160 is formed.

[0090] In summary, the bump packaging structure 100 provided by the embodiment is characterized in that: a pad opening 121 is formed on the protection layer 120, then a first electrically combined layer 130 is arranged in the pad opening 121, the first electrically combined layer 130 covers the pad opening 121, then a conductive column 140 and a second electrically combined layer 150 are arranged on the first electrically combined layer 130, then a solder cap 160 is arranged on the second electrically combined layer 150, and the arrangement of the solder bump is completed, wherein the two ends of the conductive column 140 are respectively connected to the surfaces of the first electrically combined layer 130 and the second electrically combined layer 150, at least part of the side surface of the first electrically combined layer 130 away from the wafer 110 and at least part of the side surface of the second electrically combined layer 150 close to the wafer 110 are concave arc surfaces, so that at least part of the side surface of the conductive column 140 close to the wafer 110 and at least part of the side surface of the conductive column 140 away from the wafer 110 are convex arc surfaces. Since the two ends of the conductive column 140 are formed into the convex arc surface structure, the contact area of the conductive column 140 with the first electrically combined layer 130 and the second electrically combined layer 150 is greatly improved, thereby improving the bonding force between the conductive column 140 and the first electrically combined layer 130 and the bonding force between the conductive column 140 and the second electrically combined layer 150, and improving the structural strength of the solder bump as a whole. Meanwhile, the first electrically combined layer 130 completely covers the pad opening 121, so that, when the micro-etching process is performed, whether chemical etching or plasma etching is adopted, the undercut problem of the bottom metal layer can be alleviated, and the phenomenon of falling of the bump structure is further avoided. Meanwhile, the first adhesive layer 131 of the graphene material is arranged as the base structure of the conductive column 140, and the thermal expansion coefficient CTE of the graphene is only 1 / 10-1 / 20 of that of copper and aluminum, so that the deformation stress of the UBM layer at the bottom of the conductive column 140 can be better avoided, thereby enabling the first adhesive layer 131 to play a buffering role and protecting the solder pad 111 on the wafer 110, achieving better stress release, and avoiding the problem of cracking of the solder pad 111 (electrode). Meanwhile, the first adhesive layer 131 of the graphene material covers the pad opening 121, and the good hydrophobicity and stability of the multilayer graphene are utilized, so that, when the micro-etching process is performed, whether chemical etching or plasma etching is adopted, the undercut problem of the bottom metal layer can be avoided. Moreover, the conductive performance of the graphene is 100 times higher than that of other metals, and the local good stability, conductivity and heat dissipation performance of the multilayer graphene structure formed with the increase of the volume of the graphene, thereby further improving the conductive and heat dissipation performance of the overall connection structure.

[0091] Second embodiment

[0092] Reference Figure 13The embodiment provides a bump packaging structure 100, which has the same basic structure and principle, technical effect and first embodiment, and part of the embodiment is not mentioned in the description for the sake of simplicity. The part not mentioned in the embodiment can be referred to the corresponding content in the first embodiment. Compared with the first embodiment, the difference of the embodiment is the shape of the conductive column 140.

[0093] In the embodiment, the conductive column 140 comprises a base part 145 and an extension part 147, the base part 145 is arranged on the first electrically combined layer 130, the extension part 147 is arranged on the base part 145 and has an arc-shaped protrusion 141, the width of the extension part 147 is greater than the width of the base part 145, so that the extension part 147 extends outward relative to the base part 145, and the second adhesive layer 151 covers the surface of the extension part 147. Specifically, the stop platform 143 is located at the edge of the extension part 147, the width of the extension part 147 is greater than the width of the base part 145, so that the top end of the conductive column 140 forms a "mushroom head" shape, thereby forming an anti-side climbing structure at the top end of the conductive column 140, avoiding the solder from side climbing to the side wall of the base part 145, thereby further avoiding the problem of electron migration caused by the contact between the solder and the lower metal layer, and the structure can improve the welding area, thereby greatly improving the welding strength.

[0094] In the embodiment, the second adhesive layer 151 and the second barrier layer 153 are both arched towards the direction away from the wafer 110, the thickness of the middle of the second adhesive layer 151 is greater than the thickness of the edge of the second adhesive layer 151, and the thickness of the middle of the second barrier layer 153 is greater than the thickness of the edge of the second barrier layer 153.

[0095] Referring to Figure 14After the wafer 110 is subsequently inverted to the substrate 200, the filling of the bottom glue layer can improve the roughness of the wafer 110 surface, so that the glue can have better fluidity, thereby improving the bonding strength, and avoiding the method of using plasma bombardment of the organic layer surface to improve the roughness of the organic surface in the conventional technology. If silicon nitride or silicon nitride is used as the protective layer 120, the plasma bombardment has poor effect on the roughness of the surface, and the conductive column 140 structure is directly improved in the embodiment, thereby improving the roughness and ensuring the bonding effect of the filling glue layer 210. Specifically, when the bottom filling glue enters the end of the conductive column 140 for the first time, since the welding forms an arc structure, the arc structure has a larger contact area than the traditional structure of the flat structure, so that the glue cannot climb along the copper column when it touches the welding structure, thereby forming a glue reflow phenomenon. Since the bottom glue is continuously bottom filled, when the reflow glue receives the impact of the remaining glue, the flow direction of the reflow glue is changed to fill along the copper column direction. When the arc-shaped protrusion 141 structure is filled, the filling glue climbs along the conductive column 140 to fill the flat structure, that is, the mushroom head structure is completely covered, thereby improving the bonding force of the bottom glue.

[0096] The above merely illustrates the specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present application, which shall be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A bump package structure, comprising: The application relates to a wafer, which comprises: a wafer provided with a solder pad on one side thereof; a protective layer provided on the one side of the wafer and provided with a solder pad opening corresponding to the solder pad; a first electrically conductive layer provided in the solder pad opening and covering the solder pad opening; a conductive column provided on the first electrically conductive layer; a second electrically conductive layer provided on the conductive column; and a solder cap provided on the second electrically conductive layer; wherein two ends of the conductive column are respectively connected to surfaces of the first electrically conductive layer and the second electrically conductive layer, at least part of the first electrically conductive layer away from the one side surface of the wafer and at least part of the second electrically conductive layer close to the one side surface of the wafer are concave arc surfaces, so that at least part of the conductive column close to the one side surface of the wafer and at least part of the conductive column away from the one side surface of the wafer are convex arc surfaces; the first electrically conductive layer comprises a first adhesive layer, a first barrier layer and a wetting layer, the first adhesive layer is provided in the solder pad opening and is in contact with the solder pad, the first barrier layer covers a surface of the first adhesive layer, the wetting layer covers a surface of the first barrier layer, an edge of the first adhesive layer extends outward to a surface of the protective layer and covers an edge of the solder pad opening, the first adhesive layer comprises a multi-layer graphene structure and has hydrophobicity and stability; the second electrically conductive layer comprises a second adhesive layer and a second barrier layer, the second adhesive layer covers a surface of the conductive column away from the one side surface of the wafer, the second barrier layer covers a surface of the second adhesive layer, the solder cap covers a surface of the second barrier layer, the second barrier layer is used for blocking diffusion atoms between the solder cap and the conductive column, and the second adhesive layer is used for improving adhesion between the second barrier layer and the conductive column; the conductive column away from the one side of the wafer has an arc-shaped protrusion, a surface of the arc-shaped protrusion is a convex arc surface, and an edge of the conductive column is provided with a stop platform, the stop platform is annularly arranged on the arc-shaped protrusion, and a surface of the stop platform is a flat surface, and the second adhesive layer covers the stop platform and the arc-shaped protrusion; the conductive column comprises an integral base part and an extension part, the base part is arranged on the first electrically conductive layer, the extension part is arranged on the base part, and a width of the extension part is greater than that of the base part, so that the extension part extends outward relative to the base part, and the second adhesive layer covers a surface of the extension part, thereby forming a side creep prevention structure at a top end of the conductive column.

2. The bump package structure of claim 1, wherein, The first adhesive layer away from the one side of the wafer is provided with an arc-shaped groove, and an inner surface of the arc-shaped groove is a concave arc surface.

3. The bump package structure of claim 2, wherein, The width of the arc-shaped groove is the same as that of the solder pad opening.

4. The bump package structure of claim 3, wherein, The thickness H1 of the part of the first adhesive layer covering the protective layer, the thickness H2 of the first barrier layer and the thickness H3 of the wetting layer are the same.

5. The bump package structure of claim 1, wherein, The width L1 of the stop platform is 4-8 mu m.

6. The bump package structure of claim 1, wherein, The extension part is arranged on the base part and has the arc-shaped protrusion.

7. The bump package structure of claim 6, wherein, The second adhesive layer and the second barrier layer are both arched towards a direction away from the wafer, and the thickness of the middle of the second adhesive layer is greater than the thickness of the edge of the second adhesive layer, and the thickness of the middle of the second barrier layer is greater than the thickness of the edge of the second barrier layer.

8. A method for fabricating a bump encapsulation structure, characterized in that, A method for preparing the bump package structure according to any one of claims 1-7, the method comprising: providing a wafer with pads on one side; forming a protective layer on the one side surface of the wafer; slotting the protective layer to form pad openings corresponding to the positions of the pads; forming a first electrically combined layer in the pad openings; forming a conductive column on the first electrically combined layer; forming a second electrically combined layer on the conductive column; forming a cap on the second electrically combined layer; wherein the two ends of the conductive column are respectively joined to the surfaces of the first electrically combined layer and the second electrically combined layer, and at least part of the first electrically combined layer away from the one side surface of the wafer and at least part of the second electrically combined layer close to the one side surface of the wafer are both concave arc surfaces, so that at least part of the conductive column close to the one side surface of the wafer and at least part of the conductive column away from the one side surface of the wafer are both convex arc surfaces.

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