Wiring structure, semiconductor device, and electronic device

Abstract

The disclosure provides a wiring structure and an electronic device. The wiring structure comprises: a first insulating layer, a first wiring layer, a second insulating layer, and a second wiring layer which are sequentially stacked; the first wiring layer comprises adjacent first wirings; a region of a surface of the second insulating layer away from the first wiring layer and opposite to the first wirings forms a protrusion protruding towards the second wiring layer; the second wiring layer comprises a second wiring and a third wiring; the second wiring and the third wiring both intersect with the first wirings in the orthographic projection of the first insulating layer; and in the two side edges of the first wirings, the sections between the second wiring and the third wiring each comprise at least one corner point. The risk of short circuit of the second wiring and the third wiring in the wiring structure is reduced.

Description

TECHNICAL FIELD

[0001] The present disclosure belongs to the technical field of electronics, and particularly relates to a wiring structure, a semiconductor device and an electronic device. BACKGROUND

[0002] This section is intended to provide background or context to the embodiments recited in the claims. The description herein does not constitute admission that the prior art is prior art nor does it constitute an admission of any description in this section as prior art to a presently claimed embodiment.

[0003] In a semiconductor device such as a display panel, a touch panel, a display touch panel, an integrated circuit, etc., there will be a case of multiple layers of wirings. Adjacent two layers of wirings are separated by an insulating layer. Adjacent two wirings in the same layer of wirings should avoid short circuit. SUMMARY

[0004] The present disclosure provides a wiring structure, a semiconductor device and an electronic device.

[0005] The present disclosure adopts the following technical solution: a wiring structure, comprising: a first insulating layer, a first wiring layer, a second insulating layer and a second wiring layer which are sequentially stacked; the first wiring layer comprises a first wiring, and a region of a surface of the second insulating layer away from the first wiring layer opposite to the first wiring forms a boss protruding towards the second wiring layer; the second wiring layer comprises adjacent second and third wirings, and the second and third wirings both intersect with the first wiring in the orthographic projection of the first insulating layer, wherein, in the two side edges of the first wiring, the sections between the second and third wirings each comprise at least one corner point.

[0006] In some embodiments, at least one side edge of the first wiring has at least one recessed section or at least one protruding section to form the corner point.

[0007] In some embodiments, at least one side edge of the first wiring has a recessed section of an elliptical or circular shape recessed towards the opposite side edge, and a straight section connected with the recessed section.

[0008] In some embodiments, at least one side edge of the first wiring has a protruding section of an elliptical or circular shape protruding in a direction away from the opposite side edge, and a straight section connected with the protruding section.

[0009] In some embodiments, at least one side edge of the first wiring has a recessed section of a rectangular or trapezoidal shape recessed towards the opposite side edge, and a straight section connected with the recessed section.

[0010] In some embodiments, at least one side edge of the first trace has a convex section in a rectangular or trapezoidal shape convexed in a direction away from the opposite side edge, and a straight section connected to the convex section.

[0011] In some embodiments, the first trace is in a bent shape to form a corner point between the second trace and the third trace at at least one bending position of the two side edges.

[0012] In some embodiments, the first trace is a section of a touch sensing electrode, the second trace is a section of a touch driving electrode, and the third trace is a section of a ground protection line.

[0013] In some embodiments, a surface of the first insulating layer close to a side of the first trace layer is a flat surface.

[0014] The present disclosure adopts the following technical solution: a semiconductor device, comprising the aforementioned trace structure.

[0015] The present disclosure adopts the following technical solution: an electronic device, comprising the aforementioned semiconductor device. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 is an effect diagram of short circuit failure of two adjacent traces in related technologies.

[0017] Figures 2 to 6 is Figure 1 a formation process diagram of the failure phenomenon shown.

[0018] Figures 7 to 12 is a layout of the trace structure provided by the embodiments of the present disclosure.

[0019] In the drawings, the reference signs are as follows: 1, first insulating layer; 2, first trace; 3, second insulating layer; 4, second trace; 5, third trace; 6, photoresist; 7, residual trace; 8, conductor layer; H, via. DETAILED DESCRIPTION

[0020] The present disclosure will be further described below in conjunction with the embodiments shown in the drawings.

[0021] Figure 1is a picture of a short circuit defect of a trace in the related art. Specifically, the trace structure is integrated in a touch display panel. A display function layer (not shown) is arranged on a side of the first insulating layer 1 away from the first trace layer. The display function layer realizes, for example, organic light-emitting diode (OLED) display. The first trace 2 is a section of a touch sensing electrode, the second trace 4 is a section of a touch driving electrode, and the third trace 5 is a section of a ground protection line. The first trace 2 and the second trace 4 are separated by the second insulating layer 3, and the first trace 2 and the third trace 5 are separated by the second insulating layer 3. In actual manufacturing, the first trace 2 is formed before the second trace 4 and the third trace 5. In order to reduce the resistance of the touch sensing electrode, the touch driving electrode, and the ground protection line, some sections of these electrodes or lines are double-layer traces at the edge area of the touch display panel, and the double-layer traces are electrically connected by a via hole H. At the intersection of the touch sensing electrode and the touch driving electrode, and at the intersection of the touch sensing electrode and the ground protection line, they are single-layer traces. The ground protection line is arranged on both sides of the touch driving electrode (only the ground protection line on one side of the touch driving electrode is shown in FIG. 1) to shield electromagnetic interference. Figure 1

[0022] Reference is made to FIG. 2, which is a picture of a short circuit defect of a trace in the related art. Figure 1 The inventors of the present disclosure have found that a residual trace 7 extending along the extension direction of the first trace 2 and located on both sides of the first trace 2 is easily generated in the trace layer (i.e., the second trace layer) where the second trace 4 (the third trace 5) is located. The residual trace 7 easily causes the second trace 4 and the third trace 5 to short circuit, resulting in failure of the display touch panel.

[0023] The inventors of the present disclosure have further found the formation mechanism of the residual trace 7. Figures 2 to 6 Reference is made to FIG. 3, which is a schematic diagram of the formation process of the defect shown in FIG. 1. Figure 1 Reference is made to FIG. 4, which is a schematic diagram of the formation process of the defect shown in FIG. 1.

[0024] Reference is made to FIG. 5, which is a schematic diagram of the formation process of the defect shown in FIG. 1. Figure 2 First, the first trace 2 is formed on the first insulating layer 1. Then, the second insulating layer 3 is formed. Since the surface where the second insulating layer 3 is located is not flat, the second insulating layer 3 above the first trace 2 protrudes upward to form a boss having substantially the same position and direction as the first trace 2.

[0025] Reference is made to FIG. 6, which is a schematic diagram of the formation process of the defect shown in FIG. 1. Figure 3 A full-area conductor layer 8 is formed, and then a layer of photoresist 6 is coated on the conductor layer 8. Since the top surface of the second insulating layer 3 forms a boss, the top surface of the conductor layer 8 and the photoresist 6 at the position of the boss also form a boss. An obvious slope is formed at the edge of the boss.

[0026] Reference is made to FIG. 7, which is a schematic diagram of the formation process of the defect shown in FIG. 1. Figure 4 The photoresist 6 is not sufficiently exposed at the slope position of the photoresist 6, and after the exposure and development processes, the photoresist 6 is easily left at this position.​

[0027] Reference Figure 5 After etching the conductor layer 8, the conductor layer 8 under the residual photoresist 6 will not be removed due to the influence of the residual photoresist 6.

[0028] Reference Figure 6 and in combination Figure 1 After removing the photoresist 6, two residual traces 7 will be formed on both sides of the first trace 2. The residual traces 7 are prone to short-circuiting the second trace 4 and the third trace 5.

[0029] Based on the above analysis, the inventors of the present disclosure propose a concept that if there is a breakpoint in the residual trace 7, the risk of short-circuiting the second trace 4 and the third trace 5 will be reduced.

[0030] To realize the above concept, reference Figures 7 to 12 The present disclosure provides a trace structure, comprising: a first insulating layer 1, a first trace layer, a second insulating layer 3, and a second trace layer which are sequentially stacked; the first trace layer comprises a first trace 2, and the second insulating layer 3 forms a boss protruding towards the second trace layer in a region opposite to the first trace 2 on a surface of the second insulating layer 3 away from the first trace layer; the second trace layer comprises adjacent second and third traces 4 and 5, and the second and third traces 4 and 5 both intersect with the first trace 2 in the orthographic projection of the first insulating layer 1, wherein in the two side edges of the first trace 2, the sections between the second and third traces 4 and 5 each comprise at least one corner point.

[0031] In the second trace layer, there is no other trace between the second and third traces 4 and 5.

[0032] If one side edge of the first trace 2 is regarded as a continuous line in a planar rectangular coordinate system, the left derivative and the right derivative of the line at the corner point are not equal.

[0033] In some embodiments, the material of the first insulating layer 1 comprises at least one of nitride of silicon, oxide of silicon, oxynitride of silicon, polyimide, and glass.

[0034] In some embodiments, the first insulating layer 1 is a substrate in a display panel or a substrate in a touch panel. In other embodiments, the first insulating layer 1 is an insulating layer inside a display panel, a touch panel, or a display touch panel. In other embodiments, the first insulating layer 1 is an insulating layer inside an integrated circuit.

[0035] In some embodiments, the material of the first trace 2 comprises at least one of molybdenum (Mo), titanium (Ti), and copper (Cu). In other embodiments, the first trace 2 is a titanium / aluminum / titanium multi-layer metal structure. In yet other embodiments, the material of the first trace 2 comprises a transparent conductor material such as indium tin oxide.

[0036] In some embodiments, the first trace 2 is a segment of a touch control sensing electrode or a touch control driving electrode. In other embodiments, the first trace 2 is a trace for any function within a display panel, a display touch control panel, a touch control panel, or an integrated circuit.

[0037] In some embodiments, the material of the second insulating layer 3 comprises at least one of a nitride of silicon, an oxide of silicon, a silicon oxynitride, and a polyimide.

[0038] In some embodiments, the second insulating layer 3 is an insulating layer within a display panel, a display touch control panel, or a touch control panel. In other embodiments, the second insulating layer 3 is an insulating layer within an integrated circuit.

[0039] In some embodiments, the material of the second trace 4 comprises at least one of molybdenum (Mo), titanium (Ti), and copper (Cu). In other embodiments, the second trace 4 is a titanium / aluminum / titanium multi-layer metal structure. In yet other embodiments, the material of the second trace 4 comprises a transparent conductor material such as indium tin oxide.

[0040] In some embodiments, the second trace 4 is a segment of a touch control driving electrode or a touch control sensing electrode. In other embodiments, the second trace 4 is a trace for any function within a display panel, a touch control panel, a display touch control panel, or an integrated circuit.

[0041] The edges of the first trace 2 on both sides are not straight lines or smooth curves, but have corner points. This causes the direction of the residual trace 7 to change abruptly at these corner points. When the direction of the residual trace 7 changes greatly, the residual trace 7 is prone to be broken at the corner points. When the residual trace 7 is broken into multiple segments, through proper design, both the residual trace 7 connected to the second trace 4 and the residual trace 7 connected to the third trace 5 are also broken. This keeps the second trace 4 and the third trace 5 in a disconnected state.

[0042] In some embodiments, at least one side edge of the first trace 2 has at least one concave segment or at least one convex segment to form the corner points. The edge of the first trace 2 at the junction of a concave segment and a non-concave segment (usually a straight segment) can form a corner point. The edge of the first trace 2 at the junction of a convex segment and a non-convex segment (usually a straight segment) can form a corner point.

[0043] In some embodiments, at least one side edge of the first trace 2 has an elliptical or circular concave section concaved toward the opposite side edge, and a straight section connected to the concave section.

[0044] Referring to Figure 7 Between the second trace 4 and the third trace 5, each of the two side edges of the first trace 2 has an elliptical concave section, and two corner points are formed at the position where each of the elliptical concave sections is connected to the straight section of the side edge of the first trace 2. The residual traces 7 in the trace layer where the second trace 4 and the third trace 5 are located are easily broken at the two corner points, thereby avoiding short circuit between the second trace 4 and the third trace 5.

[0045] In some embodiments, at least one side edge of the first trace 2 has an elliptical or circular convex section convexed away from the opposite side edge, and a straight section connected to the convex section.

[0046] Referring to Figure 8 Between the second trace 4 and the third trace 5, each of the two side edges of the first trace 2 has an elliptical convex section, and two corner points are formed at the position where each of the elliptical convex sections is connected to the straight section of the side edge of the first trace 2. The residual traces 7 in the trace layer where the second trace 4 and the third trace 5 are located are easily broken at the two corner points, thereby avoiding short circuit between the second trace 4 and the third trace 5.

[0047] In some embodiments, at least one side edge of the first trace 2 has a rectangular or trapezoidal concave section concaved toward the opposite side edge, and a straight section connected to the concave section.

[0048] Referring to Figure 9 Between the second trace 4 and the third trace 5, each of the two side edges of the first trace 2 has a rectangular concave section, and two corner points are formed at the position where each of the rectangular concave sections is connected to the straight section of the side edge of the first trace 2, and each of the rectangular concave sections further has two corner points inside. The residual traces 7 in the second trace layer where the second trace 4 and the third trace 5 are located are easily broken at the four corner points, thereby avoiding short circuit between the second trace 4 and the third trace 5.

[0049] In some embodiments, at least one side edge of the first trace 2 has a rectangular or trapezoidal convex section convexed away from the opposite side edge, and a straight section connected to the convex section.

[0050] Referring to Figure 10, between the second trace 4 and the third trace 5, each of the two side edges of the first trace 2 has a rectangular protruding segment, each rectangular protruding segment has two corner points at the connection position with the straight segment of the side edge of the first trace 2, and each rectangular protruding segment has two corner points by itself. The residual traces 7 in the second trace layer where the second trace 4 and the third trace 5 are located are easy to be disconnected at the four corner points, thereby avoiding short circuit between the second trace 4 and the third trace 5.

[0051] In some embodiments, the first trace 2 is bent to form a corner point at at least one bending position of the two side edges between the second trace 4 and the third trace 5.

[0052] Reference Figure 11 , the first trace 2 is bent to form a corner point at at least one bending position of the two side edges between the second trace 4 and the third trace 5.

[0053] The above embodiments of forming corner points at the edges of the first trace 2 can be combined. For example, referring to Figure 12 , the first trace 2 is bent and has multiple recessed segments at the two side edges.

[0054] In some embodiments, the surface of the first insulating layer 1 close to the side of the first trace layer is a flat surface. In combination with Figure 3 When the surface of the first insulating layer 1 close to the side of the first trace layer is a flat surface, the slope of the photoresist 6 above the first trace 2 is more obvious, and the residual of the photoresist 6 after exposure and development is also more obvious.

[0055] Of course, in other embodiments, the first trace 2 is semi-embedded in the first insulating layer 1.

[0056] Based on the same inventive concept, embodiments of the disclosure also provide a semiconductor device, comprising the aforementioned trace structure.

[0057] The electronic semiconductor device is, for example, any device with multiple layers of traces, such as a display panel, a touch panel, a touch display panel, an integrated circuit, etc.

[0058] Based on the same inventive concept, embodiments of the disclosure also provide an electronic device, comprising the aforementioned semiconductor device.

[0059] The electronic device is, for example, a display module, a display touch module, a mobile phone, a tablet computer, a navigator, a vehicle-mounted display screen, a display, a wearable electronic product, etc.

[0060] Each of the embodiments in the disclosure is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments.

[0061] The scope of the present disclosure is not limited to the above-described embodiments, and it will be apparent to those skilled in the art that various changes and modifications can be made thereto without departing from the scope and spirit of the present disclosure. The present disclosure is intended to include such changes and modifications within the scope and spirit of the claims made herein and their equivalents.

Claims

1. A wiring structure, characterized in that, include: A first insulating layer, a first wiring layer, a second insulating layer, and a second wiring layer are stacked sequentially. The first wiring layer includes a first wiring, which is a segment of the wiring in the touch sensing electrode. A protrusion is formed on the surface of the second insulating layer on the side away from the first wiring layer, opposite to the first wiring. The second wiring layer includes an adjacent second wiring and a third wiring. The second wiring is a segment of the wiring in the touch driving electrode, and the third wiring is a segment of the wiring in the grounding protection line. The orthographic projections of the second wiring and the third wiring on the first insulating layer intersect the orthographic projections of the first wiring on both sides of its width direction on the first insulating layer. In particular, the section between the second wiring and the third wiring on both sides of the first wiring includes at least one corner point. The first trace is bent so that at least one bend on its two sides forms a corner point between the second trace and the third trace. The first trace includes a first part and a second part, and the connection between the first part and the second part forms a bend. The connection between the first part and the second part is located between the second trace and the third trace.

2. The wiring structure according to claim 1, characterized in that, At least one side edge of the first trace has at least one recessed segment or at least one protruding segment to form the corner point.

3. The wiring structure according to claim 2, characterized in that, The first trace has at least one side edge having: an elliptical or circular recessed segment that is recessed toward the opposite side edge, and a straight segment connected to the recessed segment.

4. The wiring structure according to claim 2, characterized in that, At least one side edge of the first trace has: an elliptical or circular protrusion extending in a direction away from the opposite side edge, and a straight line segment connected to the protrusion.

5. The wiring structure according to claim 2, characterized in that, The first trace has at least one side edge having: a rectangular or trapezoidal recessed segment that is recessed toward the opposite side edge, and a straight segment connected to the recessed segment.

6. The wiring structure according to claim 2, characterized in that, The first trace has at least one side edge having: a rectangular or trapezoidal protrusion extending in a direction away from the opposite side edge, and a straight line segment connected to the protrusion.

7. A semiconductor device, characterized in that, include: The wiring structure according to any one of claims 1 to 6.

8. An electronic device, characterized in that, include: The semiconductor device according to claim 7.

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