Defect location method, defect analysis method and system

Abstract

The present application discloses a defect location method, a defect analysis method, and a system. The defect location method includes: obtaining first position information of a defect region from one side of a first surface of a semiconductor device; wherein the semiconductor device includes a cutting surface formed by invisible laser cutting, the semiconductor device includes a first surface and a second surface disposed opposite to each other, and the cutting surface is located between the first surface and the second surface and connected to the first surface; polishing the semiconductor device multiple times from one side of the first surface, and obtaining second position information of an abnormal crystal structure region on the polished surface of the semiconductor device after each polishing; and obtaining a defect starting region based on the first position information, multiple second position information, and the cutting surface. In the above manner, the present application can locate the defect starting region during the invisible laser cutting process, thereby facilitating the analysis of scattering defects during the invisible laser cutting process.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor structure analysis, and in particular to a defect location method, a defect analysis method and a system. Background Art

[0002] To reduce silicon slag generated during chip cutting, invisible laser cutting technology is currently commonly used to cut semiconductor devices. The principle of invisible laser cutting is that a laser is transmitted through a silicon wafer and focused into the interior of the wafer. The silicon melts at high temperatures, and upon recrystallization, a polycrystalline structure is formed. Internal stress forms internal fracture lines. However, during the actual cutting process, some laser light tends to scatter and leak into the functional areas of the chip, causing damage. To analyze the scattering defects generated during invisible laser cutting, it is necessary to locate the source of the laser scattering. Summary of the Invention

[0003] The main technical problem solved by this application is to provide a defect positioning method, a defect analysis method and a system, which can locate the starting area of ​​defects in the invisible laser cutting process, so as to assist in analyzing the scattering defects in the invisible laser cutting process.

[0004] In order to solve the above technical problems, a technical solution adopted in the present application is: providing a defect location method, comprising: obtaining first position information of a defect area from one side of a first surface of a semiconductor device; wherein, the semiconductor device includes a cutting surface formed by invisible laser cutting, and the semiconductor device includes the first surface and the second surface arranged opposite to each other, and the cutting surface is located between the first surface and the second surface and connected to the first surface; polishing the semiconductor device multiple times from one side of the first surface, and obtaining second position information of the abnormal crystal structure area of ​​the polished surface of the semiconductor device after each polishing; obtaining the starting area of ​​the defect based on the first position information, multiple pieces of the second position information and the cutting surface.

[0005] The step of obtaining first position information of a defect point on the surface of the semiconductor device includes: obtaining a thermal imaging image of the first surface of the semiconductor device; and determining the first position information of the defect area based on the thermal imaging image.

[0006] Among them, the step of determining the first position information of the defect area based on the thermal imaging image includes: obtaining an area with a temperature greater than a temperature threshold from the thermal imaging image, and using the area as the defect area; using the coordinates of the center point of the defect area as the first position information of the defect area.

[0007] Wherein, in the direction from the first surface to the second surface, the depth of each polishing is less than or equal to 10 microns.

[0008] Among them, the step of obtaining the second position information of the crystal structure abnormal point on the polished surface of the semiconductor device after each polishing includes: obtaining a transmission image of the polished surface of the semiconductor device after each polishing; obtaining the crystal structure information of at least a part of the polished surface after polishing based on the transmission image; obtaining the crystal structure abnormal area based on the crystal structure information; and using the center point coordinates of the crystal structure abnormal area as the second position information.

[0009] Wherein, one side of the first surface includes multiple defect areas; the step of obtaining the second position information of the crystal structure abnormality point of the polished surface of the semiconductor device after each polishing includes: obtaining the second position information of multiple crystal structure abnormality areas of the polished surface after each polishing; for each of the defect areas, obtaining the second position information closest to it from the multiple second position information based on the first position information of the defect area, and associating the crystal structure abnormality area corresponding to the second position information closest to it with the defect area; the step of obtaining the defect occurrence starting area based on the first position information, the multiple second position information and the cutting surface includes: for each of the defect areas, obtaining the defect occurrence starting area of ​​the current defect area based on the first position information of the current defect area, the multiple second position information associated with the current defect area and the cutting surface.

[0010] Among them, the step of obtaining the crystal structure abnormality area based on the crystal structure information includes: taking the crystal structure information of the surrounding area that has not been acted upon by the laser as the initial crystal structure information; and taking the area where the crystal structure information is different from the initial crystal structure information as the crystal structure abnormality area.

[0011] Among them, the step of obtaining the defect starting area based on the first position information, multiple second position information and the cutting surface includes: fitting the first position information and multiple second position information into a straight line; taking the intersection point of the straight line and the cutting surface as the target center point of the defect starting area; obtaining the defect starting area; wherein, the distance between any position in the defect starting area and the target center point is less than or equal to a distance threshold.

[0012] In order to solve the above technical problems, another technical solution adopted in this application is: to provide a defect analysis method, including: obtaining the defect starting area by using the semiconductor device defect locating method described in the above technical solution; separating the defect starting area from the semiconductor device; and analyzing the crystal structure of the defect starting area.

[0013] In order to solve the above technical problems, another technical solution adopted in the present application is: to provide a defect analysis system, including: a defect area determination component, used to obtain first position information of the defect area from the first surface side of the semiconductor device; a polishing component, used to polish the semiconductor device multiple times from the first surface side; a crystal structure abnormal area determination component, used to obtain second position information of the crystal structure abnormal area on the polished surface of the semiconductor device after each polishing; a processor, used to obtain the starting area of ​​the defect based on the first position information, multiple second position information and the cutting surface.

[0014] The beneficial effect of the present application is: different from the prior art, the present application determines the defect area on the first surface of the semiconductor device and polishes the semiconductor device layer by layer to obtain the structural abnormality area on the polished surface after each polishing, and then combines the above-mentioned defect area and multiple structural abnormality areas to obtain the starting area of ​​the defect occurrence during the invisible laser cutting process, so as to help analyze the scattering defects in the invisible laser cutting process, thereby optimizing the invisible laser cutting process. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without inventive efforts. Among them:

[0016] Figure 1 This is a flow chart of an implementation method of a defect location method of the present application;

[0017] Figure 2 It is a schematic cross-sectional structural diagram corresponding to an embodiment before step S101;

[0018] Figure 3 is a flowchart corresponding to an embodiment of step S102;

[0019] Figure 4 This is a structural diagram of an implementation scheme of the defect analysis system proposed in this application. DETAILED DESCRIPTION

[0020] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0021] See also Figure 1 , Figure 1 This is a flow chart of an embodiment of a defect location method of the present application, which includes:

[0022] S101: Obtain first position information of a defective region from a first surface side of a semiconductor device.

[0023] See also Figure 2 , Figure 2 1 is a schematic cross-sectional view of an embodiment prior to step S101. Specifically, the steps prior to step S101 include: providing a semiconductor device 100, which may be a wafer including a plurality of chips 200. Figure 2 Only two chips 200 are schematically shown in the semiconductor device 100. However, in actual use, the semiconductor device 100 may include multiple chips 200. Furthermore, the semiconductor device 100 is cut using invisible laser cutting technology to facilitate the subsequent separation of the semiconductor device 100 into multiple individual chip structures. The specific process of invisible laser cutting includes: only cutting the semiconductor device 100 of a predetermined thickness, that is, leaving the semiconductor device 100 of a certain thickness uncut. The cutting thickness can be determined according to actual needs.

[0024] For further information, please refer to Figure 2 , the specific implementation process of step S101 includes: obtaining first position information of a defective area (not shown) from one side of the first surface 101 of the semiconductor device 100. The semiconductor device 100 includes a cutting surface 105 formed by invisible laser cutting. The semiconductor device 100 also includes a first surface 101 and a second surface 102 arranged opposite to each other, and the cutting surface 105 formed by invisible laser cutting is located between the first surface 101 and the second surface 102 and is connected to the first surface 101. In addition, a film 210 is attached to one side of the second surface 102 to provide a certain protection for the second surface 102, and the film 210 at the corresponding position between adjacent chips 200 in the semiconductor device 100 can be separated to divide the cut semiconductor device 100 into multiple separate chip structures.

[0025] Specifically, in response to invisible laser cutting, a defective area appears on the first surface of the semiconductor device, and the defective area generates heat due to the action of the laser pulse; therefore, the step of obtaining first position information of the defective area from one side of the first surface of the semiconductor device includes: obtaining a thermal imaging image of the first surface of the semiconductor device. A microscopic infrared hotspot positioning test system can be used to receive thermal radiation from the first surface of the semiconductor device to generate a thermal imaging image; the temperature values ​​at various positions on the first surface of the semiconductor device are obtained through the thermal imaging image, and an area with a temperature greater than a temperature threshold is obtained from the thermal imaging image, and the area is regarded as a defective area. The above-mentioned temperature threshold can be obtained by estimation or by reverse deduction through multiple experiments.

[0026] Furthermore, the coordinates of the center point of the defective area are used as the first position information of the defective area. The first position information of the defective area can be determined by constructing a coordinate system. Specifically, the first surface of the semiconductor device is used as the Z-axis origin, with the Z-axis perpendicular to the first surface. The length of the acquired thermal image is the X-axis, the width is the Y-axis, and the X, Y, and Z axes are mutually perpendicular and intersect at a point. The above-mentioned first position information includes the corresponding X, Y, and Z-axis coordinates.

[0027] S102: polishing the semiconductor device multiple times from the first surface side, and obtaining second position information of a crystal structure abnormal region on the polished surface of the semiconductor device after each polishing.

[0028] Specifically, see Figure 3 , Figure 3 FIG. 1 is a flow chart of an embodiment corresponding to step S102. Specifically, the embodiment includes:

[0029] S201: polishing the semiconductor device multiple times from the first surface side.

[0030] Specifically, step S201 includes polishing the semiconductor device multiple times from the first surface to the second surface. The semiconductor device can be polished using precision micro-polishing equipment, and each polishing depth from the first surface to the second surface is less than or equal to 10 microns. The specific polishing depth can be determined based on actual needs. It should be noted that the smaller the polishing depth, the more accurate the location information of the defect initiation area obtained subsequently.

[0031] S202: Obtaining a transmission image of the polished surface of the semiconductor device after each polishing, and acquiring crystal structure information of at least a portion of the polished surface after polishing based on the transmission image.

[0032] Specifically, the process of obtaining a transmission image of the polished surface of the semiconductor device after each polishing step in step S202 includes: directing an electron beam onto the polished surface of the semiconductor device, causing the crystals on the polished surface to diffract the electron beam, and collecting the diffraction pattern using an electron microscope to form a transmission image. Analysis of the obtained transmission image can provide information such as orientation and phase information of the different crystals on the corresponding polished surface. Obtaining the transmission image of the polished surface can be achieved using electron backscattered diffraction (EBSD) technology, and the specific process will not be elaborated on in detail.

[0033] Furthermore, because different crystal structures produce different diffraction patterns for the electron beam, crystal structure information of at least a portion of the polished surface can be obtained by observing and analyzing the transmission image. Crystal structure information includes at least crystal orientation and phase information. Obtaining this structural information facilitates subsequent identification of regions within the polished surface with abnormal crystal structures.

[0034] S203: Obtaining a crystal structure abnormal region based on the crystal structure information, and using the coordinates of the center point of the crystal structure abnormal region as second position information.

[0035] Specifically, the implementation process of step S203 includes: in response to cutting the semiconductor device using the invisible laser cutting technology, the structure of part of the crystal in the semiconductor device will change under the action of the laser; based on the crystal structure information obtained in step S202, the crystal structure information of the surrounding area not subjected to the laser action is used as the initial crystal structure information, and the area in the crystal structure information that is different from the initial crystal structure information is used as the crystal structure abnormal area. In addition, in this embodiment, the structure information of the corresponding crystal under normal conditions can also be obtained in advance and compared with the crystal structure information obtained in step S202 to obtain the crystal structure abnormal area. Obtaining the crystal structure abnormal area helps to determine the position of the laser action in the corresponding polished surface.

[0036] Furthermore, the coordinates of the center point of the abnormal crystal structure region are used as the second position information. Specifically, the coordinate system constructed in the above step S101 is used to obtain the second position information corresponding to the coordinates of the center point of the abnormal crystal structure region.

[0037] S103: Obtaining a defect occurrence starting area based on the first position information, the plurality of second position information and the cutting surface.

[0038] Specifically, the implementation process of step S103 includes fitting the first position information of the defective region on the first surface of the semiconductor device obtained in step S101 and the second position information of the crystal structure abnormal region on the polished surface of the semiconductor device after each polishing step obtained in step S102 into a straight line. Fitting the multiple position information into a straight line can be implemented using 3D modeling software, and the specific process is not further described here.

[0039] Furthermore, the intersection point of the above-mentioned straight line and the cutting surface formed by invisible laser cutting in the semiconductor device is obtained as the target center point of the defect occurrence starting area. The defect occurrence area is obtained based on the above-mentioned target center point. Specifically, the third position information of the cutting surface can be determined by the coordinate system constructed in step S101, so as to obtain the above-mentioned target center point based on the straight line and the third position information obtained above. Among them, the distance between any position in the defect occurrence area and the target center point is less than or equal to the distance threshold, that is, the area whose distance to the target center point is within the range of the distance threshold is regarded as the defect occurrence area; the distance threshold can be obtained by estimation or by reverse deduction through multiple experiments.

[0040] The present application determines the defect area on the first surface of the semiconductor device and polishes the semiconductor device layer by layer to obtain the structural abnormality area on the polished surface after each polishing, thereby combining the above-mentioned defect area and multiple structural abnormality areas to obtain the starting area of ​​the defect occurrence during the invisible laser cutting process, so as to help analyze the scattering defects in the invisible laser cutting process and thus optimize the invisible laser cutting process.

[0041] In another embodiment, in response to the first surface including multiple defect regions, that is, when the semiconductor device is cut using invisible laser cutting technology, multiple defect initiation regions exist inside the semiconductor device. The defect localization method proposed in this application includes:

[0042] Obtain a thermal image of the first surface of the semiconductor device, and determine first position information corresponding to multiple defective regions based on the thermal image. The step of obtaining the first position information corresponding to each defective region can be referred to in step S101 of the above embodiment, and the specific process is not repeated here.

[0043] Furthermore, the semiconductor device is polished multiple times from one side of the first surface to obtain second position information of the crystal structure abnormality region of the polished surface of the semiconductor device after each polishing. Specifically, the second position information of multiple crystal structure abnormality regions of the polished surface after each polishing is obtained. For each defect region, the second position information closest to it is obtained from multiple second position information based on the first position information of the defect region, and the crystal structure abnormality region corresponding to the second position information closest to it is associated with the defect region. The detailed process of obtaining the second position information of the crystal structure abnormality region of the polished surface after each polishing can be referred to step S102 in the above embodiment and will not be repeated here. By associating the defect region with the crystal structure abnormality region closest to it in each polishing surface, it is helpful to obtain the defect occurrence starting area corresponding to each defect region.

[0044] Optionally, for each defect area, after obtaining the crystal structure abnormality area associated with it on the polishing surface after the first polishing, in response to the fact that different polishing surfaces contain multiple crystal structure abnormality areas, the two crystal structure abnormality areas closest to each other in adjacent polishing surfaces can also be associated; thereby obtaining multiple associated crystal structure abnormality areas for each defect area.

[0045] Furthermore, the step of obtaining the defect occurrence starting area based on the first position information, the multiple second position information, and the cutting surface includes: for each defect area, obtaining the defect occurrence starting area of ​​the current defect area based on the first position information of the current defect area, the multiple second position information associated with the current defect area, and the cutting surface. Specifically, the first position information of the current defect area and the multiple second position information associated with the current defect area are fitted into a straight line, the intersection point of the straight line and the cutting surface is obtained, the intersection point is used as the target center point of the defect occurrence starting area corresponding to the current defect area, and the area within a distance threshold range from the target center point is used as the defect occurrence starting area corresponding to the current defect area. The specific step of obtaining the defect occurrence starting area can be referred to step S103 in the above embodiment and will not be repeated here.

[0046] In one embodiment, the present application also proposes a defect analysis method, which utilizes Figure 1The defect location method described in steps S101 to S103 obtains the defect initiation region. Further, the obtained defect initiation region is separated from the semiconductor structure. The crystals in the separated defect initiation region are analyzed to obtain the reasons why defects are prone to occur during the cutting of semiconductor devices using invisible laser cutting technology and the laws of structural changes of different crystal materials under the action of lasers. The invisible laser cutting technology is optimized based on the defects generated to reduce the probability of defects during the cutting process. For example, based on the analysis of the laws of defects generated in different crystals during invisible laser cutting, corresponding invisible laser cutting trajectories are formulated for different crystals.

[0047] See also Figure 4 , Figure 4 1 is a schematic diagram of a structure of an embodiment of a defect analysis system proposed in the present application. Specifically, the defect analysis system proposed in the present application includes: a defect region determination component 10, a polishing component 20, a crystal structure abnormal region determination component 30, and a processor 40.

[0048] The defective region determining component 10 is used to obtain first position information of the defective region from the first surface side of the semiconductor device. Specifically, the defective region determining component 10 includes an infrared detector to obtain a thermal image of the first surface of the semiconductor device.

[0049] The polishing assembly 20 is used to perform multiple polishing operations on the semiconductor device from the first surface side. Specifically, the polishing assembly 20 can be a precision micro-area polishing device.

[0050] The crystal structure abnormal region determination component 30 is used to obtain second position information of the crystal structure abnormal region on the polished surface of the semiconductor device after each polishing. Specifically, the crystal structure abnormal region determination component 30 includes a scanning electron microscope 31, a camera 33, and an image processing device 35. The scanning electron microscope 31 is used to obtain a diffraction pattern of the electron beam on the surface of the semiconductor device, the camera 33 records and stores the diffraction pattern, and the image processing device 35 processes the diffraction pattern to determine the crystal structure abnormal region and the second position information of the crystal structure abnormal region.

[0051] The processor 40 is coupled to the defect area determination component 10, the polishing component 20 and the crystal structure abnormality area determination component 30, and is used to control the polishing component 20 to polish the semiconductor device, and to obtain the defect starting area based on the first position information, multiple second position information and the cutting surface.

[0052] The above description is only an implementation method of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A defect location method, characterized in that: include: Obtaining first position information of a defective region from a first surface side of a semiconductor device; wherein the semiconductor device includes a cut surface formed by invisible laser cutting, the semiconductor device includes the first surface and the second surface disposed opposite to each other, the cut surface being located between the first surface and the second surface and connected to the first surface; polishing the semiconductor device multiple times from the first surface side, and obtaining second position information of a crystal structure abnormal region on the polished surface of the semiconductor device after each polishing; Obtaining a defect occurrence starting area based on the first position information, a plurality of second position information and the cutting surface; The step of obtaining first position information of a defective area from a first surface side of the semiconductor device includes: obtaining a thermal image of the first surface of the semiconductor device; determining the first position information of the defective area based on the thermal image; wherein the defective area is an area in the thermal image having a temperature greater than a temperature threshold; The step of obtaining the second position information of the crystal structure abnormal region of the polished surface of the semiconductor device after each polishing comprises: obtaining a transmission image of the polished surface of the semiconductor device after each polishing; obtaining crystal structure information of at least a portion of the polished surface after polishing based on the transmission image; obtaining the crystal structure abnormal region based on the crystal structure information; and using the coordinates of the center point of the crystal structure abnormal region as the second position information. Among them, the step of obtaining the defect starting area based on the first position information, multiple second position information and the cutting surface includes: fitting the first position information and multiple second position information into a straight line; taking the intersection point of the straight line and the cutting surface as the target center point of the defect starting area; obtaining the defect starting area; wherein, the distance between any position in the defect starting area and the target center point is less than or equal to a distance threshold.

2. The method according to claim 1, characterized in that The step of determining the first position information of the defective area based on the thermal imaging image includes: Obtaining an area with a temperature greater than a temperature threshold from the thermal image, and treating the area as a defect area; The center point coordinates of the defect area are used as the first position information of the defect area.

3. The method according to claim 1, characterized in that In the direction from the first surface to the second surface, the depth of each polishing is less than or equal to 10 micrometers.

4. The method according to claim 1, wherein One side of the first surface includes a plurality of defect areas; The step of obtaining second position information of a region with abnormal crystal structure on the polished surface of the semiconductor device after each polishing comprises: obtaining second position information of a plurality of regions with abnormal crystal structure on the polished surface after each polishing; for each defect region, obtaining the second position information closest to the defect region from the plurality of second position information based on the first position information of the defect region, and associating the region with abnormal crystal structure corresponding to the second position information closest to the defect region with the defect region; The step of obtaining the defect occurrence starting area based on the first position information, multiple second position information and the cutting surface includes: for each defect area, obtaining the defect occurrence starting area of ​​the current defect area based on the first position information of the current defect area, multiple second position information associated with the current defect area and the cutting surface.

5. The method according to claim 1, wherein The step of obtaining the abnormal crystal structure region based on the crystal structure information comprises: The crystal structure information of the surrounding area not subjected to the laser action is used as the initial crystal structure information; The region in the crystal structure information that is different from the initial crystal structure information is regarded as the abnormal crystal structure region.

6. A defect analysis method, characterized in that: include: The defect starting area obtained by using the semiconductor device defect locating method according to any one of claims 1 to 5; separating the defect occurrence initiation region from the semiconductor device; The crystal structure of the defect initiation region is analyzed.

7. A defect analysis system, characterized in that: The defect analysis system is used to implement the defect analysis method according to claim 6, and the defect analysis system includes: A defect region determining component, configured to obtain first position information of a defect region from a first surface side of the semiconductor device; a polishing assembly, configured to perform multiple polishing operations on the semiconductor device from one side of the first surface; a crystal structure abnormal region determining component, configured to obtain second position information of the crystal structure abnormal region on the polished surface of the semiconductor device after each polishing; A processor is configured to obtain a defect occurrence starting area based on the first position information, a plurality of second position information, and a cutting surface.

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