Inspection tool for a semiconductor processing tool and method of use

Abstract

The present disclosure relates to an inspection tool for semiconductor processing tools and methods of use. Wafer table inspection tools described herein are capable of being positioned above a wafer table while the wafer table is positioned in a bottom module of an exposure tool of a photolithography system. The wafer table inspection tools are capable of quickly evaluating surface bump conditions on the wafer table and evaluating cleaning performance of a cleaning operation that cleans the surface bumps.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to an inspection tool for a semiconductor processing tool and methods of use. BACKGROUND

[0002] As semiconductor device sizes continue to shrink, some photolithography techniques are subject to optical limitations, resulting in resolution problems and a decline in photolithography performance. In contrast, extreme ultraviolet (EUV) photolithography can enable smaller semiconductor device sizes and / or feature sizes by using reflective optics and a radiation wavelength of approximately 13.5 nanometers or less. SUMMARY

[0003] According to one embodiment of the present disclosure, a method for inspecting a wafer table is provided, comprising: performing a cleaning operation to clean a wafer table on a wafer stage of an exposure tool; placing a wafer table inspection tool above the wafer table after the cleaning operation; and performing an inspection of the wafer table using an image capture device of the wafer table inspection tool while the wafer table inspection tool is above the wafer table, wherein the image capture device of the wafer table inspection tool is used to inspect a plurality of surface nodules on the wafer table.

[0004] According to another embodiment of the present disclosure, a method for inspecting a wafer table is provided, comprising: receiving a wafer in an extreme ultraviolet (EUV) scanner tool; performing an exposure operation using the EUV scanner tool to expose the wafer to EUV radiation; positioning an inspection device above a wafer table included in a bottom module of the EUV scanner tool after the exposure operation; generating image sensor data associated with a plurality of surface nodules on the wafer table using the inspection device; generating respective images for the plurality of surface nodules based on the image sensor data; and determining whether one or more cleaning parameters of a cleaning operation in which the plurality of surface nodules were cleaned satisfy one or more performance thresholds based on the respective images.

[0005] According to yet another embodiment of the present disclosure, a wafer table inspection tool is provided, comprising: a support frame configured to be positioned above a wafer table when the wafer table is positioned on a wafer stage in a bottom module of an extreme ultraviolet (EUV) lithography system and the bottom module is at least partially removed from the EUV lithography system to provide access to the wafer table; and an inspection device fixed to the support frame and configured to inspect the wafer table when the wafer table is positioned on the wafer stage in the bottom module. BRIEF DESCRIPTION OF DRAWINGS

[0006] Aspects of the disclosure, can be best understood with reference to the following specific description when considered in conjunction with the accompanying drawings. It should be noted that the various features are not drawn to scale. In fact, the dimensions of the various features can have been arbitrarily increased or decreased for the sake of discussion. Embodiments of the disclosure will employ embodiments of the inventive concept including the following.

[0007] Figure 1 is an illustration of an example lithography system described herein.

[0008] Figure 2 is an illustration of an example lithography system described herein. Figure 1

[0009] Figure 3 is an illustration of an example wafer table described herein for use in a bottom module of a lithography system described herein. Figure 2

[0010] Figure 4 is an illustration of an example implementation described herein.

[0011] Figure 5 is an illustration of an example wafer table inspection tool described herein.

[0012] Figure 6A , Figure 6B and Figures 7A-7G are illustrations of example implementations described herein.

[0013] Figure 8 is an illustration of example components of one or more devices described herein. Figure 1

[0014] Figures 9-11 is a flowchart of an example process described herein related to inspecting a wafer table. DETAILED DESCRIPTION

[0015] The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, formation of a first feature over or on a second feature in the description that follows can include embodiments in which the first and second features are formed in direct contact, and can also include embodiments in which additional features can be formed between the first and second features, such that the first and second features can not be in direct contact. In addition, the present disclosure can repeat reference numerals and / or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and / or configurations discussed.

[0016] ​​​Additionally, spatially relative terms can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. Spatially relative terms can be intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0017] Lithography systems, such as extreme ultraviolet (EUV) lithography systems, include a wafer stage with a wafer table on top of the wafer stage to support a semiconductor substrate, such as a wafer. After the wafer table is cleaned or even if the wafer table is brand new, the surface quality of the wafer table can not be directly and / or quantitatively inspected.

[0018] When the wafer table is contaminated, the wafer table is removed from the lithography system for cleaning, which results in downtime of the lithography system. After the cleaning operation, the wafer table is reinstalled into the lithography system, the lithography system is pumped down to vacuum, and a test exposure is performed on the semiconductor substrate. The results of the test exposure, which can include a map of the exposed semiconductor substrate, are reviewed to infer the cleaning performance of the cleaning operation. If the cleaning performance is determined to be unsatisfactory, the vacuum is vented from the lithography system, the wafer table is removed and cleaned again in a subsequent cleaning operation, and the testing process is repeated to verify the cleaning performance of the subsequent cleaning operation.

[0019] The above-described cleaning verification technique can result in significant downtime of the lithography system and can provide inaccurate verification of the cleaning performance. For example, the process of reinstalling the wafer table in the lithography system and pumping down the lithography system to vacuum can take about 6 hours or more, and the test exposure and cleaning performance evaluation can take about 4 hours or more. If additional cleaning is to be performed, the venting (or removal of the vacuum) and the subsequent cleaning operation can take about 4 hours or more, and then another 10 hours or more are needed to retest the wafer table.

[0020] Some implementations described herein provide a wafer table inspection tool and associated techniques for directly inspecting a wafer table using the wafer table inspection tool. The wafer table inspection tool can be positioned above the wafer table while the wafer table is positioned in a bottom module of an exposure tool of a lithography system. The wafer table inspection tool can quickly generate inspection images for evaluating surface bump conditions on the wafer table and for evaluating cleaning performance of a cleaning operation during which the surface bumps are cleaned.

[0021] The wafer table inspection tools described herein greatly reduce the duration of inspecting and, if needed, re-cleaning a wafer table, as the inspection of the wafer table using the wafer table inspection tools is performed under atmospheric conditions (e.g., without the need to re-install the wafer table in the lithography system, without the need to pump down the lithography system to perform a test exposure, and without the need to vent the lithography system for additional cleaning). This reduces the downtime of the lithography system and improves the productivity and throughput of the lithography system. Moreover, the inspection images generated by the inspection tools, as well as other techniques described herein (e.g., machine learning), can be used to estimate and plan subsequent cleaning operations and wafer table replacements.

[0022] Figure 1 is an illustration of an example lithography system 100 described herein. The lithography system 100 includes an extreme ultraviolet (EUV) lithography system or other type of lithography system configured to transfer a pattern to a semiconductor substrate using mirror-based optics. The lithography system 100 can be configured for use in a semiconductor processing environment, such as a semiconductor foundry or semiconductor manufacturing facility.

[0023] As shown in Figure 1 , the lithography system 100 includes a radiation source 102 and an exposure tool 104. The radiation source 102 (e.g., an EUV radiation source or other type of radiation source) is configured to generate radiation 106, such as EUV radiation and / or other types of electromagnetic radiation (e.g., light). The exposure tool 104 (e.g., an EUV scanner tool and EUV exposure tool, or another type of exposure tool) is configured to focus the radiation 106 onto a reflective reticle 108 (or photomask) such that a pattern is transferred from the reticle 108 onto a semiconductor substrate 110 using the radiation 106.

[0024] The radiation source 102 includes a vessel 112 and a collector 114 in the vessel 112. The collector 114 includes a curved mirror configured to collect and focus the radiation 106 generated by the radiation source 102 to an intermediate focus 116. The radiation 106 is generated by a plasma generated from a droplet 118 of target material (e.g., a droplet of target material including a Sn droplet or other type of droplet) exposed to a laser beam 120. The droplet 118 is provided across the front of the collector 114 by a droplet generator (DG) head 122. The DG head 122 is pressurized to provide a fine and controlled output of the droplet 118.

[0025] A laser source (e.g., a pulsed carbon dioxide (CO2) laser) generates a laser beam 120. The laser beam 120 is provided (e.g., through a beam delivery system to a focusing lens) such that the laser beam 120 is focused through a window 124 of the collector 114. The laser beam 120 is focused onto a droplet 118 that generates a plasma. The plasma generates plasma emissions, some of which are the radiation 106. The laser beam 120 is pulsed at a timing that is synchronized with the flow of the droplet 118 from the DG head 122. In some implementations, the laser beam 120 includes multiple pulses, such as a “pre-pulse” that deforms (e.g., increases the surface area of and / or partially excites the droplet 118) the droplet 118 and a subsequent “main pulse” that converts the droplet 118 into a plasma.

[0026] The exposure tool 104 includes an illuminator 126 and a projection optics box (POB) 128. The illuminator 126 includes multiple mirrors configured to focus and / or direct the radiation 106 onto the reticle 108 to illuminate a pattern on the reticle 108. The multiple mirrors include, for example, a mirror 130a and a mirror 130b. The mirror 130a includes a field facet mirror (FFM) or another type of mirror that includes multiple field facets. The mirror 130b includes a pupil facet mirror (PFM) or another type of mirror that also includes multiple pupil facets. The facets of the mirrors 130a and 130b are arranged to focus, polarize, and / or otherwise tune the radiation 106 from the radiation source 102 to increase the uniformity of the radiation 106 and / or to increase a particular type of radiation component (e.g., transverse electric (TE) polarized radiation, transverse magnetic (TM) polarized radiation). Another mirror 132 (e.g., a relay mirror) is included to direct the radiation 106 from the illuminator 126 onto the reticle 108.

[0027] The projection optics box 128 includes multiple mirrors configured to project the radiation 106 onto the semiconductor substrate 110 after modifying the radiation 106 based on the pattern of the reticle 108. The multiple mirrors include, for example, mirrors 134a-134f. In some implementations, the mirrors 134a-134f are configured to focus or reduce the radiation 106 into an exposure field, which can include one or more die areas on the semiconductor substrate 110.

[0028] The exposure tool 104 includes a wafer stage 136 (or substrate stage) configured to support the semiconductor substrate 110. Further, the wafer stage 136 is configured to move (or step) the semiconductor substrate 110 through a plurality of exposure fields as the radiation 106 transfers a pattern from the reticle 108 onto the semiconductor substrate 110. The wafer stage 136 is included in a bottom module 138 of the exposure tool 104. The bottom module 138 includes removable subsystems of the exposure tool 104. The bottom module 138 can be slid out of and / or otherwise removed from the exposure tool 104 to enable cleaning and inspection of the wafer stage 136 and / or components of the wafer stage 136. The bottom module 138 isolates the wafer stage 136 from other areas in the exposure tool 104 to reduce and / or minimize contamination of the semiconductor substrate 110. Further, the bottom module 138 can provide physical isolation for the wafer stage 136 by reducing the transmission of vibrations (e.g., vibrations in a semiconductor processing environment in which the lithography system 100 is located, vibrations in the lithography system 100 during operation of the lithography system 100) to the wafer stage 136 and, thus, the semiconductor substrate 110. This reduces movement and / or disturbance of the semiconductor substrate 110, which reduces the likelihood that vibrations can cause misalignment of the pattern.

[0029] The exposure tool 104 also includes a reticle stage 140 configured to support and / or secure the reticle 108. Further, the reticle stage 140 is configured to move or slide the reticle through the radiation 106 such that the reticle 108 is scanned by the radiation 106. In this manner, a pattern larger than a field or beam of the radiation 106 can be transferred to the semiconductor substrate 110.

[0030] In an example exposure operation (e.g., an EUV exposure operation), the DG head 122 provides a stream of droplets 118 across the front of the collector 114. The laser beam 120 contacts the droplets 118, causing a plasma to be generated. The plasma emits or produces radiation 106 (e.g., EUV light). The radiation 106 is collected by the collector 114 and directed out of the vessel 112 and into the exposure tool 104 towards a mirror 130a of an illuminator 126. The mirror 130a reflects the radiation 106 onto a mirror 130b, which reflects the radiation 106 onto a mirror 132 towards a reticle 108. The radiation 106 is modified by a pattern in the reticle 108. In other words, the radiation 106 is reflected from the reticle 108 based on the pattern of the reticle 108. The reflected reticle 108 directs the radiation 106 towards a mirror 134a in a projection optics box 128, which reflects the radiation 106 onto a mirror 134b. Through mirrors 134c-134f, the radiation 106 continues to be reflected and reduced in the projection optics box 128. The mirror 134f reflects the radiation 106 onto the semiconductor substrate 110 such that the pattern of the reticle 108 is transferred to the semiconductor substrate 110. The above-described exposure operation is an example, and the lithography system 100 can operate according to other EUV techniques and radiation paths that include a greater number of mirrors, a lesser number of mirrors, and / or different configurations of mirrors.

[0031] As described above, Figure 1 are provided by way of example. Other examples can differ from those described. Figure 1 For example, another example can include additional components, fewer components, different components, or differently arranged components than those shown in Figure 1 Additionally or alternatively, Figure 1 a set of components (e.g., one or more components) of may perform one or more functions described herein as being performed by another set of components.

[0032] Figure 2 Figure 1 is an example bottom module 138 of the lithography system 100 described herein for Figure 2 As shown, the bottom module 138 includes a base frame 202 (which can also be referred to as a support frame). The base frame 202 interfaces with a floor of a semiconductor processing environment in which the lithography system 100 is located. The base frame 202 further supports other components included in the bottom module 138. In some implementations, wheels, casters, or other components are included at the bottom of the base frame 202 to allow the base frame 202 to be slid or displaced relative to the exposure tool 104. This allows the base frame 202 to be removed from the exposure tool 104.

[0033] The metrology frame 204 is positioned above the base frame 202 and separates the bottom module 138 from a vacuum chamber in which the illuminator 126 and the projection optics box 128 are positioned. The metrology frame 204 includes openings therein to allow the radiation 106 to be projected into the bottom module 138 and towards the wafer stage 136. The metrology frame 204 and the base frame 202 are coupled in a resilient manner by an isolation assembly 206. The isolation assembly 206 provides vibration isolation between the bottom module 138 and the metrology frame 204 by reducing the transmission of vibrations between the bottom module 138 and the metrology frame 204. The isolation assembly 206 includes springs, active vibration isolation systems, suspension systems, and / or air mounting systems, among other examples.

[0034] A balance mass 208 is included and / or positioned above the base frame 202. One or more wafer stages 136 are included and / or positioned above the balance mass 208. In some implementations, the bottom module 138 includes multiple wafer stages 136. A first wafer stage 136 can be used to expose a first semiconductor substrate 110 to the radiation 106, while a second wafer stage 136 is used for measurement and alignment purposes of a second semiconductor substrate 110 in preparation for exposure. In this manner, multiple wafer stages 136 can enable increased throughput of the lithography system by performing simultaneous actions on multiple semiconductor substrates 110 to reduce queue time.

[0035] The balance mass 208 is configured to absorb and / or counteract movement and / or vibrations of the wafer stage 136. This can enable the wafer stage 136 to move more smoothly and with less disturbance to the semiconductor substrates 110 included thereon, which reduces the likelihood of misalignment and yield loss. The balance mass 208 is supported on an isolation structure 214 between the balance mass 208 and the base frame 202. The isolation structure 214 includes air legs, springs, and / or other types of isolation structures.

[0036] The wafer stage 136 includes a chuck 210 and a wafer table 212. The chuck 210 is included above the balance mass 208. The wafer table 212 (or wafer clamp) is included above the chuck 210. The isolation structure 214 is included between the chuck 210 and the balance mass 208, as well as between the wafer table 212 and the chuck 210.

[0037] The chuck 210 is configured to secure the semiconductor substrate 110 to the wafer table 212 by electrostatic force (e.g., electrostatic chuck, e-chuck, or ESC), vacuum force (e.g., vacuum chuck), or another type of force. The wafer table 212 is configured to support the semiconductor substrate 110 on the wafer table 212. The wafer table 212 includes a substantially circular structure that is sized to accommodate one or more sizes of semiconductor substrates 110, such as 200 millimeter semiconductor substrates 110, 300 millimeter semiconductor substrates 110, and / or another size of semiconductor substrate 110. In some implementations, the wafer table 212 includes another shape, such as a substantially square or a substantially rectangular, among other examples.

[0038] As described above, Figure 2 are provided by way of example. Other examples can differ from those described. Figure 2 described.

[0039] Figure 3 are described herein for Figure 2 An illustration of an example wafer table 212 of the bottom module 138 for the system 100 is shown in FIG. 3. The wafer table 212 includes a substantially flat and planar top surface on which the semiconductor substrate 110 is configured to be supported. As shown in the close-up view 302 of the top of the wafer table 212, the top surface includes an array of protrusions referred to as surface nodules 304. The surface nodules 304 protrude from the top surface of the wafer table 212 and extend above the top surface of the wafer table 212. The surface nodules 304 are configured to enable the semiconductor substrate 110 to be placed on the wafer table 212 such that the semiconductor substrate 110 rests on the surface nodules 304. The surface nodules 304 provide a gap between the bottom surface of the semiconductor substrate 110 and the top surface of the wafer table 212. By positioning the semiconductor substrate 110 on the surface nodules 304, particles and / or other contaminants that can be located on the top surface of the wafer table 212 have less of an impact on the planarity of the semiconductor substrate 110.

[0040] The wafer table 212 includes a plurality of surface nodules 304, ranging from thousands of surface nodules 304 to tens of thousands of surface nodules 304 or more. As an example, the wafer table 212 can include 20,000 surface nodules 304, 30,000 surface nodules 304, or a greater number of surface nodules 304. The large number of surface nodules 304 provides a large number of contact points for the semiconductor substrate 110, which reduces stress and bowing of the semiconductor substrate 110. The surface nodules 304 can be spaced substantially uniformly across the top surface of the wafer table 212, can be spaced non-uniformly across the top surface of the wafer table 212, or a combination thereof. The surface nodules 304 can be electrically connected by ground lines 306 (or ground traces) to reduce charge transfer and / or discharge on the semiconductor substrate 110.

[0041] As Figure 3As shown in another close-up view 308, the surface bump 304 can comprise an approximate circle. In other implementations, the surface bump 304 comprises an approximate square, an approximate triangle, a polygon, another shape, or a combination of shapes. The grounding line 306 surrounds the surface bump 304 and is configured to remove charge accumulation on the surface bump 304 such that when the semiconductor substrate 110 is placed on the surface bump 304, charge does not transfer from the surface bump 304 to the semiconductor substrate 110.

[0042] As described above, Figure 3 are provided by way of example. Other examples can differ Figure 3 from the examples described.

[0043] Figure 4 is an illustration of an example implementation 400 described herein. The example implementation 400 includes an example of removing the bottom module 138 from the lithography system 100 (particularly the exposure tool 104) for cleaning the wafer stage 212, inspecting the wafer stage 212, and / or for other purposes.

[0044] As Figure 4 shown, the lithography system 100 can be transitioned between an assembled configuration 410 and a disassembled configuration 420, with the bottom module 138 at least partially removed from the lithography system 100. To transition the lithography system 100 from the assembled configuration 410 to the disassembled configuration 420, the bottom module 138 can be slid out from the exposure tool 104, can be rolled out from the exposure tool 104, and / or can be otherwise removed from the exposure tool 104. The bottom module 138 can be slid or rolled on wheels, casters, rollers, or other components. If the lithography system 100 is pressurized to a vacuum (or partial vacuum), the lithography system 100 can be vented such that the vacuum is removed prior to removing the bottom module 138 from the lithography system 100.

[0045] In the disassembled configuration 420, one or more of the wafer stages 212 can be cleaned in one or more cleaning operations, one or more of the wafer stages 212 can be inspected, one or more of the wafer stages 212 can be replaced, and / or one or more other operations can be performed in connection with the wafer stages 212 and / or other components of the bottom module 138.

[0046] The lithography system 100 can be assembled (or reassembled) to transition the lithography system 100 from the disassembled configuration 420 to the assembled configuration 410. To transition the lithography system 100 from the disassembled configuration 420 to the assembled configuration 410, the bottom module 138 can be slid into the bottom of the exposure tool 104, can be rolled into the bottom of the exposure tool 104, and / or can be otherwise positioned to the bottom of the exposure tool 104. The lithography system 100 can be calibrated and pumped to a vacuum (or partial vacuum) for exposure operations.

[0047] As described above, Figure 4 By way of example. Other examples can differ Figure 4 from the described examples.

[0048] Figure 5 is an illustration of an example wafer table inspection tool 500 described herein. The wafer table inspection tool 500 is configured to inspect the wafer table 212 of the lithography system 100. For example, the wafer table inspection tool 500 is configured to inspect the surface nodules 304 of the wafer table 212 to determine and / or verify a cleaning performance of a cleaning operation that cleans the surface nodules 304, determine a surface wear condition of the surface nodules 304 (e.g., an amount of wear on the surface nodules 304), and / or determine other one or more characteristics and / or parameters associated with the surface nodules 304.

[0049] As Figure 5 illustrated, the wafer table inspection tool 500 includes a support frame 502 configured to secure and / or support an inspection device 504 of the wafer table inspection tool 500. The support frame 502 is further configured to be positioned around and / or above the wafer table 212. In particular, the support frame 502 is configured to be positioned around and / or above the wafer table 212 when the wafer table 212 is located in the bottom module 138. In this way, the wafer table inspection tool 500 is able to inspect the wafer table 212 without removing the wafer table 212 from the bottom module 138 and when the bottom module 138 is at least partially removed from the exposure tool 104 (e.g., when the lithography system 100 is in the disassembled configuration 420).

[0050] In some implementations, the wafer table inspection tool 500 (e.g., the support frame 502 of the wafer table inspection tool 500) is configured to rest or be positioned on the counterbalance mass 208 to surround and / or be located above the wafer table 212. In some implementations, the wafer table inspection tool 500 (e.g., the support frame 502 of the wafer table inspection tool 500) is configured to rest or be positioned on the wafer stage 136 to surround and / or be located above the wafer table 212. The wafer table inspection tool 500 can be positioned relative to the wafer table 212 such that the wafer table 212 is within a field of view of the inspection device 504.

[0051] The inspection device 504 includes one or more image sensor devices (e.g., charge-coupled devices (CCDs), complementary metal-oxide-semiconductor (CMOS) image sensors), one or more camera devices (e.g., devices that include a combination of an image sensor device and an image processor), and / or one or more other types of devices capable of generating image sensor data based on scanning a top surface of the wafer table 212 and / or based on scanning the surface nodules 304 of the wafer table 212.

[0052] The support frame 502 can be formed of various materials, including metals (e.g., steel, aluminum, titanium, alloys, and / or combinations thereof), plastics, resins, composite materials, carbon fibers, and / or other types of materials. The support frame 502 includes a plurality of support members 506. Each support member 506 includes an elongated member extending along one or more axes, comprising... Figure 5 The x-axis shown Figure 5 The y-axis and / or shown Figure 5 The z-axis is shown in the diagram. Support member 506 can be extruded, forged, rolled, cast, and / or formed using other manufacturing techniques. Support frame 502 may include additional components such as fasteners (e.g., screws, rivets), brackets, plates, gussets, and / or other structural components.

[0053] The wafer stage inspection tool 500 includes multiple guide rails 508, the guide rails 508 being on a first axis (e.g., Figure 5 The guide rail 508 extends along the first axis (as shown on the y-axis). The guide rail 508 allows the inspection device 504 to move or shift along the first axis above the wafer stage 212. The guide rail 508 includes toothed or notched tracks, smooth tracks, drive screws, and / or similar structures. The guide rail 508 interfaces with a plurality of motors 510. Each guide rail 508 may interface with a corresponding motor 510. The motors 510 may include servo motors, stepper motors, brushless motors, and / or other types of motors. The motors 510 may be further coupled to the guide rail 512 and may be configured to move or shift the guide rail 512 along the first axis (and thus, move or shift the inspection device 504).

[0054] Guide rail 512 is on the second axis (e.g., Figure 5 The first and second axes extend along the x-axis (as shown in the diagram) and / or along the second axis. The first and second axes are substantially perpendicular. The guide rail 512 allows the inspection device 504 to move or shift along the second axis above the wafer stage 212. In this way, the combination of the guide rails 508 and 512 enables the inspection device 504 to perform two-axis movement (e.g., enabling the inspection device 504 to move on at least two axes, thereby enabling the inspection of surface nodules 304 on the wafer stage 212).

[0055] The guide rail 512 includes toothed or notched rails, smooth rails, drive screws, and / or similar structures. The guide rail 512 interfaces with a motor 514. The motor 514 may include a servo motor, stepper motor, brushless motor, and / or other types of motor. The motor 514 may be further coupled to a bracket 516 configured to secure the inspection device 504 to a support frame 502. The motor 514 is configured to move or displace the bracket 516 (and thus, the inspection device 504) along the guide rail 512 on and / or along the second axis.

[0056] As Figure 5 Further shown, the wafer table inspection tool 500 includes a controller 518 (e.g., a processor, a combination of a processor and memory, a system on a chip (SoC), a programmable logic controller (PLC), and / or other types of controllers). The controller 518 is configured to control the operation of the wafer table inspection tool 500 by sending signals to various components of the wafer table inspection tool 500 (e.g., the inspection device 504, the motor 510 and / or the motor 514, among other examples). In addition, the controller 518 can receive data from the inspection device 504, and the controller 518 can control the wafer table inspection tool 500 based on the received data. In some implementations, the controller 518 sends one or more signals to the motor 510 and / or the motor 514 to cause the motor 510 and / or the motor 514 to move the inspection device 504 relative to the wafer table 212. In some implementations, the controller 518 communicates one or more signals to the inspection device 504 to cause the inspection device 504 to generate image sensor data. In some implementations, the controller 518 receives the image sensor data from the inspection device 504 and determines a surface wear condition of the surface nodules 304, determines a cleaning performance of a cleaning operation associated with the surface nodules 304, and / or performs one or more other actions based on the image sensor data.

[0057] The controller 518 is in communication with the inspection device 504, the motor 510, and / or the motor 514 through wired and / or wireless connections. While the controller 518 is shown as being remote from the inspection device 504, the controller 518 can be co-located with the inspection device 504 (e.g., in the same housing, in the same device, on the same SoC or integrated circuit, on the same die, among other examples).

[0058] As Figure 5 Further shown, the wafer table inspection tool 500 can include one or more dimensions. The wafer table inspection tool 500 can include a width dimension 520 (e.g., in the x-axis and / or along the x-axis, as shown). In some implementations, the width dimension 520 is in a range of about 800 millimeters to about 1200 millimeters to allow the inspection device 504 to fully traverse the diameter or width of the wafer table 212 in the x-axis and / or along the x-axis, while allowing the wafer table inspection tool 500 to fit on the bottom module 138. However, other values of the width dimension 520 are within the scope of the present disclosure. Figure 5

[0059] The wafer table inspection tool 500 can include a depth dimension 522 (e.g., in the z-axis and / or along the z-axis, as shown). In some implementations, the depth dimension 522 is in a range of about 300 millimeters to about 500 millimeters to allow the inspection device 504 to fully traverse the depth of the wafer table 212 in the z-axis and / or along the z-axis, while allowing the wafer table inspection tool 500 to fit on the bottom module 138. However, other values of the depth dimension 522 are within the scope of the present disclosure. Figure 5 ​on and / or along the y-axis). In some implementations, the depth dimension 522 is included in a range of about 600 millimeters to about 1000 millimeters to allow the inspection device 504 to fully traverse the diameter or width of the wafer table 212 on and / or along the y-axis while allowing the wafer table inspection tool 500 to fit on the bottom module 138. However, other values of the depth dimension 522 are within the scope of the present disclosure.

[0060] The wafer table inspection tool 500 can include a height dimension 524 (e.g., on and / or along the z-axis) as shown in Figure 5 In some implementations, the height dimension 524 is included in a range of about 200 millimeters to about 400 millimeters to enable the entire wafer table 212 (or the portion of the wafer table 212 to be occupied by the semiconductor substrate 110) to be captured within the field of view of the inspection device 504 while providing sufficient structural stiffness and rigidity to the support frame 502 for accurate image sensor data generation. However, other values of the height dimension 524 are within the scope of the present disclosure.

[0061] In some implementations, the distance between the inspection device 504 and the top surface of the wafer table 212 is included in a range of about 70 millimeters to about 300 millimeters to enable the entire wafer table 212 (or the portion of the wafer table 212 to be occupied by the semiconductor substrate 110) to be captured within the field of view of the inspection device 504 while enabling the image sensor data generated by the inspection device 504 to have sufficient granularity and image quality. However, other values of the distance are within the scope of the present disclosure.

[0062] As described above, Figure 5 are provided by way of example. Other examples can differ Figure 5 from the examples described.

[0063] Figure 6A and Figure 6B is an illustration of an example implementation 600 described herein. The example implementation 600 includes an example of inspecting a wafer table 212 using a wafer table inspection tool 500. As Figure 6A and Figure 6B shown, the wafer table inspection tool 500 is positioned above and / or around the wafer table 212 for inspecting the wafer table 212 (or the surface nodules 304 included on the wafer table 212).

[0064] As Figure 6AAs shown, a first camera device (or image sensor device) 504a of the inspection device 504 performs a first scan 602 of the wafer table 212. The first scan 602 includes a wide-angle scan of the entire wafer table 212 (or a portion of the wafer table 212 where the surface nodules 304 are located). The first scan 602 can be referred to as a position scan or a zeroing scan because the first camera device 504a performs the first scan 602 to enable the controller 518 to determine, locate, and / or zero in on a center (or center point) 604 of the wafer table 212.

[0065] As shown, a second camera device (or image sensor device) 504b of the inspection device 504 performs multiple second scans 606 of the wafer table 212. The second scans 606 can be referred to as inspection scans or surface nodule scans because the second scans 606 are performed to scan individual surface nodules 304 (or a group of surface nodules 304 or multiple surface nodules 304 per second scan 606) to enable the controller 518 to inspect the surface nodules 304 based on the second scans 606. In some embodiments, the first camera device 504a and the second camera device 504b are separate camera devices. In some embodiments, the first camera device 504a and the second camera device 504b are the same camera device. Figure 6B As shown, a second camera device (or image sensor device) 504b of the inspection device 504 performs multiple second scans 606 of the wafer table 212. The second scans 606 can be referred to as inspection scans or surface nodule scans because the second scans 606 are performed to scan individual surface nodules 304 (or a group of surface nodules 304 or multiple surface nodules 304 per second scan 606) to enable the controller 518 to inspect the surface nodules 304 based on the second scans 606. In some embodiments, the first camera device 504a and the second camera device 504b are separate camera devices. In some embodiments, the first camera device 504a and the second camera device 504b are the same camera device.

[0066] Figure 6B As shown, the controller 518 can send one or more signals to the inspection device 504 (e.g., the second camera device 504b), the motor 510, and / or the motor 514 to cause the inspection device 504 (e.g., the second camera device 504b) to perform the second scans 606 in a scan pattern 608. The one or more signals cause the inspection device 504 (e.g., the second camera device 504b) to step through each second scan 606 along the scan pattern 608 to generate image sensor data for the surface nodules 304. Each step in the scan pattern 608 can include a second scan 606 of one or more surface nodules 304. The controller 518 can receive the image sensor data for each second scan 606 and can generate images and / or videos of the surface nodules 304 based on the image sensor data.

[0067] As shown, the scan pattern 608 can include a serpentine scan pattern (or a continuous raster scan pattern). However, other scan patterns can be used, including a raster scan pattern (e.g., a zigzag scan pattern), a spiral scan pattern, a diagonal scan pattern, an orthogonal scan pattern, and / or other types of scan patterns. Figure 6B

[0068] ​​In some implementations, the controller 518 determines a location of the surface nodules 304 based on the first scan 602. Specifically, the controller 518 can determine calibration information based on image sensor data associated with the first scan 602. The calibration information can include information identifying coordinate offset information (e.g., x-axis and y-axis offsets), or another type of coordinate information indicating coordinates of a center 604 of the wafer table 212 relative to a location of the wafer table inspection tool 212. The controller 518 can determine coordinates (e.g., x-axis and y-axis coordinates) of the location of the surface nodules 304 based on the calibration information and based on a mapping of the surface nodules 304 on the wafer table 212. For example, the mapping of the surface nodules 304 on the wafer table 212 can indicate locations of the surface nodules 304 relative to a location of the center 604 of the wafer table. Accordingly, the controller 518 can generate a calibrated coordinate pair for each surface nodule 304 (or a subset of the surface nodules 304) by modifying the location of the surface nodules 304 based on the calibration information. The controller 518 can generate the scan pattern 608 to include the calibrated coordinate pairs of the surface nodules 304 and a particular order for the second camera arrangement 504b to traverse from the surface nodules 304 to the surface nodules 304. The controller 518 can send a signal to the motor 510 and / or the motor 514 to cause the motor 510 and / or the motor 514 to move the second camera arrangement 504b in the scan pattern 610 based on the calibrated coordinate pairs.

[0069] As described above, Figure 6A and Figure 6B are provided by way of example. Other examples can differ from those described. Figure 6A and Figure 6B described with respect to

[0070] Figures 7A-7G is a diagram of an example implementation 700 described herein. The example 700 includes another example of inspecting a wafer table 212 using a wafer table inspection tool 500.

[0071] As Figure 7A illustrated, the lithography system 100 is transitioned from the assembled configuration 410 to the disassembled configuration 420. As Figure 7A further illustrated, the bottom module 138 is at least partially removed from the lithography system 100 (e.g., removed from the exposure tool 104 of the lithography system 100). Transitioning the lithography system 100 from the assembled configuration 410 to the disassembled configuration 420 provides access to the wafer stage 136 and the wafer table 212 included in the bottom module 138.

[0072] The lithography system 100 can be switched from an assembly configuration 410 to a disassembly configuration 420 to enable cleaning and / or inspection of one or more wafer stages 212 in the bottom module 138. In some embodiments, the wafer stage 212 is cleaned and / or inspected based on a service or maintenance schedule for the wafer stage 212 and / or the lithography system 100. For example, the wafer stage 212 may be cleaned and / or inspected at intervals of approximately 4 weeks to approximately 6 weeks to maintain adequate performance of the wafer stage 212. However, other service or maintenance schedules are also within the scope of this disclosure.

[0073] In some implementations, wafer stage 212 is cleaned and / or inspected based on one or more performance parameters associated with lithography system 100, one or more performance parameters associated with exposure tool 104, and / or one or more performance parameters associated with wafer stage 212. For example, controller 518 or another controller included in lithography system 100 may determine to clean and / or inspect wafer stage 212 based on determining or detecting an increase in the size and / or heat of hot spots on semiconductor substrate 110 exposed by exposure tool 104 (which may indicate a decrease in the flatness of wafer stage 212). As another example, controller 518 or another controller included in lithography system 100 may determine to clean and / or inspect wafer stage 212 based on determining that the size of hot spots on semiconductor substrate 110 exposed by exposure tool 104 meets a threshold. As another example, controller 518 or another controller included in lithography system 100 may determine to clean and / or inspect wafer stage 212 based on determining that the amount of hot spots on semiconductor substrate 110 exposed by exposure tool 104 meets a threshold.

[0074] like Figure 7B As shown, a cleaning operation 704 is performed on the wafer stage 212 included in the bottom module 138. The wafer stage 212 can be cleaned while it is included in the bottom module 138 (e.g., without removing the wafer stage 212 and / or wafer platform 136 from the bottom module 138). The cleaning operation 704 may include cleaning surface nodules 304 of the wafer stage 212 (e.g., manually cleaned by maintenance personnel and / or automatically cleaned by automated cleaning tools). The cleaning operation 704 may include cleaning the surface nodules 304 with a brush, cleaning towel, one or more cleaning chemicals, and / or one or more other types of cleaning tools.

[0075] like Figure 7CAs shown, the wafer stage inspection tool 500 can be positioned above the wafer stage 212. In some embodiments, the wafer stage inspection tool 500 is positioned above the wafer stage 212 after cleaning operation 704 to inspect and / or verify the cleaning performance of cleaning operation 704, and / or determine the wear condition of the wafer stage 212 after cleaning operation 704. In some embodiments, the wafer stage inspection tool 500 is positioned above the wafer stage 212 by maintenance personnel. In some embodiments, the wafer stage inspection tool 500 is automatically positioned above the wafer stage 212.

[0076] Alternatively, the wafer stage 212 may be a "new" wafer stage 212 (e.g., a wafer stage 212 not used in the lithography system 100 and / or installed for the first time in the bottom module 138). In these embodiments, the lithography system 100 is switched to a disassembly configuration 420 to replace another wafer stage 212 in the bottom module 138 with the "new" wafer stage 212, or to add the "new" wafer stage 212 to the bottom module 138 if it is not installed there. Before the wafer stage 212 is used for the first time in the lithography system 100, a wafer stage inspection tool 500 is positioned above the wafer stage 212 (regardless of whether cleaning operation 704 is performed first) to inspect the wafer stage 212 to establish baseline conditions for the wafer stage 212, and / or to perform acceptance tests on the wafer stage 212 (e.g., to verify that the wafer stage 212 is in conditions sufficient for production use in the lithography system 100).

[0077] like Figure 7C As further shown, the support frame 502 of the wafer stage inspection tool 500 can be positioned on the balancing mass member 208. Alternatively, the support frame 502 of the wafer stage inspection tool 500 can be positioned on the base frame 202, on the chuck 210 of the wafer platform 136, and / or on another surface in the bottom module 138.

[0078] like Figures 7D-7F As shown, inspection of the wafer stage 212 can be performed. Inspection can be performed by and / or using the inspection apparatus 504 of the wafer stage inspection tool 500, while the bottom module 138 is at least partially removed from the exposure tool 104 and the wafer stage 212 and wafer platform 136 are within the bottom module 138. Therefore, inspection is performed when the wafer stage 212 is under atmospheric pressure (and other atmospheric conditions) in the environment where the lithography system 100 is located.

[0079] like Figure 7DAs shown, controller 518 can send one or more signals 706a to cause motor 510 and / or motor 514 to position inspection device 504 above wafer stage 212. Controller 518 can send one or more signals 706b to cause first camera device 504a of inspection device 504 to perform a scan 708 (e.g., a wide-angle scan such as scan 602) on the top surface of wafer stage 212 and generate image sensor data based on the scanned top surface of wafer stage 212. The image sensor data can be associated with the position of wafer stage 212 and can include images, recorded video, streaming video, and / or another type of image sensor data.

[0080] The controller 518 can receive image sensor data from the first camera device 504a, determine the position of the wafer stage 212 based on the image sensor data, and / or determine that the inspection device 504 is positioned above the wafer stage 212. Specifically, the controller 518 can identify or determine the position of the center (or center point) 604 of the wafer stage 212 based on the image sensor data, identify the edge or periphery of the wafer stage 212 (or the edge or periphery of the wafer stage 212 configured to support the semiconductor substrate 110), and determine that the inspection device 504 is positioned above the wafer stage 212 based on determining that the center 604 of the wafer stage 212 and the edge or periphery of the wafer stage 212 are within the field of view of the second camera device 504b.

[0081] In some embodiments, controller 518 sends signal 706a to motor 510 and / or motor 514 to position inspection device 504 above wafer stage 212 based on image sensor data received from first camera device 504a. For example, controller 518 may receive streaming video from first camera device 504a and may send signal 706a to adjust the position of inspection device 504 until controller 518 determines that the center 604 of wafer stage 212 and the edge or periphery of wafer stage 212 are within the field of view of second camera device 504b.

[0082] like Figure 7E As shown, controller 518 sends multiple signals 710a to motor 510 and / or motor 514 to move inspection device 504 along scan pattern 608 (and thus, move second camera device 504b). Furthermore, controller 518 sends multiple signals 710b to cause second camera device 504b to perform multiple scans 712 (e.g., scan 606, surface nodule scan, inspection scan) to inspect multiple surface nodules 304 on wafer stage 212 while motor 510 and / or motor 514 move second camera device 504b along scan pattern 608.

[0083] In some implementations, the controller 518 automatically sends the signal 710a and / or the signal 710b based on determining that the inspection device 504 is positioned over the wafer table 212. In some implementations, the controller 518 sends the signal 710a and / or the signal 710b based on receiving an input to send the signal 710a and / or the signal 710b.

[0084] As shown, the second camera device 504b generates image sensor data 714 based on the scan 712 and provides the image sensor data 714 to the controller 518. The controller 518 receives the image sensor data 714 from the second camera device 504b (and thus, from the inspection device 504). Figure 7F

[0085] As shown by reference number 716, the controller 518 generates an image (e.g., an inspection image) for the surface bump 304 based on the image sensor data. In some implementations, the second camera device 504b generates respective image sensor data 714 for each surface bump 304. In these implementations, the controller 518 generates a respective image (e.g., a respective inspection image) for each surface bump 304. In some implementations, the second camera device 504b generates image sensor data 714 for a subset of the surface bumps 304 (e.g., a subset including a respective plurality of surface bumps 304). In these implementations, the controller 518 generates an image (e.g., an inspection image) for each subset of the surface bumps 304.

[0086] The controller 518 determines whether the performance of the cleaning operation 704 satisfies one or more performance thresholds and / or determines a surface wear condition of the surface bump 304 based on the image (e.g., the inspection image). In some implementations, the controller 518 determines whether the performance of the cleaning operation 704 satisfies one or more performance thresholds by determining whether one or more cleaning parameters of the cleaning operation 704 satisfy one or more performance thresholds. As an example, the controller 518 can determine whether a surface roughness of the surface bump 304 satisfies a surface roughness threshold. As another example, the controller 518 can determine whether a flatness of the surface bump 304 satisfies a flatness threshold. As another example, the controller 518 can determine whether a reflectivity of the surface bump 304 satisfies a reflectivity threshold. As another example, the controller 518 can determine whether a combination of the aforementioned cleaning parameters (or one or more other cleaning parameters) satisfies a respective performance threshold.

[0087] ​As described above, in some implementations, the wafer table 212 is a “new” wafer table 212, and prior to first use of the wafer table 212 in the lithography system 100, the wafer table inspection tool 500 is positioned above the wafer table 212 to inspect the wafer table 212 to establish a baseline condition of the wafer table 212. In these implementations, the controller 518 generates a baseline image of the surface nodules 304 (e.g., based on image sensor data generated by and received from the second camera device 504b) to establish a baseline condition of the surface nodules 304 on the wafer table 212.

[0088] The controller 518 can use the baseline image and the inspection image for various purposes associated with maintenance and cleaning of the wafer table 212. In some implementations, the controller 518 determines or adjusts a service schedule and / or a maintenance schedule of the wafer table 212 based on the baseline image and the inspection image. For example, the controller 518 can increase an interval duration between cleaning and inspecting the wafer table 212 based on determining that the wear rate of the surface nodules 304 is estimated to be slower than estimated, and / or based on determining that the cleanliness of the surface nodules 304 is estimated to decrease slower than estimated. As another example, the controller 518 can decrease the interval duration between cleaning and inspecting the wafer table 212 based on determining that the wear rate of the surface nodules 304 is estimated to be faster than estimated, and / or based on determining that the cleanliness of the surface nodules 304 is estimated to decrease faster than estimated.

[0089] In some implementations, the controller 518 determines or adjusts an estimated useful life (or an estimated remaining useful life) of the wafer table 212 based on the baseline image and the inspection image. The estimated useful life can include a duration (e.g., in use hours, in operating hours) after replacement of the wafer table 212. For example, the controller 518 can increase the estimated useful life based on determining that the wear rate of the surface nodules 304 is estimated to be slower than estimated, or based on determining that the wear rate of the surface nodules 304 is decreasing. As another example, the controller 518 can decrease the estimated useful life based on determining that the wear rate of the surface nodules 304 is estimated to be faster than estimated, or based on determining that the wear rate of the surface nodules 304 is increasing.

[0090] In some implementations, the controller 518 determines whether one or more cleaning performance parameters of the cleaning operation 704 satisfy one or more performance thresholds. In these implementations, the controller 518 uses the baseline image as a “gold” image (e.g., an image of an ideal condition of the surface nodules 304), and determines whether the one or more cleaning performance parameters of the cleaning operation 704 satisfy the one or more performance thresholds based on a comparison of the baseline image and the inspection image.

[0091] In some implementations, the controller 518 compares the baseline image and the inspection image and determines a cleaning performance of the cleaning operation 704, determines an estimated useful life of the wafer table 212, determines a service schedule or maintenance schedule for the wafer table 212, and / or determines whether to replace the wafer table 212 based on the comparison.

[0092] In some implementations, the controller 518 uses a machine learning model to determine and / or verify the cleaning performance of the cleaning operation 704. In addition, the controller 518 can use a machine learning model to determine the estimated useful life of the wafer table 212, to determine or adjust the service schedule or maintenance schedule for the wafer table 212, to determine when to replace the wafer table 212, to determine when to perform the next cleaning operation on the wafer table 212, and / or to determine one or more other parameters associated with the service and maintenance of the wafer table 212. In these implementations, the machine learning model can be trained from historical data from multiple inspections of multiple wafer tables 212, historical baseline images, historical inspection images, and / or other historical data. The machine learning model can be trained and refined to determine the cleaning performance of the cleaning operation 704, to determine the estimated useful life of the wafer table 212, to determine or adjust the service schedule or maintenance schedule for the wafer table 212, to determine when to replace the wafer table 212, to determine when to perform the next cleaning operation on the wafer table 212, and / or to determine one or more other parameters associated with the service and maintenance of the wafer table 212. The baseline image associated with the wafer table 212 and the inspection image of the wafer table 212 after the cleaning operation 704 can be used as input to the machine learning model for determining the cleaning performance of the cleaning operation 704, for determining the estimated useful life of the wafer table 212, for determining or adjusting the service schedule or maintenance schedule for the wafer table 212, for determining when to replace the wafer table 212, for determining when to perform the next cleaning operation on the wafer table 212, and / or for determining one or more other parameters associated with the service and maintenance of the wafer table 212. The output of the machine learning model can be used to update the machine learning model to refine the decisions made using the machine learning model.

[0093] Figure 7G Examples of surface nodules 304 under various cleaning conditions and / or surface wear conditions are shown. As shown in FIG. 3A, the surface nodules 304 can be formed on the surface 302 of the wafer table 212. The surface nodules 304 can be formed on the surface 302 of the wafer table 212 due to the wear of the surface 302 of the wafer table 212. The surface nodules 304 can be formed on the surface 302 of the wafer table 212 due to the wear of the surface 302 of the wafer table 212 during the cleaning operation 704. The surface nodules 304 can be formed on the surface 302 of the wafer table 212 due to the wear of the surface 302 of the wafer table 212 during the cleaning operation 704 and / or due to the wear of the surface 302 of the wafer table 212 during the use of the wafer table 212 for processing wafers. Figure 7GAs shown, example surface node 304a includes surface node 304 that includes uneven surface wear. Controller 518 can compare the baseline image of surface node 304a to the inspection image of surface node 304a to determine a surface wear condition of surface node 304a. Controller 518 can determine that surface node 304a does not satisfy a flatness threshold, a surface roughness threshold, or another surface wear condition threshold based on the surface wear condition. In some implementations, controller 518 sends a signal that causes a notification to be displayed or outputted to replace wafer table 212. In some implementations, controller 518 determines whether to replace wafer table 212 based on an amount or percentage of surface nodes 304 (including surface node 304a) that have associated surface wear conditions that do not satisfy one or more surface wear condition thresholds. In some implementations, controller 518 updates a machine learning model of wafer table 212 based on the surface wear condition of surface node 304a, such that an updated service life estimate can be generated. In some implementations, controller 518 performs one or more other actions based on determining that the surface wear condition of surface node 304a does not satisfy one or more surface wear condition thresholds.

[0094] As Figure 7G As further shown, another example surface node 304b includes surface node 304 for which controller 518 determines that the performance of cleaning operation 704 is unsatisfactory. In some implementations, controller 518 compares the baseline image of surface node 304b to the inspection image of surface node 304b to determine a surface roughness, flatness, and / or reflectivity, etc. of surface node 304b (which can be a performance indicator for cleaning operation 704 of surface node 304b). In some implementations, controller 518 performs one or more image processing techniques (e.g., edge analysis, contrast analysis) to determine the surface roughness, flatness, and / or reflectivity. Controller 518 can determine that the flatness does not satisfy a flatness threshold, the surface roughness does not satisfy a surface roughness threshold, the reflectivity does not satisfy a reflectivity threshold, and / or can determine that another cleaning performance parameter does not satisfy another cleaning performance threshold. In some implementations, controller 518 can send a signal that causes a notification to be displayed or outputted to perform another cleaning operation on wafer table 212. In some implementations, controller 518 sends a signal to cause the other cleaning operation to be performed automatically (e.g., by an automated cleaning tool).

[0095] As Figure 7GAs further shown, another example surface node 304c includes a surface node 304 for which the controller 518 determines that the performance of the cleaning operation 704 is satisfactory, and / or the controller 518 determines that the surface wear condition of the surface node 304 is satisfactory. The controller 518 can determine that the surface roughness of the surface node 304c (e.g., the average deviation of the evaluated profile of the surface node 304c) satisfies a surface roughness threshold. As an example, the controller 518 can determine that the surface roughness of the surface node 304c is included in a range of about 2 nanometers to about 8 nanometers, such that uniformity issues and / or hot spots of the wafer table 212 are minimized. In some implementations, the controller 518 determines that the surface roughness of the surface node 304c is less than 2 nanometers.

[0096] In some implementations, the controller 518 generates an inspection report that indicates the inspection results for the plurality of surface nodes 304. The inspection report can include, for example, an indication of whether the cleaning performance is satisfactory for each surface node 304, can include a percentage of surface nodes 304 that are satisfactory and / or unsatisfactory, and / or other information.

[0097] As described above, Figures 7A-7G are provided as one or more examples. Other examples can vary from those described Figures 7A-7G in terms of the

[0098] Figure 8 is an illustration of example components of a device 800, which can correspond to the inspection device 504, the first camera device 504a, the second camera device 504b, the motor 510, the motor 514, the controller 518, and / or one or more components included in the lithography system 100. In some implementations, the inspection device 504, the first camera device 504a, the second camera device 504b, the motor 510, the motor 514, the controller 518, and / or one or more components included in the lithography system 100 can include one or more devices 800 and / or one or more components of the device 800. As Figure 8 indicated, the device 800 can include a bus 810, a processor 820, a memory 830, an input component 840, an output component 850, and a communication component 860.

[0099] The bus 810 includes one or more components that enable wired and / or wireless communication between components of the device 800. The bus 810 can carry data to, from, or for the Figure 8Two or more components of the device 800 are coupled in the example of FIG. 8. For example, the bus 810 couples the following components: the processor 820, the memory 830, the input component 840, the output component 840, and the communication component 860. The coupling between the components 820, 830, 840, 850, and 860 can be through operational coupling, communication coupling, electronic coupling, and / or electro-mechanical coupling. The processor 820 includes a central processing unit, a graphics processing unit, a microprocessor, a controller, a microcontroller, a digital signal processor, a field programmable gate array, an application-specific integrated circuit, and / or other processing components. The processor 820 is implemented in hardware, firmware, or a combination of hardware and software. In some embodiments, the processor 820 includes one or more processors designed to perform one or more operations or processes described elsewhere herein.

[0100] The memory 830 includes volatile and / or non-volatile memory. For example, the memory 830 can include random access memory (RAM), read-only memory (ROM), hard disk drives, and / or another type of memory (e.g., flash, magnetic, and / or optical). The memory 830 can include internal memory (e.g., RAM, ROM, or a hard disk drive) and / or removable memory (e.g., removable flash memory connected through a universal serial bus). The memory 830 can be a non-transitory computer-readable medium. The memory 830 stores information, instructions, and / or software (e.g., one or more software applications) related to the operation of the device 800. In some embodiments, the memory 830 includes one or more memories coupled to one or more processors (e.g., the processor 820) by way of the bus 810.

[0101] The input component 840 enables the device 800 to receive input, such as user input and / or sensory input. For example, the input component 840 can include a touch screen, a keyboard, a keypad, a mouse, a button, a microphone, a switch, a sensor, a global positioning system sensor, an accelerometer, a gyroscope, and / or an actuator. The output component 850 enables the device 800 to provide output, such as through a display, a speaker, and / or a light emitting diode. The communication component 860 enables the device 800 to communicate with other devices over wired and / or wireless connections. For example, the communication component 860 can include a receiver, a transmitter, a transceiver, a modem, a network interface card, and / or an antenna.

[0102] Apparatus 800 may perform one or more operations or processes described herein. For example, a non-transitory computer-readable medium (e.g., memory 830) may store a set of instructions (e.g., one or more instructions or code) for execution by processor 820. Processor 820 may execute the set of instructions to perform one or more operations or processes described herein. In some embodiments, execution of the set of instructions by one or more processors 820 causes one or more processors 820 and / or apparatus 800 to perform one or more operations or processes described herein. In some embodiments, hardwired circuitry may be used in place of or in combination with instructions to perform one or more operations or processes described herein. Additionally or alternatively, processor 820 may be configured to perform one or more operations or processes described herein. Therefore, the embodiments described herein are not limited to any particular combination of hardware circuitry and software.

[0103] supply Figure 8 The number and arrangement of components shown are for illustrative purposes only. Figure 8 Compared to the components shown, device 800 may include additional components, fewer components, different components, or components arranged differently. Alternatively, a set of components of device 800 (e.g., one or more components) may perform one or more functions described as being performed by another set of components of device 800.

[0104] Figure 9 This is a flowchart of an example process 900 associated with an inspection wafer stage as described herein. In some implementations, Figure 9 One or more processing blocks can be performed by a wafer inspection tool (e.g., wafer inspection tool 500). In some implementations, Figure 9 One or more processing blocks may be executed by another device or set of devices that are separate from or include the inspection tool, such as a controller (e.g., controller 518, device 800) and other examples. Alternatively or additionally, Figure 9 One or more processing blocks can be executed by one or more components of the device 800, such as processor 820, memory 830, input component 840, output component 850 and / or communication component 860.

[0105] like Figure 9 As shown, process 900 may include performing a cleaning operation to clean a wafer stage (block 910) on the wafer platform of the exposure tool. For example, as described above, cleaning operation 704 may be performed to clean wafer stage 212 on wafer platform 136 of the exposure tool 104.

[0106] like Figure 9Further to the foregoing, the process 900 can include placing the wafer table inspection tool (500) over the wafer table after the cleaning operation (block 920). For example, as described above, the wafer table inspection tool 500 can be placed over the wafer table 212 after the cleaning operation 704.

[0107] As Figure 9 Further to the foregoing, the process 900 can include performing an inspection of the wafer table using an image capture device of the wafer table inspection tool while the wafer table inspection tool is over the wafer table (block 930). For example, as described above, the wafer table inspection tool 500 can perform an inspection of the wafer table 212 using an image capture device (e.g., the first camera device 504a, the second camera device 504b) of the wafer table inspection tool 500 while the wafer table inspection tool 500 is over the wafer table (e.g., the inspection described in connection with the example implementation 600, the inspection described in connection with the example implementation 700). In some implementations, the image capture device of the wafer table inspection tool 500 is used to inspect a plurality of surface nodules 304 on the wafer table 212.

[0108] The process 900 can include additional implementations, such as any single implementation or any combination of implementations described below and / or in connection with one or more other processes described elsewhere herein.

[0109] In a first implementation, the process 900 includes placing the wafer table inspection tool 500 over the balance mass 208 of the exposure tool such that the wafer table inspection tool 500 is over the wafer table 212 and over the wafer stage 136. In a second implementation, alone or in combination with the first implementation, the process 900 includes removing the bottom module 138 from the exposure tool 104, wherein the bottom module 138 includes the wafer table 212 and the wafer stage 136, and wherein performing the inspection of the wafer table 212 includes performing the inspection of the wafer table using an image capture device (e.g., the first camera device 504a, the second camera device 504b) of the wafer table inspection tool 500 while the bottom module 138 is removed from the exposure tool and while the wafer table 212 and the wafer stage 136 are in the bottom module 138.

[0110] In a third implementation, alone or in combination with one or more of the first and second implementations, the process 900 includes performing an inspection of the wafer table 212 while the wafer table 212 is at atmospheric pressure using the image capture device (e.g., the first camera device 504a, the second camera device 504b) of the wafer table inspection tool 500. In a fourth implementation, alone or in combination with one or more of the first through third implementations, the process 900 includes generating a respective image for each surface bump 304 of the plurality of surface bumps 304 using the image capture device (e.g., the first camera device 504a, the second camera device 504b) of the wafer table inspection tool 500.

[0111] In a fifth implementation, alone or in combination with one or more of the first through fourth implementations, the process 900 includes performing a wide-angle scan (e.g., the scan 602, the scan 708) to determine the center 604 of the wafer table 212 and performing a plurality of surface bump scans (e.g., the scan 606, the scan 712) in a scan pattern (e.g., the scan pattern 608 or another scan pattern) to generate a respective image for each surface bump 304 of the plurality of surface bumps 304. In a sixth implementation, alone or in combination with one or more of the first through fifth implementations, performing an inspection of the wafer table 212 includes performing an inspection of the wafer table 212 to at least one of determine whether a performance of a cleaning operation satisfies one or more performance thresholds or determine a surface wear condition of the plurality of surface bumps.

[0112] Although Figure 9 Example blocks of the process 900 are illustrated, but in some implementations, the process 900 can include additional blocks, fewer blocks, different blocks, or differently arranged blocks than those depicted in Figure 9 than those depicted in FIG. 10. Additionally or alternatively, two or more blocks of the process 1000 can be performed in parallel.

[0113] Figure 10 is a flow diagram of an example process 1000 associated with inspecting a wafer table as described herein. In some implementations, one or more of the process blocks of the process 1000 can be performed by a controller (e.g., the controller 518, the device 800). In some implementations, one or more of the process blocks of the process 1000 can be performed by another device or a group of devices separate from or including the controller, such as a wafer table inspection tool (e.g., the wafer table inspection tool 500) and other examples. Additionally or alternatively, one or more of the process blocks of the process 1000 can be performed by one or more components of the device 800, such as the processor 820, the memory 830, the input component 840, the output component 850, and / or the communication component 860. Figure 10 Figure 10 Figure 10

[0114] As​​​Figure 10 As shown, process 1000 can include sending one or more first signals to cause at least one of the first motor or the second motor to position the inspection device above a wafer table included in a bottom module of an EUV scanner tool (block 1010). For example, controller 518 can send one or more first signals (e.g., signals 706a) to cause at least one of the first motor (e.g., motor 510) or the second motor (e.g., motor 514) to position the inspection device (e.g., inspection device 504, first camera device 504a, second camera device 504b) above a wafer table 212 included in a bottom module 138 of an EUV scanner tool (e.g., exposure tool 104), as described above.

[0115] As Figure 10 Further shown, process 1000 can include sending a plurality of second signals to cause the inspection device to generate image sensor data associated with a plurality of surface nodules on the wafer table (block 1020). For example, controller 518 can send a plurality of second signals (e.g., signals 710b) to cause the inspection device to generate image sensor data 714 associated with a plurality of surface nodules 304 on wafer table 212, as described above.

[0116] As Figure 10 Further shown, process 1000 can include receiving the image sensor data from the inspection device (block 1030). For example, controller 518 can receive the image sensor data 714 from the inspection device, as described above.

[0117] As Figure 10 Further shown, process 1000 can include generating respective images for the plurality of surface nodules based on the image sensor data (block 1040). For example, controller 518 can generate respective images for the plurality of surface nodules 304 based on the image sensor data 714, as described above.

[0118] As Figure 10 Further shown, process 1000 can include determining whether one or more cleaning parameters of a cleaning operation in which the plurality of surface nodules were cleaned satisfy one or more performance thresholds based on the respective images (block 1050). For example, controller 518 can determine whether one or more cleaning parameters of a cleaning operation in which the plurality of surface nodules 304 were cleaned satisfy one or more performance thresholds based on the respective images, as described above.

[0119] Process 1000 can include additional implementations, such as any single implementation or any combination of implementations described below and / or in connection with one or more other processes described elsewhere herein.

[0120] In a first implementation, determining whether the one or more cleaning parameters satisfy the one or more performance thresholds includes determining whether a surface roughness of the plurality of surface nodules 304 satisfies a surface roughness threshold. In a second implementation, alone or in combination with the first implementation, the surface roughness threshold includes being in a range of about 2 nanometers to about 8 nanometers.

[0121] In a third implementation, alone or in combination with one or more of the first and second implementations, determining whether the one or more cleaning parameters satisfy the one or more performance thresholds includes determining that the one or more cleaning parameters do not satisfy the one or more performance thresholds, and the process 1000 includes transmitting a third signal to cause output of a notification, where the notification indicates that another cleaning operation is to be performed. In a fourth implementation, alone or in combination with one or more of the first through third implementations, the inspecting process 1000 includes transmitting a third signal (e.g., signal 706b) to a first camera device (e.g., first camera device 504a) of the inspection device to cause the first camera device to generate image sensor data associated with a location of the wafer table 212, and determining that the inspection device 504 is positioned over the wafer table 212 based on the image sensor data associated with the location of the wafer table 212.

[0122] In a fifth implementation, alone or in combination with one or more of the first through fourth implementations, transmitting the plurality of second signals includes transmitting the plurality of second signals to a second camera device (e.g., second camera device 504b) of the inspection device to cause the second camera device to generate the image sensor data 714 associated with the plurality of surface nodules 304. In a sixth implementation, alone or in combination with one or more of the first through fifth implementations, the process 1000 includes transmitting a plurality of fourth signals (e.g., signal 710a) to cause at least one of the first motor 510 or the second motor 514 to move the second camera device along a scan pattern (e.g., scan pattern 608 or another scan pattern), where transmitting the plurality of second signals to cause the second camera device to generate the image sensor data 714 associated with the plurality of surface nodules 304 includes transmitting the plurality of second signals to cause the second camera device to generate the image sensor data 714 associated with the plurality of surface nodules 304 as the second camera device moves along the scan pattern.

[0123] While Figure 10 While example blocks of the process 1000 are shown, in some implementations, the process 1000 can include additional blocks, fewer blocks, different blocks, or differently arranged blocks than those depicted in FIG. 10. Additionally or alternatively, two or more of the blocks of the process 1000 can be performed in parallel. Figure 10 While example blocks of the process 1000 are shown, in some implementations, the process 1000 can include additional blocks, fewer blocks, different blocks, or differently arranged blocks than those depicted in FIG. 10. Additionally or alternatively, two or more of the blocks of the process 1000 can be performed in parallel.

[0124] Figure 11is a flowchart of an example process 1100 associated with inspecting a wafer table. In some embodiments, Figure 11 One or more processing blocks of can be performed by a wafer table inspection tool (e.g., wafer table inspection tool 500). In some embodiments, Figure 11 One or more processing blocks of can be performed by another device or set of devices independent of or including a controller (e.g., controller 518, apparatus 800), an EUV scanner tool (e.g., exposure tool 104), and / or a lithography system (e.g., lithography system 100), etc. Additionally or alternatively, Figure 10 One or more processing blocks of can be performed by one or more components of apparatus 800, such as processor 820, memory 830, input component 840, output component 850, and / or communication component 860.

[0125] As shown in Figure 11 Process 1100 can include receiving a wafer in an EUV scanner tool (block 1110). For example, lithography system 100 can receive a wafer in an EUV scanner tool (e.g., exposure tool 104), as described herein.

[0126] As further shown in Figure 11 Process 1100 can include performing an exposure operation to expose the wafer to EUV radiation using the EUV scanner tool (block 1120). For example, lithography system 100 can perform an exposure operation to expose the wafer to EUV radiation using the EUV scanner tool, as described herein.

[0127] As further shown in Figure 11 Process 1100 can include positioning an inspection device over a wafer table included in a bottom module of the EUV scanner tool after the exposure operation (block 1130). For example, wafer table inspection tool 500 can position an inspection device over a wafer table included in a bottom module of the EUV scanner tool after the exposure operation, as described above.

[0128] As further shown in Figure 11 Process 1100 can include generating image sensor data associated with a plurality of surface nodules on the wafer table using the inspection device (block 1140). For example, wafer table inspection tool 500 can generate image sensor data associated with a plurality of surface nodules on the wafer table using the inspection device, as described above.

[0129] As further shown in Figure 11 Process 1100 can include generating respective images for the plurality of surface nodules based on the image sensor data (block 1150). For example, wafer table inspection tool 500 can generate respective images for the plurality of surface nodules based on the image sensor data, as described above.

[0130] As Figure 11 Further as shown in the method 1100 can include determining, based on the respective image, whether the one or more cleaning parameters of the cleaning operation in which the plurality of surface nodules were cleaned satisfy one or more performance thresholds (block 1160). For example, the wafer table inspection tool 500 can determine, based on the respective image, whether the one or more cleaning parameters of the cleaning operation in which the plurality of surface nodules were cleaned satisfy one or more performance thresholds, as described above.

[0131] The method 1100 can include additional implementations, such as any single implementation or any combination of implementations described below and / or in connection with one or more other processes described elsewhere herein.

[0132] In a first implementation, determining whether the one or more cleaning parameters satisfy the one or more performance thresholds includes determining whether a surface roughness of the plurality of surface nodules satisfies a surface roughness threshold. In a second implementation, alone or in combination with the first implementation, the surface roughness threshold includes being in a range of about 2 nanometers to about 8 nanometers. In a third implementation, alone or in combination with one or more of the first and second implementations, determining whether the one or more cleaning parameters satisfy the one or more performance thresholds includes determining that the one or more cleaning parameters do not satisfy the one or more performance thresholds, and wherein the method further includes transmitting a third signal to cause output of a notification, wherein the notification indicates that another cleaning operation is to be performed.

[0133] In a fourth implementation, alone or in combination with one or more of the first through third implementations, the method 1100 includes generating image sensor data associated with a location of the wafer table using the first camera device, and determining, based on the image sensor data associated with the location of the wafer table, that the inspection device is positioned above the wafer table. In a fifth implementation, alone or in combination with one or more of the first through fourth implementations, generating the image sensor data associated with the plurality of surface nodules includes generating the image sensor data associated with the plurality of surface nodules using a second camera device of the inspection device. In a sixth implementation, alone or in combination with one or more of the first through fifth implementations, the method 1100 includes moving the second camera device along a scan pattern using at least one of the first motor or the second motor, wherein generating the image sensor data associated with the plurality of surface nodules includes generating the image sensor data associated with the plurality of surface nodules using the second camera device as the second camera device moves along the scan pattern.

[0134] Although Figure 11 Example blocks of the method 1100 are shown, but in some implementations, the method 1100 includes additional blocks not shown in the figure(s). Additionally, in some implementations, one or more of the blocks of the method 1100 can be combined with other blocks or can be divided into multiple blocks. Figure 11Additional blocks, fewer blocks, different blocks, or differently arranged blocks can be utilized. Additionally or alternatively, two or more blocks of process 1100 can be performed in parallel.

[0135] As such, the wafer table inspection tool can be positioned above the wafer table while the wafer table is positioned in a bottom module of an exposure tool of a lithography system. The wafer table inspection tool can quickly generate inspection images for evaluating a condition of surface nodules on the wafer table and for evaluating a cleaning performance of a cleaning operation that cleans the surface nodules.

[0136] As described in more detail above, some embodiments described herein provide a method. The method includes performing a cleaning operation to clean a wafer table on a wafer stage of an exposure tool. The method includes placing a wafer table inspection tool on the wafer table after the cleaning operation. The method includes using an image capture device of the wafer table inspection tool to perform an inspection of the wafer table while the wafer table inspection tool is above the wafer table, wherein the image capture device of the wafer table inspection tool is used to inspect a plurality of surface nodules on the wafer table.

[0137] As described in more detail above, some embodiments described herein provide a method. The method includes sending, by a controller of a wafer table inspection tool, one or more first signals to cause at least one of a first motor or a second motor to position an inspection device above a wafer table included in a bottom module of an EUV scanner tool. The method includes sending, by the controller, a plurality of second signals to cause the inspection device to generate image sensor data associated with a plurality of surface nodules on the wafer table after the inspection device is positioned above the wafer table. The method includes receiving, by the controller, the image sensor data from the inspection device. The method includes generating, by the controller, respective images for the plurality of surface nodules based on the image sensor data. The method includes determining, based on the respective images, whether one or more cleaning parameters of a cleaning operation in which the plurality of surface nodules were cleaned satisfy one or more performance thresholds.

[0138] As described in more detail above, some embodiments described herein provide a wafer table inspection tool. The wafer table inspection tool includes a support frame configured to be positioned above a wafer table when the wafer table is positioned on a wafer stage in a bottom module of an EUV lithography system and the bottom module is at least partially removed from the EUV lithography system to provide access to the wafer table. The wafer table inspection tool includes an inspection device secured to the support frame configured to inspect the wafer table when the wafer table is positioned on the wafer stage in the bottom module.

[0139] As described in more detail above, some embodiments described herein provide a method. The method includes receiving a wafer in an EUV scanner tool. The method includes performing an exposure operation to expose the wafer to EUV radiation using the EUV scanner tool. The method includes positioning an inspection device above a wafer table included in a bottom module of the EUV scanner tool after the exposure operation. The method includes generating image sensor data associated with a plurality of surface nodules on the wafer table using the inspection device. The method includes generating respective images for the plurality of surface nodules based on the image sensor data. The method includes determining whether one or more cleaning parameters of a cleaning operation in which the plurality of surface nodules were cleaned satisfy one or more performance thresholds based on the respective images.

[0140] As used herein, “satisfy a threshold” can refer to a value that is greater than the threshold, greater than or equal to the threshold, less than the threshold, less than or equal to the threshold, equal to the threshold, not equal to the threshold, etc. depending on the context.

[0141] The foregoing summary has outlined rather broadly the features and technical advantages of the present disclosure so as to provide those skilled in the art with a

[0142] Example 1 is a method for inspecting a wafer table, comprising: performing a cleaning operation to clean a wafer table on a wafer stage of an exposure tool; placing a wafer table inspection tool above the wafer table after the cleaning operation; and performing an inspection of the wafer table using an image capture device of the wafer table inspection tool while the wafer table inspection tool is above the wafer table, wherein the image capture device of the wafer table inspection tool is used to inspect a plurality of surface nodules on the wafer table.

[0143] Example 2 is the method of Example 1, wherein placing the wafer table inspection tool above the wafer table comprises: placing the wafer table inspection tool on a balance mass of the exposure tool such that the wafer table inspection tool is above the wafer table and above the wafer stage.

[0144] Example 3 is the method of Example 1, further comprising: removing a bottom module from the exposure tool, wherein the bottom module includes the wafer table and the wafer stage; and wherein performing the inspection of the wafer table includes: using the image capture device of the wafer table inspection tool, performing the inspection of the wafer table while the bottom module is removed from the exposure tool and while the wafer table and the wafer stage are in the bottom module.

[0145] Example 4 is the method of Example 1, wherein performing the inspection of the wafer table includes: using the image capture device of the wafer table inspection tool, performing the inspection of the wafer table while the wafer table is at atmospheric pressure.

[0146] Example 5 is the method of Example 1, wherein performing the inspection of the wafer table includes: using the image capture device of the wafer table inspection tool, generating a respective image for each of the plurality of surface nodules.

[0147] Example 6 is the method of Example 5, wherein generating a respective image for each of the plurality of surface nodules includes: performing a wide-angle scan to determine a center of the wafer table; and performing a plurality of surface nodule scans in a scan pattern to generate a respective image for each of the plurality of surface nodules.

[0148] Example 7 is the method of Example 1, wherein performing the inspection of the wafer table includes: performing the inspection of the wafer table to at least one of: determine whether a performance of the cleaning operation satisfies one or more performance thresholds, or determine a surface wear condition of the plurality of surface nodules.

[0149] Example 8 is a method for inspecting a wafer table, comprising: receiving a wafer in an extreme ultraviolet (EUV) scanner tool; performing an exposure operation using the EUV scanner tool to expose the wafer to EUV radiation; positioning an inspection device above a wafer table included in a bottom module of the EUV scanner tool after the exposure operation; generating image sensor data associated with a plurality of surface nodules on the wafer table using the inspection device; generating respective images for the plurality of surface nodules based on the image sensor data; and determining whether one or more cleaning parameters of a cleaning operation in which the plurality of surface nodules were cleaned satisfy one or more performance thresholds based on the respective images.

[0150] Example 9 is the method of Example 8, wherein determining whether the one or more cleaning parameters satisfy the one or more performance thresholds includes: determining whether a surface roughness of the plurality of surface nodules satisfies a surface roughness threshold.

[0151] Example 10 is the method of example 9, wherein the surface roughness threshold comprises a range from about 2 nanometers to about 8 nanometers.

[0152] Example 11 is the method of example 8, wherein determining whether the one or more cleaning parameters satisfy the one or more performance thresholds comprises determining that the one or more cleaning parameters do not satisfy the one or more performance thresholds; and wherein the method further comprises transmitting a third signal to cause output of a notification, wherein the notification indicates that another cleaning operation is to be performed.

[0153] Example 12 is the method of example 8, further comprising generating image sensor data associated with a position of the wafer table using a first camera device of the inspection device; and determining that the inspection device is positioned over the wafer table based on the image sensor data associated with the position of the wafer table.

[0154] Example 13 is the method of example 12, wherein generating image sensor data associated with the plurality of surface nodules comprises generating image sensor data associated with the plurality of surface nodules using a second camera device of the inspection device.

[0155] Example 14 is the method of example 13, further comprising moving the second camera device along a scan pattern using at least one of a first motor or a second motor, wherein generating image sensor data associated with the plurality of surface nodules comprises generating image sensor data associated with the plurality of surface nodules using the second camera device as the second camera device moves along the scan pattern.

[0156] Example 15 is a wafer table inspection tool comprising: a support frame configured to be positioned over a wafer table when the wafer table is positioned on a wafer platform in a bottom module of an extreme ultraviolet (EUV) lithography system and the bottom module is at least partially removed from the EUV lithography system to provide access to the wafer table; and an inspection device fixed to the support frame and configured to inspect the wafer table when the wafer table is positioned on the wafer platform in the bottom module.

[0157] Example 16 is the wafer table inspection tool of example 15, wherein the inspection device is configured to inspect the wafer table prior to a first use of the wafer table in the EUV lithography system; wherein the wafer table inspection tool further comprises a controller configured to generate a baseline image of a plurality of surface nodules on the wafer table based on image sensor data received from the inspection device, wherein the image sensor data is based on the inspection of the wafer table prior to the first use of the wafer table.

[0158] Example 17 is the wafer table inspection tool of Example 16, wherein the inspection device is configured to inspect the wafer table: after a first use of the wafer table in the EUV lithography system; and wherein the controller is further configured to: generate an inspection image of the plurality of surface nodules after the first use of the wafer table; compare the inspection image and the baseline image; and determine the estimated useful lifetime of the wafer table based on the comparison of the inspection image and the baseline image.

[0159] Example 18 is the wafer table inspection tool of Example 17, wherein the controller is configured to determine the estimated useful lifetime of the wafer table using a machine learning model, wherein the inspection image and the baseline image are used as inputs to the machine learning model.

[0160] Example 19 is the wafer table inspection tool of Example 15, wherein the inspection device comprises: a first camera device configured to perform a first scan of the wafer table to locate a center point of the wafer table; and a second camera device configured to perform a plurality of second scans of the wafer table to inspect the wafer table.

[0161] Example 20 is the wafer table inspection tool of Example 15, wherein the support frame is further configured to provide movement of the inspection device in at least two axes to enable inspection of a plurality of surface nodules on the wafer table.

Claims

1. A method for inspecting a wafer table, comprising: performing a cleaning operation to clean a wafer table on a wafer stage of an exposure tool; placing a wafer table inspection tool above the wafer table after the cleaning operation; and performing an inspection of the wafer table using an image capture device of the wafer table inspection tool while the wafer table inspection tool is above the wafer table, wherein the image capture device of the wafer table inspection tool is to inspect a plurality of surface nodules on the wafer table, wherein performing the inspection of the wafer table comprises determining whether a performance of the cleaning operation satisfies one or more performance thresholds, wherein determining whether the performance of the cleaning operation satisfies the one or more performance thresholds comprises determining whether a surface roughness of the plurality of surface nodules satisfies a surface roughness threshold. placing the wafer table inspection tool above the wafer table comprises:

2. The method of claim 1, wherein, placing the wafer table inspection tool on a balance mass of the exposure tool such that the wafer table inspection tool is above the wafer table and above the wafer stage.

3. The method of claim 1, further comprising: removing a bottom module from the exposure tool, wherein the bottom module comprises the wafer table and the wafer stage; and wherein performing the inspection of the wafer table comprises: performing the inspection of the wafer table using the image capture device of the wafer table inspection tool while the bottom module is removed from the exposure tool and while the wafer table and the wafer stage are in the bottom module. performing the inspection of the wafer table comprises:

4. The method of claim 1, wherein, performing the inspection of the wafer table using the image capture device of the wafer table inspection tool while the wafer table is at atmospheric pressure. performing the inspection of the wafer table comprises:

5. The method of claim 1, wherein, generating a respective image for each of the plurality of surface nodules using the image capture device of the wafer table inspection tool. generating the respective image for each of the plurality of surface nodules comprises:

6. The method of claim 5, wherein, performing a wide-angle scan to determine a center of the wafer table; and performing a plurality of surface nodule scans in a scan pattern to generate the respective image for each of the plurality of surface nodules. performing the inspection of the wafer table comprises:

7. The method of claim 1, wherein, determining a surface wear condition of the plurality of surface nodules.

8. A method for inspecting a wafer table, comprising: receiving a wafer in an EUV scanner tool; performing an exposure operation to expose the wafer to EUV radiation using the EUV scanner tool; positioning an inspection device above a wafer table included in a bottom module of the EUV scanner tool after the exposure operation; generating image sensor data associated with a plurality of surface nodules on the wafer table using the inspection device; generating respective images for the plurality of surface nodules based on the image sensor data; and determining whether one or more cleaning parameters of a cleaning operation in which the plurality of surface nodules were cleaned satisfy one or more performance thresholds based on the respective images, ​ wherein determining whether the one or more cleaning parameters satisfy the one or more performance thresholds comprises determining whether a surface roughness of the plurality of surface nodules satisfies a surface roughness threshold.

9. The method of claim 8, wherein, The surface roughness threshold comprises a range from 2 nanometers to 8 nanometers.

10. The method of claim 8, wherein, Determining whether the one or more cleaning parameters satisfy the one or more performance thresholds comprises: determining that the one or more cleaning parameters do not satisfy the one or more performance thresholds; and wherein the method further comprises: sending a third signal to cause output of a notification, wherein the notification indicates that another cleaning operation is to be performed.

11. The method of claim 8, further comprising: generating image sensor data associated with a position of the wafer table using a first camera device of the inspection device; and determining that the inspection device is positioned over the wafer table based on the image sensor data associated with the position of the wafer table.

12. The method of claim 11, wherein, Generating the image sensor data associated with the plurality of surface nodules comprises: generating the image sensor data associated with the plurality of surface nodules using a second camera device of the inspection device.

13. The method of claim 12, further comprising: moving the second camera device along a scan pattern using at least one of the first motor or the second motor, wherein generating the image sensor data associated with the plurality of surface nodules comprises: generating the image sensor data associated with the plurality of surface nodules using the second camera device as the second camera device moves along the scan pattern.

14. A wafer table inspection tool, comprising: a support frame configured to be positioned over a wafer table when the wafer table is positioned on a wafer platform in a bottom module of an EUV lithography system and the bottom module is at least partially removed from the EUV lithography system to provide access to the wafer table; and an inspection device secured to the support frame and configured to inspect a plurality of surface nodules on the wafer table when the wafer table is positioned on the wafer platform in the bottom module, wherein the inspection device is further configured to determine whether one or more cleaning parameters of a cleaning operation in which the plurality of surface nodules were cleaned satisfy one or more performance thresholds, wherein determining whether the one or more cleaning parameters satisfy the one or more performance thresholds comprises determining whether a surface roughness of the plurality of surface nodules satisfies a surface roughness threshold.

15. The wafer table inspection tool of claim 14, wherein, The inspection device is configured to inspect the wafer table: prior to a first use of the wafer table in the EUV lithography system; wherein the wafer table inspection tool further comprises: a controller configured to generate a baseline image of a plurality of surface nodules on the wafer table based on image sensor data received from the inspection device, wherein the image sensor data is based on an inspection of the wafer table prior to the first use of the wafer table.

16. The wafer table inspection tool of claim 15, wherein, The inspection device is configured to inspect the wafer table: after the first use of the wafer table in the EUV lithography system; and wherein the wafer table inspection tool further comprises: a controller configured to generate a baseline image of a plurality of surface nodules on the wafer table based on image sensor data received from the inspection device, wherein the image sensor data is based on an inspection of the wafer table prior to the first use of the wafer table. wherein the controller is further configured to: generate inspection images of the plurality of surface nodules after a first use of the wafer table; compare the inspection images to the baseline images; and determine an estimated useful life of the wafer table based on the comparison of the inspection images to the baseline images.

17. The wafer table inspection tool of claim 16, wherein, The controller is configured to determine an estimated useful life of the wafer table by: using a machine learning model to determine the estimated useful life of the wafer table, wherein the inspection images and the baseline images are used as inputs to the machine learning model.

18. The wafer table inspection tool of claim 14, wherein, The inspection device comprises: a first camera device configured to perform a first scan of the wafer table to locate a center point of the wafer table; and a second camera device configured to perform a plurality of second scans of the wafer table to inspect the wafer table.

19. The wafer table inspection tool of claim 14, wherein, The support frame is further configured to provide movement of the inspection device in at least two axes to enable inspection of a plurality of surface nodules on the wafer table.

Images