Bidirectional switching device, terminal structure thereof, and electronic device

Abstract

The application provides a bidirectional switch device, a terminal structure thereof and an electronic device. The terminal structure comprises a field plate, an end of the field plate extends beyond the edge of a first voltage resistance region and a second voltage resistance region, so that the vertical projection of the field plate divides the base region of a parasitic triode formed by the first voltage resistance region, the well region and the second voltage resistance region; the voltage of the field plate changes with the gate voltage of the switch tube on both sides, so as to relieve the leakage phenomenon of the parasitic triode.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor integrated circuit design and manufacturing, and in particular relates to a bidirectional switching device, its terminal structure and electronic equipment. Background Technology

[0002] Under current technology, bidirectional switching devices with different bidirectional voltage ratings are typically formed by integrating two laterally diffused metal-oxide-semiconductor (LDMOS) devices with different voltage ratings. Except for sharing a common drain region, the structure of such devices is identical to that of individual LDMOS devices. The problem with this structure is the presence of parasitic transistor structures in the device termination region. Furthermore, because the two source voltages are different, these parasitic structures can cause leakage current, affecting device performance.

[0003] To address this issue, a common approach is to increase the device pitch, widening the base region of the parasitic transistor to prevent punch-through leakage. However, this method increases device size, on-resistance, and wastes chip area. Another approach is to reduce the width of the termination doped region, increasing the doping concentration of the base region of the parasitic transistor in the termination area. However, this affects the breakdown voltage of the device termination.

[0004] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a bidirectional switching device, its terminal structure and electronic device, to solve the problem that the parasitic transistor structure of the terminal structure of the bidirectional switching device in the prior art is prone to punch-through leakage.

[0006] To achieve the above and other related objectives, the present invention provides a termination structure for a bidirectional switching device. The bidirectional switching device includes a well region, a first withstand voltage region and a second withstand voltage region located within the well region. The first withstand voltage region, the well region and the second withstand voltage region constitute a parasitic transistor. The termination structure includes a field plate located between the first withstand voltage region and the second withstand voltage region, and located on the upper surface of the well region. The field plate is connected to a voltage to alleviate the leakage current phenomenon of the parasitic transistor.

[0007] Optionally, in a direction perpendicular to the bidirectional switching device stack, the end of the field plate extends at least to the edge of the first withstand voltage region and the second withstand voltage region, so that the vertical projection of the field plate divides the base region of the parasitic transistor.

[0008] Optionally, in a direction perpendicular to the bidirectional switching device stack, the end of the field plate extends beyond the edges of the first withstand voltage region and the second withstand voltage region.

[0009] Optionally, the field plate is located on the common drain of the bidirectional switching device.

[0010] Optionally, the field plate is electrically connected to the common drain of the bidirectional switching device.

[0011] Optionally, the field plate includes a first field plate and a second field plate, wherein the first field plate and the second field plate are integrally formed with the gates of the two switching transistors on both sides of the bidirectional switching device.

[0012] Optionally, the common drain of the bidirectional switching device is located between the gates of the two switching transistors of the bidirectional switching device, and the first field plate and the second field plate extend from the gates of the two switching transistors toward the common drain.

[0013] Optionally, the potential of the field plate changes with the voltage of the common drain of the bidirectional switching device or the gate voltage potential of the two switching transistors. The field plate and the well region below it form a MOS capacitor structure, so that an accumulation region is formed on the surface of the well region, avoiding the depletion of the well region and the generation of leakage current.

[0014] Optionally, the field plate is made of polycrystalline silicon.

[0015] The present invention also provides a bidirectional switching device, the bidirectional switching device comprising: a well region of a first conductivity type; a first body region and a second body region of a second conductivity type extending from the upper surface of the well region into the well region; a first source region and a second source region of the first conductivity type respectively disposed in the first body region and the second body region; a common drain of the first conductivity type extending from the upper surface of the well region into the well region and disposed between the first body region and the second body region; a first gate and a second gate located on the upper surface of the well region and respectively disposed between the first source region and the common drain and between the second source region and the common drain; a first withstand voltage region and a second withstand voltage region of the second conductivity type respectively contacting the first body region and the second body region; a field plate located between the first withstand voltage region and the second withstand voltage region and located on the upper surface of the well region; the field plate is connected to a voltage to alleviate the leakage phenomenon of the parasitic transistor.

[0016] Optionally, in a direction perpendicular to the bidirectional switching device stack, the end of the field plate extends at least to the edge of the first withstand voltage region and the second withstand voltage region, so that the vertical projection of the field plate divides the base region of the parasitic transistor.

[0017] Optionally, in a direction perpendicular to the bidirectional switching device stack, the end of the field plate extends beyond the edges of the first withstand voltage region and the second withstand voltage region.

[0018] Optionally, the field plate is located on the common drain of the bidirectional switching device.

[0019] Optionally, the field plate is electrically connected to the common drain.

[0020] Optionally, the bidirectional switching device further includes a trench isolation region disposed in the well region between the first withstand voltage region and the second withstand voltage region.

[0021] Optionally, the bidirectional switching device further includes a metal trace layer, which at least covers the first withstand voltage region and the second withstand voltage region and the trench isolation region between them. The field plate is disposed between the metal trace layer and the trench isolation region, and the metal trace layer is electrically connected to the first gate or the second gate.

[0022] Optionally, the field plate includes a first field plate and a second field plate, the first field plate and the second field plate being formed by the first grid and the second grid extending onto the trench isolation area, respectively.

[0023] Optionally, the first field plate is connected to the first gate at the same potential, and the second field plate is connected to the second gate at the same potential.

[0024] Optionally, the first conductivity type is either an N-type conductivity type or a P-type conductivity type, and the second conductivity type is either an N-type conductivity type or a P-type conductivity type.

[0025] Optionally, the field plate and the underlying well region form a MOS capacitor structure, which causes an accumulation region to form on the surface of the well region, thereby preventing the well region from being depleted and causing leakage.

[0026] Optionally, it also includes a first body contact region and a second body contact region of a second conductivity type, respectively disposed in the first body region and the second body region.

[0027] Optionally, the width of the first pressure-resistant region is greater than the width of the first body region, the width of the second pressure-resistant region is greater than the width of the second body region, and the depth of the trench isolation region is less than the depth of the first pressure-resistant region and the second pressure-resistant region.

[0028] Optionally, the field plate is made of polycrystalline silicon.

[0029] The present invention also provides an electronic device comprising a bidirectional switching device as described in any of the preceding embodiments.

[0030] Optionally, the electronic device includes one of a mobile phone, a laptop computer, a tablet computer, a smart robot, a wearable electronic device, and an automotive electronic device.

[0031] As described above, the bidirectional switching device, its terminal structure, and electronic device of the present invention have the following beneficial effects:

[0032] This invention provides a termination structure for a bidirectional switching device. The termination structure includes a field plate, the end of which extends beyond the edges of a first withstand voltage region and a second withstand voltage region, so that the vertical projection of the field plate divides the base region of the parasitic transistor formed by the first withstand voltage region, the well region, and the second withstand voltage region. The voltage of the field plate changes with the gate voltage of the switching transistors on both sides, thereby alleviating the leakage phenomenon of the parasitic transistor.

[0033] This invention also provides a bidirectional switching device, in which a field plate extends along a first direction and is disposed on a trench isolation region between a first withstand voltage region and a second withstand voltage region. The voltage of the field plate changes with the gate voltage of the switching transistors on both sides. The field plate and the underlying well region form a MOS structure, causing an accumulation region to form on the surface of the well region, increasing the equivalent concentration of the base region and thus preventing the well region from being depleted. Therefore, it can prevent punch-through leakage of the base region of the parasitic transistor in the termination structure of the bidirectional switching device. At the same time, when the device is turned on, the potential of each electrode is the same as the original potential, so it will not affect the conduction characteristics of the device, nor will it change the intrinsic structure of the device. This solution can form the field plate and the polysilicon gate simultaneously, effectively preventing punch-through leakage of the base region of the parasitic transistor in the termination structure of the bidirectional switching device while effectively reducing the manufacturing cost of the device. Attached Figure Description

[0034] The accompanying drawings, which form part of this specification, are used to provide a further understanding of the embodiments of this application and to illustrate the implementation of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application.

[0035] Figure 1 The diagram shown is a schematic diagram of a planar layout structure of a bidirectional switching device according to an embodiment of the prior art. Figures 2-3 Displayed as Figure 1 A schematic diagram of the cross-sectional structure at point ABCD.

[0036] Figure 4 The diagram shows a layout structure of a further improved bidirectional switching device according to Embodiment 1 of the present invention. Figure 5 Displayed as Figure 4 Schematic diagram of the cross-sectional structure at point A-A' Figure 6 Displayed as Figure 4Schematic diagram of the cross-sectional structure at point B-B' Figure 7 Displayed as Figure 4 Schematic diagram of the cross-sectional structure at C-C' Figure 8 Displayed as Figure 4 Schematic diagram of the cross-sectional structure at point D-D' Figure 9 Displayed as Figure 4 Schematic diagram of the cross-sectional structure at E-E' Figure 10 Displayed as Figure 4 A schematic diagram of a cross-sectional structure at FGHI;

[0037] Figure 11 Displayed as Figure 5 A schematic diagram of another cross-sectional structure at FGHI.

[0038] Figure 12 The diagram shown is a schematic diagram of the layout structure of the bidirectional switching device according to Embodiment 2 of the present invention. Figure 13 Displayed as Figure 12 A schematic diagram of the cross-sectional structure at point ABCD.

[0039] Component designation explanation

[0040] 101 Tunnel

[0041] 102 First Body Area

[0042] 103 Second Body Area

[0043] 104 First Source Region

[0044] 105 Second Source Region

[0045] 106 Common Drain

[0046] 107 First Body Contact Area

[0047] 108 Second Body Contact Area

[0048] 109 First gate

[0049] 110 Second gate

[0050] 111 Field Board

[0051] 112 Metallic trace layer

[0052] 113 Field Oxygen Layer

[0053] 114 First Pressure Resistance Zone

[0054] 115 Second Pressure Resistance Zone

[0055] 116 Trench Isolation Zone

[0056] 201 First Board

[0057] 202 Second Board Detailed Implementation

[0058] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0059] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, whole, step, or component, but does not exclude the presence or addition of one or more other features, wholes, steps, or components.

[0060] Features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.

[0061] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0062] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.

[0063] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0064] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0065] Example 1

[0066] like Figures 1-3 As shown, where, Figure 1 The diagram shows a planar layout of the bidirectional switching device. Figures 2-3 Displayed as Figure 1 The schematic diagram of the cross-sectional structure at point ABCD in this embodiment illustrates a bidirectional switching device and its terminal structure. During actual operation of the bidirectional switching device, the gate and source of one switching transistor are shorted and connected to 0V, while the gate and source of the other switching transistor are shorted and connected to a high potential. As an example, such as... Figure 2 As shown, gate G1 and source S1 are connected to a high potential, and gate G2 and source S2 are shorted and connected to zero potential, as follows. Figure 2 As shown, at this time, the parasitic diode PN1, formed by the voltage-dopated region PDD (connected to the body region Pbody on one side) and the well region HVNW on one side of the device, is forward biased, while the parasitic diode PN2, formed by the voltage-dopated region PDD (connected to the body region Pbody on the other side) and the well region HVNW on the other side, is reverse biased. The device will move along the path shown in the diagram. Figure 2 The curve shows the depletion withstand voltage. When the voltage difference between the two sides is large, the depletion layer extends to the dashed box X position on one side, where the voltage is higher. The metal layer M1 is connected to the gate G2, and its voltage is ground potential (0V). The voltage in the well region HVNW is positive, thus forming a reverse MOS capacitor structure with the shallow trench isolation region and the well region HVNW below, further depleting the surface of the well region HVNW. Therefore, the presence of the metal layer M1 makes it easier for surface punch-through to occur in the well region HVNW, causing leakage of the parasitic transistor (PDD-HVNW-PDD). The leakage path is as follows... Figure 3 The dashed path is shown. Meanwhile, the smaller the device size, the smaller the base width (HVNW) of the parasitic transistor, the higher the operating voltage of the high-voltage side device, the easier it is for the base region to punch through, and the more prone it is to abnormal leakage.

[0067] To address the problems of the above embodiments, such as Figures 4 to 10 As shown, where, Figure 5 Displayed as Figure 4 Schematic diagram of the cross-sectional structure at point A-A' Figure 6 Displayed as Figure 4 Schematic diagram of the cross-sectional structure at point B-B' Figure 7 Displayed as Figure 4 Schematic diagram of the cross-sectional structure at C-C' Figure 8 Displayed as Figure 4 Schematic diagram of the cross-sectional structure at point D-D' Figure 9 Displayed as Figure 4 Schematic diagram of the cross-sectional structure at E-E' Figure 10 Displayed as Figure 4A cross-sectional view at FGHI is shown in this embodiment. This embodiment further provides a bidirectional switching device and its termination structure. Firstly, this embodiment provides a termination structure for the bidirectional switching device, which includes a well region 101, a first withstand voltage region 114 and a second withstand voltage region 115 located within the well region. The first withstand voltage region 114, the well region 101, and the second withstand voltage region 115 constitute a parasitic transistor. The termination structure includes a field plate located between the first withstand voltage region 114 and the second withstand voltage region 115, and on the upper surface of the well region 101. The field plate is connected to a voltage to mitigate leakage current in the parasitic transistor. Specifically, in one embodiment, the field plate is located on the common drain 106. In this embodiment, when the bidirectional switching device is in a withstand voltage state, that is, when the source and gate of one side of the bidirectional switching device are connected to zero potential and the source and gate of the other side of the bidirectional switching device are connected to a high potential, the first PN junction of the parasitic transistor is forward biased and the second PN junction is reverse biased, thus connecting a high voltage to the field plate, which can alleviate the leakage phenomenon of the parasitic transistor.

[0068] Wherein, in the direction perpendicular to the bidirectional switching device stack, the end of the field plate 111 extends at least to the edge of the first withstand voltage region 114 and the second withstand voltage region 115, so that the vertical projection of the field plate divides the base region of the parasitic transistor. Further, in the direction perpendicular to the bidirectional switching device stack, the end of the field plate 111 extends beyond the edge of the first withstand voltage region 114 and the second withstand voltage region 115 (i.e., as shown in the image). Figure 4 As shown, the field plate 111 extends along the directions F→G and G→F to the outer edge of the first withstand voltage region 114 and the second withstand voltage region 115, so that the vertical projection of the field plate 111 divides the base region of the parasitic transistor. In one embodiment, the field plate 111 is electrically connected to a common drain 106, wherein the common drain 106 is the common drain of both switching transistors, and the potential of the field plate 111 changes with the voltage potential of the common drain 106 of the bidirectional switching device.

[0069] This embodiment further provides a bidirectional switching device, which includes: a well region 101 of a first conductivity type, a first body region 102 and a second body region 103 of a second conductivity type, a first source region 104 and a second source region 105 of a first conductivity type, a first gate 109 and a second gate 110, a first withstand voltage region 114 and a second withstand voltage region 115 of a second conductivity type, a trench isolation region 116, a field plate 111, and a metal trace layer 112.

[0070] like Figures 4 to 10As shown, the well region 101 of the first conductivity type can be disposed in the substrate by an ion doping process, or it can be directly disposed as a whole substrate of the corresponding conductivity type. The substrate material includes silicon. Of course, in other embodiments, the substrate material can also be germanium, germanium silicon, silicon carbide, group III-V compounds, etc. In one embodiment, the substrate is of the N-type conductivity type, and the doping ions in the substrate can be, for example, phosphorus.

[0071] like Figure 4 , Figures 8-10 As shown, the first body region 102 and the second body region 103 of the second conductivity type are spaced apart and extend from the upper surface of the well region 101 into the well region 101. In one embodiment, the first body region 102 and the second body region 103 are of the P-type conductivity type, and the first body region 102 and the second body region 103 can be formed by processes such as ion implantation and annealing, and the doped ions can be, for example, boron.

[0072] like Figure 4 , Figures 8-10 As shown, the first source region 104 and the second source region 105 of the first conductivity type are respectively disposed in the first body region 102 and the second body region 103. In one embodiment, the first source region 104 and the second source region 105 are of N-type conductivity type. The first source region 104 and the second source region 105 can be formed by processes such as ion implantation and annealing. The doped ions can be, for example, phosphorus, and the ion doping concentration is greater than that of the well region 101.

[0073] like Figure 4 , Figures 8-10 As shown, the terminal structure further includes a first body contact region 107 and a second body contact region 108 of a second conductivity type, respectively disposed in the first body region 102 and the second body region 103. In one embodiment, the first body contact region 107 and the second body contact region 108 are of P-type conductivity type. The first body contact region 107 and the second body contact region 108 can be formed by processes such as ion implantation and annealing. The doped ions can be, for example, boron, and the ion doping concentration is greater than that of the first body region 102 and the second body region 103. In one embodiment, the first body contact region 107 and the second body contact region 108 are respectively disposed adjacent to the first source region 104 and the second source region 105, so as to facilitate the joint extraction of the first body contact region 107 and the first source region 104 through a metal silicide, and the joint extraction of the second body contact region 108 and the second source region 105 through a metal silicide, resulting in a more compact device layout. The first contact area 107 and the second contact area 108 can effectively reduce the contact resistance when the first body area 102 and the second body area 103 are led out, thereby reducing the power consumption of the device.

[0074] like Figure 4 , Figures 8-10 As shown, the common drain 106 of the first conductivity type extends from the upper surface of the well region 101 into the well region 101 and is located between the first body region 102 and the second body region 103. In one embodiment, the common drain 106 is of N-type conductivity. The common drain 106 can be formed by processes such as ion implantation and annealing. Its doping ions can be, for example, phosphorus, and its ion doping concentration is greater than that of the well region 101.

[0075] like Figure 4 , Figures 6-10 As shown, the first gate 109 and the second gate 110 are respectively disposed between the first source region 104 and the common drain 106, and between the second source region 105 and the common drain 106. The first gate 109 and the second gate 110 are located on the upper surface of the well region 101. The first gate 109 is in contact with the first source region 104, and the second gate 110 is in contact with the second source region 105. The first gate 109 and the second gate 110 include a gate oxide layer and a polysilicon gate. The gate oxide layer can be formed by processes such as thermal oxidation, plasma-enhanced chemical vapor deposition (PECVD), or low-pressure chemical vapor deposition (LPCVD). The polysilicon gate can be formed by chemical vapor deposition (CVD), and the desired morphology of the first gate 109 and the second gate 110 is formed by photolithography and etching processes.

[0076] like Figure 4 , Figure 7 , Figure 10 As shown, the first withstand voltage region 114 and the second withstand voltage region 115 of the second conductivity type extend from the upper surface of the well region 101 into the well region 101, and are disposed at the ends of the first body region 102 and the second body region 103, respectively. In one embodiment, the first withstand voltage region 114 and the second withstand voltage region 115 are of P-type conductivity type, and the first withstand voltage region 114 and the second withstand voltage region 115 can be formed by processes such as ion implantation and annealing, and the doped ions can be, for example, boron. In one embodiment, the width of the first withstand voltage region 114 is greater than the width of the first body region 102, and the width of the second withstand voltage region 115 is greater than the width of the second body region 103, so as to improve the withstand voltage effect of the first withstand voltage region 114 and the second withstand voltage region 115.

[0077] like Figure 4 , Figures 5-6 and Figure 10As shown, the trench isolation region 116 (STI) is disposed in the well region 101 between the first withstand voltage region 114 and the second withstand voltage region 115. The depth of the trench isolation region 116 is less than the depth of the first withstand voltage region 114 and the second withstand voltage region 115. The trench isolation region 116 is disposed in the edge region of the terminal structure, and the trench isolation region 116 includes trenches and insulating material (such as silicon dioxide) filling the trenches.

[0078] like Figure 4 , Figures 5-8 and Figure 10 As shown, the field plate 111 is disposed on the upper surface of the well region 101, and further disposed on the trench isolation region 116 between the first withstand voltage region 114 and the second withstand voltage region 115. Meanwhile, the field plate 111 is located on the common drain 106 of the bidirectional switching device, and the field plate 111 is electrically connected to the common drain 106.

[0079] like Figure 4 As shown, in one embodiment, in a direction perpendicular to the bidirectional switching device stack, the end of the field plate 111 extends at least to the edge of the first withstand voltage region 114 and the second withstand voltage region 115, so that the vertical projection of the field plate 111 divides the base region of the parasitic transistor. Further, in a direction perpendicular to the bidirectional switching device stack, the end of the field plate 111 extends beyond the edge of the first withstand voltage region 114 and the second withstand voltage region 115.

[0080] like Figures 4 to 10 As shown, the metal trace layer 112 covers the first withstand voltage region 114, the second withstand voltage region 115, and the trench isolation region 116 between them. The field plate 111 is disposed between the metal trace layer 112 and the trench isolation region 116. The metal trace layer 112 is electrically connected to the second gate 110.

[0081] like Figure 7 and Figure 8 As shown, the terminal structure further includes a field oxide layer 113, which extends from the trench isolation region 116 to the end of the common drain 106. One end of the field plate 111 is connected to the common drain 106 and extends from above the field oxide layer 113 onto the trench isolation region 116. In one embodiment, the field oxide layer 113 further extends from both sides of the common drain 106 to the edges of the first gate 109 and the second gate 110. The polysilicon gates of the first gate 109 and the second gate 110 extend along the field oxide layer 113 onto the trench isolation region 116. It should be noted that... Figures 7-9 In the text, only the general location of field oxygen layer 113 is marked, without specifically drawing the area of ​​field oxygen layer 113.

[0082] like Figure 10 As shown, in one embodiment, when the first conductivity type is N-type and the second conductivity type is P-type, in this embodiment, the bidirectional switching device and its terminal structure, when the device withstands voltage, the second source region 105 and the second gate 110 are shorted to ground potential, and the first source region 104 and the first gate 109 are shorted to high potential. At this time, PN1 is forward biased, PN2 is reverse biased, and the depletion line expands as shown by the curve. The potential of the common drain 106 and the field plate 111 increases with the increase of the potential of the first source region 104 and is higher than the voltage of the well region 101. The field plate 111 and the lower well region 101 (e.g., Figure 10 The forward-biased MOS capacitor structure (within the dashed box) creates an electron accumulation region on the surface of the well region 101, effectively increasing the base concentration of the parasitic transistor and preventing depletion of the well region 101, thus preventing base punch-through. Although the metal trace layer 112 remains at ground potential and still accelerates depletion of the underlying well region 101, the added field plate 111, positioned between the metal trace layer 112 and the well region 101, shields the effect of the metal trace layer 112, eliminating its influence on the well region 101. Furthermore, when the device is turned on, the potential of the introduced field plate 111 is the same as the original potential of the common drain 106, thus not affecting the device's conduction characteristics or altering its intrinsic structure. Preferably, the field plate 111 is made of polycrystalline silicon, so that the field plate 111 can be formed simultaneously with the polycrystalline silicon gate first gate 109 and second gate 110, which is compatible with existing processes and does not add new process steps.

[0083] like Figure 11 As shown, in another embodiment, when the first conductivity type is P-type and the second conductivity type is N-type, in this embodiment, when the bidirectional switching device and its terminal structure are under withstand voltage, the second source region 105 and the second gate 110 are shorted to ground potential, and the first source region 104 and the first gate 109 are shorted to high potential. At this time, PN1 is reverse biased and withstand voltage is PN2, and the depletion line extends as shown by the curve. The potential of the common drain 106 and the field plate 111 remains low and will be lower than the voltage of the well region 101. The field plate 111 and the lower well region 101 (e.g., Figure 10The reverse-biased MOS capacitor structure (within the dashed box) creates a hole accumulation region on the surface of the well region 101, effectively increasing the base concentration of the parasitic transistor and preventing depletion of the well region 101. This also prevents base punch-through. Although the metal trace layer still accelerates depletion of the underlying well region 101, the added field plate 111 is positioned between the metal trace layer 112 and the well region 101, shielding the effect of the metal trace layer 112. Therefore, the influence of the metal trace layer 112 on the well region 101 is eliminated.

[0084] This embodiment also provides an electronic device, which includes the bidirectional switching device described in the above embodiment.

[0085] In one embodiment, the electronic device includes one of a mobile phone, a laptop computer, a tablet computer, a smart robot, a wearable electronic device, and an automotive electronic device.

[0086] Example 2

[0087] like Figures 12-13 As shown, where, Figure 13 Displayed as Figure 12The cross-sectional structure diagram at point ABCD is shown in this embodiment. This embodiment provides another bidirectional switching device and its termination structure. Some of its main structures and corresponding cross-sectional structures can be referred to in Embodiment 1. This embodiment first provides a termination structure for a bidirectional switching device, which includes: a first field plate 201 and a second field plate 202. The common drain 106 of the bidirectional switching device is located between the gates of the two switching transistors. The first field plate 201 and the second field plate 202 extend from the gates of the two switching transistors towards the common drain 106, perpendicular to the... In the direction of the bidirectional switching device stack, the ends of the first field plate 201 and the second field plate 202 both extend beyond the edges of the first withstand voltage region 114 and the second withstand voltage region 115, so that the vertical projection of the first field plate 201 and the second field plate 202 divides the base region of the parasitic transistor formed by the first withstand voltage region 114, the well region 101 located between the first withstand voltage region 114 and the second withstand voltage region 115, and the second withstand voltage region 115; the voltages of the first field plate 201 and the second field plate 202 change with the gate voltages of the switching transistors on both sides, thereby mitigating the leakage phenomenon of the parasitic transistor. In one embodiment, the first field plate 201 and the second field plate 202 are integrally formed with the gates 109 and 110 of the switching transistors on both sides, respectively. The potentials of the first field plate 201 and the second field plate 202 change with the potentials of the gates 109 and 110 of the two switching transistors. The first field plate 201 and the second field plate 202 form a MOS capacitor structure with the well region 101 below them, so that an accumulation region is formed on the surface of the well region 101, avoiding the depletion of the well region 101 and the generation of leakage current.

[0088] This embodiment further provides a bidirectional switching device, which includes: a well region 101 of a first conductivity type, a first body region 102 and a second body region 103 of a second conductivity type, a first source region 104 and a second source region 105 of a first conductivity type, a first gate 109 and a second gate 110, a first withstand voltage region 114 and a second withstand voltage region 115 of a second conductivity type, a trench isolation region 116, a first field plate 201, a second field plate 202, and a metal trace layer 112.

[0089] like Figures 12-13 As shown, the well region 101 of the first conductivity type can be disposed in the substrate by an ion doping process, or it can be directly disposed as a whole substrate of the corresponding conductivity type. The substrate material includes silicon. Of course, in other embodiments, the substrate material can also be germanium, germanium silicon, silicon carbide, group III-V compounds, etc. In one embodiment, the substrate is of the N-type conductivity type, and the doping ions in the substrate can be, for example, phosphorus.

[0090] like Figures 12-13As shown, the first body region 102 and the second body region 103 of the second conductivity type are spaced apart and extend from the upper surface of the well region 101 into the well region 101. In one embodiment, the first body region 102 and the second body region 103 are of the P-type conductivity type, and the first body region 102 and the second body region 103 can be formed by processes such as ion implantation and annealing, and the doped ions can be, for example, boron.

[0091] like Figures 12-13 As shown, the first source region 104 and the second source region 105 of the first conductivity type are respectively disposed in the first body region 102 and the second body region 103. In one embodiment, the first source region 104 and the second source region 105 are of N-type conductivity type. The first source region 104 and the second source region 105 can be formed by processes such as ion implantation and annealing. The doped ions can be, for example, phosphorus, and their ion doping concentration is greater than that of the well region 101. Figures 12-13 As shown, the terminal structure further includes a first body contact region 107 and a second body contact region 108 of a second conductivity type, respectively disposed in the first body region 102 and the second body region 103. In one embodiment, the first body contact region 107 and the second body contact region 108 are of P-type conductivity type. The first body contact region 107 and the second body contact region 108 can be formed by processes such as ion implantation and annealing. The doped ions can be, for example, boron, and the ion doping concentration is greater than that of the first body region 102 and the second body region 103. In one embodiment, the first body contact region 107 and the second body contact region 108 are respectively disposed adjacent to the first source region 104 and the second source region 105, so as to facilitate the joint extraction of the first body contact region 107 and the first source region 104 through a metal silicide, and the joint extraction of the second body contact region 108 and the second source region 105 through a metal silicide, resulting in a more compact device layout. The first contact area 107 and the second contact area 108 can effectively reduce the contact resistance when the first body area 102 and the second body area 103 are led out, thereby reducing the power consumption of the device.

[0092] like Figures 12-13 As shown, the common drain 106 of the first conductivity type is disposed between the first body region 102 and the second body region 103. In one embodiment, the common drain 106 is of N-type conductivity. The common drain 106 can be formed by processes such as ion implantation and annealing. Its doping ions can be, for example, phosphorus, and its ion doping concentration is greater than that of the well region 101.

[0093] like Figures 12-13As shown, the first gate 109 and the second gate 110 are respectively disposed between the first source region 104 and the common drain 106, and between the second source region 105 and the common drain 106. The first gate 109 and the second gate 110 include a gate oxide layer and a polysilicon gate. The gate oxide layer can be formed by processes such as thermal oxidation, plasma-enhanced chemical vapor deposition (PECVD), and low-pressure chemical vapor deposition (LPCVD). The polysilicon gate can be formed by chemical vapor deposition (CVD), and the first gate 109 and the second gate 110 are formed with the desired morphology by photolithography and etching processes.

[0094] like Figures 12-13 As shown, the first withstand voltage region 114 and the second withstand voltage region 115 of the second conductivity type are respectively disposed at the ends of the first body region 102 and the second body region 103. In one embodiment, the first withstand voltage region 114 and the second withstand voltage region 115 are of P-type conductivity type, and the first withstand voltage region 114 and the second withstand voltage region 115 can be formed by processes such as ion implantation and annealing, and the doped ions can be, for example, boron. In one embodiment, the width of the first withstand voltage region 114 is greater than the width of the first body region 102, and the width of the second withstand voltage region 115 is greater than the width of the second body region 103, so as to improve the withstand voltage effect of the first withstand voltage region 114 and the second withstand voltage region 115.

[0095] like Figures 12-13 As shown, the trench isolation region 116 (STI) is disposed in the well region 101 between the first withstand voltage region 114 and the second withstand voltage region 115. The depth of the trench isolation region 116 is less than the depth of the first withstand voltage region 114 and the second withstand voltage region 115. The trench isolation region 116 is disposed in the edge region of the terminal structure, and the trench isolation region 116 includes trenches and insulating material (such as silicon dioxide) filling the trenches.

[0096] like Figures 12-13 As shown, in this embodiment, the common drain 106 of the bidirectional switching device is located between the gates of the two switching transistors of the bidirectional switching device. The first field plate 201 and the second field plate 202 extend from the gates of the two switching transistors toward the common drain 106. The field plate includes the first field plate 201 and the second field plate 202, and the ends of the first field plate 201 and the second field plate 202 extend beyond the edges of the first withstand voltage region 114 and the second withstand voltage region 115 (e.g., ...). Figure 12As shown, the first field plate 201 and the second field plate 202 extend along the directions A→B and B→A to the outside of the edges of the first withstand voltage region 114 and the second withstand voltage region 115, so that the vertical projection of the first field plate 201 and the second field plate 202 divides the base region of the transistor formed by the first withstand voltage region 114, the well region 101, and the second withstand voltage region 115. The first field plate 201 is connected to the same potential as the first gate 109, and the second field plate 202 is connected to the same potential as the second gate 110.

[0097] In this embodiment, when the bidirectional switching device is under voltage withstand conditions, in one embodiment, when the first conductivity type is N-type and the second conductivity type is P-type, when the second source region 105 is shorted to ground potential and the second gate 110 is shorted to high potential and the first source region 104 is shorted to high potential and the first gate 109 is high potential, the potential of the first field plate 201 is high potential and higher than the voltage of the well region 101. The first field plate 201 and the lower well region 101 form a forward biased MOS capacitor structure, so that an electron accumulation region is formed on the surface of the well region 101, which effectively increases the base region concentration of the parasitic transistor and avoids the depletion of the well region 101, preventing the base region from punching through. In another embodiment, when the first conductivity type is P-type and the second conductivity type is N-type, in this embodiment, when the bidirectional switching device and its terminal structure are under withstand voltage, the second source region 105 is shorted to the second gate 110 and grounded, and the first source region 104 is shorted to the first gate 109 and grounded. The potential of the second field plate 202 is low and lower than the voltage of the well region 101. The second field plate 202 and the lower well region 101 form a reverse-biased MOS capacitor structure, causing a hole accumulation region to form on the surface of the well region 101, which is equivalent to increasing the base concentration of the parasitic transistor, thereby preventing the well region 101 from being depleted and also preventing base punch-through. At this time, although the metal trace layer 112 is still connected to the second gate at 0 potential, the effect of the metal trace layer 112 is shielded because the added field plate 111 is located between the metal trace layer 112 and the well region 101. Therefore, the influence of the metal trace layer 112 on the well region 101 is eliminated. Furthermore, in this embodiment, the first field plate 201 and the second field plate 202 are formed by extending the polysilicon gates of the first gate and the second gate to the trench isolation region 116 between the first withstand voltage region 114 and the second withstand voltage region 115, respectively. This scheme can form the first field plate 201 and the second field plate 202 simultaneously with the polysilicon gate, effectively preventing punch-through leakage in the base region of the parasitic transistor in the bidirectional switching device termination structure, while effectively reducing the manufacturing cost of the device.

[0098] This embodiment also provides an electronic device, which includes the bidirectional switching device described in the above embodiment.

[0099] In one embodiment, the electronic device includes one of a mobile phone, a laptop computer, a tablet computer, a smart robot, a wearable electronic device, and an automotive electronic device.

[0100] As described above, the bidirectional switching device, its terminal structure, and electronic device of the present invention have the following beneficial effects:

[0101] This invention provides a termination structure and a bidirectional switching device. A field plate is disposed on a trench isolation region between a first and a second withstand voltage region. The voltage of the field plate changes with the gate voltage of the switching transistors on both sides. The field plate and the underlying well region form a MOS structure, resulting in an accumulation region on the surface of the well region. This increases the effective concentration of the base region, preventing depletion of the well region and thus preventing punch-through leakage in the base region of the parasitic transistor in the termination structure of the bidirectional switching device. Simultaneously, when the device is turned on, the potential of each electrode remains the same as before, so it does not affect the conduction characteristics of the device or change its intrinsic structure. This solution allows the field plate and the polysilicon gate to be formed simultaneously, effectively preventing punch-through leakage in the base region of the parasitic transistor in the termination structure of the bidirectional switching device while significantly reducing the manufacturing cost of the device.

[0102] Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0103] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A termination structure for a bidirectional switching device, the bidirectional switching device comprising a well region, a first withstand voltage region and a second withstand voltage region located within the well region, the first withstand voltage region, the well region and the second withstand voltage region constituting a parasitic transistor, characterized in that, The bidirectional switching device further includes a first body region and a second body region, wherein the first withstand voltage region and the second withstand voltage region are respectively disposed at the ends of the first body region and the second body region in their extending directions, the width of the first withstand voltage region is greater than the width of the first body region, and the width of the second withstand voltage region is greater than the width of the second body region, and the terminal structure includes: The field plate is located between the first pressure-resistant region and the second pressure-resistant region, and is located on the upper surface of the well region; The field plate is connected to a voltage to alleviate the leakage phenomenon of the parasitic transistor.

2. The terminal structure according to claim 1, characterized in that: In a direction perpendicular to the stack of bidirectional switching devices, the end of the field plate extends at least to the edge of the first and second withstand voltage regions, so that the vertical projection of the field plate divides the base region of the parasitic transistor.

3. The terminal structure according to claim 1, characterized in that: In a direction perpendicular to the bidirectional switching device stack, the end of the field plate extends beyond the edges of the first and second withstand voltage regions.

4. The terminal structure according to claim 1, characterized in that: The field plate is located on the common drain of the bidirectional switching device.

5. The terminal structure according to claim 4, characterized in that: The field plate is electrically connected to the common drain of the bidirectional switching device.

6. The terminal structure according to claim 1, characterized in that: The field plate includes a first field plate and a second field plate, which are integrally formed with the gates of the two switching transistors on both sides of the bidirectional switching device.

7. The terminal structure according to claim 6, characterized in that: The common drain of the bidirectional switching device is located between the gates of the two switching transistors of the bidirectional switching device, and the first field plate and the second field plate extend from the gates of the two switching transistors toward the common drain.

8. The terminal structure according to claim 5 or 6, characterized in that: The potential of the field plate changes with the voltage of the common drain of the bidirectional switching device or the gate voltage potential of the two switching transistors. The field plate and the well region below it form a MOS capacitor structure, which makes the surface of the well region form an accumulation region, thus avoiding the depletion of the well region and the generation of leakage current.

9. The terminal structure according to claim 1, characterized in that: The field plate is made of polycrystalline silicon.

10. A bidirectional switching device, characterized in that, The bidirectional switching device includes: Well region of the first conductivity type; The first and second body regions of the second conductivity type extend from the upper surface of the well region into the well region; A first source region and a second source region of a first conductivity type are respectively disposed in the first body region and the second body region; A common drain of a first conductivity type extends from the upper surface of the well region into the well region and is disposed between the first body region and the second body region; The first gate and the second gate are located on the upper surface of the well region and are respectively disposed between the first source region and the common drain and between the second source region and the common drain. The first and second withstand voltage regions of the second conductivity type are in contact with the first and second body regions, respectively. The first and second withstand voltage regions are respectively located at the ends of the first and second body regions in the extending direction. The width of the first withstand voltage region is greater than the width of the first body region, and the width of the second withstand voltage region is greater than the width of the second body region. The first withstand voltage region, the well region, and the second withstand voltage region constitute a parasitic transistor. The field plate is located between the first pressure-resistant region and the second pressure-resistant region, and is located on the upper surface of the well region; The field plate is connected to a voltage to alleviate the leakage phenomenon of the parasitic transistor.

11. The bidirectional switching device according to claim 10, characterized in that: In a direction perpendicular to the stack of bidirectional switching devices, the end of the field plate extends at least to the edge of the first and second withstand voltage regions, so that the vertical projection of the field plate divides the base region of the parasitic transistor.

12. The bidirectional switching device according to claim 10, characterized in that: In a direction perpendicular to the bidirectional switching device stack, the end of the field plate extends beyond the edges of the first and second withstand voltage regions.

13. The bidirectional switching device according to claim 10, characterized in that: The field plate is located on the common drain of the bidirectional switching device.

14. The bidirectional switching device according to claim 13, characterized in that: The field plate is electrically connected to the common drain.

15. The bidirectional switching device according to claim 10, characterized in that: The bidirectional switching device further includes a trench isolation region disposed in the well region between the first withstand voltage region and the second withstand voltage region.

16. The bidirectional switching device according to claim 15, characterized in that: The bidirectional switching device further includes a metal trace layer, which covers at least the first withstand voltage region and the second withstand voltage region and the trench isolation region between them. The field plate is disposed between the metal trace layer and the trench isolation region, and the metal trace layer is electrically connected to the first gate or the second gate.

17. The bidirectional switching device according to claim 15, characterized in that: The field plate includes a first field plate and a second field plate, which are formed by the first grid and the second grid extending onto the trench isolation area, respectively.

18. The bidirectional switching device according to claim 17, characterized in that: The first field plate is connected to the first gate at the same potential, and the second field plate is connected to the second gate at the same potential.

19. The bidirectional switching device according to claim 10, characterized in that: The first conductivity type is either N-type or P-type, and the second conductivity type is either N-type or P-type.

20. The bidirectional switching device according to claim 10, characterized in that: The formation of a MOS capacitor structure between the field plate and the lower well region allows an accumulation region to form on the surface of the well region, thereby preventing the well region from being depleted and causing leakage.

21. The bidirectional switching device according to claim 10, characterized in that: It also includes a first body contact region and a second body contact region of a second conductivity type, which are respectively disposed in the first body region and the second body region.

22. The bidirectional switching device according to claim 15, characterized in that: The depth of the trench isolation zone is less than the depth of the first pressure-resistant zone and the second pressure-resistant zone.

23. The bidirectional switching device according to claim 10, characterized in that, The field plate is made of polycrystalline silicon.

24. An electronic device, characterized in that, The electronic device includes a bidirectional switching device as described in any one of claims 10-23.

25. The electronic device according to claim 24, characterized in that: The electronic device includes one of the following: mobile phone, laptop computer, tablet computer, smart robot, wearable electronic device and automotive electronic device.

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