A sigma delta adc digital calibration circuit based on analog domain dither randomization injection

Abstract

The application discloses a Sigma Delta ADC digital calibration circuit based on analog domain dithering randomization injection, which comprises a transcoder, an adder, DWA selection logic, a switch matrix, an analog domain dithering injection module and a random number generator; the transcoder is used for converting a temperature code into a binary code; the adder is used for accumulating the input binary code and generating an element pointer; the DWA selection logic module is used for outputting a switch matrix control signal according to the element pointer to control the on-off of the switch matrix; the switch matrix is used for outputting the temperature code with rearranged positions to an external circuit; the random number generator is used for generating a single-bit random control signal; and the analog domain dithering injection module is used for generating a random dithering signal according to the single-bit random control signal. By inputting the random dithering signal at the input end of the multi-bit quantizer, the application can avoid the periodic cycle sequence of the circuit in the extreme case, eliminate the harmonics generated at the input in the extreme case, and realize a higher unmodulated dynamic range.

Description

Technical Field

[0001] This invention belongs to the field of analog-to-digital conversion circuit technology, specifically relating to a Sigma Delta ADC digital calibration circuit based on analog domain jitter randomization injection. Background Technology

[0002] In recent years, in rapidly developing fields such as mobile communications, sensors, and biomedicine, the demand for accurate data, high-quality audio, and images has been increasing. This necessitates ADCs capable of processing weaker analog signals, thus requiring higher-precision ADCs. Low power consumption, high speed, and high precision are the three major directions in current ADC research and design. Different ADCs with different characteristics are suitable for different application environments, and the Sigma Delta ADC is currently the mainstream architecture for high-precision ADCs.

[0003] Sigma Delta ADCs achieve a high effective bit count with a low-bit quantizer by using oversampling and noise shaping techniques. The effective bit count can be further increased by increasing the oversampling rate, modulator order, and quantizer bit count. The modulator's built-in quantizer is typically 1-bit due to its inherently linear gain. However, with a fixed bandwidth, the oversampling rate is positively correlated with clock frequency and power consumption, and excessively high orders can lead to loop instability. Therefore, to further increase the effective bit count, a multi-bit quantizer is needed. However, using a multi-bit quantizer requires a multi-bit DAC feedback loop. Multi-bit DACs use capacitors or current sampling. Ideally, the component values ​​for each sample are equal, but due to manufacturing errors, component mismatches can occur. Taking a current-controlled DAC as an example, assuming the sum of errors introduced by all components is zero, a typical DAC will only use the same components to produce the same output for the same input, so the error introduced by each input level is the same. For example, when the DAC input is 1, if the first component U1 is used, with an error of Δ1, then the output level 1 will always introduce an error of Δ1. When the input is 2, choosing U1 and U2 results in an error of Δ1 + Δ2, and so on. This demonstrates that the mismatch causes DAC nonlinearity, thus generating in-band noise. Furthermore, the DAC's mismatch error is not shaped by the external loop filter, leading to a surge in in-band quantization noise. Figure 1 It can be seen that the transfer function of the noise introduced by the DAC is...

[0004]

[0005] Where H(z) is the overall transfer function of the loop filter, X(z) is the input signal, V(z) is the output signal, D(z) is the error introduced by the DAC, and E(z) is the quantization error introduced by the quantizer. The absolute value of the transfer function D(z) is approximately 1, so the loop filter has no shaping effect on the error introduced by the DAC, thus generating a large amount of noise in the band, which seriously affects the modulator performance.

[0006] Therefore, DAC mismatch error calibration is necessary. Calibration methods are divided into analog calibration and digital calibration. Analog calibration is performed by changing the values ​​of components, but it is expensive and cannot be performed in real time according to time and temperature. Digital calibration is performed using digital algorithms, which reduces the impact of mismatch error and is easy to integrate. Among dynamic component matching techniques, the DWA algorithm is a superior algorithm. The traditional DWA algorithm selects components in a round-robin fashion, so that each component is selected approximately a certain number of times over a period of time, thereby producing a first-order shaping effect on the noise caused by DAC mismatch and reducing in-band noise caused by mismatch. However, there will still be phenomena where the input and output exhibit periodic changes, leading to the periodic selection of fixed components. In this case, the introduced mismatch error also changes periodically, which reduces the efficiency of the DWA algorithm, introduces tone in the in-band, and thus reduces the signal-to-noise ratio and spurious-free dynamic range of the modulator.

[0007] Furthermore, in extreme cases, such as with DC input or slowly varying input voltage, internal cyclic sequences, or idle tones, can occur within the circuit. This is because the input voltage remains near a critical level for a sufficient period to make the internal cyclic sequence's periodicity noticeable. This is especially true for low-order modulators. The low-frequency components generated by these internal cyclic sequences introduce in-band tones, thereby reducing the overall modulator's signal-to-noise ratio and spurious-free dynamic range. Summary of the Invention

[0008] To address the aforementioned problems in the prior art, this invention provides a Sigma Delta ADC digital calibration circuit based on analog domain jitter randomization injection. The technical problem to be solved by this invention is achieved through the following technical solution:

[0009] A Sigma Delta ADC digital calibration circuit based on analog domain jitter randomization injection includes: a transcoder, an adder, DWA selection logic, a switch matrix, an analog domain jitter injection module, and a random number generator;

[0010] The transcoder is connected to an external circuit and is used to convert the thermometer code input by the multi-bit quantizer of the external circuit into binary code.

[0011] The adder, connected to the transcoder, is used to accumulate the input binary code and generate a component pointer; wherein the component pointer is used to indicate the position of the first component to be used when generating the next cycle output;

[0012] The DWA selection logic module is linked to the adder and is used to output a switch matrix control signal according to the element pointer to control the on / off state of the switch matrix.

[0013] The switch matrix is ​​used to select elements in a rotating manner according to the switch control signal and the thermometer code input by the multi-bit quantizer of the external circuit, so as to output the thermometer code with rearranged position to the external circuit.

[0014] The random number generator is used to generate a single-bit random control signal and input it to the analog domain jitter injection module;

[0015] The analog domain jitter injection module is used to generate a random jitter signal based on the single-bit random control signal and input it into the multi-bit quantizer.

[0016] In one embodiment of the present invention, the external circuit includes: a loop filter, a multi-bit quantizer, and a multi-bit DAC. The signal loop input terminal L0 of the loop filter is connected to the input signal, and the noise loop input terminal L1 of the loop filter is connected to the output terminal of the multi-bit DAC.

[0017] The output of the loop filter is connected to the input of the multi-bit quantizer, and the output of the multi-bit quantizer is connected to the transcoder and the switch matrix.

[0018] The multi-bit DAC is used to select the thermometer code element according to the position, and convert the digital signal into an analog signal before inputting it into the noise loop input terminal L1 of the loop filter.

[0019] In one embodiment of the present invention, the multi-bit quantizer is used to quantize the output signal of the loop filter and the jitter signal according to corresponding weights to output the thermometer code.

[0020] In one embodiment of the present invention, the output terminal of the analog domain jitter injection module is connected to the right plate of the sampling capacitor of the least significant bit comparison unit of the multi-bit quantizer.

[0021] In one embodiment of the present invention, the analog domain jitter injection module includes: switches S1, S2, S3, and S4, and capacitor C. dither ;

[0022] One end of the switch S1 is connected to the jitter reference voltage V. Dither+The other end of switch S1 is connected to one end of switch S3;

[0023] One end of the switch S2 is connected to the jitter reference voltage V. Dither- The other end of switch S2 is connected to one end of switch S3;

[0024] The other end of the switch S3 is connected to the capacitor C. dither One end of the capacitor C is connected to the capacitor C. dither The other end is connected to the right plate of the sampling capacitor of the unit comparison unit of the multi-bit quantizer;

[0025] One end of the switch S4 is connected to the other end of the switch S3 and the capacitor C. dither Between one end of the switch S4 and the other end of the switch S4, the switch S4 is grounded.

[0026] The switches S3 and S4 are respectively powered by two non-overlapping clock phases Φ 1d and Φ 2d control;

[0027] The single-bit random control signal is used to control the switches S1 and S2 so that the analog domain jitter injection module generates a random jitter signal input to the multi-bit quantizer.

[0028] The beneficial effects of this invention are:

[0029] This invention uses an analog domain jitter injection module to input a random jitter signal at the input of a multi-bit quantizer. Only an additional analog domain random jitter injection branch is needed to achieve random jitter injection, which is then summed with the node signal and input to the multi-bit quantizer. This avoids periodic cyclic sequences in extreme cases. By adjusting the capacitance of this jitter injection branch, the amplitude of the jitter injection can be arbitrarily scaled, avoiding interference with the input signal of the multi-bit quantizer. This significantly reduces the complexity of circuit design while effectively eliminating harmonics generated under extreme input conditions, dispersing harmonic energy and converting it into noise floor energy, thus improving the modulator's SNDR and achieving a higher spurious-free dynamic range. Simultaneously, the DWA algorithm reduces the impact of component mismatch on modulator performance, ultimately significantly increasing the effective number of bits of the modulator. Therefore, it can provide an effective number of bits close to the ideal mismatch-free condition and a higher maximum spurious-free dynamic range.

[0030] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the component rotation selection principle of the traditional DWA algorithm;

[0032] Figure 2 This is a schematic diagram of a Sigma Delta ADC digital calibration circuit and external circuit based on analog domain jitter randomization injection provided in an embodiment of the present invention;

[0033] Figure 3 This is a schematic diagram of the circuit structure of the analog domain jitter injection module, random number generator, and multi-bit quantizer provided in the embodiments of the present invention. Detailed Implementation

[0034] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0035] Please see Figure 1 , Figure 1 This is a schematic diagram illustrating the component rotation selection principle using the traditional DWA algorithm. The working principle of the traditional DWA algorithm is explained below: Please refer to [link / reference]. Figure 1 Assuming the sum of errors introduced by all components is zero, the core of the DWA algorithm is to select DAC components in a round-robin fashion, using the component following the last component used in the current cycle as the first component that can be selected in the next cycle; for example... Figure 1 As shown, the first cycle input is 4, so components U0 to U3 are used; the second cycle input is 6, so components U4 to U9 are used; and the selection cycle consists of 16 components, with each component selected once, then starting again from the first component U0; for example, the fifth cycle input is 10, so components U8 to U9 are selected. 15 And for inputs of the same size, such as U0 to U1, different component selections introduce different errors. At a certain moment, the total introduced error is 0. From a mathematical perspective, the mismatch error of the DWA algorithm at time k can be expressed as:

[0036] y mis (k)=IM(ptr(k))-IM(ptr(k-1)),

[0037] in C i It is the actual size of each component, C mean Let y be the mean of the components, and IM be the accumulated component mismatch error. Therefore, y mis The z-domain expression for (k) can be written as

[0038] Y mis (z)=(1-z -1 )IM(PTR(z))

[0039] It can be seen that the DWA algorithm can perform first-order shaping on noise caused by in-band mismatch.

[0040] Example 1

[0041] like Figure 2 As shown, a Sigma Delta ADC digital calibration circuit based on analog domain jitter randomization injection includes: a transcoder, an adder, DWA selection logic, a switch matrix, an analog domain jitter injection module, and a random number generator.

[0042] The transcoder connects to an external circuit and is used to convert the thermometer code input from the external circuit's multi-bit quantizer into binary code. The output of the multi-bit quantizer is connected to the input of the transcoder.

[0043] The adder is connected to the transcoder. The adder is used to accumulate the input binary code and generate a component pointer. The component pointer is used to indicate the position of the first component to be used when generating the output of the next cycle. The output of the transcoder is connected to the input of the adder.

[0044] The DWA selection logic module is linked to the adder. The DWA selection logic module outputs switch matrix control signals based on the element pointers to control the on / off states of the switches in the switch matrix. The output of the adder is connected to the input of the DWA selection logic module.

[0045] The outputs of the DWA selection logic module and the multi-bit quantizer are both connected to the input of the switch matrix. The switch matrix is ​​used to select elements in a cyclic manner according to the switch control signal and the thermometer code input by the multi-bit quantizer of the external circuit, and to output the thermometer code rearranged to the external circuit in the output position; the output of the switch matrix is ​​connected to the external circuit.

[0046] A random number generator is used to generate a single-bit random control signal and input it to the analog domain jitter injection module. The output of the random number generator is connected to the input of the analog domain jitter injection module, and the single-bit random control signal controls the injection of the jitter signal (input).

[0047] The analog domain jitter injection module generates a random jitter signal based on a single-bit random control signal and inputs it to a multi-bit quantizer. The jitter signal is a random disturbance signal with a small amplitude. The amplitude of the jitter signal is much smaller than the input signal of the multi-bit quantizer.

[0048] It's important to note that in some applications, such as digital audio, idle tones are intolerable because human hearing devices can detect tones up to 20 dB lower than any existing white noise level. Therefore, preventing in-band tone generation is a crucial aspect of Sigma Delta modulator design, often prompting the use of higher-order modulators or injecting jitter—that is, adding random or pseudo-random signals to break the loop sequence within the circuitry. Idle tones can occur in extreme cases, such as with DC inputs or slowly varying input voltages, because in these situations, the input voltage remains near a critical level long enough for its loop sequence limitation period to become apparent. This is especially true for lower-order modulators. The low-frequency components generated by these internal loop sequences introduce in-band tones, thereby reducing the overall modulator's signal-to-noise ratio and spurious-free dynamic range.

[0049] In this embodiment, a random dithering signal is input to the input terminal of the multi-bit quantizer via an analog domain dithering injection module. This alters the amplitude of the input and output signals before and after the multi-bit quantizer, breaking the internal periodicity of the circuit. This prevents the circuit from exhibiting periodic cyclic sequences under extreme conditions, eliminating harmonics generated under extreme inputs. Harmonic energy is dispersed and converted into noise floor energy, improving the SFDR of the external multi-bit DAC. Compared to a Sigma Delta modulator without DAC digital calibration, this improves the signal-to-noise ratio of the modulator output and achieves a higher spurious-free dynamic range. Simultaneously, the DWA algorithm reduces the impact of component mismatch on modulator performance, ultimately significantly increasing the effective number of bits of the modulator. Therefore, it provides an effective number of bits close to the ideal mismatch-free condition and a higher maximum spurious-free dynamic range. Furthermore, it maintains the advantages of the traditional DWA algorithm, such as ease of implementation and integration.

[0050] Among them, the analog domain jitter injection module and the random number generator are added as an additional analog domain random jitter injection branch. By adjusting the size of the capacitor of this jitter injection branch, the amplitude of jitter injection can be arbitrarily scaled to avoid the jitter amplitude being too large and drowning out the input signal, thereby avoiding interference with the input signal of the multi-bit quantizer. This greatly reduces the complexity of circuit design and can effectively eliminate the harmonics generated under extreme conditions, achieving a higher spurious-free dynamic range.

[0051] In one embodiment, the transcoder converts the 16-bit thermometer code output from the 4-bit quantizer into a 5-bit binary code. The adder is a modulo-16 adder, used to accumulate the input and perform a modulo operation, resetting to zero and restarting the count each time it accumulates to 16. The output of the analog domain dithering injection module is connected to the input of the least significant bit comparison unit of the multi-bit quantizer; that is, the output of the analog domain dithering injection module is connected to the right electrode of the sampling capacitor of the least significant bit comparison unit of the multi-bit quantizer.

[0052] Furthermore, the external circuitry includes a loop filter, a multi-bit quantizer, and a multi-bit DAC. The signal loop input L0 of the loop filter is connected to the input signal, and the noise loop input L1 of the loop filter is connected to the output of the multi-bit DAC.

[0053] The output of the loop filter is connected to the input of a multi-bit quantizer, whose output is connected to a transcoder and a switching matrix. A random, small-amplitude jitter signal is input to the multi-bit quantizer, which outputs a high-frequency signal with quantized noise shaped, serving as the input signal for the digital calibration circuit. The jitter signal's amplitude is much smaller than the input signal of the multi-bit quantizer (the loop filter's output signal). The multi-bit quantizer is used to sum the loop filter's output signal and the jitter signal according to appropriate weights and then quantize them to output the thermometer code. The weights of the loop filter's output signal and the jitter signal are determined based on the parameters required by the actual circuit being used.

[0054] The multi-bit DAC is used to select the element based on the position of the rearranged thermometer code, and the digital signal is converted into an analog signal and then input to the noise loop input terminal L1 of the loop filter.

[0055] Furthermore, such as Figure 2 and Figure 3 As shown, the analog domain jitter injection module includes: switches S1, S2, S3, and S4, and capacitor C. dither .

[0056] One end of switch S1 is connected to the jitter reference voltage V Dither+ Connect one end of switch S1 to one end of switch S3.

[0057] One end of switch S2 is connected to the jitter reference voltage V Dither- Connect the other end of switch S2 to one end of switch S3.

[0058] The other end of switch S3 is connected to capacitor C dither One end is connected to capacitor C dither The other end is connected to the sampling capacitor C of the unit comparison unit of the multi-bit quantizer. s The right pole plate is connected.

[0059] One end of switch S4 is connected to the other end of switch S3 and capacitor C. dither One end of switch S4 is connected to the ground, and the other end of switch S4 is grounded.

[0060] Switches S3 and S4 are respectively powered by two non-overlapping clock phases Φ 1d and Φ 2d control.

[0061] A single-bit random control signal is used to control switches S1 and S2 so that the analog domain jitter injection module generates a random jitter signal input to the multi-bit quantizer.

[0062] In this embodiment, the analog domain random jitter injection branch consists of a random number generator and an analog domain jitter injection module. The random number generator produces a single-bit random control signal Φ. random Control switches S1 and S2, which are respectively connected to the jitter reference voltage V. Dither+ and V Dither- Φ 1d and Φ 2d For a two-phase non-overlapping clock, when Φ 2d When the voltage is high, switches S3, S5, and S7 are closed, and the randomly fluctuating reference voltage passes through capacitor C. dither Sampling, simultaneously, the input signal V before the multi-bit quantizer in1 (The output signal of the loop filter) passes through the sampling capacitor C. s Sampling. When Φ 1d When the value is high, switches S4 and S6 are closed, and the sampling capacitor C... s Connect to the multi-bit quantizer reference voltage or common-mode voltage, capacitor C dither Upon reset to the common-mode voltage, a voltage difference is generated at the comparator input of the multi-bit quantizer. Capacitor C... dither Much smaller than the sampling capacitance C s .

[0063] This embodiment adds an analog domain random jitter injection branch, controlled by a single-bit random control signal, to inject a jitter signal. This introduces a probability-random and small-amplitude disturbance at the input of the multi-bit quantizer, so that the internal values ​​of the circuit no longer exhibit a periodic cyclic sequence, eliminating in-band tone power and achieving a higher spurious-free dynamic range.

[0064] Specifically, the circuit operation of the present invention is as follows:

[0065] First, the random number generator produces a single-bit random number sequence (single-bit random control signal) to control the switching of the analog domain jitter injection module. When Φ 2d When the value is high, random jitter signals pass through capacitor C. dither Sampling, simultaneously, the input signal before the multi-bit quantizer passes through the sampling capacitor C. s Sampling. When Φ 1d When it is high, the sampling capacitor C s Connect to the reference voltage or common-mode voltage, capacitor C ditherUpon reset to the common-mode voltage, a voltage difference is generated at the input of the comparator of the multi-bit quantizer. Subsequently, the input signal (output signal of the loop filter) and the jitter signal are summed according to their respective weights and then quantized by the multi-bit quantizer to generate multi-bit thermometer code. The transcoder converts the output thermometer code of the multi-bit quantizer into binary code. The adder sums the binary code, performs modulo operation, and outputs a control signal to the DWA selection logic module. The DWA selection logic module generates a pointer signal (switch matrix control signal) based on the component pointer. The pointer signal then controls the switch matrix. The switch matrix selects components in rotation according to the input thermometer code and the pointer signal using the DWA algorithm, outputting a rearranged thermometer code that is connected to the subsequent multi-bit DAC to complete the digital calibration based on analog domain jitter randomization injection.

[0066] This invention uses an analog domain jitter injection module to input a random jitter signal at the input of a multi-bit quantizer. Only an additional analog domain random jitter injection branch is needed to avoid periodic cyclic sequences in the circuit under extreme conditions. This is achieved by adjusting the capacitor C of this jitter injection branch. dither The size of the jitter injection amplitude can be arbitrarily scaled to adjust the jitter signal amplitude according to the input signal of the multi-bit quantizer under different requirements. This avoids the jitter amplitude being too large and overwhelming the input signal, thereby avoiding interference with the input signal of the multi-bit quantizer. This greatly reduces the complexity of circuit design and can effectively eliminate harmonics generated under extreme input conditions. It disperses harmonic energy and converts it into noise floor energy, improving the modulator's SNDR and enabling a higher spurious-free dynamic range. At the same time, the DWA algorithm reduces the impact of component mismatch on modulator performance, and the effective number of bits of the modulator is significantly improved. Therefore, it can provide an effective number of bits close to the ideal case without mismatch and a higher maximum spurious-free dynamic range.

[0067] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0068] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0069] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0070] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0071] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0072] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A Sigma Delta ADC digital calibration circuit based on analog domain dithering randomization injection, characterized in that, The application relates to a digital-to-analog converter (DAC) and a method for controlling the same. The application comprises a converter, an adder, DWA selection logic, a switch matrix, an analog domain jitter injection module and a random number generator. The converter is connected with an external circuit and is used for converting a thermometer code input by a multi-bit quantizer of the external circuit into a binary code. The adder is connected with the converter and is used for accumulating the input binary code and generating an element pointer. The DWA selection logic module is connected with the adder and is used for outputting a switch matrix control signal to control the on-off of the switch matrix according to the element pointer. The switch matrix is used for rotating and selecting elements by a DWA algorithm according to the switch control signal and the thermometer code input by the multi-bit quantizer of the external circuit, so as to output a position rearranged thermometer code to the external circuit. The random number generator is used for generating a single-bit random control signal and inputting the single-bit random control signal to the analog domain jitter injection module. The analog domain jitter injection module is used for generating a random jitter signal according to the single-bit random control signal and inputting the random jitter signal to the multi-bit quantizer. The external circuit comprises a loop filter, a multi-bit quantizer and a multi-bit DAC. The signal loop input end L0 of the loop filter is connected with an input signal. The noise loop input end L1 of the loop filter is connected with the output end of the multi-bit DAC. The output end of the loop filter is connected with the input end of the multi-bit quantizer. The output end of the multi-bit quantizer is connected with the converter and the switch matrix. The multi-bit DAC is used for selecting elements according to the position rearranged thermometer code, converting a digital signal into an analog signal and inputting the analog signal to the noise loop input end L1 of the loop filter. The analog domain jitter injection module comprises switches S1, S2, S3, S4 and a capacitor Cdither. One end of the switch S1 is connected with a jitter reference voltage VDither+, and the other end of the switch S1 is connected with one end of the switch S3. One end of the switch S2 is connected with a jitter reference voltage VDither-, and the other end of the switch S2 is connected with one end of the switch S3. The other end of the switch S3 is connected with one end of the capacitor Cdither, and the other end of the capacitor Cdither is connected with the right plate of a sampling capacitor of a unit comparison unit of the multi-bit quantizer.

2. A sigma delta ADC digital calibration circuit based on analog domain dither randomization injection according to claim 1, characterized in that, One end of the switch S4 is connected between the other end of the switch S3 and one end of the capacitor Cdither, and the other end of the switch S4 is grounded. The switch S3 and the switch S4 are controlled by two-phase non-overlapping clocks Phi1d and Phi2d respectively. The single-bit random control signal is used for controlling the switch S1 and the switch S2, so that the analog domain jitter injection module generates a random jitter signal input to the multi-bit quantizer. The multi-bit quantizer is used for summing the output signal of the loop filter and the jitter signal according to corresponding weights and then performing quantization to output the thermometer code.

3. A Sigma Delta ADC digital calibration circuit based on analog domain dither randomization injection according to claim 2, characterized in that, An output terminal of the analog domain dither injection module is connected to a right plate of a sampling capacitor of a comparison unit of a lowest bit of the multi-bit quantizer.

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