A current sampling circuit, a sampling method and an integrated circuit using the same

Abstract

The present invention discloses a current sampling circuit, a sampling method and an integrated circuit using the same, wherein the sampling circuit comprises a sampling resistor, a first shunt current of a target current flows from a first end of the sampling resistor to a second end thereof; a first circuit is connected to the first end and the second end of the sampling resistor respectively, and the second shunt current of the target current flows into the first circuit; the first circuit reconstructs the second shunt current to obtain a first reconstructed current; the first reconstructed current is injected into the first end of the sampling resistor, or compensated to the output end of the first circuit, so that the sampling signal output by the first circuit represents the target current. The present invention can accurately sample the target current.

Description

Technical Field

[0001] The present invention relates to the field of power electronics, and in particular to a current sampling circuit, a sampling method and an integrated circuit using the same. Background Art

[0002] In the prior art, a current sampling circuit generally allows an external target current to flow through a sampling resistor, samples the voltage drop across the sampling resistor, and converts the sample into a voltage or current inside a chip.

[0003] However, when the target current is small, part of the current will flow into the chip, resulting in poor current sampling accuracy. Summary of the Invention

[0004] The object of the present invention is to provide a high-precision current sampling circuit, a sampling method and an integrated circuit using the same, so as to solve the problem of inaccurate target current sampling accuracy in the prior art.

[0005] To achieve the above object, the present invention provides a current sampling circuit.

[0006] Compared with the prior art, the technical solution of the present invention has the following advantages: when the target current does not fully flow into the sampling resistor, the present invention can also accurately sample and obtain the target current information based on the voltage information at both ends of the sampling resistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a block diagram of the current sampling circuit of the present invention;

[0008] Figure 2 This is a schematic diagram of a first embodiment of a current sampling circuit according to the present invention;

[0009] Figure 3 This is a schematic diagram of a second embodiment of a current sampling circuit according to the present invention;

[0010] Figure 4 This is a schematic diagram of a third embodiment of the current sampling circuit of the present invention. DETAILED DESCRIPTION

[0011] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments and covers any substitution, modification, equivalent method and solution made within the spirit and scope of the present invention.

[0012] In order to make the public have a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, but those skilled in the art can also fully understand the present invention without description of these details.

[0013] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the drawings are simplified and not to exact proportions, and are only used for the purpose of conveniently and clearly illustrating the embodiments of the present invention.

[0014] like Figure 1 The figure shows a block diagram of a current sampling circuit according to the present invention, including a sampling resistor Rcs and a first circuit. A portion of the target current I flows into the sampling resistor Rcs, and another portion flows into the first circuit. The first circuit reconstructs the incoming current and injects the reconstructed current into the sampling resistor Rcs, so that the current flowing through the sampling resistor Rcs is consistent with the target current I, or the reconstructed current is compensated to the output end of the first circuit to obtain a sampling signal VOUT representing the target current. The current sampling circuit according to the present invention is integrated into the chip, and the sampling resistor Rcs is set off-chip. Even when a portion of the target current I flows into the chip, the magnitude of the target current I can be accurately detected. For example, in a switching circuit, the power tube current is generally sampled by connecting a sampling resistor in series with the power tube. However, when the power tube current is low, only a portion of the current flowing out of the power tube flows into the sampling resistor, and the other portion flows into the power tube controller. According to the design method of the present invention, by providing a current reconstruction circuit and a first operational amplifier in the controller, the magnitude of the power tube current can be accurately detected.

[0015] like Figure 2As shown, a schematic diagram of an embodiment of a current sampling circuit of the present invention is shown, wherein the first circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a current reconstruction circuit and a first operational amplifier OP1. The first resistor R1 and the second resistor R2 are connected in series between the first end of the sampling resistor Rcs and the first voltage VCOM. A portion of the current I1 of the target current I flows into the first end of the sampling resistor Rcs, and a portion of the current I2 flows into the first resistor R1 and the second resistor R2. The current reconstruction circuit receives the first voltage VCOM and the voltage V1 at the common connection end of the first resistor R1 and the second resistor R2, and outputs a first reconstructed current from the first end of the sampling resistor Rcs to the second end thereof. The second end of the sampling resistor Rcs is connected to the first end of the sampling resistor Rcs through the fourth resistor R4 and the fifth resistor R5 in series. The output end of the op amp is connected; the first input end of the first op amp OP1 is connected to the common connection end of the first resistor R1 and the second resistor R2, and its second input end is connected to the common connection end of the third resistor R3 and the fourth resistor R4. The output end of the first op amp OP1 outputs a sampling signal VOUT representing the target current I; the current reconstruction circuit includes a resistor R0, an adjustment tube M0, a second op amp OP2 and a current mirror. The first input end of the second op amp OP2 is connected to the common connection end of the first resistor R1 and the second resistor R2, the second end of the second op amp OP2 is connected to the first end of the resistor R0, and the second end of the resistor R0 receives the first voltage VCOM. The drain of the adjustment tube M0 is connected to the current mirror input end, and its second end is connected to the first end of the resistor R0. The control end of the first op amp M1 is connected to the output end of the second op amp OP2. The output end of the current mirror is connected to the first end of the sampling resistor Rcs. Since the two input terminals of the second operational amplifier OP2 are virtually shorted, the voltages at the two input terminals are equal. As can be seen from the figure, the voltage at the common connection terminal of the first resistor R1 and the second resistor R2 is equal to the voltage at the first terminal of the resistor R0. Since the second terminal of the resistor R0 and the second terminal of the second resistor R2 both receive the first voltage VCOM, the current flowing through the adjustment tube M0 is equal to the current flowing through the second resistor R2, that is, the current flowing into the current mirror is equal to the current flowing through the second resistor R2. The current flowing out of the current mirror is equal to the current flowing in. The current flowing out of the current mirror flows into the first terminal of the sampling resistor Rcs, which is the reconstructed current. Assuming that the voltage at the second terminal of the sampling resistor Rcs is VB, the voltage at its first terminal is I*Rcs+VB. When the resistance values ​​of the resistors in the first circuit are the same, the voltage V1 at the first input terminal of the first operational amplifier OP1 can be obtained as:

[0016] V1=(I*Rcs+VB+VCOM) / 2 (1);

[0017] The voltage at the second terminal of the first op amp OP1 is:

[0018] V2=(VB+VOUT) / 2 (2);

[0019] Due to the virtual short characteristic of the input terminal of the first operational amplifier OP1, V1=V2, and the sampling signal VOUT is further obtained:

[0020] VOUT=VCOM+I*Rcs (3);

[0021] In formula (3), the first voltage VCOM and the sampling resistor Rcs are both known, and the obtained sampling signal VOUT can represent the magnitude of the target current.

[0022] like Figure 3 The figure shows a schematic diagram of a second embodiment of a current sampling circuit according to the present invention. The first circuit includes a current reconstruction circuit, a sixth resistor R6, a seventh resistor R7, a first adjustment transistor M1, and a first operational amplifier. The target current I flows into the first circuit, and the current I2 flows into the sixth resistor. The first end of the sixth resistor R6 is connected to the first end of the sampling resistor Rcs, the second end of the sixth resistor R6 is connected to the first end of the first adjustment transistor M1, the second end of the first adjustment transistor M1 is connected to the first end of the seventh resistor R7, and the second end of the seventh resistor R7 receives the first voltage VCOM. The current reconstruction circuit connects the two ends of the sampling resistor Rcs and outputs a first reconstructed current, which flows into the first end of the sampling resistor Rcs. The current reconstruction circuit includes a resistor R0, an adjustment tube M0, a second operational amplifier OP2 and a current mirror. The first input terminal of the second operational amplifier OP2 is connected to the first terminal of the sampling resistor Rcs, the second input terminal of the second operational amplifier OP2 is connected to the first terminal of the resistor R0, and the second terminal of the resistor R0 is connected to the second terminal of the sampling resistor Rcs; the drain of the adjustment tube M0 is connected to the input terminal of the current mirror, the drain of the adjustment tube M0 is connected to the first terminal of the resistor R0, and the current mirror outputs a first reconstruction current that flows into the first terminal of the sampling resistor Rcs. The current reconstruction circuit in this embodiment is similar to Figure 2 The device structures of the current reconstruction circuits in Example 2 are the same, differing in that the two current reconstruction circuits receive different signals at their input terminals. Assuming the voltage at the second terminal of the sampling resistor Rcs is VB, the voltage at its first terminal is I*Rcs+VB. Since the two input terminals of the first op amp OP1 are virtually shorted, the voltage at the second terminal of the sixth resistor R6 is VB. When the resistance of each resistor in the first circuit is R, the current in the first resistor R1 is:

[0023] I2=(I*Rcs+VB-VB) / R=I*Rcs / R (4);

[0024] It is known that the current I2 also flows through the seventh resistor R7, so the voltage across the seventh resistor R7 is:

[0025] I2*R=VOUT-VCOM (5);

[0026] From formula (4) and formula (5), we can further obtain:

[0027] VOUT=I*Rcs+VCOM (6);

[0028] In formula (6), the first voltage VCOM and the sampling resistor Rcs are both known, and the obtained sampling signal VOUT can represent the magnitude of the target current.

[0029] like Figure 4 As shown, a schematic diagram of a third embodiment of a current sampling circuit according to the present invention is shown, wherein the first circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a current reconstruction circuit, and a first operational amplifier OP1. The first resistor R1 and the second resistor R2 are connected in series between the first end of the sampling resistor Rcs and the first voltage VCOM. A portion I1 of the target current I flows into the first end of the sampling resistor Rcs, and another portion I2 flows into the first resistor R1 and the second resistor R2. The current reconstruction circuit receives the first voltage VCOM and a voltage V1 at a common connection end of the first resistor R1 and the second resistor R2, and outputs a first reconstructed current that flows from the first end of the sampling resistor Rcs into the second end thereof. The second end of the sampling resistor Rcs is connected to the output end of the first operational amplifier via the fourth resistor R4 and the fifth resistor R5 connected in series. The first input end of the first operational amplifier OP1 is connected to the common connection end of the first resistor R1 and the second resistor R2, and the second input end thereof is connected to the common connection end of the third resistor R3 and the fourth resistor R4. The current reconstruction circuit receives the voltage V1 at the connection end of the first resistor R1 and the second resistor R2 and the first voltage VCOM, and outputs a first reconstructed current I2' to flow through the fifth resistor R5. The voltage drop generated on the fifth resistor R5 and the output voltage of the first operational amplifier OP1 are superimposed to obtain a sampling signal VOUT representing the target current I, wherein the resistance value of the fifth resistor R5 is the same as that of the sampling resistor Rcs. The current reconstruction circuit in this embodiment can adopt the current reconstruction circuit in Example 1. The voltage at the first end of the sampling resistor Rcs is I2*Rcs+VB; according to the characteristics of the virtual short of the first input terminal and the second input terminal of the first operational amplifier OP1, when the resistance value of each resistor in the first circuit is the same, it can be obtained:

[0030] (I2*Rcs+VB+VCOM) / 2=(VB+VOUT) / 2 (7);

[0031] From formula (7), we can further obtain the output voltage of the first operational amplifier OP1:

[0032] VOP1=I2*Rcs+VCOM=(I-I2)*Rcs+VCOM

[0033] =I*Rcs+VCOM-I2*Rcs (8);

[0034] As can be seen from the above formula (8), a current I2' that is the same as the shunt current I2 flowing into the first circuit of the target current I is reconstructed, that is, the current output by the current reconstruction circuit. This current flows into the fifth resistor R5 and generates a voltage drop I2*Rcs. This voltage drop is superimposed on the output terminal of the first operational amplifier, so that the obtained sampling signal can be I*Rcs+VCOM. Since the first voltage VCOM and the sampling resistor Rcs are both known, the obtained sampling signal can represent the magnitude of the target current.

[0035] In addition, although the embodiments are described and explained separately above, some common technologies are involved. It is the opinion of ordinary technicians in this field that they can be replaced and integrated between the embodiments. For content that is not clearly recorded in one of the embodiments, reference can be made to another recorded embodiment.

[0036] The above-described embodiments do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the above-described embodiments shall be included in the scope of protection of this technical solution.

Claims

1. A current sampling circuit for sampling a target current, characterized in that: include, a sampling resistor, wherein the first shunt current of the target current flows from the first end of the sampling resistor into the second end thereof; A first circuit is connected to the first end and the second end of the sampling resistor respectively, and the second shunt current of the target current flows into the first circuit; The first circuit reconstructs the second shunt current to obtain a first reconstructed current, wherein the first reconstructed current has the same magnitude as the second shunt current; the first reconstructed current is injected into the first end of the sampling resistor, or compensated to the output end of the first circuit, so that the sampling signal output by the first circuit represents the target current; The first circuit includes a current reconstruction circuit and a first operational amplifier, wherein the current reconstruction circuit is used to reconstruct the second shunt current to obtain the first reconstructed current; the first operational amplifier is connected to the current reconstruction circuit to obtain an output voltage for generating the sampling signal; The first circuit further includes a first resistor, a second resistor, a third resistor and a fourth resistor, the first resistor and the second resistor are connected in series to form a first series circuit, the first end of the first series circuit is connected to the first end of the sampling resistor, and the second end of the first series circuit receives a first voltage; the third resistor and the fourth resistor are connected in series to form a second series circuit, the first end of the second series circuit is connected to the second end of the sampling resistor, and the second end of the second series circuit is connected to the output end of the first operational amplifier; the input end of the current reconstruction circuit receives the first voltage and is connected to the common connection end of the first resistor and the second resistor; The current reconstruction circuit includes an eighth resistor, an adjustment tube, a second operational amplifier and a current mirror. The first input terminal of the second operational amplifier is connected to the common connection terminal of the first resistor and the second resistor, the second terminal of the second operational amplifier is connected to the first terminal of the eighth resistor, the second terminal of the eighth resistor receives a first voltage, the drain of the adjustment tube is connected to the input terminal of the current mirror, and the second terminal is connected to the first terminal of the eighth resistor. The control terminal of the adjustment tube is connected to the output terminal of the second operational amplifier, and the current mirror outputs the first reconstruction current.

2. The current sampling circuit according to claim 1, characterized in that: The first reconstruction current flows from the first end of the sampling resistor into the second end thereof, and the first operational amplifier output voltage is the sampling signal.

3. The current sampling circuit according to claim 1, characterized in that: A fifth resistor is also included, the first reconstruction current flows through the fifth resistor, and the voltage drop generated on the fifth resistor is superimposed on the output voltage of the first operational amplifier to obtain the sampling signal.

4. A current sampling circuit for sampling a target current, characterized in that: include, a sampling resistor, wherein the first shunt current of the target current flows from the first end of the sampling resistor into the second end thereof; A first circuit is connected to the first end and the second end of the sampling resistor respectively, and the second shunt current of the target current flows into the first circuit; The first circuit reconstructs the second shunt current to obtain a first reconstructed current, wherein the first reconstructed current has the same magnitude as the second shunt current; and injects the first reconstructed current into the first end of the sampling resistor, so that the sampling signal output by the first circuit represents the target current; The first circuit includes a current reconstruction circuit and a first operational amplifier, wherein the current reconstruction circuit is connected to a sampling resistor and is used to reconstruct the second shunt current to obtain the first reconstructed current; the first operational amplifier is connected to the current reconstruction circuit to obtain an output voltage to generate the sampling signal; The first circuit further includes a sixth resistor, a seventh resistor and a first adjustment tube, wherein the first end of the sixth resistor is connected to the first end of the sampling resistor, the second end of the sixth resistor is connected to the first input end of the first operational amplifier, the second input end of the first operational amplifier is connected to the second end of the sampling resistor, and the output end of the first operational amplifier is connected to the control end of the first adjustment tube; the first end of the first adjustment tube is connected to the second end of the sixth resistor, the second end of the first adjustment tube is connected to the first end of the seventh resistor, and the second end of the seventh resistor receives a first voltage; The current reconstruction circuit includes an eighth resistor, a second adjustment tube, a second operational amplifier and a current mirror. The eighth resistor and the second adjustment tube are connected in series. The first input end of the second operational amplifier is connected to the first end of the sampling resistor. The second input end of the second operational amplifier is connected to the common connection end of the second adjustment tube and the eighth resistor. The output end of the second operational amplifier is connected to the control end of the second adjustment tube. The current flowing through the second adjustment tube flows into the input end of the current mirror, and the current mirror outputs the first reconstruction current.

5. An integrated circuit, characterized in that: The current sampling circuit comprises any one of claims 1 to 3 or claim 4, wherein the sampling resistor is arranged outside the integrated circuit, the first shunt current of the target current flows into the sampling resistor, and the second shunt current of the target current flows into the integrated circuit.

6. A current sampling method, applied to the current sampling circuit according to any one of claims 1 to 3 or claim 4, for sampling a target current, characterized in that: The following steps are involved: A first shunt current of the target current flows from the first end of the sampling resistor into the second end thereof; The second shunt current of the target current flows into the first circuit, and the first circuit is respectively connected to the first end and the second end of the sampling resistor; the first circuit reconstructs the second shunt current to obtain a first reconstructed current; the first reconstructed current is injected into the first end of the sampling resistor, or compensated to the output end of the first circuit, so that the sampling signal output by the first circuit represents the target current.

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