An integrated chip

Abstract

The application discloses an integrated chip, which comprises a device chip and a control chip, the device chip comprises a working area and a non-working area, the working area is provided with a micro mechanical device and an electrode for controlling the micro mechanical device, the non-working area is provided with an electronic component, the electrode is electrically connected with the control chip, and the electronic component is electrically connected with the control chip. The application rationally utilizes the non-working area of the device chip by arranging the electronic component in the non-working area, thereby improving the space utilization and avoiding the waste of material area.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of micro-electro-mechanical system resonator devices, and particularly relates to an integrated chip. BACKGROUND

[0002] Micro-electro-mechanical system (MEMS, Micro-Electro-Mechanical System), also called micro-electronic mechanical system, micro system, micro machine, etc., includes devices with a size range from microns to millimeters, mainly composed of sensors, actuators (executors) and micro energy sources. Micro-electro-mechanical system involves physics, semiconductors, optics, electronic engineering, chemistry, materials engineering, mechanical engineering, medicine, information engineering and biological engineering, and opens up a broad range of uses for intelligent systems, consumer electronics, wearable devices, smart homes, synthetic biology and microfluidic technology in the field of system biology. Common products include MEMS accelerometers, MEMS microphones, micromotors, micropumps, microvibrators, MEMS pressure sensors, MEMS gyroscopes, MEMS humidity sensors and integrated products thereof.

[0003] Among them, micro-electro-mechanical system is the integration of micro circuits and micro machines on the chip according to functional requirements, usually with a size of millimeters or microns. Generally speaking, the circuit part is often designed on the control chip, the micro machine structure is designed on the device chip, and the device chip is coupled with the control chip.

[0004] The micro machine and the micro circuit are coupled on the chip, and the two constitute the working area of the chip. However, in addition to the working area, there are some non-working areas on the chip, which have not been reasonably utilized. SUMMARY

[0005] The present application provides an integrated chip to solve the problem of not fully utilizing the non-working area of the device chip, which includes a device chip and a control chip, the device chip includes a working area and a non-working area, the working area is provided with a micro machine device and an electrode for controlling the action of the micro machine device, the non-working area is provided with an electronic component, the electrode is electrically connected with the control chip, and the electronic component is electrically connected with the control chip.

[0006] Optionally, the micro machine device is configured to maintain the action of the micro machine device by a maintenance circuit, the maintenance circuit is at least partially arranged in the non-working area, and the electronic component is configured to constitute an electronic component of the maintenance circuit.

[0007] Optionally, the micro machine device is configured as a resonator.

[0008] Optionally, the non-working area is the outer surface of the device chip.

[0009] Optionally, the electronic component is configured as a capacitor.

[0010] Optionally, the device chip and the control chip are stacked, and the device chip and the control chip are wire-bonded.

[0011] Optionally, the device chip and the control chip are stacked, and the device chip and the control chip are flip-chip bonded.

[0012] Optionally, the device chip and the control chip are arranged side by side or staggered, and the device chip and the control chip are wire-bonded.

[0013] Optionally, the integrated chip further comprises a ground layer arranged in at least part of the non-working area, and a silicon nitride layer arranged on the ground layer, and the electronic component is arranged on the silicon nitride layer.

[0014] Optionally, the integrated chip comprises a plurality of device chips and a plurality of control chips, and the plurality of device chips and the plurality of control chips are arranged in a tiled manner; and / or, the plurality of device chips and the plurality of control chips are arranged in a stacked manner.

[0015] The beneficial effects of the present application are: different from the prior art, the present application sets the electronic component in the non-working area of the device chip, thereby reasonably utilizing the non-working area of the device chip, improving the space utilization, and avoiding the waste of material area.

[0016] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, rather than limiting the present application. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0018] Figure 1 is a structural schematic diagram of a first embodiment of the integrated chip of the present application;

[0019] Figure 2 is a structural schematic diagram of a second embodiment of the integrated chip of the present application;

[0020] Figure 3 is a structural schematic diagram of a third embodiment of the integrated chip of the present application;

[0021] Figure 4 is a structural schematic diagram of a fourth embodiment of the integrated chip of the present application. DETAILED DESCRIPTION

[0022] In order for those skilled in the art to better understand the technical solutions of the present application, the integrated chip provided by the present application is further described in detail below in combination with the drawings and specific embodiments. It can be understood that the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the present application.

[0023] The terms "first", "second", and the like in the present application are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed, or can optionally include other steps or units inherent to the process, method, product, or device.

[0024] The present application provides an integrated chip to solve the problem of waste of material area caused by insufficient utilization of the non-working area of the device chip.

[0025] Please refer to Figure 1 , Figure 1 is a structural schematic diagram of the first embodiment of the integrated chip of the present application.

[0026] As Figure 1 shown, the integrated chip 1 includes a device chip 10 and a control chip 11, wherein the device chip 10 includes a working area and a non-working area, the working area is provided with a micro-mechanical device 100 and an electrode for controlling the micro-mechanical device 100 to act, and the non-working area is provided with an electronic component 101, the electrode is electrically connected with the control chip 11, and the electronic component 101 is electrically connected with the control chip 11.

[0027] The above integrated chip 1 is provided with the electronic component 101 in the non-working area of the device chip 10, so as to reasonably utilize the non-working area of the device chip 10, improve the space utilization, and avoid the waste of material area.

[0028] Optionally, the micro-mechanical device 100 is configured to be maintained in action by a maintenance circuit, wherein the maintenance circuit is at least partially arranged in the non-working area, and the electronic component 101 is configured to be an electronic component constituting the maintenance circuit.

[0029] In some embodiments, the micro-mechanical device 100 is configured as a resonator, and the resonator is maintained in vibration by a maintenance circuit. The maintenance circuit is at least partially arranged in the non-working area, and the electronic component 101 is configured to be an electronic component constituting the maintenance circuit.

[0030] The resonator, also called resonator, is a micro-electro-mechanical system. Under the driving of an alternating current driving signal Vdrive, the resonator vibrates back and forth, causing the capacitance between the resonator and the sensor to change, thereby generating an alternating current on the sensor electrode.

[0031] The TIA amplifier (trans-impedance amplifier) is used to amplify the Isense (sensing current) and convert it into a voltage output, which is then applied to the Driver electrode, thereby forming a closed-loop system of "electrical energy → mechanical kinetic energy → electrical energy". Therefore, the resonator performs physical vibration at a fixed frequency and generates alternating current, i.e. clock signal.

[0032] In the prior art, the electronic components of the maintenance circuit are usually arranged on the control chip. With the trend of miniaturization, intelligence, multi-function and high integration of MEMS, more and more electronic components are integrated into the control chip, which makes the load of the control chip heavier and the power consumption larger.

[0033] In particular, the electronic components of the maintenance circuit also include passive devices with large area and large space occupation, which further increases the area of the control chip and causes low yield and high cost of the control chip.

[0034] In the present embodiment, the maintenance circuit is at least partially arranged in the non-working area, which helps to reduce the load of the control chip 11 and reduce the power consumption of the control chip 11. In addition, the maintenance circuit and the electronic components 101 thereof are arranged in the non-working area of the device chip 10, which is closer to the micro-mechanical device 100 contained in the device chip 10 and the electrodes for controlling the operation of the micro-mechanical device 100, which helps to reduce the interference of the control signal and improve the reliability of the integrated chip 1.

[0035] In some embodiments, the non-working area of the device chip 10 is defined on the outer surface of the device chip 10, and the electronic components 101 are arranged on the outer surface of the device chip 10.

[0036] In the present embodiment, the electronic components 101 are configured as capacitors, which can be specifically defined as super capacitors with an area comparable to that of a side of the device chip 10. The super capacitor refers to a capacitor with large capacity. The super capacitor is electrically connected to the control chip 11 to store garbage information and / or energy in the control chip 11, such as noise information filtered out in the control chip 11, etc.

[0037] In addition, the electronic components 101 can be resistors, inductors, etc. By combining a plurality of electronic components 101, a functional circuit corresponding to a function, such as an LC oscillation circuit, etc. can be formed.

[0038] In some embodiments, the device chip 10 and the control chip 11 are stacked. The device chip 10 and the control chip 11 are wire bonded.

[0039] In some embodiments, the device chip 10 and the control chip 11 are arranged side by side or staggered, and are wire bonded.

[0040] Optionally, the wire can be a gold wire, a copper wire, or other metal wire that can achieve electrical connection.

[0041] In some embodiments, the device chip 10 and the control chip 11 are stacked and flip-chip bonded.

[0042] In some embodiments, at least part of the non-working area is provided with a ground layer 102 (GND), a silicon nitride layer (SiN) 103 is arranged on the ground layer 102, and the electronic components 101 are arranged on the silicon nitride layer 103.

[0043] Specifically, as shown in Figure 1 One side of the device chip 10 is bonded or welded to one side of the control chip 11, so that the device chip 10 is stacked on the control chip 11.

[0044] The device chip 10 includes a working area and a non-working area, and the working area is provided with a micro-mechanical device 100 controlled to act and an electrode for controlling the action of the micro-mechanical device.

[0045] The non-working area is the top surface of the device chip 10 facing away from the control chip 11, and the electronic components 101 are configured as a capacitor, which is a super-capacitor with an area comparable to that of the top surface of the device chip 10. The super-capacitor is electrically connected to the control chip 11 for storing garbage information and / or energy in the control chip 11, such as noise information filtered out in the control chip 11.

[0046] As shown in Figure 1 The control chip 11 is provided with a first contact A near one side of the device chip 10, and the electronic components 101 are provided with a second contact B, and the first contact A and the second contact B are wire bonded by a metal wire. The device chip 10 is provided with a third contact C away from the control chip 11, and the third contact C and the first contact A are wire bonded by a metal wire.

[0047] The device chip 10 can be arranged at the center of the control chip 11, the control chip 11 can include a plurality of first contacts A, and the plurality of first contacts A can be arranged around the device chip 10. The number of the second contacts B can be a plurality, the plurality of second contacts B can be arranged around the electronic component 101, and the plurality of second contacts B are correspondingly bonded with the plurality of first contacts A; the number of the third contacts C can be one or more, and the third contacts C are correspondingly bonded with the one or more first contacts A, and the third contacts C are arranged on the outer surface of the electronic component 101 away from the device chip 10.

[0048] The application further provides another embodiment of the integrated chip 1, please combine Figure 1 , further refer to Figure 2 , Figure 2 is a structural schematic diagram of the second embodiment of the integrated chip of the application.

[0049] As Figure 2 shown, the integrated chip 1 of the embodiment further includes a grounding layer 102 arranged in at least part of the non-working area, and a silicon nitride layer 103 arranged on the grounding layer 102, and the electronic component 101 is arranged on the silicon nitride layer 103.

[0050] Among them, the non-working area is the outer surface of the device chip 10, the grounding layer 102 is deposited on the outer surface of the device chip 10, and the silicon nitride layer 103 is further deposited on the grounding layer 102. Optionally, as Figure 2 shown, the non-working area can be defined as the outer surface of the side of the device chip 10 away from the control chip 11.

[0051] The control chip 11 is provided with the first contacts A on the side close to the device chip 10, the electronic component 101 is provided with the second contacts B, and the first contacts A and the second contacts B are bonded by metal leads. The device chip 10 is provided with the third contacts C on the side away from the control chip 11, and the third contacts C are bonded with the first contacts A by metal leads. Among them, the third contacts C are exposed outside through the grounding layer 102 and the silicon nitride layer 103.

[0052] Optionally, the device chip 10 can be arranged at the center of the control chip 11, the control chip 11 can include a plurality of first contacts A, and the plurality of first contacts A can be arranged around the device chip 10; the number of the second contacts B can be a plurality, and the plurality of second contacts B are correspondingly bonded with the plurality of first contacts A; the number of the third contacts C can be one or more, and the third contacts C are correspondingly bonded with the one or more first contacts A, and can be arranged on the outer surface of the electronic component 101 away from the device chip 10.

[0053] The application further provides another embodiment of the integrated chip 1, Figure 3 is a structural schematic diagram of the third embodiment of the integrated chip of the application.

[0054] AsFigure 3 As shown in the figure, the device chip 10 and the control chip 11 are stacked, and the device chip 10 and the control chip 11 are flip chip bonded (FCB). The non-working area of the device chip 10 is defined on the outer surface of the device chip 10, and specifically on the surface of the device chip 10 facing the control chip 11, and the electronic component 101 is arranged on the surface of the device chip 10 facing the control chip 11, so that the electronic component 101 is convenient for welding with the contacts on the control chip 11.

[0055] As shown in the figure, Figure 3 The control chip 11 is provided with first contacts (not shown in the figure) on the side close to the device chip 10, and the electronic component 101 is provided with second contacts B, and the first contacts and the second contacts B are welded by welding points D. The flip chip bonding is suitable for high-frequency, high-speed, and high-I / O large-scale integrated circuits, and the first contacts on the control chip 11 are very small, much smaller than the second contacts B, so they are not shown in the figure. The device chip 10 is provided with third contacts C on the side close to the control chip 11, and the third contacts C are welded with the first contacts by welding points.

[0056] Optionally, the device chip 10 can be arranged at the center of the control chip 11, the control chip 11 can include a plurality of first contacts, and the plurality of first contacts can be arranged dispersedly; the number of the second contacts B can be a plurality, and the plurality of second contacts B are welded with the plurality of first contacts by welding points; the number of the third contacts C can be one or more, and the one or more third contacts C are bonded with the one or more first contacts.

[0057] The application also provides another embodiment of the integrated chip 1, Figure 4 is a structural schematic diagram of the fourth embodiment of the integrated chip of the application. As shown in the figure, Figure 4 The device chip 10 and the control chip 11 are arranged side by side or staggered, and the device chip 10 and the control chip 11 are wire bonded.

[0058] As shown in the figure, Figure 4 The control chip 11 is provided with first contacts A, and the electronic component 101 is provided with second contacts B, and the first contacts A and the second contacts B are wire bonded by metal wires; the device chip 10 is provided with third contacts C, and the third contacts C and the first contacts A are wire bonded by metal wires.

[0059] Optionally, the control chip 11 can include a plurality of first contacts A, and the plurality of first contacts A can be regularly or irregularly arranged on the outer surface of one side of the control chip 11; the number of the second contacts B can be a plurality, and the plurality of second contacts B are arranged around the electronic component 101, and the plurality of second contacts B are correspondingly bonded with the plurality of first contacts A; the number of the third contacts C can be one or more, and the one or more third contacts C are correspondingly bonded with the one or more first contacts A. The non-working area is configured as the top surface of the device chip 10, the electronic component 101 is arranged on the top surface of the device chip 10, and the third contact C is also arranged on the top surface of the device chip 10.

[0060] As described above, the micro mechanical device 100 can be configured as a resonator, and the resonator is maintained in vibration by a maintaining circuit. The maintaining circuit is at least partially arranged in the non-working area, and the electronic component 101 is configured as an electronic component constituting the maintaining circuit.

[0061] The resonator is also called a resonator, which is a micro-electro-mechanical system. Under the driving of the alternating current driving signal Vdrive, the resonator (Resonator) vibrates back and forth, causing the capacitance between the Resonator and the Sensor (Sensor) to change, thereby causing an alternating current to be generated on the Sensor electrode.

[0062] The TIA amplifier (trans-impedance amplifier) is used to amplify the Isense (sensing current) and convert it into a voltage output, and the converted voltage is used to act on the Driver electrode, thereby forming a closed loop system of "electrical energy → mechanical kinetic energy → electrical energy". Therefore, the resonator performs physical vibration at a fixed frequency and generates alternating current, i.e. a clock signal.

[0063] In the prior art, the electronic components of the maintaining circuit are usually arranged on the control chip. With the trend of miniaturization, intelligence, multi-function and high integration of MEMS, more and more electronic components are integrated into the control chip, and the electronic components are more and more dense, thereby causing the load of the control chip to be heavier and the power consumption to be larger.

[0064] In particular, the electronic components of the maintaining circuit also include passive devices with a large area and a large space occupation, which further causes the area of the control chip to be larger, and further causes the control chip to have a low yield and a high cost. Therefore, at least part of the maintaining circuit is arranged in the non-working area, which helps to reduce the load of the control chip 11 and reduce the power consumption of the control chip 11. In addition, the maintaining circuit and the electronic component 101 thereof in the embodiment are arranged in the non-working area of the device chip 10, which is closer to the micro mechanical device 100 contained in the device chip 10 and the electrodes for controlling the action of the micro mechanical device 100, and helps to reduce the interference of the control signal and improve the reliability of the integrated chip 1.

[0065] The integrated chip 1 is welded on the PCB board to realize the electrical connection between the integrated chip 1 and the external device through the circuit on the PCB board, that is, the device chip 10 and the control chip 11 in the integrated chip 1 need to be welded on the PCB board.

[0066] The first direction and the second direction are perpendicular to each other, the device chip 10 and the control chip 11 are arranged side by side along the first direction or the second direction, and at least partially overlap along the second direction or the first direction; the first direction and the second direction can be the length direction and the width direction of the PCB board.

[0067] Specifically, when the device chip 10 and the control chip 11 are arranged side by side along the first direction and partially overlap along the second direction, the device chip 10 and the control chip 11 are staggered on the PCB board; when the device chip 10 and the control chip 11 are arranged side by side along the first direction and completely overlap along the second direction, the device chip 10 and the control chip 11 are arranged side by side on the PCB board.

[0068] The integrated chip 1 can further include a plurality of device chips 10 and a plurality of control chips 11, and the plurality of device chips 10 and the plurality of control chips 11 are arranged in a tiled manner; and / or, the plurality of device chips 10 and the plurality of control chips 11 are arranged in a stacked manner.

[0069] Specifically, when the integrated chip 1 is welded on the PCB board, the plurality of device chips 10 and the plurality of control chips 11 are welded on the PCB board. Alternatively, the plurality of device chips 10 and the plurality of control chips 11 can be arranged in a tiled manner on the PCB board, and the device chip 10 and the control chip 11 can be arranged as described in the fourth embodiment. Alternatively, the plurality of device chips 10 and the plurality of control chips 11 can be arranged in a stacked manner on the PCB board, and the device chip 10 and the control chip 11 can be arranged as described in the first embodiment to the third embodiment. Alternatively, the plurality of device chips 10 and the plurality of control chips 11 can also be arranged in a mixed manner, that is, part of the device chips 10 and the control chips 11 are arranged in a tiled manner on the PCB board, and the other part of the device chips 10 and the control chips 11 are arranged in a stacked manner on the PCB board.

[0070] The present application improves the space utilization by arranging the electronic components 101 in the non-working area of the device chip 10, and avoids the waste of material area.

[0071] In addition, the electronic component 101 arranged in the non-working area of the device chip 10 can be configured as an electronic component 101 for maintaining a circuit. By arranging the electronic component 101 in the non-working area of the device chip 10 and realizing the electrical connection between the control chip 11 and the electronic component 101 through wire bonding or contact welding, the area and space of the control chip 11 occupied by the electronic component 101 are reduced, and the load and power consumption of the control chip 11 are reduced while ensuring the normal working of the original maintenance circuit.

[0072] The above is only an embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent flow transformation using the content of the specification and drawings, or direct or indirect application in other related technical fields, is also included in the patent protection scope of the present application.

Claims

1. An integrated chip, characterized by The integrated chip comprises a device chip and a control chip, the device chip comprises a working area and a non-working area, the working area is provided with a micro mechanical device and an electrode for controlling the micro mechanical device to act, and the non-working area is provided with an electronic component, the electrode is electrically connected with the control chip, and the electronic component is electrically connected with the control chip. The integrated chip further comprises a ground layer arranged in at least part of the non-working area, and a silicon nitride layer arranged on the ground layer, and the electronic component is arranged on the silicon nitride layer. The electronic component is configured as a capacitor.

2. The integrated chip of claim 1, wherein, The micro mechanical device is configured to be maintained by a maintaining circuit, the maintaining circuit is at least partially arranged in the non-working area, and the electronic component is configured as an electronic component of the maintaining circuit.

3. The integrated chip of claim 2, wherein, The micro mechanical device is configured as a resonator.

4. The integrated chip of claim 1, wherein, The non-working area is limited to the outer surface of the device chip.

5. The integrated chip of claim 1, wherein, The device chip and the control chip are arranged in a stacked manner, and the device chip and the control chip are connected by wire bonding.

6. The integrated chip of claim 1, wherein, The device chip and the control chip are arranged in a stacked manner, and the device chip and the control chip are connected by flip-chip bonding.

7. The integrated chip of claim 1, wherein, The device chip and the control chip are arranged in a parallel or staggered manner, and the device chip and the control chip are connected by wire bonding.

8. The integrated chip of any of claims 1-7, wherein, The integrated chip comprises a plurality of device chips and a plurality of control chips, and the plurality of device chips and the plurality of control chips are arranged in a tiled manner; and / or, the plurality of device chips and the plurality of control chips are arranged in a stacked manner.

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