Method for processing an optical assembly and optical assembly

Abstract

The application provides a processing method of an optical assembly and the optical assembly, and solves the problem that a transparent substrate is easy to cause interference or equipment error in the production process of an integrated circuit. The processing method of the optical assembly comprises the following steps: sequentially forming a plurality of functional layers on a first substrate; bonding a second substrate to the surface of the functional layers; and removing part of the functional layers.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of photoelectric devices and integrated circuit manufacturing technology, and in particular to a processing method of an optical assembly and the optical assembly. BACKGROUND

[0002] Whether it is a precision CNC machine tool or integrated circuit equipment, it is necessary to accurately measure and position the two-dimensional direction of the system motion platform, and two-dimensional grating measurement technology is one of the important two-dimensional plane measurement and positioning methods; it has the advantages of high precision, large range, compact structure, and relatively low measurement environment, and can measure the two-directional plane micro-displacement at the same time.

[0003] For complex and compact optical devices, using high-precision integrated circuit equipment for processing is a good choice. The base raw material of the integrated circuit production line is mainly silicon wafer, and compared with the silicon wafer material, the thermal expansion coefficient of microcrystalline glass and other materials is much smaller, so for high-precision and high-performance plane gratings, microcrystalline glass is a better material selection, which can greatly improve the performance of the optical assembly; at the same time, for some other optical assemblies, their design and application must also be transparent materials.

[0004] Microcrystalline glass is transparent, and its light transmittance is more than 99%, so when the glass substrate wafer is transmitted, mapped, aligned, leveled and focused, and exposed on the integrated circuit production line, it will cause interference or equipment error. For example, the photolithography machine cannot level and focus the glass wafer by the existing reflection method during alignment and exposure.

[0005] Therefore, how to process glass substrate pattern wafer based on the integrated circuit production line has obvious technical difficulties and problems, and has strong market and application demand. SUMMARY

[0006] Therefore, the embodiment of the present application provides a processing method of an optical assembly and the optical assembly, which solves the problem that the transparent substrate is easy to cause interference or equipment error in the integrated circuit production process.

[0007] The processing method of the optical assembly provided by the embodiment of the present application comprises:

[0008] A plurality of functional layers are formed on a first substrate in sequence, wherein each functional layer realizes different functions;

[0009] A second substrate is bonded to the surface of the functional layer away from the first substrate;

[0010] The first substrate and part of the functional layers connected with the first substrate are removed.

[0011] In one embodiment, the functional layer comprises: a buffer layer, a first etching stop layer, a grating pattern layer, a filling layer, and a second etching stop layer; and the processing method of the optical assembly comprises:

[0012] forming a buffer layer, a first etching stop layer, a grating pattern layer, a filling layer, and a second etching stop layer on a first substrate in sequence;

[0013] bonding a second substrate to a side of the second etching stop layer away from the first substrate;

[0014] removing the first substrate, the buffer layer, the first etching stop layer, and the filling layer.

[0015] In one embodiment, the step of forming a buffer layer, a first etching stop layer, a grating pattern layer, a filling layer, and a second etching stop layer on a first substrate in sequence comprises:

[0016] depositing the buffer layer, the first etching stop layer, and a reflective film layer on the first substrate in sequence;

[0017] forming a photoresist layer on a side of the reflective film layer away from the first etching stop layer, and performing photoetching on the photoresist layer to form a photoresist pattern layer;

[0018] etching the reflective film layer through the photoresist pattern layer to form a grating pattern layer;

[0019] depositing a filling layer between patterns of the grating pattern layer, wherein a surface of the filling layer is flush with a surface of the grating pattern layer;

[0020] depositing the second etching stop layer on surfaces of the grating pattern layer and the filling layer.

[0021] In one embodiment, the step of depositing a filling layer between patterns of the grating pattern layer comprises: performing chemical mechanical polishing on the filling layer to make a surface of the filling layer flush with a surface of the grating pattern layer.

[0022] In one embodiment, the step of removing part of the functional layer comprises: removing part of the functional layer by at least one process of etching, chemical mechanical polishing, and mechanical polishing.

[0023] In one embodiment, the first substrate is an opaque substrate.

[0024] In one embodiment, the first substrate is a silicon wafer.

[0025] In one embodiment, the second substrate is a transparent substrate.

[0026] In one embodiment, the second substrate is a glass substrate.

[0027] An optical assembly is processed by the method.

[0028] The method and the optical assembly are used for processing the optical assembly on the first substrate, forming the optical assembly pattern, bonding the processed assembly with the second substrate, removing the excess part of the processed assembly by etching and chemical mechanical polishing, and finally leaving the required assembly on the second substrate, so that the transparent substrate optical assembly is processed, the integrated circuit equipment and the process are not modified for processing the glass substrate sheet, and the method has the advantages of good compatibility, large-scale production, high ductility, low cost and the like. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 Fig. 1 is a flowchart of the method for processing the optical assembly according to an embodiment of the present application.

[0030] Figure 2 Fig. 2 is a flowchart of the method for processing the optical assembly according to another embodiment of the present application.

[0031] Figure 3 Fig. 3 is a flowchart of the method for preparing the grating pattern on the first substrate according to an embodiment of the present application.

[0032] Figure 4a Fig. 4 is a structural diagram of the method for sequentially depositing the buffer layer, the first etching stop layer and the reflection film layer on the first substrate according to an embodiment of the present application.

[0033] Figure 4b Fig. 5 is a structural diagram of the method for forming the photoresist pattern layer according to an embodiment of the present application.

[0034] Figure 4c Fig. 6 is a structural diagram of the method for forming the grating pattern layer according to an embodiment of the present application.

[0035] Figure 4d Fig. 7 is a structural diagram of the method for forming the filling layer according to an embodiment of the present application.

[0036] Figure 4e Fig. 8 is a structural diagram of the method for forming the second etching stop layer according to an embodiment of the present application.

[0037] Figure 4f Fig. 9 is a structural diagram of the method for bonding the second substrate according to an embodiment of the present application.

[0038] Figure 4gFig. 1 shows a schematic diagram of a structure for thinning a first substrate according to an embodiment of the present application.

[0039] Figure 4h Fig. 2 shows a schematic diagram of a structure for removing a filling layer according to an embodiment of the present application.

[0040] Figure 4i Fig. 3 shows a schematic diagram of a structure for removing a filling layer according to an embodiment of the present application. DETAILED DESCRIPTION

[0041] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the scope of the present application.

[0042] The present embodiment provides a processing method of an optical assembly, as shown in Fig. 1, which comprises the following steps. Figure 1

[0043] Step 01: forming a plurality of functional layers on a first substrate 11, wherein each of the functional layers has different functions.

[0044] Step 02: bonding a second substrate 19 to a surface of the functional layer away from the first substrate.

[0045] Step 03: removing the first substrate and part of the functional layers connected to the first substrate.

[0046] Optionally, the first substrate 11 is an opaque substrate. Preferably, the first substrate 11 is a silicon wafer.

[0047] Optionally, the first substrate 11 is a transparent substrate. Preferably, the first substrate 11 is a glass substrate. The glass substrate refers to a transparent material such as glass, quartz, fused quartz, microcrystalline, etc. After cutting and polishing, the glass substrate has the same wafer shape as the silicon wafer, and has the same or close diameter and thickness size as the silicon wafer, which meets the compatibility requirements of integrated circuit devices for shape, diameter, area and thickness during process or measurement.

[0048] ​The processing method of the optical assembly provided by the embodiment forms the optical assembly pattern on the first substrate 11, bonds the processed assembly with the second substrate 19, and then removes the excess part of the processed assembly through etching and chemical mechanical grinding, so as to finally leave the required assembly on the second substrate 19, and finally realize the processing of the transparent substrate optical assembly, avoid the modification of the integrated circuit equipment and process for processing the glass substrate sheet, and have the advantages of good compatibility, large-scale production, high ductility and low cost.

[0049] In an embodiment of the present application, the functional layer comprises a buffer layer 12, a first etching stop layer 13, a grating pattern layer 16, a filling layer 17 and a second etching stop layer 18. Figure 2 As shown in the figure, the processing method of the optical assembly comprises the following steps.

[0050] Step 001: sequentially forming a buffer layer 12, a first etching stop layer 13, a grating pattern layer 16, a filling layer 17 and a second etching stop layer 18 on the first substrate 11. Figure 3 As shown in the figure, sequentially forming a buffer layer 12, a first etching stop layer 13, a grating pattern layer 16, a filling layer 17 and a second etching stop layer 18 on the first substrate 11 comprises the following steps.

[0051] Step 0011: sequentially depositing the buffer layer 12, the first etching stop layer 13 and the reflective film layer 14 on the first substrate 11. Figure 4a

[0052] Step 0012: forming a photoresist layer on the side of the reflective film layer 14 away from the first etching stop layer 13, and performing photoetching on the photoresist layer to form a photoresist pattern layer 15. Figure 4b

[0053] Step 0013: etching the reflective film layer 14 through the photoresist pattern layer 15 to form a grating pattern layer 16. Figure 4c

[0054] Step 0014: depositing a filling layer 17 between the patterns of the grating pattern layer 16, wherein the surface of the filling layer 17 is flush with the surface of the grating pattern layer 16. Figure 4d As shown in the figure, the filling layer 17 is silicon dioxide, silicon nitride or other materials, and the filling layer 17 and the grating pattern layer 16 have a high etching selectivity ratio. After the deposition is completed, the filling layer 17 needs to be subjected to chemical mechanical grinding, so as to ensure that the filling layer 17 can fill the gap between the grating patterns and have the same thickness and flatness as the grating patterns.

[0055] ​​​Step 0015: depositing the second etching stop layer 18 on the surface of the grating pattern layer 16 and the filling layer 17 (as shown in Figure 4e Optionally, the second etching stop layer 18 is silicon dioxide, silicon nitride or other materials; the thickness of the second etching stop layer 18 can be from 10 nanometers to microns; the material of the second etching stop layer 18 and the material of the filling layer 17 have a high etching selectivity.

[0056] Step 002: bonding the second substrate 19 to the side of the second etching stop layer 18 away from the first substrate 11 (as shown in Figure 4f The bonding methods include adhesive bonding, van der Waals force bonding, thermal treatment chemical bonding, etc.

[0057] Step 003: removing the first substrate 11, the buffer layer 12, the first etching stop layer 13 and the filling layer 17. Thinning the first substrate 11 to the buffer layer 12 (as shown in Figure 4g ), then removing the buffer layer 12, the first etching stop layer 13 (as shown in Figure 4h ), and finally removing the filling layer 17 (as shown in Figure 4i ).

[0058] The thinning method of the first substrate 11 includes wet etching, dry etching, chemical mechanical polishing or a combination of the above methods, etc.

[0059] Removing the buffer layer 12, the first etching stop layer 13 and the filling layer 17 means that after the silicon wafer is thinned, the material covering the grating pattern and the grating pattern is removed to expose the grating pattern and stop at the second etching stop layer 18, thereby completing the processing of the planar grating of the glass substrate. The removal method includes wet etching or dry etching, etc.

[0060] In addition to the above steps, the second substrate 19 with patterns processed is cut or subjected to other subsequent processes to complete the processing of the planar grating of the glass substrate.

[0061] This embodiment combines the processing technology of integrated circuit silicon wafers to finally realize the patterning process of planar gratings and other optical devices on the glass substrate wafer, avoiding the modification of integrated circuit equipment for processing glass substrate wafers, thereby achieving the maximum compatibility with the manufacturing process of the integrated circuit production line. The glass substrate planar grating can be processed with high efficiency based on the integrated circuit production line, and has the advantages of high compatibility, high extensibility and low cost.

[0062] In an embodiment of the present application, in view of the design requirements and process manufacturing difficulties of the grating of the glass substrate of the integrated circuit, the patterning of the planar grating is first completed on the silicon wafer to form a planar grating pattern, and a filling layer 17 and a second etching stop layer 18 are deposited on the processed pattern; the pattern surface of the processed silicon wafer and the front surface of the glass wafer are bonded, and then the back surface of the silicon wafer is thinned to the buffer layer 12 through etching and chemical mechanical grinding processes; the buffer layer 12, the first etching stop layer 13 and the filling layer 17 are removed through the etching process, and finally the metal pattern of the planar grating is left on the glass substrate; the glass wafer after the patterning process is cut or subjected to other subsequent processes to obtain the final thickness and size required by the product. The planar grating is composed of a planar substrate and a metal bump or line with high reflectivity located on the planar substrate; the metal bump or line is a periodic repeating pattern; the planar grating can be a two-dimensional planar grating or a one-dimensional planar grating. This scheme combines the processing technology of the integrated circuit silicon wafer to finally realize the processing of the optical device on the glass substrate, avoids the modification of the integrated circuit equipment and process for processing the glass substrate, and has the advantages of good compatibility, large-scale production, high ductility and low cost.

[0063] The embodiment provides an optical assembly which is processed by using the processing method of the optical assembly described in the above embodiment.

[0064] Optionally, the optical assembly includes a planar grating product, a diffractive optical element (DOE) of a high-end photolithography machine, a refractive optical element (ROE), an optical assembly of a 3D face recognition, an augmented reality AR, a virtual reality VR, a mixed reality MR, and the like.

[0065] Those skilled in the art can appreciate that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. A person skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application. Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described system, device and unit can refer to the corresponding processes in the foregoing method embodiments, which will not be described here.

[0066] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other manners. For example, the described device embodiment is merely illustrative. For example, the division of the units is only a logical function division. There can be another division manner for the actual implementation, for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between the units can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electrical, mechanical or other forms.

[0067] The above describes the basic principles of the present application in combination with specific embodiments. However, it should be pointed out that the advantages, advantages, effects and the like mentioned in the present application are only examples and are not limiting. It cannot be considered that these advantages, advantages, effects and the like are necessary for each embodiment of the present application. In addition, the above specific details are only for the purpose of example and understanding, and are not limiting. The above details do not limit the present application to the above specific details.

[0068] The block diagrams of the devices, apparatuses, equipment, systems involved in the present application are only illustrative examples and are not intended to require or imply the connection, arrangement, configuration shown in the block diagram. As those skilled in the art will recognize, these devices, apparatuses, equipment, systems can be connected, arranged, configured in any manner.

[0069] It should also be noted that in the device, equipment and method of the present application, each component or each step can be decomposed and / or recombined. These decompositions and / or recombination should be considered as equivalent solutions of the present application.

[0070] The above description of the disclosed aspects is provided so that any person skilled in the art can make or use the present application. Various modifications to these aspects will be apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of the present application. Therefore, the present application is not intended to be limited to the aspects shown herein, but is intended to be consistent with the widest scope consistent with the principles and novel features disclosed herein.

[0071] In the description of the present application, the meaning of "a plurality" is at least two, for example, two, three, and the like, unless otherwise explicitly and specifically limited. All directional indications, such as upper, lower, left, right, front, rear, top, bottom, and the like, are used with respect to the orientation of the figure as shown in the respective figure, and are not meant to limit the position of the component relative to the orientation of the figure as shown in the respective figure. In addition, the terms "comprise", "comprising", "have", "having", "include", "including", "contain", "containing", and any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, product, or apparatus that comprises a list of steps or units is not limited to the listed steps or units, but can optionally further include additional steps or units not listed, or can optionally further include other steps or units inherent to the process, method, system, product, or apparatus.

[0072] In addition, reference herein to "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily mutually exclusive of one another. It is expressly understood that the embodiments described herein are merely examples from a multitude of possible embodiments and are not meant to limit the application in any way.

[0073] The above description is only the preferred embodiment of the application, but the protection scope of the application is not limited to this. Any skilled person in the art can easily think of changes or replacements within the technical range disclosed by the application, which should be covered by the protection scope of the application. Therefore, the protection scope of the application should be subject to the protection scope of the claims. The above description is only the preferred embodiment of the application, but the protection scope of the application is not limited to this. Any skilled person in the art can easily think of changes or replacements within the technical range disclosed by the application, which should be covered by the protection scope of the application. Therefore, the protection scope of the application should be subject to the protection scope of the claims. The above description is only the preferred embodiment of the application, but the protection scope of the application is not limited to this. Any skilled person in the art can easily think of changes or replacements within the technical range disclosed by the application, which should be covered by the protection scope of the application. Therefore, the protection scope of the application should be subject to the protection scope of the claims.

Claims

1. A method of processing a planar optical grating, characterized by, The method comprises the following steps: forming a plurality of functional layers on a first substrate, wherein each of the functional layers has different functions; bonding a second substrate to a surface of the functional layers away from the first substrate; removing the first substrate and part of the functional layers connected to the first substrate; the functional layers comprise a buffer layer, a first etching stop layer, a grating pattern layer, a filling layer and a second etching stop layer; the method for processing the planar grating comprises: forming a buffer layer, a first etching stop layer, a grating pattern layer, a filling layer and a second etching stop layer on a first substrate in sequence; bonding a second substrate to a side of the second etching stop layer away from the first substrate; removing the first substrate, the buffer layer, the first etching stop layer and the filling layer so that the grating pattern layer and the second etching stop layer are left on the second substrate, wherein the grating pattern layer comprises a metal pattern, and the metal pattern is a periodically repeated metal bump or line.

2. The method of claim 1, wherein The step of forming the buffer layer, the first etching stop layer, the grating pattern layer, the filling layer and the second etching stop layer on the first substrate in sequence comprises: depositing the buffer layer, the first etching stop layer and a reflective film layer on the first substrate in sequence; forming a photoresist layer on a side of the reflective film layer away from the first etching stop layer, and performing photoetching on the photoresist layer to form a photoresist pattern layer; etching the reflective film layer through the photoresist pattern layer to form a grating pattern layer; depositing a filling layer between patterns of the grating pattern layer, wherein a surface of the filling layer is flush with a surface of the grating pattern layer; depositing the second etching stop layer on surfaces of the grating pattern layer and the filling layer.

3. The method of claim 2, wherein the step of forming the plurality of grooves is performed by a method selected from the group consisting of a mechanical milling method, a laser beam machining method, and a wet etching method. The step of depositing the filling layer between the patterns of the grating pattern layer comprises: performing chemical mechanical grinding on the filling layer so that the surface of the filling layer is flush with the surface of the grating pattern layer.

4. The method of claim 1, wherein The step of removing part of the functional layers comprises: removing part of the functional layers by at least one of etching, chemical mechanical grinding and mechanical grinding.

5. The method of claim 1, wherein The first substrate is an opaque substrate.

6. The method of claim 1, wherein The first substrate is a silicon wafer.

7. The method of claim 1, wherein The second substrate is a transparent substrate.

8. The method of claim 1, wherein The second substrate is a glass substrate.

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