Multi-mode fft implementation apparatus and method
By using segmented operations with 3-point and 4-point FFT computation units in FFT computation, the problems of low computational efficiency and low resource utilization in the prior art are solved, and efficient and simplified multi-mode FFT computation is realized.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XINGCHENG (GUANGZHOU) TECH APPL CO LTD
- Filing Date
- 2022-07-27
- Publication Date
- 2026-04-28
AI Technical Summary
Existing technologies suffer from low computational efficiency, low resource utilization, and complex structures when supporting FFT calculations of various lengths.
A multi-mode FFT implementation device, including 3-point FFT calculation units and 4-point FFT calculation units, is used to perform segmented FFT calculations by dividing the length of the data to be processed into P*N and calling these units through the controller to perform segmented FFT calculations, thereby realizing the calculation of FFTs of various lengths.
It improves computational efficiency, enhances resource utilization, simplifies the structure, and reduces computational complexity and latency.
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Figure CN115270057B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of communications, and more particularly to a multi-mode FFT implementation device and method. Background Technology
[0002] In the field of mobile communication technology, for example, the 5G standard of fifth-generation mobile communication system (5G NR) supports FFT (Fast Fourier Transform) of various lengths to cover diverse application scenarios; to support FFT of various lengths, there are currently two approaches:
[0003] One approach is to use a fixed-length M (also known as the number of points) FFT computation unit to preprocess the input data to accommodate the fixed-length M FFT. To accommodate all FFT lengths, the fixed length M supported by the FFT computation unit and the actual length N of the input data to be computed need to satisfy a multiple relationship, i.e., M / N or N / M must be a positive integer. Therefore, when N is less than M, the length N of the data to be computed needs to be supplemented to the length M supported by the FFT processing unit by interpolation (e.g., inserting 0s, or copying specific data) before performing the FFT computation. When N is greater than M, the data needs to be segmented for computation, and then the segmented data needs to be concatenated to obtain the result. This introduces excessive computation, reduces computational efficiency, and increases computational power consumption and processing latency.
[0004] Another approach is to set up a dedicated FFT computation unit for each length N of data to be processed. For example, if the current communication system needs to be compatible with 8 different FFT lengths, then 8 corresponding FFT computation units would be required. This approach requires a large amount of FFT computation resources in the FFT processor, resulting in high resource redundancy costs, system complexity, and low FFT resource utilization, as only one FFT computation unit corresponding to the actual input length N is used at any given time. Summary of the Invention
[0005] In view of the shortcomings of the prior art, the purpose of this invention is to provide a multi-mode FFT implementation device and method, which aims to support FFT of various lengths while taking into account computational efficiency, resource utilization and structural simplification.
[0006] To address the aforementioned technical problems, this invention provides a multi-mode FFT implementation device, comprising:
[0007] An FFT operator, comprising at least one 3-point FFT computation unit and at least one 4-point FFT computation unit, wherein the 4-point FFT computation unit is configured to perform 4-point FFT operations and 2-point FFT operations.
[0008] Memory, used to store data to be processed;
[0009] The controller is used to divide the length of the data to be processed into P*N, call at least one of the 3-point FFT calculation unit and the 4-point FFT calculation unit to read the data to be processed from the memory, perform a first-stage P-point FFT operation on the data to be processed, and use the result of the first-stage operation as input to call the 4-point FFT calculation unit to complete the second-stage N-point FFT operation.
[0010] The value of P is an integer value greater than or equal to 1 and less than or equal to 4, or a combination of the product of the number of points supported by at least one of the 3-point FFT calculation units and the 4-point FFT calculation units.
[0011] The value of N is a product of the number of points supported by the 4-point FFT calculation unit.
[0012] Optionally, the value of P is {1, 2, 3, 6, 4*K}, where K is an integer value greater than or equal to 1 and less than or equal to 4;
[0013] The value of N is either 256 or 128.
[0014] Optionally, the controller is used to call the 3-point FFT calculation unit or the 4-point FFT calculation unit to read the data to be calculated from the memory when P is 1, and to perform a first-stage P-point FFT operation on the data to be calculated.
[0015] The controller is used to call the 4-point FFT calculation unit to read the data to be calculated from the memory when P is 2, 4, 8 or 16, and to perform a first-stage P-point FFT operation on the data to be calculated.
[0016] The controller is used to call the 3-point FFT calculation unit to read the data to be calculated from the memory when P is 3, and to perform a first-stage P-point FFT operation on the data to be calculated.
[0017] The controller is used to call the 3-point FFT calculation unit and the 4-point FFT calculation unit to read the data to be calculated from the memory when P is 6 or 12, and to perform the first stage P-point FFT calculation on the data to be calculated.
[0018] Optionally, the controller is configured to divide N into 4*4*4*4 when N is 256, and call one of the 4-point FFT calculation units to perform 4-level 4-point FFT operations sequentially;
[0019] The controller is used to divide N into 4*4*4*2 when N is 128, and call a 4-point FFT calculation unit to perform 3-level 4-point FFT operations first, and then perform 1-level 2-point FFT operations.
[0020] Optionally, the FFT operator includes a 3-point FFT computation unit and at least four 4-point FFT computation units;
[0021] The controller is used to divide N into 4*4*4*4 when N is 256, and call 4 of the 4-point FFT calculation units to perform 4-level 4-point FFT operations in sequence.
[0022] The controller is used to divide N into 4*4*4*2 when N is 128, and call 4 of the 4-point FFT calculation units to perform 3-level 4-point FFT operations in sequence, and finally perform 1-level 2-point FFT operations.
[0023] Optionally, the length of the data to be processed is {256, 384, 512, 768, 1024, 1536, 2048, 3072, 4096}.
[0024] Based on the same inventive concept, this invention also provides a multi-mode FFT implementation method, including:
[0025] The controller divides the length of the data to be processed into P*N, where P is an integer value greater than or equal to 1 and less than or equal to 4, or a product of the number of points supported by at least one of the 3-point FFT calculation units and the 4-point FFT calculation units, and N is a product of the number of points supported by the 4-point FFT calculation units. The 4-point FFT calculation units are configured to perform 4-point FFT operations and 2-point FFT operations.
[0026] The controller calls at least one of the 3-point FFT calculation unit and the 4-point FFT calculation unit to read the data to be calculated from the memory, performs a first-stage P-point FFT calculation on the data to be calculated, and uses the result of the first-stage calculation as the input of the second-stage N-point FFT calculation, and calls the 4-point FFT calculation unit to complete the second-stage N-point FFT calculation.
[0027] Optionally, the value of P is {1, 2, 3, 6, 4*K}, where K is an integer value greater than or equal to 1 and less than or equal to 4;
[0028] The value of N is either 256 or 128.
[0029] Optionally, when P is 1, the controller calls the 3-point FFT calculation unit or the 4-point FFT calculation unit to perform the first stage P-point FFT operation;
[0030] When P is 2, 4, 8 or 16, the controller calls the 4-point FFT calculation unit to perform the first stage P-point FFT operation.
[0031] When P is 3, the controller calls the 3-point FFT calculation unit to perform the first stage P-point FFT operation.
[0032] When P is 6 or 12, the controller calls the 3-point FFT calculation unit and the 4-point FFT calculation unit to perform the first stage P-point FFT operation.
[0033] Optionally, when N is 256, the controller divides N into 4*4*4*4 and calls one of the 4-point FFT calculation units to perform 4-level 4-point FFT operations in sequence, or calls 4 of the 4-point FFT calculation units to perform 4-level 4-point FFT operations in sequence.
[0034] When N is 128, the controller divides N into 4*4*4*2 and calls one of the 4-point FFT calculation units to perform three levels of 4-point FFT operations in sequence, followed by a level 2 FFT operation. Alternatively, it calls four of the 4-point FFT calculation units to perform three levels of 4-point FFT operations in sequence, followed by a level 2 FFT operation.
[0035] Beneficial effects
[0036] The multi-mode FFT implementation device and method provided by this invention divides the length of the data to be processed into P*N, where the value of P is an integer greater than or equal to 1 and less than or equal to 4, or a product of the number of points supported by the 3-point FFT calculation unit and the 4-point FFT calculation unit; the value of N is a product of the number of points supported by the 4-point FFT calculation unit, and the 4-point FFT calculation unit is configured to perform both 4-point FFT and 2-point FFT operations. Thus, during subsequent FFT operations, at least one of the 3-point and 4-point FFT calculation units is called to read the data to be processed from memory, completing the first stage P-point FFT operation. Then, the result of the first stage operation is used as input, and the 4-point FFT calculation unit is called to complete the second stage N-point FFT operation. Therefore:
[0037] In this application, the entire calculation process only requires 4-point FFT calculation units, or 3-point and 4-point FFT calculation units. That is, only 3-point and 4-point FFT calculation units are needed to realize the calculation of FFTs of various lengths. It is not necessary to set up FFT calculation units that support various lengths, which can reduce costs and improve resource utilization. Moreover, the calculation process is regular and simple in structure, easy to implement, maintain and optimize. In addition, no preprocessing such as interpolation is required for the data. Only the length of the data to be calculated needs to be set. The delay from inputting the data to the completion of the calculation is basically related to the length of the data itself, which can reduce the data calculation delay and improve processing efficiency. Furthermore, the entire calculation process only involves the call of 3-point and / or 4-point FFT calculation units, which reduces the computational complexity and further improves the computational efficiency. Attached Figure Description
[0038] Figure 1 This is a schematic diagram of the structure of a multi-mode FFT implementation device provided in an embodiment of the present invention;
[0039] Figure 2 This is a schematic diagram of the FFT operator structure provided in an embodiment of the present invention;
[0040] Figure 3 This is a schematic diagram of the multi-mode FFT implementation method provided in an embodiment of the present invention. Detailed Implementation
[0041] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.
[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
[0043] This embodiment provides a multi-mode FFT implementation device that can support FFTs of various lengths while balancing computational efficiency, resource utilization, and simplified structure. See also Figure 1 As shown, the multi-mode FFT implementation device provided in this embodiment includes:
[0044] FFT operator 1 includes at least one 3-point FFT calculation unit 11 and at least one 4-point FFT calculation unit 12, and the 4-point FFT calculation unit 12 is configured to perform 4-point FFT operations and 2-point FFT operations; that is, in this embodiment, both 4-point FFT operations and 2-point FFT operations are implemented through the 4-point FFT calculation unit 12, and the 4-point FFT calculation unit 12 can be dynamically controlled to perform either 4-point FFT operations or 2-point FFT operations.
[0045] The memory 2 includes a storage unit for storing data to be processed, and may also be configured to include at least one of a storage unit for storing intermediate processing results, a storage unit for storing final processing results, and a rotation factor, depending on the application requirements.
[0046] The controller 3 is used to divide the length of the data to be processed into P*N. In this embodiment, the value range of P is: an integer value greater than or equal to 1 and less than or equal to 4, or a product combination of the number of points supported by at least one of the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12; the value range of N is a product combination of the number of points supported by the 4-point FFT calculation unit 12.
[0047] For example, the product combinations of the number of points supported by at least one of the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12 include, but are not limited to: 3*2 (the effective number of points when the 4-point FFT calculation unit performs a 2-point FFT operation), 3*4, 4*4, 3*4*2, etc., and the specific product combinations can be flexibly made according to the requirements.
[0048] The product combinations of points supported by the 4-point FFT calculation unit 12 include, but are not limited to: 4*4...*4, 4*4...*2, and can be flexibly combined according to requirements.
[0049] For example, in one application example of this embodiment, the length of the data to be processed needs to be supported is L = {256, 384, 512, 768, 1024, 1536, 2048, 3072, 4096}. Except for the length L = 384, the others can be expressed as L = p1 * n1, where p1 = {1, 2, 3, 4, 6, 8, 12, 16}, n1 = 256; while L = 384 can be expressed as L = p2 * n2, p2 = 3, n2 = 128. Therefore, when dividing, p1 and p2 can be unified as P, and the value of P is an integer value greater than or equal to 1 and less than or equal to 4, or a product combination of the number of points supported by the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12. n1 and n2 can be unified as N, and the value of N is 256 or 128.
[0050] In this example, the P obtained after unifying p1 and p2 can be further divided into {1, 2, 3, 6, 4*K}, where K is an integer value greater than or equal to 1 and less than or equal to 4, for example:
[0051] When P is 6, it can be achieved by combining the product of the number of points supported by the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12, which is 3*2.
[0052] When P is 8 (that is, K is 2), it can be achieved by combining the product of the number of points supported by the 4-point FFT calculation unit 12, which is 4*2.
[0053] When P is 12 (that is, K is 3), it can be achieved by combining the product of the number of points supported by the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12, which is 3*4.
[0054] When P is 16 (that is, K is 4), it can be achieved by combining the product of the number of points supported by the 4-point FFT calculation unit 12, which is 4*4.
[0055] Of course, in other examples, when the value of P is greater than 16, the rules in the above examples can be followed in the same way, which will not be elaborated here.
[0056] In this embodiment, after determining the length division rule of the data to be processed, the controller 3 can control at least one of the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12 to read the data to be processed from the memory 2, perform the first stage P-point FFT operation on the data to be processed, and use the result of the first stage operation as input to call the 4-point FFT calculation unit 12 to complete the second stage N-point FFT operation.
[0057] For example, continuing from the above example:
[0058] When P is 1, that is, the number of FFT points in the first stage is 1, it indicates a pass-through, that is, no sub-FFT operation is required. Therefore, it can call any one of the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit to read the data to be calculated from the memory 2 and perform the first stage 1-point FFT operation on the data to be calculated.
[0059] The controller 3 can be used to call the 4-point FFT calculation unit 12 to read the data to be processed from the memory 2 and perform the first-stage P-point FFT operation on the data to be processed when P is 2, 4, 8, or 16. For example, when P is 2, the 4-point FFT calculation unit 12 can be called to read the data to be processed from the memory 2 and perform a 2-point FFT operation on it; when P is 4, the 4-point FFT calculation unit 12 can be called to read the data to be processed from the memory 2 and perform a 4-point FFT operation on it; when P is 8, the 4-point FFT calculation unit 12 can be called to read the data to be processed from the memory 2 and perform a 4-point FFT operation on it. The data is processed and then subjected to 4-point FFT and 2-point FFT operations in sequence. Of course, the call here can be made by calling only one 4-point FFT calculation unit 12 to perform 4-point FFT operation first and then 2-point FFT operation, or two 4-point FFT operations can be called to perform 4-point FFT operation and 2-point FFT operation in sequence respectively. It should also be understood that in this example, 2-point FFT operation can be performed first and then 4-point FFT operation. When the value of P is 16, the 4-point FFT calculation unit 12 can be called to read the data to be processed from memory 2 and perform 2 levels of 4-point FFT operation in sequence.
[0060] When P is 3, the controller 3 can call the 3-point FFT calculation unit 11 to read the data to be calculated from the memory 2 and perform the first stage 3-point FFT operation on the data to be calculated.
[0061] The controller 3 is used to call the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12 to read the data to be processed from the memory 2 when P is 6 or 12, and to perform the first stage P-point FFT operation on the data to be processed. For example, when the value of P is 6, the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12 can be called to read the data to be processed from the memory 2 and perform 3-point FFT operation and 2-point FFT operation on it in sequence; when the value of P is 12, the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12 can be called to read the data to be processed from the memory 2 and perform 3-point FFT operation and 4-point FFT operation on it in sequence.
[0062] As can be seen from the above examples, in this embodiment, the P-point FFT operation of each value of P in the first stage can be completed by at least one of the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12. In other words, all possible values of P in the first stage can be completed by at least one of the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12.
[0063] In this example, controller 3 can be used to divide N into 4*4*4*4 when N is 256, and call a 4-point FFT calculation unit 12 to perform 4 levels of 4-point FFT operations sequentially (see, for example, [link to example]). Figure 1(as shown), or call four 4-point FFT computation units 12 to perform 4-level 4-point FFT operations sequentially (see, for example, see...). Figure 2 (as shown);
[0064] When N is 128, controller 3 divides N into 4*4*4*2 and calls a 4-point FFT calculation unit 12 (see, for example). Figure 1 (As shown) First, perform a 3-level 4-point FFT operation sequentially, then perform a 1-level 2-point FFT operation, or call four 4-point FFT computation units 12 (see, for example, see...). Figure 2 As shown, perform three-level four-point FFT operations sequentially, and finally perform one-level two-point FFT operations.
[0065] In the above example, when a 4-point FFT computation unit 12 is called to perform multi-level FFT operations, it is not necessary to set up a 4-point FFT computation unit 12 for each level of FFT operation, which can greatly reduce the setting of 4-point FFT computation units 12, reduce resources, simplify the structure and reduce costs. When multiple 4-point FFT computation units 12 are called to perform multi-level FFT operations sequentially, the computational efficiency can be improved. Of course, it should be understood that the two rules can also be used in combination. For example, when N is divided into 4*4*4*4, two or three 4-point FFT computation units 12 can be called, some of which perform two or more levels of 4-point FFT operations, and the other part performs one level of 4-point FFT operations. This method is also an equivalent substitution method in this embodiment and is within the scope of this embodiment.
[0066] As can be seen from the above example, in this embodiment, in the second stage, all possible values of N can be supported using only a single FFT calculation unit 12 with 4 points. Furthermore, the segmented FFT operation between the first and second stages improves the utilization rate of the calculation unit.
[0067] Furthermore, it should be understood that the 4-point FFT calculation unit 12 called in the first stage and the 4-point FFT calculation unit 12 called in the second stage in this embodiment can be the same 4-point FFT calculation unit 12. In this case, the number of 4-point FFT calculation units 12 can be further reduced, for example, see [link to documentation]. Figure 1 As shown. Of course, in other examples, the 4-point FFT computation unit 12 called in the first stage and the 4-point FFT computation unit 12 called in the second stage can also be different 4-point FFT computation units 12, for example, see Figure 2 As shown.
[0068] Furthermore, as shown in the example above, in this example, only a portion of the values of P require calling the 3-point FFT calculation unit 11 in the first stage. Most of the values of P in the first stage only require calling the 4-point FFT calculation unit 12, and all the values of N in the second stage only require calling the 4-point FFT calculation unit 12. The 4-point FFT calculation unit 12 does not require multiplication operations internally; it only performs simple operations such as addition and subtraction, resulting in the fastest calculation speed and better versatility. Therefore, it simplifies the calculation rules, improves overall calculation efficiency, and reduces calculation latency. It should also be understood that in this example, when performing the next level of FFT calculation after completing the first level, the result of the previous level FFT calculation can be multiplied by the corresponding rotation factor and used as the input for the next level FFT calculation.
[0069] In this embodiment, only one 3-point FFT calculation unit 11 may be set, and in some application examples, only one 4-point FFT calculation unit 12 may also be set, thereby achieving a minimalist setup of the FFT calculation unit.
[0070] This embodiment also provides a multi-mode FFT implementation method, see [link to documentation]. Figure 3 As shown, it includes, but is not limited to:
[0071] S301: Controller 3 divides the length of the data to be processed into P*N; the specific division rules are shown in the example above and will not be repeated here.
[0072] S302: Controller 3 calls at least one of the 3-point FFT calculation unit and the 4-point FFT calculation unit to read the data to be calculated from memory 2 and performs the first stage P-point FFT operation on the data to be calculated.
[0073] S303: The controller 3 uses the calculation result of the first stage as the input of the second stage N-point FFT calculation, and calls the 4-point FFT calculation unit 12 to complete the second stage N-point FFT calculation.
[0074] For example, in a 5G standard, the required FFT length L = {256, 384, 512, 768, 1024, 1536, 2048, 3072, 4096} is to be supported.
[0075] Assuming the length L of the current data to be budgeted is 384, it is divided into 3*128, that is, P=3, N=128, and N=128 is further divided into 4*4*4*2; then call... Figure 1 or Figure 2 The 3-point FFT calculation unit 11 performs the first stage 3-point FFT operation on the data to be processed, and uses the result of the first stage operation as input to call one or more 4-point FFT calculation units 12 to perform the 4-level 4*4*4*2 operation in sequence.
[0076] Assuming the length L of the current data to be budgeted is 1536, it is divided into 6*256, that is, P=6, N=256. Then, P=6 is further divided into 2*3, and N=256 is divided into 4*4*4*4; then call... Figure 1 or Figure 2 The 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12 in the middle perform the first stage 3*2 point FFT operation on the data to be calculated. The result of the first stage operation is used as input, and one or more 4-point FFT calculation units 12 are called to perform the 4-level 4*4*4*4 operation in sequence.
[0077] Assuming the length L of the current data to be budgeted is 3072, it is divided into 12*256, that is, P=12, N=256. Then, P=12 is further divided into 3*4, and N=256 is divided into 4*4*4*4; then the function is called... Figure 1 or Figure 2 The 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12 in the middle perform the first stage 3*4 point FFT operation on the data to be calculated. The result of the first stage operation is used as input, and one or more 4-point FFT calculation units 12 are called to perform the 4-level 4*4*4*4 operation in sequence.
[0078] Assuming the length L of the current data to be budgeted is 4096, it is divided into 16*256, that is, P=16, N=256. Then, P=16 is divided into 4*4, and N=256 is divided into 4*4*4*4; then call... Figure 1 or Figure 2 The 4-point FFT calculation unit 12 in the middle performs the first stage 4*4 point FFT operation on the data to be operated. The result of the first stage operation is used as input, and one or more 4-point FFT calculation units 12 are called to perform the 4-level 4*4*4*4 operation in sequence.
[0079] Of course, it should be understood that the FFT length L to be supported in this embodiment is not limited to the value shown in the example above, nor is it limited to 5G networks, but can also be used in 4G or 6G networks, etc.
[0080] For example, assuming in a 4G network, when one of the values of L is 128, it is divided into 1*128, that is, P=1, N=128, and N=128 is divided into 4*4*4*2; then call Figure 1 or Figure 2The 3-point FFT calculation unit 11 or the 4-point FFT calculation unit 12 performs the first stage 1-point FFT operation (pass-through) on the data to be calculated. The result of the first stage operation is used as input, and one or more 4-point FFT calculation units 12 are called to perform 4-level 4*4*4*2 operations in sequence (of course, it can also be adjusted to perform 4-level 2*4*4*4 operations in sequence according to the requirements).
[0081] For example, suppose in a 6G network, when one of the values of L is greater than 4608, it is divided into 18*256, that is, P=18, N=256, and P=18 is divided into 3*3*2, and N=256 is divided into 4*4*4*4; then call Figure 1 or Figure 2 The 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12 in the middle perform the first stage 3*3*2 point FFT operation (pass-through) on the data to be calculated. The result of the first stage operation is used as input, and one or more 4-point FFT calculation units 12 are called to perform the 4-level 4*4*4*4 operation in sequence.
[0082] As can be seen from the above examples, the application scenarios of the multi-mode FFT implementation device and method provided in this embodiment can be flexibly applied according to the length division rules and the calling rules of the 3-point FFT calculation unit 11 and the 4-point FFT calculation unit 12 provided in this embodiment, and can be applied to various communication networks using these rules. This embodiment does not impose any limitations on them. Furthermore, the multi-mode FFT implementation device and method in this embodiment can be applied to, but is not limited to, terminals (such as 4G terminals, 5G terminals, or 6G terminals) and various base stations. Furthermore, after application, the terminal or base station only needs to use 4 FFT calculation units, or 3 and 4 FFT calculation units, in the entire FFT calculation process. That is, only 3 and 4 FFT calculation units need to be set to realize the calculation of FFT of various lengths. It is not necessary to set up FFT calculation units that support various lengths, which can reduce costs and improve resource utilization. Moreover, the calculation process is regular and simple in structure, easy to implement, maintain and optimize. In addition, no preprocessing such as interpolation is required for the data. Only the length of the data to be calculated needs to be set. The delay from inputting the data to the completion of the calculation is basically related to the length of the data itself, which can reduce the data calculation delay and improve processing efficiency. The entire calculation process only involves the call of 3 and / or 4 FFT calculation units, which reduces the computational complexity and further improves the computational efficiency.
[0083] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.
Claims
1. A multi-mode FFT implementation device, characterized in that, include: An FFT operator, comprising at least one 3-point FFT computation unit and at least one 4-point FFT computation unit, wherein the 4-point FFT computation unit is configured to perform 4-point FFT operations and 2-point FFT operations. Memory, used to store data to be processed; The controller is used to divide the length of the data to be processed into P*N, call at least one of the 3-point FFT calculation unit and the 4-point FFT calculation unit to read the data to be processed from the memory, perform a first-stage P-point FFT operation on the data to be processed, and use the result of the first-stage operation as input to call the 4-point FFT calculation unit to complete the second-stage N-point FFT operation. The value of P is an integer value greater than or equal to 1 and less than or equal to 4, or a combination of the product of the number of points supported by at least one of the 3-point FFT calculation unit and the 4-point FFT calculation unit. The value of N is a product of the number of points supported by the 4-point FFT calculation unit. The value of N is 256 or 128; The length of the data to be processed is {256, 384, 512, 768, 1024, 1536, 2048, 3072, 4096}; The FFT operator includes a 3-point FFT calculation unit and a 4-point FFT calculation unit. The 4-point FFT calculation unit is configured to perform 4-point FFT operations and 2-point FFT operations. When a 3-point FFT calculation is required, the 3-point FFT calculation unit is invoked, and its output is used as the input of the 4-point FFT calculation unit. When multiple 4-point FFT calculations are required, the output of the 4-point FFT calculation unit is also used as its input. When performing a 3-point FFT calculation on the data to be calculated, the calculation is performed in the first stage. or; When performing the first stage operation on the data to be processed, a 3-point FFT calculation unit and a 4-point FFT calculation unit are set up. When performing the second stage operation on the data to be processed, four 4-point FFT calculation units connected in sequence are set up. In the second stage operation, the output of the first stage is used as the input of the second stage and input to the first 4-point FFT calculation unit of the four 4-point FFT calculation units connected in sequence. When the data to be processed is greater than 1024, the output of the last 4-point FFT calculation unit is used as the input and input to the 4-point FFT calculation unit in the previous stage.
2. The multi-mode FFT implementation device as described in claim 1, characterized in that, The value of P is {1, 2, 3, 6, 4*K}, where K is an integer value greater than or equal to 1 and less than or equal to 4.
3. The multi-mode FFT implementation device as described in claim 2, characterized in that, The controller is used to call the 3-point FFT calculation unit or the 4-point FFT calculation unit to read the data to be calculated from the memory when P is 1, and to perform a first-stage P-point FFT operation on the data to be calculated. The controller is used to call the 4-point FFT calculation unit to read the data to be calculated from the memory when P is 2, 4, 8 or 16, and to perform a first-stage P-point FFT operation on the data to be calculated. The controller is used to call the 3-point FFT calculation unit to read the data to be calculated from the memory when P is 3, and to perform a first-stage P-point FFT operation on the data to be calculated. The controller is used to call the 3-point FFT calculation unit and the 4-point FFT calculation unit to read the data to be calculated from the memory when P is 6 or 12, and to perform the first stage P-point FFT calculation on the data to be calculated.
4. The multi-mode FFT implementation device as described in claim 2, characterized in that, The controller is used to divide N into 4*4*4*4 when N is 256, and call one of the 4-point FFT calculation units to perform 4-level 4-point FFT operations in sequence; The controller is used to divide N into 4*4*4*2 when N is 128, and call a 4-point FFT calculation unit to perform 3-level 4-point FFT operations first, and then perform 1-level 2-point FFT operations.
5. The multi-mode FFT implementation device as described in claim 2, characterized in that, The FFT operator includes a 3-point FFT computation unit and at least four 4-point FFT computation units; The controller is used to divide N into 4*4*4*4 when N is 256, and call 4 of the 4-point FFT calculation units to perform 4-level 4-point FFT operations in sequence. The controller is used to divide N into 4*4*4*2 when N is 128, and call 4 of the 4-point FFT calculation units to perform 3-level 4-point FFT operations in sequence, and finally perform 1-level 2-point FFT operations.
6. A multi-mode FFT implementation method, characterized in that, include: The controller divides the length of the data to be processed into P*N, where P is an integer value greater than or equal to 1 and less than or equal to 4, or a product of the number of points supported by at least one of the 3-point FFT calculation units and the 4-point FFT calculation units, and N is a product of the number of points supported by the 4-point FFT calculation units. The 4-point FFT calculation units are configured to perform 4-point FFT operations and 2-point FFT operations. The controller calls at least one of the 3-point FFT calculation unit and the 4-point FFT calculation unit to read the data to be calculated from the memory, performs a first-stage P-point FFT calculation on the data to be calculated, and uses the result of the first-stage calculation as the input of the second-stage N-point FFT calculation, and calls the 4-point FFT calculation unit to complete the second-stage N-point FFT calculation. The value of N is 256 or 128; The length of the data to be processed is {256, 384, 512, 768, 1024, 1536, 2048, 3072, 4096}; The FFT operator includes a 3-point FFT calculation unit and a 4-point FFT calculation unit. The 4-point FFT calculation unit is configured to perform 4-point FFT operations and 2-point FFT operations. When a 3-point FFT calculation is required, the 3-point FFT calculation unit is invoked, and its output is used as the input of the 4-point FFT calculation unit. When multiple 4-point FFT calculations are required, the output of the 4-point FFT calculation unit is also used as its input. When performing a 3-point FFT calculation on the data to be calculated, the calculation is performed in the first stage. or; When performing the first stage operation on the data to be processed, a 3-point FFT calculation unit and a 4-point FFT calculation unit are set up. When performing the second stage operation on the data to be processed, four 4-point FFT calculation units connected in sequence are set up. In the second stage operation, the output of the first stage is used as the input of the second stage and input to the first 4-point FFT calculation unit of the four 4-point FFT calculation units connected in sequence. When the data to be processed is greater than 1024, the output of the last 4-point FFT calculation unit is used as the input and input to the 4-point FFT calculation unit in the previous stage.
7. The multi-mode FFT implementation method as described in claim 6, characterized in that, The value of P is {1, 2, 3, 6, 4*K}, where K is an integer value greater than or equal to 1 and less than or equal to 4.
8. The multi-mode FFT implementation method as described in claim 7, characterized in that, When P is 1, the controller calls the 3-point FFT calculation unit or the 4-point FFT calculation unit to perform the first stage P-point FFT operation. When P is 2, 4, 8 or 16, the controller calls the 4-point FFT calculation unit to perform the first stage P-point FFT operation. When P is 3, the controller calls the 3-point FFT calculation unit to perform the first stage P-point FFT operation. When P is 6 or 12, the controller calls the 3-point FFT calculation unit and the 4-point FFT calculation unit to perform the first stage P-point FFT operation.
9. The multi-mode FFT implementation method as described in claim 7, characterized in that, When N is 256, the controller divides N into 4*4*4*4 and calls one of the 4-point FFT calculation units to perform 4-level 4-point FFT operations in sequence, or calls 4 of the 4-point FFT calculation units to perform 4-level 4-point FFT operations in sequence. When N is 128, the controller divides N into 4*4*4*2 and calls one of the 4-point FFT calculation units to perform three levels of 4-point FFT operations in sequence, followed by a level 2 FFT operation. Alternatively, it calls four of the 4-point FFT calculation units to perform three levels of 4-point FFT operations in sequence, followed by a level 2 FFT operation.
Citation Information
Patent Citations
Device and method for realizing FFT (Fast Fourier Transform) calculation in universal DSP (Digital Signal Processor)
CN102567282A
FFT (Fast Fourier Transform) implementation device for communication system and implementation method thereof
CN114297570A
Multi-dimensional FFT computation pipelined hardware architecture using radix-3 and radix-2² butterflies
US20220156044A1