Diode, manufacturing method thereof, and semiconductor device

Abstract

The present invention relates to a diode, a manufacturing method thereof, and a semiconductor device. The diode comprises: a substrate; an insulating buried layer disposed on the substrate; a semiconductor layer disposed on the insulating buried layer; an anode; a cathode comprising: a trench contact filled with a contact material; the trench extending from a first surface of the semiconductor layer to a second surface of the semiconductor layer, the first surface being a surface away from the insulating buried layer and the second surface being a surface facing the insulating buried layer; a cathode doped region surrounding the trench contact on all sides and at the bottom thereof and also disposed on the first surface surrounding the trench contact; and a cathode electrode disposed on and electrically connected to the cathode doped region. The cathode doped region of the present invention has a large area. Therefore, when a parallel lateral insulated gate bipolar transistor is turned off, the diode has a large area for collecting and recombining minority carriers, resulting in high reverse recovery speed and efficiency.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, in particular to a diode, a method for manufacturing a diode, and a semiconductor device. Background Art

[0002] In high-voltage SOI processes, the use of LIGBTs (lateral insulated gate bipolar transistors) as power switching transistors has become a mainstream design in the market. LIGBTs switch to drive inductive loads. When the LIGBT is turned off, the current in the inductor coil cannot change suddenly. Furthermore, there is a tail current when the LIGBT is turned off. The superposition of these two currents can easily lead to thermal breakdown in the LIGBT. Therefore, when used as a switching device, a diode is connected in parallel between the collector and emitter of the LIGBT to increase the current path, allowing excess current to return to the coil and protect the LIGBT switch.

[0003] The forward conduction and reverse recovery characteristics of the freewheeling diode significantly impact the entire switch module. Lower forward conduction voltage reduces power consumption and heat generation. The reverse recovery of the freewheeling diode corresponds to the turn-on of the LIGBT. If the reverse recovery time is long, the diode may not recover before the LIGBT turns on. The combined currents of the two can easily damage the switch. Therefore, reducing the reverse recovery time of the freewheeling diode and lowering the peak current in the corresponding direction have always been challenges in the industry. Summary of the Invention

[0004] Based on this, it is necessary to provide a diode with a shorter reverse recovery time.

[0005] A diode, based on a silicon-on-insulator structure, comprises: a substrate; an insulating buried layer disposed on the substrate; a semiconductor layer disposed on the insulating buried layer; an anode; a cathode, comprising: a trench contact, wherein a contact material is filled in the trench; the trench extending from a first surface of the semiconductor layer to a second surface of the semiconductor layer, the first surface being a surface away from the insulating buried layer, and the second surface being a surface facing the insulating buried layer; a cathode doped region having a first conductivity type, surrounding the trench contact on all sides and at the bottom, and further disposed on the first surface around the trench contact; and a cathode electrode, on the cathode doped region and electrically connected to the cathode doped region.

[0006] The above-mentioned diode introduces a trench contact at the cathode and forms a cathode doping region around and at the bottom of the trench, so that the cathode doping region includes a lateral region on the surface of the semiconductor layer, a longitudinal region along the trench wall, and a region at the bottom of the trench. The area of the cathode doping region is relatively large. Therefore, when the parallel lateral insulated gate bipolar transistor is turned off, the area of the diode used for collecting and recombining minority carriers is relatively large, and the reverse recovery speed and efficiency of the diode are high.

[0007] In one embodiment, the contact material includes at least one of silicon oxide, polysilicon, and amorphous silicon.

[0008] In one embodiment, the present invention further comprises: a field oxide structure disposed on the semiconductor layer and between the anode and the cathode; and a cathode polysilicon field plate disposed on the field oxide structure and electrically connected to the cathode electrode.

[0009] In one embodiment, the diode includes at least one trench contact, and the width of each trench contact is 0.3% to 0.5% of the cathode width.

[0010] In one embodiment, the cathode electrode forms an ohmic contact with the cathode doping region through a contact hole, and the cathode electrode does not directly contact the trench contact.

[0011] In one embodiment, the anode includes: a well region having a second conductivity type, arranged in the semiconductor layer; an anode doping region having a second conductivity type, arranged in the well region, the doping concentration of the anode doping region being greater than the doping concentration of the well region; an anode electrode, part of the anode electrode being in direct contact with the anode doping region through a contact hole, and part of the anode electrode being in direct contact with the well region through a contact hole.

[0012] In one embodiment, the well region includes at least two anode doped regions, and the anode doped regions in the well region are separated from each other by the well region, each anode doped region forms an ohmic contact with the conductive material in the contact hole, and the well region forms a Schottky contact with the conductive material in the contact hole.

[0013] In one embodiment, an anode polysilicon field plate is further included. The anode polysilicon field plate is disposed on the field oxide structure and is electrically connected to the anode electrode.

[0014] In one embodiment, it further includes a first conductive type well region, which is located at the bottom of the trench contact and extends to the insulating buried layer; the semiconductor layer includes a first conductive type drift region, and the doping concentration of the first conductive type well region is greater than the doping concentration of the drift region.

[0015] In one embodiment, the first conductivity type is N-type, and the second conductivity type is P-type.

[0016] In one embodiment, the insulating buried layer is a buried oxide layer.

[0017] In one embodiment, the substrate and the semiconductor layer are both silicon layers.

[0018] In one embodiment, the diode is a fast recovery SOI high voltage freewheeling diode.

[0019] It is also necessary to provide a semiconductor device based on a silicon-on-insulator structure, the semiconductor device comprising a lateral insulated gate bipolar transistor, and a diode as described in any of the foregoing embodiments integrated with the lateral insulated gate bipolar transistor, the diode being connected in parallel between the collector and emitter of the lateral insulated gate bipolar transistor.

[0020] It is also necessary to provide a method for manufacturing a diode.

[0021] A method for manufacturing a diode based on a silicon-on-insulator structure, the method comprising: obtaining a substrate, the substrate comprising a substrate, an insulating buried layer, and a semiconductor layer stacked in sequence; forming a first trench extending from a first surface of the semiconductor layer to a second surface of the semiconductor layer, wherein the first surface is a surface away from the insulating buried layer, and the second surface is a surface facing the insulating buried layer; forming a cathode doped region in the semiconductor layer surrounding the first trench and in the semiconductor layer at the bottom, the cathode doped region having a first conductivity type; filling the first trench with a contact material; and forming a cathode electrode on the cathode doped region, the cathode electrode being electrically connected to the cathode doped region.

[0022] In one embodiment, the step of forming a first trench extending from the first surface of the semiconductor layer to the second surface of the semiconductor layer is formed by an etching process, and an isolation trench structure is simultaneously etched to form the isolation trench structure, the width of the first trench is smaller than the width of the isolation trench structure, the isolation trench structure extends to the insulating buried layer, and the depth of the isolation trench structure is greater than the depth of the first trench.

[0023] In one embodiment, the contact material includes at least one of silicon oxide, polysilicon, and amorphous silicon. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more of the accompanying drawings. The additional details or examples used to describe the accompanying drawings should not be considered to limit the scope of the disclosed inventions, the presently described embodiments and / or examples, and any of the best modes currently understood for these inventions.

[0025] Figure 1 is a schematic cross-sectional view of a diode in one embodiment;

[0026] Figure 2 is a cross-sectional schematic diagram of a diode in another embodiment;

[0027] Figure 3 is a flow chart of a method for manufacturing a diode in one embodiment;

[0028] Figure 4a to Figure 4e It is adopted Figure 3 A schematic cross-sectional view of a device during the process of manufacturing a diode using the method shown;

[0029] Figure 5 Schematic cross-section of a diode in a comparative example. DETAILED DESCRIPTION

[0030] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. However, the present invention may be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive disclosure of the present invention.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0032] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent to, connected to, or coupled to the other element or layer, or there can be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, a first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part without departing from the teachings of the present invention.

[0033] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," etc., may be used herein for convenience of description to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that the spatially relative terms are intended to include different orientations of the device in use and operation in addition to the orientations shown in the figures. For example, if the device in the drawings is flipped, then the elements or features described as "under" or "beneath" or "beneath" the other elements will be oriented as "over" the other elements or features. Thus, the exemplary terms "under" and "under" may include both the upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or in other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0034] The purpose of the terms used herein is only to describe specific embodiments and is not intended to limit the present invention. When used herein, the singular forms "a", "an", and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0035] Embodiments of the invention are described herein with reference to cross-sectional views which are schematic illustrations of idealized embodiments (and intermediate structures) of the invention. As such, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances are contemplated. Accordingly, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include deviations in shapes due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation occurs. Accordingly, the regions shown in the figures are schematic in nature, and their shapes are not intended to illustrate the actual shape of the region of the device and are not intended to limit the scope of the invention.

[0036] The semiconductor field terms used in this article are technical terms commonly used by those skilled in the art. For example, for P-type and N-type impurities, in order to distinguish the doping concentration, P+ type represents P-type with heavy doping concentration, P-type represents P-type with medium doping concentration, P-type represents P-type with light doping concentration, N+ type represents N-type with heavy doping concentration, N-type represents N-type with medium doping concentration, and N-type represents N-type with light doping concentration.

[0037] Traditional high-voltage diodes inject a large number of minority carrier holes when the diode is forward-conducting. These minority carrier holes generate a current, acting as a freewheeling current. Even after the freewheeling phase ends, these holes still exist within the device (diode). Furthermore, to achieve high withstand voltage, high-voltage diodes have a long drift region, which stores a large number of intrinsic minority carriers within the drift region. Therefore, when the high-voltage diode transitions from forward conduction to reverse conduction, the minority carriers cannot recombine quickly, resulting in a very long reverse recovery time. This results in a correspondingly high peak current during reverse recovery, making it difficult to meet the high-speed, low-loss switching requirements of switching devices.

[0038] Figure 1 FIG2 is a cross-sectional view of a diode in an embodiment of the present invention. In this embodiment, the diode is integrated with a lateral insulated gate bipolar transistor of an SOI (Silicon on Insulator) structure, and thus the diode is also based on an SOI structure. Figure 1 The diode shown includes a substrate 101, an insulating buried layer 102, a semiconductor layer 103, an anode and a cathode, wherein the cathode includes a trench contact 207, a cathode doping region 208 and a cathode electrode.

[0039] The trench contact 207 is a structure in which a contact material is filled in the trench. In one embodiment of the present application, the contact material can be silicon oxide (eg, silicon dioxide), polysilicon, amorphous silicon (a-Si), or some dielectric layer materials with good fluidity.

[0040] The cathode doped region 208 has the first conductivity type and surrounds the trench contact 207 on all sides and at the bottom. The cathode doped region 208 is also disposed around the trench contact 207 on the surface of the semiconductor layer 103. Figure 1 In the illustrated embodiment, the first conductivity type is N-type, and the second conductivity type is P-type.

[0041] The cathode electrode is disposed on the cathode doping region 208 and is electrically connected to the cathode doping region 208 .

[0042] The above diode introduces a trench contact 207 at the cathode and forms a cathode doping region 208 around and at the bottom of the trench, so that the cathode doping region 208 includes a lateral region on the surface of the semiconductor layer 103, a longitudinal region along the trench wall, and a trench bottom region. The area of the cathode doping region is relatively large. Figure 5 The comparative ratio shown is greatly increased, so when the parallel lateral insulated gate bipolar transistor is turned off, the area of the diode used for collecting and recombining minority carriers is increased, and the speed and efficiency of the diode reverse recovery are high.

[0043] In one embodiment of the present application, the semiconductor layer 103 includes a drift region of the first conductivity type. Figure 1 In the illustrated embodiment, the drift region is an N- region, and the cathode doped region 208 is an N+ region.

[0044] exist Figure 1 In the illustrated embodiment, the diode further includes a field oxide (FOX) structure 209 and a cathode polysilicon field plate 206. The field oxide structure 209 is disposed on the semiconductor layer 103 and is located between the anode and cathode of the diode. The cathode polysilicon field plate 206 is disposed on the field oxide structure 209 and is electrically connected to the cathode electrode. Specifically, the cathode electrode can be electrically connected to the cathode polysilicon field plate 206 through a contact hole. Providing the cathode polysilicon field plate 206 on the field oxide structure 209 can adjust the electric field lines in the cathode region when the diode is reversely depleted.

[0045] In one embodiment of the present application, the diode includes at least one trench contact 207. Since the width of the trench is relatively small (the width of each trench contact 207 accounts for 0.3% to 0.5% of the cathode width), the addition of the trench contact 207 has little impact on the overall device area. Compared to increasing the recombination rate by increasing the area of the cathode-doped region on the surface of the semiconductor layer 103, the device area is smaller. Furthermore, increasing the area of the cathode-doped region on the surface of the semiconductor layer 103 will result in an increase in the drift region area. As the drift region increases, the number of minority carriers inherent in the diode will also increase, further detrimental to the efficiency of reverse recombination.

[0046] In one embodiment of the present application, the cathode electrode forms an ohmic contact with the cathode doped region 208 through the contact hole, and the cathode electrode does not directly contact the trench contact 207. Specifically, the cathode electrode can be connected to the lateral region of the cathode doped region 208 located on the surface of the semiconductor layer 103 through the contact hole.

[0047] exist Figure 1 In the embodiment shown, the anode includes a well region 202, an anode doping region 203, and an anode electrode. The well region 202 has the second conductivity type and is disposed in the semiconductor layer 103. The anode doping region 203 has the second conductivity type and is disposed in the well region 202. The doping concentration of the anode doping region 203 is greater than the doping concentration of the well region 202. Figure 1 In the illustrated embodiment, the well region 202 is a high-voltage P-well, and the anode doped region 203 is a P+ region. A portion of the anode electrode structure directly contacts the anode doped region 203 through a contact hole, while another portion of the anode electrode structure directly contacts the well region 202 through a contact hole. It will be appreciated that the contact hole contacting the anode doped region 203 and the contact hole contacting the well region 202 are different contact holes.

[0048] exist Figure 1In the illustrated embodiment, the well region 202 includes at least two anode-doped regions 203, and the anode-doped regions 203 within the well region 202 are separated from each other by the well region 202. Each anode-doped region 203 forms an ohmic contact with the conductive material within the corresponding contact hole, and the well region 202 forms a Schottky contact 204 with the conductive material within the corresponding contact hole. The portion of the well region 202 located between the anode-doped regions 203 forms a Schottky contact by directly contacting the corresponding contact hole. This reduces the efficiency of minority carrier injection when the diode is forward-conducting, creating a conductivity modulation effect. Combined with the cathode trench N+ ohmic contact structure of the present application, this can further reduce the number of minority carriers and shorten the reverse recovery time.

[0049] exist Figure 1 In the illustrated embodiment, the diode further includes an anode polysilicon field plate 205 disposed on the field oxide structure 209. The anode polysilicon field plate 205 is electrically connected to the anode electrode. Providing the anode polysilicon field plate 205 on the field oxide structure 209 can regulate the electric field lines in the anode region during reverse depletion of the diode.

[0050] exist Figure 1 In the embodiment shown, an isolation trench structure 201 is provided on the outside of the well region 202 (i.e., the side away from the cathode), and an isolation trench structure 201 is also provided on the outside of the cathode doped region 208 (i.e., the side away from the anode). The isolation trench structure 201 extends downward to the buried insulating layer 102, serving as an isolation structure for the diode on the SOI material. Figure 1 In the embodiment shown, field oxide structures ( Figure 1 In one embodiment of the present application, the isolation trench structure 201 is filled with a dielectric layer, which may be, for example, a silicon oxide material, or silicon dioxide formed on the trench sidewalls, and then the remaining position is filled with polysilicon and planarized.

[0051] In one embodiment of the present application, the diode is a fast recovery SOI high-voltage freewheeling diode.

[0052] In one embodiment of the present application, the substrate 101 and the semiconductor layer 103 are both silicon layers. The buried insulating layer 102 is a buried oxide layer, and its material can be silicon dioxide.

[0053] Figure 2FIG2 is a schematic cross-sectional view of a diode in another embodiment. In this embodiment, the diode comprises a substrate 101, an insulating buried layer 102, and a semiconductor layer 103, which are stacked in sequence. A well region 302, a trench contact 307, and a cathode doped region 308 are provided in the semiconductor layer 103. Anode doped regions 303 are provided in the well region 302. The cathode electrode forms an ohmic contact with the cathode doped regions 308 through contact holes. The anode electrode forms an ohmic contact with each anode doped region 303 through corresponding contact holes, and also forms a Schottky contact 304 with the well region 302 through corresponding contact holes. In the semiconductor layer 103, isolation trench structures 301 are provided on both sides of the diode. Field oxide structures are provided on the isolation trench structures 301. A field oxide structure 309 is also provided on the surface of the semiconductor layer 103 between the well region 302 and the cathode doped region 308. Anode polysilicon field plates 305 and cathode polysilicon field plates 306 are provided on the field oxide structure 309, on the anode and cathode sides, respectively. The anode polysilicon field plate 305 is electrically connected to the anode electrode through a contact hole, and the cathode polysilicon field plate 306 is electrically connected to the cathode electrode through a contact hole.

[0054] Figure 2 The embodiment shown and Figure 1 The main difference is that the diode further includes a first conductivity type well region 309. The first conductivity type well region 309 is provided at the bottom of the trench contact 307 and extends downward to the buried insulating layer 102. Figure 2 In the illustrated embodiment, the first conductivity type well region 309 is an N-well. The doping concentration of the first conductivity type well region 309 is greater than the doping concentration of the N-drift region of the semiconductor layer 103, but less than the doping concentration of the cathode doped region 308. Providing the first conductivity type well region 309 at the bottom of the trench, with a doping concentration greater than that of the drift region, can reduce the resistivity of the area near the bottom of the trench. This allows more minority carriers to participate in recombination during reverse recovery of the diode, thereby further improving the minority carrier recombination efficiency during reverse recovery of the diode.

[0055] The present application accordingly provides a semiconductor device based on an SOI structure, comprising a lateral insulated gate bipolar transistor (LIGBT) and the diode described in any of the aforementioned embodiments, wherein the LIGBT and the diode are both integrated on the SOI structure, and the diode is connected in parallel between the collector and emitter of the LIGBT.

[0056] Figure 3 FIG. 1 is a flow chart of a method for manufacturing a diode according to an embodiment, comprising the following steps:

[0057] S310, obtaining a substrate.

[0058] The base comprises a substrate 101, an insulating buried layer 102, and a semiconductor layer 103 stacked in sequence. Figure 4aIn one embodiment of the present application, the substrate 101 and the semiconductor layer 103 are both silicon layers. The buried insulating layer 102 is a buried oxide layer, and its material can be silicon dioxide. In one embodiment of the present application, the semiconductor layer 103 includes a drift region of the first conductivity type. Figure 4a In the illustrated embodiment, the first conductivity type is N-type, the second conductivity type is P-type, and the drift region is an N-drift region.

[0059] S320 , forming a first trench.

[0060] In one embodiment of the present application, at least one first trench 104 is formed by etching downward from the surface of the semiconductor layer 103 through photolithography and etching processes.

[0061] exist Figure 4b In the illustrated embodiment, the isolation trench 105 for isolating the diode is etched simultaneously with the etching of the first trench 104. The width of the first trench 104 is set to be smaller through photolithography, resulting in a slower etching rate for the first trench 104. The width of the isolation trench 105 is larger than the width of the first trench 104, resulting in a faster etching rate. As a result, when the bottom of the isolation trench 105 is etched to the buried insulating layer 102, the bottom of the first trench 104 is still some distance away from the buried insulating layer 102. In one embodiment of the present application, the width of each first trench 104 accounts for 0.3% to 0.5% of the width of the cathode region of the diode. By properly controlling the width of the first trench 104 and the aspect ratio of the etching process, the first trench 104 and the isolation trench 105 can be formed simultaneously (in the same process), thereby saving manufacturing costs and improving manufacturing efficiency.

[0062] S330 , forming a cathode doped region in the semiconductor layer around the first trench and in the bottom semiconductor layer.

[0063] In one embodiment of the present application, the cathode doping region 208 is formed by implanting first conductive type ions through an ion implantation process, such as Figure 4c As shown. Figure 4c In the embodiment shown, the cathode doped region 208 is an N+ region. In other embodiments, the step S330 of implanting N-type ions may also form the cathode doped region 208 on the sidewalls and bottom of the first trench 104, such as Figure 4d As shown, another ion implantation process is then performed to form a cathode doped region 208 on the surface of the semiconductor layer 103 .

[0064] S340 , filling the first trench with a contact material.

[0065] In one embodiment of the present application, step S340 includes a step of oxidizing the trench sidewalls. For the first trench 104, since its width is relatively small, the first trench 104 can be filled only by the sidewall oxidation step; while the width of the isolation trench 105 is larger, so after the sidewall oxidation, the remaining position of the isolation trench 105 can be filled with a filling medium or polysilicon and planarized, referring to FIG. Figure 4e .

[0066] S350 , forming a cathode electrode on the cathode doping region and electrically connected to the cathode doping region.

[0067] After step S340, the remaining structures of the cathode and anode of the diode can be formed. This includes forming a field oxide structure, forming a well region in the semiconductor layer 103, forming an anode doped region in the well region, forming an anode polysilicon field plate and a cathode polysilicon field plate on the field oxide structure, and forming an anode electrode and a cathode electrode. The anode electrode is electrically connected to the anode polysilicon field plate, the well region, and the anode doped region through a contact hole, forming an ohmic contact with the anode doped region and a Schottky contact with the well region; the cathode electrode is electrically connected to the cathode polysilicon field plate and the cathode doped region through a contact hole, forming an ohmic contact with the cathode doped region.

[0068] It should be understood that, although the various steps in the flowchart of the present application are shown in sequence as indicated by the arrows, these steps are not necessarily performed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be performed in other orders. Moreover, at least a portion of the steps in the flowchart of the present application may include multiple steps or multiple stages, and these steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily to be performed in sequence, but can be performed in turn or alternately with other steps or at least a portion of steps or stages in other steps.

[0069] Throughout this specification, references to terms such as "some embodiments," "other embodiments," and "desired embodiments" indicate that a particular feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. Although these terms are used interchangeably throughout this specification, they do not necessarily refer to the same embodiment or example.

[0070] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0071] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.

Claims

1. A diode based on a silicon-on-insulator structure, characterized in that: include: substrate; an insulating buried layer, provided on the substrate; a semiconductor layer, disposed on the insulating buried layer; anode; cathode, comprising: A trench contact, wherein a contact material is filled in the trench; the trench extends from a first surface of the semiconductor layer to a second surface of the semiconductor layer, the first surface is a surface away from the buried insulating layer, and the second surface is a surface facing the buried insulating layer; a cathode doped region having a first conductivity type, surrounding the trench contact on all sides and at the bottom thereof, and further disposed on the first surface around the trench contact; A cathode electrode is on the cathode doping region and electrically connected to the cathode doping region, the cathode electrode forms an ohmic contact with the cathode doping region through a contact hole, the cathode electrode contacts the cathode doping region of the first surface arranged around the trench contact, and the cathode electrode does not directly contact the trench contact.

2. The diode according to claim 1, characterized in that The contact material includes at least one of silicon oxide, polysilicon, and amorphous silicon.

3. The diode according to claim 1, characterized in that Also includes: A field oxygen structure is provided on the semiconductor layer and between the anode and the cathode; The cathode polysilicon field plate is disposed on the field oxide structure and is electrically connected to the cathode electrode.

4. The diode according to claim 1, characterized in that The diode comprises at least one trench contact, and the width of each trench contact accounts for 0.3% to 0.5% of the cathode width.

5. The diode according to claim 3, characterized in that The anode comprises: a well region having a second conductivity type and disposed in the semiconductor layer; an anode doped region having a second conductivity type and disposed in the well region, wherein a doping concentration of the anode doped region is greater than a doping concentration of the well region; Anode electrode, part of the anode electrode is in direct contact with the anode doping region through the contact hole, and part of the anode electrode is in direct contact with the well region through the contact hole.

6. The diode according to claim 5, characterized in that The well region includes at least two anode doped regions, and the anode doped regions in the well region are separated from each other by the well region. Each anode doped region forms an ohmic contact with the conductive material in the contact hole, and the well region forms a Schottky contact with the conductive material in the contact hole.

7. The diode according to claim 5, characterized in that It also includes an anode polysilicon field plate, which is arranged on the field oxide structure and electrically connected to the anode electrode.

8. The diode according to claim 1, characterized in that It also includes a first conductive type well region, which is arranged at the bottom of the trench contact and extends to the insulating buried layer; the semiconductor layer includes a first conductive type drift region, and the doping concentration of the first conductive type well region is greater than the doping concentration of the drift region.

9. A semiconductor device based on a silicon-on-insulator structure, characterized in that: A lateral insulated gate bipolar transistor and a diode according to any one of claims 1 to 8 integrated with the lateral insulated gate bipolar transistor, wherein the diode is connected in parallel between the collector and the emitter of the lateral insulated gate bipolar transistor.

10. A method for manufacturing a diode based on a silicon-on-insulator structure, characterized in that: The method comprises: Obtaining a substrate, wherein the substrate comprises a substrate, an insulating buried layer, and a semiconductor layer stacked in sequence; forming a first trench extending from a first surface of the semiconductor layer to a second surface of the semiconductor layer, wherein the first surface is a surface away from the buried insulating layer, and the second surface is a surface facing the buried insulating layer; forming a cathode doped region in the semiconductor layer around the first trench and in the semiconductor layer at the bottom, including forming a cathode doped region on the first surface around the first trench, wherein the cathode doped region has a first conductivity type; filling the first trench with a contact material; A cathode electrode electrically connected to the cathode doping region is formed on the cathode doping region, the cathode electrode forms an ohmic contact with the cathode doping region through a contact hole, the cathode electrode contacts the cathode doping region of the first surface formed around the first groove, and the cathode electrode does not directly contact the groove-type contact.

11. The method for manufacturing a diode according to claim 10, wherein: The step of forming a first trench extending from the first surface of the semiconductor layer to the second surface of the semiconductor layer is formed by an etching process, and an isolation trench structure is simultaneously etched to form the isolation trench structure, the width of the first trench is smaller than the width of the isolation trench structure, the isolation trench structure extends to the insulating buried layer, and the depth of the isolation trench structure is greater than the depth of the first trench.

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