A method for preparing an epitaxial wafer, the epitaxial wafer, and an LED chip.

Abstract

This invention provides a method for preparing an epitaxial wafer, the epitaxial wafer itself, and an LED chip. The method includes providing a substrate, depositing an etchable sacrificial layer on the substrate, and bonding a top thin film to the etchable sacrificial layer on the side away from the substrate to form a composite substrate; epitaxially growing a nitride functional layer on the top thin film to form an initial epitaxial wafer; and placing the initial epitaxial wafer in a prepared etching solution to etch the etchable sacrificial layer in the composite substrate, thereby obtaining the epitaxial wafer. This invention solves the problem in the prior art where substrate thinning after epitaxial wafer growth affects product yield.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for preparing an epitaxial wafer, the epitaxial wafer, and an LED chip. Background Technology

[0002] LED chips are light-emitting semiconductor electronic components characterized by their small size, high brightness, and low power consumption, and are widely used in lighting and other fields. Since LED chips are obtained by splitting LED epitaxial wafers, the performance of the LED epitaxial wafer determines the performance of the LED chip.

[0003] With the expansion of application fields, the requirements for LED chips are also increasing. High-brightness chips have always been the goal, so improving the brightness of LED chips has become the most important technical point.

[0004] Currently, from the completion of LED epitaxial wafer growth to the chip manufacturing process, a substrate thinning process is required. Through chip rough grinding and fine grinding processes, the substrate of the LED epitaxial wafer is thinned to close to the target thickness. Firstly, this facilitates better packaging, and secondly, substrate thinning can effectively reduce the absorption of light emitted from multiple quantum wells by the substrate, thereby improving light extraction efficiency. However, during the grinding process, the epitaxial wafer is easily scratched, leading to wafer cracking and affecting product yield. Summary of the Invention

[0005] Based on this, the purpose of the present invention is to provide an epitaxial wafer preparation method, an epitaxial wafer, and an LED chip, aiming to solve the problem of affecting product yield when performing substrate thinning process after epitaxial wafer growth in the prior art.

[0006] The embodiments of the present invention are implemented as follows:

[0007] A method for preparing an epitaxial wafer, the method comprising:

[0008] A substrate is provided, an etchable sacrificial layer is deposited on the substrate, and a thin film top layer is bonded to the etchable sacrificial layer on the side away from the substrate to form a composite substrate;

[0009] A nitride functional layer is epitaxially grown on the top layer of the thin film to form an initial epitaxial wafer;

[0010] The initial epitaxial wafer is placed in a prepared etching solution to etch the etchable sacrificial layer in the composite substrate, thereby obtaining the epitaxial wafer.

[0011] In addition, the epitaxial wafer preparation method proposed according to the present invention may also have the following additional technical features:

[0012] Furthermore, the corrosive solution is either a hydrofluoric acid solution or a nitric acid solution, wherein the pH value of the corrosive solution is 2 to 6.

[0013] Furthermore, the corrosive sacrificial layer is either a zinc oxide layer or a silicon dioxide layer.

[0014] Furthermore, the top layer of the thin film is made of any one of sapphire, silicon carbide, or silicon.

[0015] Furthermore, the thickness of the substrate body is greater than the thickness of the top layer of the thin film.

[0016] Furthermore, the thickness of the substrate body is 400-600 μm, and the thickness of the top layer of the thin film is 50-200 μm.

[0017] Furthermore, the step of providing a substrate body, depositing an etchable sacrificial layer on the substrate body, and bonding a top thin film layer on the side of the etchable sacrificial layer away from the substrate body to form a composite substrate includes:

[0018] Provide a substrate body;

[0019] A PVD magnetron sputtering machine is used to sputter the substrate to deposit an etchable sacrificial layer on the substrate.

[0020] The bottom surface of the top layer of the thin film is pre-bonded to the surface of the etchable sacrificial layer away from the substrate body using a bonding machine to obtain a pre-bonded composite substrate. The pre-bonded composite substrate is then subjected to high-temperature bonding to obtain a composite substrate.

[0021] Among them, magnetron sputtering uses direct current, sputtering power is 800-4000W, sputtering pressure can be 0.2-1pa, and high-temperature bonding temperature is 900-1200℃.

[0022] Furthermore, the nitride functional layer includes a buffer layer, a three-dimensional nucleation layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, a P-type electron blocking layer, a P-type undoped GaN layer, a P-type doped GaN layer, and a P-type contact layer.

[0023] Another object of the present invention is to provide an epitaxial wafer, which is prepared by the epitaxial wafer preparation method described above, and the epitaxial wafer comprises:

[0024] Composite substrate;

[0025] A buffer layer, a three-dimensional nucleation layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, a P-type electron blocking layer, a P-type undoped GaN layer, a P-type doped GaN layer, and a P-type contact layer are sequentially stacked on the composite substrate.

[0026] The composite substrate comprises a substrate body, an etchable sacrificial layer, and a thin film top layer stacked sequentially. The buffer layer, the three-dimensional nucleation layer, the two-dimensional recovery layer, the undoped GaN layer, the N-type GaN layer, the multiple quantum well layer, the P-type electron blocking layer, the P-type undoped GaN layer, the P-type doped GaN layer, and the P-type contact layer are stacked sequentially on the thin film top layer.

[0027] Another object of the present invention is to provide an LED chip comprising the epitaxial wafer described above.

[0028] Compared with existing technologies: By depositing an etchable sacrificial layer on the substrate and bonding a top thin film on the etchable sacrificial layer to form a composite substrate, and then growing epitaxial layers on the composite substrate, the etchable sacrificial layer in the epitaxial wafer is etched by an etching solution after the epitaxial layer growth is completed, thereby separating the top thin film with the deposited epitaxial layer, which is the epitaxial wafer required for the chip. The whole process does not require the epitaxial wafer to be thinned by a grinding and thinning process, avoiding the problem of scratches and cracks on the wafer caused by the grinding and thinning process, which leads to a decrease in product yield. On the other hand, when the substrate is a non-etchable substrate, the stripped substrate can be recycled, reducing costs. Attached Figure Description

[0029] Figure 1 This is a flowchart of the epitaxial wafer preparation method in the first embodiment of the present invention.

[0030] Figure 2 This is a schematic diagram of the epitaxial wafer in the second embodiment of the present invention.

[0031] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0032] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0033] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0035] Example 1

[0036] Please see Figure 1 The figure shows the epitaxial wafer preparation method proposed in the first embodiment of the present invention, which includes steps S10 to S12.

[0037] Step S10: A substrate body is provided, an etchable sacrificial layer is deposited on the substrate body, and a thin film top layer is bonded to the side of the etchable sacrificial layer away from the substrate body to form a composite substrate.

[0038] Specifically, in this embodiment, the substrate can be either an etchable substrate or a non-etchable substrate. When the substrate is etchable, the material of the substrate includes, but is not limited to, zinc oxide and silicon dioxide. When the substrate is non-etchable, the material of the substrate includes, but is not limited to, sapphire, silicon carbide, and silicon. The etchable sacrificial layer is either a zinc oxide layer or a silicon dioxide layer, for example, a zinc oxide layer. The top layer of the thin film is made of either sapphire, silicon carbide, or silicon, for example, sapphire.

[0039] More specifically, the thickness of the substrate is greater than the thickness of the top thin film. In practice, the substrate thickness is set relatively thicker while the top thin film thickness is set relatively thinner. The purpose is that after the epitaxial wafer is grown, the top thin film and the epitaxial layer grown on it are processed together at the chip end and subsequently packaged. Some of the light emitted from the multiple quantum wells in the epitaxial layer will be directed towards the top thin film, where it will be absorbed, reducing the efficiency of the emitted light. To reduce the absorption efficiency of the light emitted from the multiple quantum wells and improve the emission efficiency, the top thin film needs to be relatively thin. However, an excessively thin top thin film will cause problems when bonding to the substrate with the deposited etchable sacrificial layer. A thin substrate is prone to cracking and its strength is insufficient to support the epitaxial layer processing steps on the chip. A thicker substrate, however, experiences less warping under thermal stress during epitaxial growth. A thicker substrate is relatively flatter under thermal stress, resulting in less warping of the epitaxial layer, more uniform growth, and better crystal quality. Conversely, a thin substrate will warp significantly under thermal stress, leading to deterioration of the epitaxial layer crystal quality and even cracking. Therefore, to ensure the overall thickness of the composite substrate, the substrate body is made relatively thicker to increase the overall thickness of the composite substrate. In this specific embodiment, the thickness of the substrate body is 400-600 μm, and the thickness of the top thin film layer is 50-200 μm.

[0040] As an example, and not a limitation, in this embodiment, the steps of providing a substrate body, depositing an etchable sacrificial layer on the substrate body, and bonding a thin film top layer on the side of the etchable sacrificial layer away from the substrate body to form a composite substrate include:

[0041] Provide a substrate body;

[0042] A PVD magnetron sputtering machine is used to sputter the substrate to deposit an etchable sacrificial layer on the substrate.

[0043] The bottom surface of the top layer of the thin film is pre-bonded to the surface of the etchable sacrificial layer away from the substrate body using a bonding machine to obtain a pre-bonded composite substrate. The pre-bonded composite substrate is then subjected to high-temperature bonding to obtain a composite substrate.

[0044] Among them, magnetron sputtering uses direct current, sputtering power is 800-4000W, sputtering pressure can be 0.2-1pa, and high-temperature bonding temperature is 900-1200℃.

[0045] Specifically, the etchable sacrificial layer can be prepared by physical vapor deposition or chemical vapor deposition. In this embodiment, physical vapor deposition is used to prepare the etchable sacrificial layer. For example, a PVD magnetron sputtering machine is used to deposit the etchable sacrificial layer on the substrate under DC power, a power of 800-4000W, and a cavity sputtering pressure of 0.2-1Pa. For example, when the etchable sacrificial layer is a zinc oxide layer, at a sputtering power of 2500W and a cavity sputtering pressure of 0.4Pa, a zinc target is used as the zinc source in the etchable zinc oxide layer, and oxygen is used as the oxygen source in the etchable zinc oxide layer. The etchable zinc oxide layer with a thickness of 0.2-10μm is sputtered, and the high-temperature bonding temperature is 900-1200℃, for example, 900, 1000, and 1200℃.

[0046] Step S11: An epitaxial nitride functional layer is grown on the top layer of the thin film to form an initial epitaxial wafer.

[0047] The nitride functional layers include a buffer layer, a three-dimensional nucleation layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, a P-type electron blocking layer, a P-type undoped GaN layer, a P-type doped GaN layer, and a P-type contact layer.

[0048] For example, the buffer layer can be any one or a combination of AlN buffer layer, GaN buffer layer, or AlGaN buffer layer. In this embodiment, the buffer layer is a GaN buffer layer. The specific deposition process is as follows: the temperature of the reaction chamber is controlled at 800°C, the pressure is controlled at 200 torr, NH3 with a flow rate of 45 slm is introduced as the N (nitrogen) source, and TMGa with a flow rate of 35 sccm is introduced as the Ga (gallium) source. The thickness of the deposited GaN buffer layer is controlled to be 12 nm.

[0049] For example, the three-dimensional nucleation layer is a GaN layer, and its specific deposition process is as follows: the temperature of the reaction chamber is raised to 1080°C, the pressure is controlled at 250 torr, NH3 with a flow rate of 50 slm is introduced as the N (nitrogen) source, and TMGa with a flow rate of 450 sccm is introduced as the Ga (gallium) source, so that a GaN three-dimensional nucleation layer is grown, and the thickness of the deposited GaN three-dimensional nucleation layer is controlled to be 560 nm.

[0050] For example, the two-dimensional recovery layer is a GaN layer. The specific deposition process is as follows: the temperature of the reaction chamber is raised to 1130°C, the pressure is controlled at 200 torr, NH3 with a flow rate of 60 slm is introduced as the N (nitrogen) source, and TMGa with a flow rate of 600 sccm is introduced as the Ga (gallium) source, so that a GaN two-dimensional recovery layer is grown, and the thickness of the deposited GaN two-dimensional recovery layer is controlled to be 750 nm.

[0051] For example, the reaction chamber temperature is raised to 1135°C, the pressure is controlled at 200 torr, NH3 with a flow rate of 60 slm is introduced as the N (nitrogen) source, and TMGa with a flow rate of 620 sccm is introduced as the Ga (gallium) source, so that an undoped GaN layer is grown, and the thickness of the deposited undoped GaN layer is controlled to be 1.3 μm.

[0052] For example, the reaction chamber temperature is lowered to 1080°C, the pressure is controlled at 200 torr, NH3 at a flow rate of 50 slm is introduced as the N (nitrogen) source, TMGa at a flow rate of 420 sccm is introduced as the Ga (gallium) source, and SiH4 at a flow rate of 100-300 sccm is introduced as the N-type dopant, while the Si (silicon) doping concentration is 4.8 × E18 atoms / cm. 3 This allows for the growth of a Si-doped N-type GaN layer, with the thickness of the deposited N-type GaN layer controlled to be 2.2 μm.

[0053] For example, the multiple quantum well layer is a structure with periodic alternating growth. In this embodiment, the period x of alternating growth of the quantum barrier layer and the quantum well layer ranges from 8 to x ≤ 12. As an example of the present invention, x can be 10, that is, the multiple quantum well layer is obtained by alternating growth of the quantum well layer and the quantum barrier layer 10 times. Furthermore, the growth temperature of the reaction chamber for growing the quantum well layer is 790°C, the pressure is 200 torr, the N (nitrogen) source can be NH3 with a flow rate of 55 slm, the Ga (gallium) source can be TEGa with a flow rate of 400 sccm, and the In (indium) source can be TMI with a flow rate of 1800 sccm, controlling the growth of the InGaN quantum well layer to 3.5 nm. Furthermore, the reaction chamber temperature for growing the quantum barrier layer was 890℃, the pressure was 200 torr, NH3 with a flow rate of 50 slm was introduced as the N (nitrogen) source, and TEGa with a flow rate of 750 sccm was introduced as the Ga (ga) source, controlling the thickness of the deposited GaN quantum barrier layer to be 10.5 nm.

[0054] For example, an AlInGaN electron blocking layer with a thickness of 22 nm was grown in a reaction chamber at a temperature of 970°C and a pressure of 100 torr.

[0055] For example, a P-type undoped GaN layer with a thickness of 12 nm is grown in a reaction chamber at a temperature of 980°C and a pressure of 200 torr.

[0056] For example, specifically, a Mg-doped GaN layer with a thickness of 5 nm is grown in a reaction chamber at a temperature of 980°C and a pressure of 200 torr to deposit a P-type Mg-doped GaN layer, wherein the Mg doping concentration is 1.8 × E19 atoms / cm². 3 .

[0057] For example, a heavily Mg-doped GaN layer with a thickness of 4.5 nm is grown in a reaction chamber at a temperature of 850°C and a pressure of 200 torr to form a P-type contact layer, wherein the Mg doping concentration is 5.9 × E20 atoms / cm². 3 .

[0058] Step S12: The initial epitaxial wafer is placed in a prepared etching solution to etch the etchable sacrificial layer in the composite substrate, thereby obtaining the epitaxial wafer.

[0059] In this embodiment, the etching solution is either hydrofluoric acid solution or nitric acid solution. It is understood that an etching solution within a reasonable pH range can ensure that the "corrosive sacrificial layer" can be etched away without causing corrosion to the top layer of the film. In this embodiment, the pH value of the etching solution is 2 to 6.

[0060] Example 2

[0061] Please see Figure 2 The image shows the epitaxial wafer proposed in this embodiment two. This epitaxial wafer is prepared by the epitaxial wafer preparation method described in embodiment one above. The epitaxial wafer includes:

[0062] Composite substrate 1;

[0063] The following layers are sequentially stacked on the composite substrate 1: buffer layer 2, three-dimensional nucleation layer 3, two-dimensional recovery layer 4, undoped GaN layer 5, N-type GaN layer 6, multiple quantum well layer 7, P-type electron blocking layer 8, P-type undoped GaN layer 9, P-type doped GaN layer 10, and P-type contact layer 11.

[0064] The composite substrate 1 includes a substrate body 110, an etchable sacrificial layer 111, and a thin film top layer 112 stacked sequentially. The buffer layer 2, the three-dimensional nucleation layer 3, the two-dimensional recovery layer 4, the undoped GaN layer 5, the N-type GaN layer 6, the multiple quantum well layer 7, the P-type electron blocking layer 8, the P-type undoped GaN layer 9, the P-type doped GaN layer 10, and the P-type contact layer 11 are stacked sequentially on the thin film top layer 112.

[0065] For example, the substrate 110 is any one of zinc oxide, silicon dioxide, sapphire, silicon carbide, and silicon; the etchable sacrificial layer 111 is any one of zinc oxide and silicon dioxide; the top film 112 is made of any one of sapphire, silicon carbide, and silicon; the buffer layer 2 is a GaN buffer layer; the three-dimensional nucleation layer 3 and the two-dimensional recovery layer 4 are both GaN layers; the multiple quantum well layer 7 is a periodically alternating growth structure of GaN / InGaN; the P-type electron blocking layer 8 is an AlInGaN layer; and the P-type contact layer 11 is a heavily Mg-doped GaN layer.

[0066] Example 3

[0067] This embodiment proposes an LED chip, which includes the epitaxial wafer described in Embodiment 2 above. The epitaxial wafer is prepared by the preparation method described in Embodiment 1 above.

[0068] In summary, the epitaxial wafer preparation method and epitaxial wafer proposed in the above embodiments of the present invention form a composite substrate by depositing an etchable sacrificial layer on a substrate and bonding a thin film top layer on the etchable sacrificial layer. The subsequent epitaxial growth of the epitaxial wafer is then performed on the composite substrate. After the epitaxial wafer growth is completed, the etchable sacrificial layer in the epitaxial wafer is etched by an etching solution to separate the thin film top layer with the deposited epitaxial layer, which is the epitaxial wafer required for the chip. The entire process does not require thinning of the epitaxial wafer through a grinding and thinning process, thus avoiding the problem of scratches and cracks caused by the grinding and thinning process, which leads to a decrease in product yield. On the other hand, when the substrate is a non-etchable substrate, the stripped substrate can be recycled, reducing costs.

[0069] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for preparing an epitaxial wafer, characterized in that, The method includes: A substrate is provided, an etchable sacrificial layer is deposited on the substrate, and a thin film top layer is bonded to the etchable sacrificial layer on the side away from the substrate to form a composite substrate; A nitride functional layer is epitaxially grown on the top layer of the thin film to form an initial epitaxial wafer; The initial epitaxial wafer is placed in a prepared etching solution to etch the etchable sacrificial layer in the composite substrate, thereby obtaining the epitaxial wafer; The thickness of the substrate body is greater than the thickness of the top film layer. The thickness of the substrate body is 400-600 μm, and the thickness of the top film layer is 50-200 μm.

2. The method for preparing an epitaxial wafer according to claim 1, characterized in that, The corrosive solution is either a hydrofluoric acid solution or a nitric acid solution, wherein the pH value of the corrosive solution is 2 to 6.

3. The method for preparing an epitaxial wafer according to claim 1, characterized in that, The corrosive sacrificial layer is either a zinc oxide layer or a silicon dioxide layer.

4. The method for preparing an epitaxial wafer according to claim 1, characterized in that, The top layer of the thin film is made of any one of sapphire, silicon carbide, or silicon.

5. The method for preparing an epitaxial wafer according to any one of claims 1 to 4, characterized in that, The step of providing a substrate body, depositing an etchable sacrificial layer on the substrate body, and bonding a top thin film layer on the side of the etchable sacrificial layer away from the substrate body to form a composite substrate includes: Provide a substrate body; A PVD magnetron sputtering machine is used to sputter the substrate to deposit an etchable sacrificial layer on the substrate. The bottom surface of the top layer of the thin film is pre-bonded to the surface of the etchable sacrificial layer away from the substrate body using a bonding machine to obtain a pre-bonded composite substrate. The pre-bonded composite substrate is then subjected to high-temperature bonding to obtain a composite substrate. Among them, magnetron sputtering uses direct current, sputtering power is 800-4000W, sputtering pressure can be 0.2-1pa, and high-temperature bonding temperature is 900-1200℃.

6. The method for preparing an epitaxial wafer according to claim 5, characterized in that, The nitride functional layer includes a buffer layer, a three-dimensional nucleation layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, a P-type electron blocking layer, a P-type undoped GaN layer, a P-type doped GaN layer, and a P-type contact layer.

7. An epitaxial wafer, characterized in that, The epitaxial wafer is prepared by the epitaxial wafer preparation method according to any one of claims 1 to 6, and the epitaxial wafer comprises: Composite substrate; A buffer layer, a three-dimensional nucleation layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, a P-type electron blocking layer, a P-type undoped GaN layer, a P-type doped GaN layer, and a P-type contact layer are sequentially stacked on the composite substrate. The composite substrate comprises a substrate body, an etchable sacrificial layer, and a thin film top layer stacked sequentially. The buffer layer, the three-dimensional nucleation layer, the two-dimensional recovery layer, the undoped GaN layer, the N-type GaN layer, the multiple quantum well layer, the P-type electron blocking layer, the P-type undoped GaN layer, the P-type doped GaN layer, and the P-type contact layer are stacked sequentially on the thin film top layer.

8. An LED chip, characterized in that, Includes the epitaxial wafer as described in claim 7.

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