Security chip data protection method, security chip, and storage medium
By dividing the storage area in the security chip and comparing and verifying the device information, the problem of insufficient security of MCU chip data during the burning process is solved, and effective protection of chip data is achieved.
Patent Information
- Application Number
- CN202210683990.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-29
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2042-08-29
AI Technical Summary
The security of existing MCU chip data during the programming process is difficult to ensure. Any device that conforms to the programming interface communication protocol can read or write data, resulting in insufficient data security.
The security chip's storage area is divided into a first sub-area and a second sub-area. The first sub-area is used to store backup information, and the second sub-area is used to temporarily store device information. The permissions of the burning device are determined by comparison and verification to ensure that only the matching device can read and write chip data.
By differentiating storage areas and verifying permissions, access by unauthorized devices is restricted, improving the security of chip data and preventing data from being easily cracked.
Smart Images
Figure CN115292761B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of security chip technology, and in particular to a security chip data protection method, a security chip, and a storage medium. Background Technology
[0002] A microcontroller unit (MCU), also known as a single-chip microcomputer or microcontroller, is a chip-level computer that reduces the frequency and specifications of a central processing unit (CPU) and adds peripheral interfaces such as memory and timers for different applications. With the development of the Internet of Things (IoT), and to cope with the various IoT embedded devices that have emerged, more and more MCUs are integrating wireless communication interfaces.
[0003] As manufacturers place increasing emphasis on data protection, MCU chip designers are also becoming more cautious about preventing reverse engineering and plagiarism. Currently, reading and writing MCU firmware data typically involves using a programming interface integrated into the MCU chip design. This programming interface connects to a programmer / emulator via a wired connection, which in turn connects to a computer. Ultimately, the communication protocol of the programming interface is used to read and write data stored in the MCU. Currently, programming devices that conform to the MCU programming interface communication protocol can read or write MCU data, making it difficult to ensure data security. Summary of the Invention
[0004] This invention provides a method for protecting data in a secure chip, a secure chip, and a storage medium, to solve the problem in related technologies where it is difficult to guarantee the data security of chips and prevent unrelated users from arbitrarily obtaining chip data through programmers / emulators.
[0005] This disclosure provides at least one embodiment of a data protection method for a security chip, wherein the security chip is coupled to a programming device, and the programming device is coupled to a computer-readable storage medium, wherein the security chip is divided into a first storage area, the first storage area including a first sub-area and a second sub-area, and the protection method includes:
[0006] The security chip is coupled to a programming device, which is coupled to a computer-readable storage medium.
[0007] The device information of the programming device is read through the security chip.
[0008] If the first sub-area of the first storage area of the security chip stores at least one copy of the backup information,
[0009] The device information is stored in the second sub-area of the first storage area of the security chip;
[0010] If the first sub-area of the first storage area of the security chip does not store the backup information...
[0011] The device information is stored in the first sub-area of the first storage area of the security chip.
[0012] For example, in a protection method provided in at least one embodiment of this disclosure, in response to confirming that the first sub-region has stored one or more backup information, the backup information is extracted from the first sub-region, and the backup information is compared with the device information in the second sub-region, including:
[0013] If the comparison is successful, the programming device obtains read permission for the security chip;
[0014] If the comparison fails, the programming device will be prohibited from accessing the security chip.
[0015] For example, in a protection method provided in at least one embodiment of this disclosure, in response to confirming that the backup information has not been stored in the first sub-area of the security chip, the device information record already stored in the first sub-area is automatically converted into backup information, and the programming device is directly granted read access to the security chip.
[0016] For example, in a protection method provided by at least one embodiment of this disclosure, in response to the device information being stored in the first sub-area, the encryption mechanism of the security chip is triggered, and
[0017] When the backup information is extracted from the first sub-region, the decryption mechanism of the security chip is triggered.
[0018] For example, in at least one embodiment of this disclosure, a protection method includes, but is not limited to, one or more of addition / subtraction algorithms, XOR algorithms, and shift algorithms.
[0019] At least one embodiment of this disclosure provides a security chip coupled to a programming device, comprising:
[0020] A storage unit is configured with a first storage area for storing basic information, the first storage area including:
[0021] The first sub-region can preload one or more backup information, each with different content and matched to a specific burning device;
[0022] The second sub-area, when the backup information is pre-stored in the first sub-area, writes the device information of the burning device.
[0023] A reading section is configured to acquire the device information of the programming device and store the device information in the second sub-area of the first storage area of the storage section, or
[0024] Configured to directly acquire the device information of the programming device and store the device information in the first sub-area of the first storage area of the storage portion; and
[0025] The comparison section is configured to compare and verify the backup information in the first sub-region with the device information in the second sub-region. If the comparison and verification are successful, the programming device obtains read permission for the security chip. If the comparison and verification fail, the programming device prohibits access to the security chip.
[0026] For example, in a security chip provided in at least one embodiment of this disclosure, the storage portion further includes:
[0027] The second storage area, configured to store operating program information, and
[0028] The third storage area is configured to store other information.
[0029] For example, in a security chip provided by at least one embodiment of this disclosure, the operation program information stored in the second storage area includes, but is not limited to, one or more of the following: write operation information, read operation information, clear operation information, encrypt operation information, and decrypt operation information;
[0030] The other information stored in the third storage area includes, but is not limited to, stack information, global data information, and code information.
[0031] For example, in a security chip provided in at least one embodiment of this disclosure, the first storage area and the third storage area are configured to be fully rewritable, the second storage area is configured to be partially rewritable, and the first storage area needs to obtain instruction authorization from the second storage area when implementing rewriting.
[0032] At least one embodiment of this disclosure provides a storage medium storing computer-executable instructions, which, when executed by a processor, implement the security chip data protection method described above.
[0033] The beneficial effects of this invention are as follows: Compared with the prior art, the data protection method for a secure chip described in this invention couples a secure chip to a programming device. 1. If the first sub-area of the first storage area of the secure chip stores one or more backup information, the device information of the programming device is read through the secure chip, and the device information is stored in the second sub-area of the first storage area of the secure chip; 2. If the first sub-area of the first storage area of the secure chip does not store the backup information, the device information of the programming device is read through the secure chip, and the device information is stored in the first sub-area of the first storage area of the secure chip. By determining whether a specified area of the secure chip's storage area stores backup information, it ensures whether the chip is brand new or has been used, and thus determines whether read / write permissions are granted to the programming device, thereby restricting other devices from cracking the chip.
[0034] The security chip of this invention can divide the storage area into three regions, each with a different priority level and function. Furthermore, some storage regions require instruction authorization from other storage regions to perform rewrite operations, effectively preventing external personnel from directly rewriting parts of the storage area and thus restricting the permission to rewrite parts of the storage area from the outside. Attached Figure Description
[0035] Figure 1 A flowchart illustrating the process of connecting chips to existing programming devices;
[0036] Figure 2 A flowchart illustrating a secure chip data protection method according to some embodiments of the present invention;
[0037] Figure 3 This is a schematic diagram illustrating the read / write permissions of a security chip obtained by a programming device provided in some embodiments of the present invention;
[0038] Figure 4 A schematic diagram of a security chip provided for some embodiments of the present invention;
[0039] Figure 5 This is a schematic diagram of a chip storage area provided for some embodiments of the present invention. Detailed Implementation
[0040] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0041] Unless otherwise defined, all terms (including technical and scientific terms) used in embodiments of this invention shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in a common dictionary shall be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and not as being interpreted in an idealized or highly formalized sense, unless expressly defined in this embodiment of the invention.
[0042] The terms "first," "second," and similar words used in the embodiments of this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "an," "a," or "the" do not indicate a quantity limitation, but rather indicate the presence of at least one. Similarly, terms such as "including" or "comprising" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The steps preceding or following the steps in the method of the embodiments of this invention are not necessarily performed precisely in sequence. Instead, various steps can be processed in reverse order or simultaneously. Furthermore, other operations can be added to these processes, or one or more steps can be removed from these processes.
[0043] As chip applications expand and cover various fields, such as automobiles, mobile terminals, printers, and their consumables—areas requiring smart hardware to achieve their purposes and functions—chips are ubiquitous. A chip is an integrated circuit composed of a large number of transistors. Different chips have different integration scales, ranging from hundreds of millions to tens or hundreds of transistors. Transistors have two states, on and off, represented by 1 and 0. Multiple transistors generate multiple 1 and 0 signals, which are configured to perform specific functions (i.e., instructions and data) to represent or process letters, numbers, colors, and graphics. When a chip is powered on, it first generates a startup instruction to start the chip, and then continuously accepts new instructions and data to complete its functions.
[0044] Before being mass-produced in smart hardware, chips undergo rigorous standard testing to ensure they can stably perform their intended functions and effects. This testing process requires a simulator connected to a computer. The computer sends the necessary test commands to the chip via a programming device, and simultaneously obtains the chip's specific parameters (such as clock speed, bus frequency, memory area, serial number, etc.) and read / write permissions using a calculator. These parameters and read / write permissions are crucial to the chip's security. This is especially true for security chips, which are used in logistics, anti-counterfeiting, financial transactions, car theft prevention, item tracking, and printers and consumables. If the chip's parameters and read / write permissions can be obtained through programming devices that conform to the MCU programming interface communication protocol, the security of the security chip's data transmission technology becomes very vulnerable. During transmission, user information can be easily compromised, rendering the security chip meaningless.
[0045] Figure 1 A flowchart illustrating the process of connecting chips to existing programming devices. (e.g.) Figure 1 As shown, in step S10: the chip is directly connected to the programming device; in step S20: the chip can obtain the device information of the programming device and store the device information of the programming device in the storage area of the chip; in step S30: the device information of the programming device is directly given the permission to read and write the chip. At this time, the programming device can directly read or write the data in the security chip, which makes it difficult to ensure the security of the data.
[0046] Figure 2 This is a flowchart illustrating a secure chip data protection method according to some embodiments of the present invention. To address the aforementioned problems, such as... Figure 2 As shown, the method includes:
[0047] S100, the security chip is connected to the programming device and reads the device information of the programming device.
[0048] S200 determines whether the first sub-area in the first storage area of the security chip stores backup information.
[0049] If so, execute S311 to store the device information of the currently programmed device in the second sub-area of the first storage area;
[0050] S312, compare the extracted backup information from the first sub-region with the extracted device information from the second sub-region;
[0051] If the comparison is successful, S313 is executed, and the programming device obtains read and write permissions for the security chip.
[0052] If the comparison fails, S314 is executed, and the security chip denies access to the programming device.
[0053] If not, then execute S321 to store the device information in the first sub-area of the first storage area of the security chip;
[0054] Then, by executing step S313, the programming device obtains read and write permissions for the security chip.
[0055] The security chip is divided into a first storage area, which includes a first sub-area and a second sub-area.
[0056] The first sub-area is designated as the permission-granted area. Specifically, any data stored in the first sub-area, particularly backup information, can directly gain read and write permissions to the security chip without further verification. The second sub-area is designated as the auto-rewrite area. Specifically, any data stored in the second sub-area, particularly information about the currently connected device, cannot gain read and write permissions to the security chip until the comparison verification is successful. As a preferred solution, if the comparison verification of the currently connected device information fails, the system can be configured to directly delete or erase the information, or it can be configured to delete or erase the information only after N or more repeated failed comparison verifications.
[0057] Protection methods include:
[0058] S100, the security chip is coupled to a programming device, and the programming device is coupled to a computer-readable storage medium:
[0059] If the first sub-area of the first storage area of the security chip stores one or more backup information.
[0060] The security chip reads the device information of the programming device and stores the device information in the second sub-area of the first storage area of the security chip;
[0061] For example, users can read and write information about security chips using devices other than programming devices in different scenarios. Besides using a programming device, users can also use a simulator. Specifically, when testing a security chip and needing a programmable chip—that is, within a permissible timeframe, changing the specific data structure by powering on the chip to achieve the desired function—a programming device can be used. When functional simulation is required, utilizing simulation software or the simulation function built into the compiler software, a simulator can be used. The specific device used depends on the user's requirements and the scenario. The following examples specifically illustrate reading and writing data information using a programming device.
[0062] If the first sub-area of the first storage area of the security chip does not store the backup information...
[0063] The security chip reads the device information of the programming device and stores the device information in the first sub-area of the first storage area of the security chip.
[0064] When the first sub-area, the authorized area of the first storage region in the security chip, does not store any backup information, the security chip is directly determined to be brand new. A brand new security chip can be defined as a security chip that has been manufactured and has never been used, or a security chip that has been used but all information in the first sub-area has been deleted or erased so that no backup information is stored.
[0065] The backup information is different from the device information. Specifically, 1. The original information extracted directly from the programming device by the security chip without conversion is retained as device information; 2. The original information extracted from the programming device is encrypted to obtain backup information.
[0066] Specifically, device information can be unique information or data that can identify the device, such as a unique identifier (UUID), serial number (SN), or identity identification number (ID), while backup information is hexadecimal data. Of course, depending on the needs, binary, decimal, or even 30-binary notation data can also be used as the backup information counting system.
[0067] For example, when one or more backup information is stored in the first sub-region of the first storage area of the security chip, the backup information is extracted from the first sub-region and compared with the device information in the second sub-region. This includes: if the comparison is successful, the programming device obtains read access to the security chip; if the comparison fails, the programming device prohibits access to the security chip. Before the comparison, the device information in the second sub-region needs to be converted into backup information through encryption, and its digital signals are arranged byte-by-byte. Specifically, when using hexadecimal (Hex) as the counting system and storing the converted configuration data as a 16-byte program string, the device information in the second sub-region is converted into comparison information, such as 0x00…0xFF forming the 16-byte program string, and compared with one or more backup information stored in the first sub-region as digital signals. This backup information is also composed of 16-byte program strings, such as 0x00…0xFF forming the 16-byte program string. The verification process involves comparing the first byte (0x00) of the comparison information with the first byte (0x00) of the backup information, then comparing the second byte (0x11) of the comparison information with the second byte (0x11) of the backup information, and so on, until the sixteenth byte (0xFF) of the comparison information is compared with the sixteenth byte (0xFF) of the backup information. Only when all 16 bytes of the comparison information and the 16 bytes of the backup information are completely matched is the verification considered successful, and the security chip grants the current programming device read and write permissions. If any byte fails to match, the verification is considered unsuccessful, and the programming device cannot obtain read and write permissions to the security chip.
[0068] Figure 3 This is a schematic diagram illustrating the read / write permissions of a security chip obtained by a programming device provided in some embodiments of the present invention. For example... Figure 3 As shown, read permissions include reading data from a specified storage area, writing data to a specified storage area, real-time simulation and debugging, and resetting device information of the burning device.
[0069] For example, when the backup information is no longer stored in the first sub-area of the security chip, the device information records already stored in the first sub-area are automatically converted into backup information, and the programming device directly gains read access to the security chip. Specifically, the conversion of device information involves converting the original information extracted from the programming device into backup information through encryption operations by the security chip, while the device information is directly deleted. This saves storage space in the first sub-area, allowing limited storage space to be released promptly and effectively without requiring user deletion.
[0070] For example, when device information is stored in the first sub-area, the encryption mechanism of the secure chip is triggered, where the encryption mechanism includes an addition encryption algorithm, an XOR encryption algorithm, and a shift encryption algorithm, where it is assumed that y is the encryption result and x is the decryption result.
[0071] When the addition encryption algorithm is used, y=x+a, where a is a random number set by the secure chip;
[0072] When the XOR encryption algorithm is used, y=x^b, where b is a random number set by the secure chip;
[0073] When the shift encryption algorithm is used, y=x<<c, where c is a random number set by the secure chip;
[0074] Correspondingly, when the backup information is extracted from the first sub-area, the decryption mechanism of the secure chip is triggered, where the decryption mechanism includes an addition decryption algorithm, an XOR decryption algorithm, and a shift decryption algorithm, where it is assumed that y is the encryption result and x is the decryption result.
[0075] When the addition decryption algorithm is used, x=y-a, where a is a random number set by the secure chip;
[0076] When the XOR decryption algorithm is used, x=y^b, where b is a random number set by the secure chip;
[0077] When the shift decryption algorithm is used, x=y>>c, where c is a random number set by the secure chip;
[0078] Of course, these three encryption and decryption methods can be used individually or in combination. For example, when the addition-subtraction algorithm and the XOR algorithm are used in combination, assuming y is the encryption result, is the first decryption result, is the second decryption result.
[0079] When the addition and XOR encryption algorithms are used, the encryption algorithm is first y= +d, d= ^e; when the subtraction and XOR decryption algorithms are used, the decryption algorithm is first =y-d, =d^e, where d is the result of the XOR encryption algorithm, and e is a random number set by the secure chip;
[0080] In summary, for example, for detailed descriptions of manners such as 1. combination of the addition-subtraction algorithm, the XOR algorithm and the shift algorithm; 2. combination of the addition-subtraction algorithm and the shift algorithm; 3. combination of the XOR algorithm and the shift algorithm, reference may be made to the related description of the encryption and decryption method combining the addition-subtraction algorithm and the XOR algorithm in the foregoing embodiments, and repeated parts will not be described again.
[0081] Compared with existing technologies, the data protection method for a secure chip in this invention couples a secure chip to a programming device. 1. If the first sub-area of the first storage area of the secure chip stores one or more backup information, the device information of the programming device is read through the secure chip, and the device information is stored in the second sub-area of the first storage area of the secure chip; 2. If the first sub-area of the first storage area of the secure chip does not store the backup information, the device information of the programming device is read through the secure chip, and the device information is stored in the first sub-area of the first storage area of the secure chip. By determining whether a specified area of the secure chip's storage area stores backup information, it ensures whether the chip is brand new or has been used, and thus determines whether read / write permissions are granted to the programming device, thereby restricting other devices from cracking the chip.
[0082] Figure 4 This is a schematic diagram of a security chip provided for some embodiments of the present invention. For example... Figure 4 As shown, in a preferred embodiment, the present invention also provides a security chip 10, coupled to a programming device, comprising:
[0083] A storage unit 101 is configured with a first storage area for storing basic information, the first storage area including:
[0084] The first sub-region can preload one or more backup information, each with different content and matched to a specific burning device;
[0085] The second sub-area, when the backup information is pre-stored in the first sub-area, writes the device information of the burning device.
[0086] A reading section 102 is configured to acquire the device information of the programming device and store the device information in the second sub-area of the first storage area of the storage section 101, or
[0087] Configured to directly acquire the device information of the programming device and store the device information in the first sub-area of the first storage area of the storage portion 101; and
[0088] A comparison section 103 is configured to compare and verify the backup information of the first sub-region with the device information of the second sub-region. If the comparison and verification is successful, the programming device obtains read permission for the security chip 10. If the comparison and verification fails, the programming device prohibits access to the security chip 10.
[0089] The first sub-area of the storage portion 101 is set as a region with granted permissions, and the second sub-area is set as a region that can be automatically rewritten. The functions and roles of the first and second sub-areas are the same as those described in the above embodiments, and the repetitions will not be repeated.
[0090] It should be noted that the second sub-area can be regarded as a storage area for temporary data caching. In the initial design of the security chip 10, the cache value, time and conditions for triggering data clearing of the data in the second sub-area can be set. For example, if the cache value is set to 1024 bytes, when the data information in the second sub-area reaches the set cache value of 1024 bytes, the data clearing instruction is directly triggered. The security chip 10 directly erases all data information located in the second sub-area. At the same time, the time for triggering the data clearing instruction can also be set to one hour, one day, one week, one month or one year. It can also be set to trigger the data clearing instruction as long as the device information stored in the second sub-area is ten records.
[0091] It should be noted that the security chip 10 is of course equipped with a processing and computing section, a power management section, and a serial port connection section, etc. However, the inventive point in this invention is specifically the division of the storage area and the data comparison and authorization based on the division of the storage area, while the processing and computing section, power management section, and serial port connection section can be implemented using existing technologies.
[0092] For example, storage section 101 further includes: a second storage area configured for storing operating procedure information, and
[0093] The third storage area is configured to store other information.
[0094] Figure 5 This is a schematic diagram of a chip storage region provided for some embodiments of the present invention. For example... Figure 5 As shown, the chip's storage area, also known as the storage section, contains a basic information area, also known as the first storage area; an operating program information area, also known as the second storage area; and other information areas, also known as the third storage area.
[0095] The operation program information stored in the second storage area includes, but is not limited to, one or more of write operation information, read operation information, clear operation information, encryption operation information, and decryption operation information; the other information stored in the third storage area includes, but is not limited to, stack information, global data information, and code information. The write operation information, read operation information, clear operation information, encryption operation information, and decryption operation information of the operation program information can be understood as write operation instructions, read operation instructions, clear operation instructions, encryption operation instructions, and decryption operation instructions.
[0096] It should be noted that the first storage area is configured to store basic information, and its read and write functions are restricted, meaning that read and write operations can be performed through the program in the second storage area;
[0097] The second storage area is configured to store operating program information, which is used to store the program for operating the storage device information. This area is a read-write protected area, and the relevant programs are only written during the production of the security chip. After the chip is produced, it is impossible to read or write to this area. However, under exceptional circumstances, only the clear operation information can be executed with the user having read and write permissions, and only the information in the first storage area can be cleared. It is not possible to clear other program information in the second storage area.
[0098] The third storage area is configured as an unrestricted area, allowing all users to perform control operations within its area.
[0099] It should be noted that writing operation information specifically involves writing data into the basic information area; reading operation information specifically involves reading data from the basic information area; clearing operation information involves clearing the basic information area and resetting operation-related flag information; encrypting operation information involves encrypting the device information; and decrypting operation information involves decrypting the encrypted device information.
[0100] For example, the first and third storage areas are configured to be fully rewritable, while the second storage area is configured to be partially rewritable. Furthermore, the first storage area requires authorization from the second storage area to perform any rewriting. Specifically, it can be seen that the second storage area has a higher priority than the first and third storage areas. The first and third storage areas can be rewritten, meaning the basic information area and the operating program information area can be rewritten, but this requires authorization from the second storage area (i.e., the operating program information area). This prevents unauthorized personnel from arbitrarily rewriting the basic information area and the operating program information area, thereby enhancing the data protection strength of the security chip.
[0101] The security chip of this invention can divide the storage area into three regions, each with a different priority level and function. Furthermore, some storage regions require instruction authorization from other storage regions to perform rewrite operations, effectively preventing external personnel from directly rewriting parts of the storage area and thus restricting the permission to rewrite parts of the storage area from the outside.
[0102] As a preferred embodiment, the present invention also provides a computer-readable storage medium storing computer-executable instructions, wherein the security chip data protection method of the above embodiment is performed when the processor executes the computer-executable instructions.
[0103] The aforementioned computer-readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.
[0104] Specifically, a readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an application-specific integrated circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.
[0105] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.
[0106] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. The scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A method for protecting data on a security chip, wherein the security chip is coupled to a programming device, and the programming device is coupled to a computer-readable storage medium, wherein, The security chip is divided into a first storage area, which includes a first sub-area and a second sub-area. The protection method includes: The device information of the programming device is read through the security chip. Determine whether the first sub-area in the first storage area of the security chip stores backup information; If the first sub-area of the first storage area of the security chip does not store the backup information, the device information is stored in the first sub-area of the first storage area of the security chip, and the device information record already stored in the first sub-area is automatically converted into backup information, and the programming device is directly granted read access to the security chip. If the first sub-area of the first storage area of the security chip stores at least one copy of backup information, the device information is stored in the second sub-area of the first storage area of the security chip. In response to confirmation that one or more backup information has been stored in the first sub-area, the backup information in the first sub-area is extracted and compared with the device information in the second sub-area; If the comparison is successful, the programming device obtains read permission for the security chip; If the comparison fails, the programming device will be prohibited from accessing the security chip.
2. The protection method as described in claim 1, characterized in that, In response to the device information being stored in the first sub-area, the encryption mechanism of the security chip is triggered, and When the backup information is extracted from the first sub-region, the decryption mechanism of the security chip is triggered.
3. The protection method as described in claim 2, characterized in that, The encryption and / or decryption mechanisms include, but are not limited to, one or more of the following: addition / subtraction algorithms, XOR algorithms, and bit shift algorithms.
4. A security chip coupled to a programming device, characterized in that, include: A storage unit is configured with a first storage area for storing basic information, the first storage area including: The first sub-region can preload one or more backup information, each with different content and matched to a specific burning device; The second sub-area, when the backup information is pre-stored in the first sub-area, writes the device information of the burning device. A reading section is configured to acquire the device information of the programming device and store the device information in the second sub-area of the first storage area of the storage section, or Configured to directly acquire the device information of the programming device and store the device information in the first sub-area of the first storage area of the storage portion; and The comparison section is configured to compare and verify the backup information in the first sub-region with the device information in the second sub-region. If the comparison and verification are successful, the programming device obtains read permission for the security chip. If the comparison and verification fail, the programming device prohibits access to the security chip.
5. The security chip as described in claim 4, characterized in that, The storage section also includes: The second storage area, configured to store operating program information, and The third storage area is configured to store other information.
6. The security chip as described in claim 5, characterized in that, The operation program information stored in the second storage area includes, but is not limited to, one or more of the following: write operation information, read operation information, clear operation information, encrypt operation information, and decrypt operation information; The other information stored in the third storage area includes, but is not limited to, stack information, global data information, and code information.
7. The security chip as described in any one of claims 5-6, characterized in that, The first storage area and the third storage area are configured to be fully rewritable, the second storage area is configured to be partially rewritable, and the first storage area needs to obtain instruction authorization from the second storage area when it is rewritten.
8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by the processor, implement the security chip data protection method as described in any one of claims 1 to 3.
Citation Information
Patent Citations
Burnt file protection method, burnt file burning method and device, storage medium and equipment
CN110489959A