Method of forming a semiconductor device

Abstract

The application discloses a method for forming a semiconductor device, comprising: S01, providing a substrate, the substrate is provided with a conductive plug, the conductive plug is located in a groove formed by adjacent insulating side wall layers; S02, placing the substrate in a first reaction cavity; S03, forming a first metal layer covering at least the surface of the conductive plug in the first reaction cavity; S04, performing a first heat treatment in the first reaction cavity, part of the first metal layer on the top of the conductive plug is heat-reacted with the conductive plug to form a first metal silicide; S05, continuously forming a second metal layer on the surface of the substrate in the first reaction cavity after the first heat treatment; S06, performing a second heat treatment, the first metal layer on the top of the conductive plug is sufficiently heat-reacted with the conductive plug to form a second metal silicide. The application can optimize the conductive performance of the obtained semiconductor structure.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically to a method for forming a semiconductor device. Background Technology

[0002] Semiconductor structures such as memory and / or transistors typically incorporate conductive plugs. Contact structures can be formed on the surface of these conductive plugs, and the combination of the conductive plugs and the contact structures on their surfaces enables interconnection between different layers within the corresponding semiconductor structure. The inventors have discovered that contact structures formed using conventional methods often suffer from poor conductivity. Summary of the Invention

[0003] In view of this, this application provides a method for forming a semiconductor device to solve the problem of poor conductivity in the contact structure formed by conventional methods.

[0004] This application provides a method for forming a semiconductor device, comprising:

[0005] S01, a substrate is provided, wherein a conductive plug is provided in the substrate, and the conductive plug is located in a groove formed by adjacent insulating sidewall layers;

[0006] S02, place the substrate into the first reaction chamber;

[0007] S03, a first metal layer is formed in the first reaction chamber that at least covers the surface of the conductive plug;

[0008] S04, a first heat treatment is performed in the first reaction chamber, and a portion of the first metal layer at the top of the conductive plug undergoes a thermal reaction with the conductive plug to form a first metal silicide;

[0009] S05, after the first heat treatment, a second metal layer continues to be formed on the substrate surface in the first reaction chamber;

[0010] S06, a second heat treatment is performed, in which the first metal layer on the top of the conductive plug undergoes a thermal reaction with the conductive plug to form a second metal silicide.

[0011] Optionally, the method of continuing to form a second metal layer on the substrate surface in the first reaction chamber after the first heat treatment further includes: depositing a second metal layer on the substrate surface after the first heat treatment, such that the second metal layer at least covers the first metal silicide.

[0012] Optionally, the temperature of the substrate surface is lower than the temperature of the first heat treatment when the second metal layer deposition process is formed.

[0013] Optionally, prior to the second heat treatment, the forming method further includes removing the second metal layer and the first metal layer covering the insulating sidewall layer.

[0014] Optionally, the thickness of the second metal layer is less than the thickness of the first metal layer.

[0015] Optionally, the thickness of the second metal layer ranges from 1 nm to 5 nm.

[0016] Optionally, the second heat treatment step is performed in a second reaction chamber, and the first reaction chamber is different from the second reaction chamber.

[0017] Optionally, the second metal layer of the semiconductor device may be exposed to the atmospheric environment before the second heat treatment step.

[0018] Optionally, the method of continuing to form a second metal layer on the substrate surface in the first reaction chamber after the first heat treatment further includes: sputtering a second metal onto the top of the insulating sidewall layer to form a second metal layer covering the top of the insulating sidewall layer and connected above a groove between the insulating sidewall layers, wherein the second metal layer has a gap with the bottom of the groove.

[0019] Optionally, prior to the second heat treatment, the forming method further includes removing the second metal layer and the first metal layer covering the insulating sidewall layer.

[0020] Optionally, the forming method further includes: removing the second metal layer and the first metal layer remaining after the second heat treatment.

[0021] Optionally, the temperature of the first heat treatment process is lower than the temperature of the second heat treatment process.

[0022] Optionally, the temperature range of the first heat treatment process includes 300°C to 400°C; the temperature range of the second heat treatment process includes 500°C to 700°C.

[0023] Optionally, the material of the first metal layer includes at least one of cobalt, titanium, nickel and manganese; and / or, the material of the second metal layer includes at least one of cobalt, titanium, nickel and manganese.

[0024] Optionally, the first metal layer and the second metal layer are made of the same material.

[0025] Optionally, the conductive plug may be made of polycrystalline silicon or doped polycrystalline silicon.

[0026] The aforementioned semiconductor device formation method involves forming a second metal layer on the substrate surface within a first reaction chamber to prevent the first metal layer from contacting a large amount of atmospheric air. This prevents excessive oxidation of the first metal layer by atmospheric oxygen, allowing the semiconductor device covered by the second metal layer to be placed in the relevant reaction chamber or in the atmosphere for extended periods, thus improving the flexibility of the semiconductor device formation process. A second heat treatment is then performed to allow the first metal layer on top of the conductive plug to undergo a sufficient thermal reaction to obtain a second metal silicide, forming the contact structure on the conductive plug surface and providing the corresponding interconnection function. Because the first metal layer is covered by the second metal layer before the second heat treatment, it is effectively protected from oxidation by atmospheric air. Consequently, the resulting second metal silicide has a low oxide content and correspondingly low resistivity, resulting in a contact structure with good conductivity and optimized interconnection performance. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1a , Figure 1b and Figure 1c This is a schematic diagram of conductive plugs and related structures in a semiconductor device.

[0029] Figure 2 This is a flowchart of a method for forming a semiconductor device according to an embodiment of this application;

[0030] Figure 3a , Figure 3b , Figure 3c , Figure 3d , Figure 3e , Figure 3f , Figure 3g and Figure 3h This is a schematic diagram of the structure obtained in each step of an embodiment of this application;

[0031] Figure 4 This is a schematic diagram of the structure obtained by the relevant steps in one embodiment of this application;

[0032] Figure 5 This is a schematic diagram of the structure obtained by the relevant steps in one embodiment of this application;

[0033] Figure 6 This is a schematic diagram of the structure obtained by the relevant steps in one embodiment of this application;

[0034] Figure 7a and Figure 7b This is a schematic diagram of the structure obtained by the relevant steps in one embodiment of this application. Detailed Implementation

[0035] The inventors discovered that in semiconductor devices, reference Figure 1a As shown, conductive plugs are typically disposed within recesses in semiconductor structures, with the recesses located between two adjacent insulating sidewall layers, such as... Figure 1a As shown, the insulating sidewall layer is columnar. Some designs form a metal layer on the surface of the conductive plug, see reference [reference]. Figure 1b As shown, the metal layer undergoes heat treatment such as annealing, causing it to react with the conductive plug to form a metal silicide. This metal silicide then forms the contact structure on the surface of the conductive plug. (Refer to...) Figure 1c As shown. The inventors studied the process of forming the contact structure and found that the process chamber for forming the metal layer and the process chamber for heat treatment are often different process chambers. After the semiconductor structure forms the metal layer, it needs to be transferred from one process chamber to another for heat treatment and other processes. During the above process, the metal layer on the surface of the conductive plug will be exposed to the air for a long time, which will cause the metal layer to be oxidized by oxygen in the air to a certain extent. As a result, the metal silicide obtained later will include a metal oxide layer with high resistivity, which will result in high resistivity of the corresponding contact structure and poor conductivity.

[0036] To address the aforementioned issues, this application first forms a second metal layer on the substrate surface to prevent the first metal layer from coming into contact with a large amount of atmosphere, thus preventing excessive oxidation of the first metal layer by atmospheric oxygen. This allows the semiconductor device covered by the second metal layer to be placed in the relevant reaction chamber or in the atmosphere for an extended period, improving the flexibility of the semiconductor device formation process. Then, a second heat treatment is performed to allow the first metal layer on top of the conductive plug to undergo a full thermal reaction, resulting in a second metal silicide. This forms the contact structure on the conductive plug surface, providing the corresponding interconnection function. Because the first metal layer is covered by the second metal layer before the second heat treatment, it is effectively protected from oxidation by atmospheric oxygen. Consequently, the resulting second metal silicide has a low oxide content and low resistivity, resulting in a contact structure with good conductivity.

[0037] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.

[0038] This application provides a method for forming a semiconductor device in its first aspect, with reference to... Figure 2 As shown, the formation method includes S01 to S06.

[0039] S01, Reference Figure 3a As shown, a substrate 210 is provided, and a conductive plug 211 is provided in the substrate. The conductive plug 211 is located in a groove 213 formed by adjacent insulating sidewall layers 212.

[0040] Specifically, the substrate 210 may also include interconnect objects (not shown) that need to be interconnected with other devices, such as electrodes, bit lines, and / or other functional regions. In one embodiment, reference... Figure 3b As shown, the substrate 210 may include an active region 215 and an isolation region 214. The active region 215 can form corresponding functional regions within the substrate 210, and the isolation region 214 can be an STI (shallow trench) isolation structure, which can isolate each active region. The conductive plug 211 contacts the active region 215 and the isolation region 214 respectively, so that the conductive plug 211 can independently contact the corresponding active region 215, electrically leading out the corresponding active region 215. Specifically, as... Figure 3b As shown, adjacent conductive plugs 211 are in contact with isolation regions 214 at their close proximity and with active regions 215 at their far distance from each other, so that the arrangement of active regions 215 and isolation regions 214 is more regular, which can further ensure the stability of the corresponding interconnect features.

[0041] The conductive plug 211 may be formed by filling the groove 213 with conductive material and / or semiconductor material. The groove 213 may be elongated or through-hole shaped. The conductive plug 211 may also contact at least one interconnect object to provide an interconnect interface for the contacted interconnect object, so that other devices can be interconnected with the interconnect object through the conductive plug 211. The interconnect object may include a doped region (such as an active region 215) located in the substrate 210, and the conductive plug 211 may be formed on the surface of the doped region in the substrate 210 for electrically leading out the doped region.

[0042] Optionally, the conductive plug 211 is made of polycrystalline silicon, doped polycrystalline silicon, or other silicon-containing conductive materials. Optionally, the conductive plug 211 is made of polycrystalline silicon to give it good conductivity, and through an annealing process, it can react with the metal layer 221 on top to form a first metal silicide 222.

[0043] Optionally, refer to Figure 3c As shown, a portion of the upper side of the conductive plug 211 is opposite to and in contact with the insulating sidewall layer 212.

[0044] In one embodiment, prior to step S01, the above-mentioned formation method may further include: cleaning the substrate 210 to remove impurities from the surface of the substrate 210 and improve the quality of the structure formed by subsequent processes.

[0045] S02, place the substrate 210 into the first reaction chamber.

[0046] S03, a first metal layer 221 is formed in the first reaction chamber, at least covering the surface of the conductive plug 211, such as... Figure 3d As shown.

[0047] Specifically, step S03 described above can be performed using processes such as sputtering deposition to form the first metal layer 221. The first metal layer 221 can conformally cover the substrate 210, i.e., as shown in the figure. Figure 3d As shown, the first metal layer 221 covers the surface of the conductive plug 211 and also covers the insulating sidewall layers 212 on both sides of the groove 213. The shape characteristics of the substrate 210 surface remain basically consistent before and after the formation of the first metal layer 221.

[0048] Optionally, the material of the first metal layer 221 includes at least one of cobalt, titanium, nickel and manganese, so that the subsequently formed metal silicide has good conductivity and stability.

[0049] S04, a first heat treatment is performed in the first reaction chamber, such as... Figure 3e As shown, a portion of the first metal layer 221 at the top of the conductive plug 211 undergoes a thermal reaction with the conductive plug 211 to form a first metal silicide 222.

[0050] Optionally, the temperature range of the first heat treatment process includes 300°C to 400°C. Optionally, the first heat treatment may employ heat treatment processes such as annealing.

[0051] S05, Reference Figure 3f and Figure 3g As shown, after the first heat treatment, a second metal layer 230 continues to be formed on the surface of the substrate 210 in the first reaction chamber.

[0052] The second metal layer 230 is used to prevent air from entering the groove 213, or to prevent a large amount of air from contacting the first metal layer 221, thereby preventing the first metal layer 221 from being excessively oxidized by oxygen in the atmosphere. Optionally, such as Figure 3f As shown, the second metal layer 230 covers the top of each insulating sidewall layer 212 to prevent atmospheric air from entering the groove 213. Optionally, as... Figure 3g As shown, the second metal layer 230 can also cover the surface of the first metal layer 221 to prevent the atmosphere from contacting the first metal layer 221.

[0053] Optionally, the material of the second metal layer 230 includes at least one of cobalt, titanium, nickel, and manganese.

[0054] Optionally, the first metal layer 221 and the second metal layer 230 are made of the same material, so that the corresponding structure is formed by using the same material, which helps to simplify the relevant process.

[0055] S06, undergo a second heat treatment, such as Figure 3h As shown, the first metal layer 221 on the top of the conductive plug 211 undergoes a thermal reaction with the conductive plug 211 to form a second metal silicide 223, thereby forming a contact structure on the surface of the conductive plug 211 and providing corresponding interconnection functions.

[0056] Optionally, the temperature of the first heat treatment process is lower than the temperature of the second heat treatment process, so that the first metal layer 221 on the top of the conductive plug 211 can undergo a more sufficient thermal reaction during the second heat treatment process to obtain the second metal silicide 223 and improve the quality of the obtained second metal silicide 223.

[0057] Optionally, the temperature range of the second heat treatment process includes 500°C to 700°C to ensure that the first metal layer 221 on the top of the conductive plug 211 fully reacts with the corresponding conductive plug 211 to obtain the second metal silicide 223. Optionally, the second heat treatment process can employ annealing or other processes that enable the conductive plug 211 to react with the first metal layer 221 on top to generate the corresponding second metal silicide 223.

[0058] Optionally, the second heat treatment step is performed in a second reaction chamber, and the first reaction chamber is different from the second reaction chamber. In this case, the substrate 210 needs to be moved from the first reaction chamber to the second reaction chamber for the second heat treatment. During this process, it is difficult to avoid contact with the atmospheric environment, and the exposed metal layer is easily oxidized by gases with oxidizing capabilities, such as oxygen in the atmosphere. In this embodiment, the substrate first has a second metal layer 230 covering the surface of the substrate 210 within the first reaction chamber. This can prevent excessive atmospheric contact with the first metal layer 221, which needs to form a contact structure, thereby preventing the first metal layer 221 from being oxidized by gases with oxidizing capabilities, such as oxygen in the atmosphere. Furthermore, by covering the surface of the substrate 210 with a second metal layer 230 within the first reaction chamber, the second metal layer 230 can block excessive atmospheric contact with the first metal layer 221 and other structures on the surface of the substrate 210 for a longer period of time. This allows the substrate 210 to be placed in the second reaction chamber without immediate need for relocation. In other words, the duration for which the substrate 210 is placed in the atmospheric environment outside the first and / or second reaction chambers is more flexible, thereby improving the flexibility of the corresponding semiconductor device fabrication process.

[0059] Optionally, before performing the second heat treatment step, the second metal layer 230 of the semiconductor device will come into contact with the atmospheric environment. At this time, the second metal layer 230 can block the atmosphere from entering the groove 213 or prevent the atmosphere from contacting the first metal layer 221, thereby preventing the first metal layer 221 from being oxidized.

[0060] The method for forming the semiconductor device described above involves placing a substrate 210 within a first reaction chamber, forming a first metal layer 221 that at least covers the surface of a conductive plug 211 within the first reaction chamber, performing a first heat treatment within the first reaction chamber to thermally react a portion of the first metal layer 221 at the top of the conductive plug 211 to obtain a first metal silicide 222, and then forming a second metal layer 230 on the surface of the substrate 210 within the first reaction chamber to prevent the first metal layer 221 from contacting a large amount of atmosphere and to prevent the first metal layer 221 from being excessively oxidized by oxygen in the atmosphere, thus allowing the semiconductor device covered by the second metal layer 230 to be placed in the environment for an extended period of time. The reaction chamber or atmosphere can improve the flexibility of the semiconductor device formation process. Then, a second heat treatment is performed to allow the first metal layer 221 on the top of the conductive plug 211 to undergo a full thermal reaction to obtain a second metal silicide 223, so as to form a contact structure on the surface of the conductive plug 211 and provide the corresponding interconnection function. Since the first metal layer 221 is covered by the second metal layer 230 before the second heat treatment or the full thermal reaction to obtain the second metal silicide 223, it can avoid oxidation in the atmosphere. Therefore, the final second metal silicide 223 has a low oxide content, a low resistivity, and good conductivity.

[0061] In one embodiment, the method of continuing to form a second metal layer 230 on the surface of the substrate 210 in the first reaction chamber after the first heat treatment further includes: depositing a second metal layer 231 on the surface of the substrate 210 after the first heat treatment, such as... Figure 4 As shown, the second metal layer 231 at least covers the first metal silicide 222 to prevent the remaining first metal layer 221 on the surface of the first metal silicide 222 from contacting the atmospheric environment, thereby preventing this portion of the first metal layer 221 from being oxidized. Optionally, in this embodiment, the second metal layer 231 can be formed using a deposition process. Optionally, as... Figure 4 As shown, the second metal layer 231 can also cover other parts of the first metal layer 221, such as conformally covering the first metal layer 221.

[0062] Optionally, the temperature of the substrate surface is lower than the temperature of the first heat treatment when the second metal layer 231 is deposited. For example, a cold deposition process can be used to form the second metal layer 231 so that the first metal layer 221 and conductive plug 211 and other structures will not undergo other reactions during the formation of the second metal layer 231, thereby improving the stability of the related structures.

[0063] Optionally, the thickness of the second metal layer 231 is less than the thickness of the first metal layer 221. While preventing the atmosphere from contacting the first metal layer 221, the formation process of the second metal layer 231 can be simplified, the material for forming the second metal layer 231 can be saved, and the difficulty of removing the second metal layer 231 can be reduced, thereby improving the efficiency of related processes and saving process costs.

[0064] Optionally, the thickness of the second metal layer 231 ranges from 1 nm to 5 nm. For example, the thickness of the second metal layer 231 can be 1 nm, 3 nm, and 5 nm, etc., which can ensure the corresponding blocking effect and simplify the difficulty of forming the second metal layer 231 as much as possible.

[0065] In one example, prior to the second heat treatment, the forming method further includes: removing the second metal layer 231 and the first metal layer 221 covering the insulating sidewall layer 212, to obtain as shown. Figure 5 The structure shown allows only the first metal layer 221 on the surface of the conductive plug 211 to react thermally with the corresponding conductive plug 211 during the second heat treatment process, thereby improving the processing efficiency of the second heat treatment process.

[0066] In one embodiment, the method of continuing to form a second metal layer 230 on the surface of the substrate 210 within the first reaction chamber after the first heat treatment further includes: sputtering a second metal onto the top of the insulating sidewall layer 212, such as... Figure 6 As shown, a second metal layer 232 is formed covering the top of the insulating sidewall layer 212 and connected above the groove between the insulating sidewall layers 212. A gap exists between the second metal layer 232 and the bottom of the groove 213. In this way, the second metal layer 232 can block ambient gases such as air from entering the groove 213, thereby preventing excessive air from contacting the first metal layer 221 on the surface of the conductive plug 211, and achieving the purpose of preventing the first metal layer 221 from being oxidized.

[0067] Optionally, the width of the groove 213 is less than or equal to a predetermined width, and the thickness of the second metal layer 232 can be determined based on the width of the groove 213 to ensure that the second metal sputtered onto the top of the insulating sidewall layer 212 can cover the top of the insulating sidewall layer 212 and connect above the groove between the insulating sidewall layers 212. Optionally, the width of the groove 213 can be 25 nm, and the thickness of the second metal layer 232 can range from 12 nm to 15 nm, etc. For example, the thickness of the second metal layer 232 can be 12 nm, 14 nm, or 15 nm.

[0068] Optionally, prior to the second heat treatment, the forming method further includes: removing the second metal layer 232 and the first metal layer 221 covering the insulating sidewall layer 212, to obtain as shown in the figure. Figure 5 The structure shown allows only the first metal layer 221 on the surface of the conductive plug 211 to react thermally with the corresponding conductive plug 211 during the second heat treatment process, thereby improving the processing efficiency of the second heat treatment process.

[0069] In one embodiment, the forming method further includes: removing the remaining second metal layer 230 and first metal layer 221 after the second heat treatment, to obtain as shown in the figure. Figure 7a and Figure 7b The semiconductor device shown retains a second metal silicide 223, formed by the full reaction of the first metal layer 221, as the contact structure on the surface of the conductive plug 211. Wherein, Figure 7b In the middle, a portion of the upper side of the conductive plug 211 is opposite to the insulating sidewall layer 212, and the conductive plug 211 is in contact with the insulating sidewall layer 212.

[0070] In the above method for forming semiconductor devices, a second metal layer 230 is formed on the surface of the substrate 210 in the first reaction chamber to prevent the first metal layer 221 from contacting a large amount of atmosphere and to prevent the first metal layer 221 from being excessively oxidized by oxygen in the atmosphere. This allows the semiconductor device covered by the second metal layer 230 to be placed in the relevant reaction chamber or in the atmosphere for a long time, which can improve the flexibility of the semiconductor device formation process. Then, a second heat treatment is performed to allow the first metal layer 221 on the top of the conductive plug 211 to undergo a full thermal reaction to obtain a second metal silicide 223, which forms the contact structure on the surface of the conductive plug 211 and provides the corresponding interconnection function. Since the first metal layer 221 is covered by the second metal layer 230 before the second heat treatment, it can be effectively prevented from being oxidized by the atmosphere. Therefore, the second metal silicide 223 obtained in the end has a low oxide content and a low resistivity. As a result, the contact structure formed has good conductivity and the interconnection performance is optimized.

[0071] In some application examples, the semiconductor device described above can be a memory or a part of a memory structure. The conductive plug 211 can include a bit line plug for connecting bit lines. The contact structure corresponding to the bit line plug has low resistivity, which can improve the interconnection performance of the bit line plug and thus optimize the performance of the corresponding memory.

[0072] Although this application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on a reading and understanding of this specification and drawings. This application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the aforementioned components, the terminology used to describe such components is intended to correspond to any component (unless otherwise indicated) that performs the specified function of said component (e.g., is functionally equivalent to it), even if it is not necessarily structurally equivalent to the disclosed structure that performs the functions in the exemplary implementations of this specification shown herein.

[0073] That is, the above description is only an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, such as the combination of technical features between different embodiments, or direct or indirect application in other related technical fields, are similarly included within the patent protection scope of this application.

[0074] Furthermore, it should be understood that in the description of this application, the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Additionally, for structural elements with the same or similar characteristics, this application may use the same or different reference numerals for identification. Moreover, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0075] In this application, the term "exemplary" is used to mean "serving as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as more preferred or advantageous than other embodiments. This application has been provided above to enable any person skilled in the art to implement and use it. Various details have been set forth in the above description for purposes of explanation. It should be understood that those skilled in the art will recognize that this application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed herein.

Claims

1. A method of forming a semiconductor device, characterized by, The forming method comprises: S01, providing a substrate, the substrate is provided with a conductive plug, the conductive plug is located in a groove formed by adjacent insulating side wall layers; S02, placing the substrate in a first reaction cavity; S03, forming a first metal layer covering at least a surface of the conductive plug in the first reaction cavity; S04, performing a first heat treatment in the first reaction cavity, a part of the first metal layer on the top of the conductive plug is in thermal reaction with the conductive plug to form a first metal silicide; S05, continuing to form a second metal layer on the surface of the substrate in the first reaction cavity after the first heat treatment, the second metal layer has a gap with the bottom of the groove; S06, performing a second heat treatment, the first metal layer on the top of the conductive plug is in sufficient thermal reaction with the conductive plug to form a second metal silicide; The method of continuing to form a second metal layer on the surface of the substrate in the first reaction cavity after the first heat treatment further comprises: sputtering a second metal on the top of the insulating side wall layer to form a second metal layer covering the top of the insulating side wall layer and connected above the groove between the insulating side wall layers.

2. The method of forming a semiconductor device according to claim 1, wherein The method of continuing to form a second metal layer on the surface of the substrate in the first reaction cavity after the first heat treatment further comprises: Depositing a second metal layer on the surface of the substrate after the first heat treatment, so that the second metal layer covers at least the first metal silicide.

3. The method of forming a semiconductor device according to claim 2, wherein The temperature of the substrate surface during the deposition process of the second metal layer is lower than the temperature of the first heat treatment.

4. The method of forming a semiconductor device according to Claim 1, wherein Before the second heat treatment is performed, the forming method further comprises: Removing the second metal layer and the first metal layer covering the insulating side wall layer.

5. The method of claim 2, wherein The thickness of the second metal layer is less than the thickness of the first metal layer.

6. The method of forming a semiconductor device according to claim 2, wherein The thickness of the second metal layer ranges from 1 nm to 5 nm.

7. The method of forming a semiconductor device according to Claim 1, wherein The second heat treatment is performed in a second reaction cavity, and the first reaction cavity is different from the second reaction cavity.

8. The method of forming a semiconductor device of claim 1, wherein, Before the second heat treatment is performed, the second metal layer of the semiconductor device is in contact with the atmosphere.

9. The method of forming a semiconductor device of claim 1, wherein, The forming method further comprises: Removing the second metal layer and the first metal layer remaining after the second heat treatment.

10. The method of forming a semiconductor device of claim 1, wherein, The temperature of the first heat treatment is lower than the temperature of the second heat treatment.

11. The method of forming a semiconductor device of claim 1, wherein, The temperature of the first heat treatment ranges from 300℃ to 400℃, and the temperature of the second heat treatment ranges from 500℃ to 700℃.

12. The method of forming a semiconductor device of claim 1, wherein, The material of the first metal layer comprises at least one of cobalt, titanium, nickel and manganese; and / or, the material of the second metal layer comprises at least one of cobalt, titanium, nickel and manganese.

13. The method of forming a semiconductor device of claim 1, wherein, The material of the first metal layer and the second metal layer is the same.

14. The method of forming a semiconductor device of claim 1, wherein, The material of the conductive plug comprises polysilicon or doped polysilicon.

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