A fast charging circuit detection method and related device

Abstract

Embodiments of the present application disclose a fast charging circuit detection method and related devices. The method comprises: a first device sending a first instruction, and a second device receiving the first instruction, the first instruction being used to instruct the second device to enter a fast charging mode; the second device entering the fast charging mode in response to the first instruction; the second device acquiring detection data of a fast charging circuit in the fast charging mode; the second device sending the detection data to the first device, and the first device receiving the detection data of the fast charging circuit of the second device in the fast charging mode; and the first device outputting a detection result of the fast charging circuit according to the detection data of the fast charging circuit. It can be seen that, by using the embodiments of the present application, a device to be tested can enter a fast charging mode without considering a fast charging protocol supported by the device to be tested, and the universality of a test environment is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit detection, and particularly relates to a fast charging circuit detection method and related device. BACKGROUND

[0002] In the process of producing a Printed Circuit Board Assembly (PCBA), in order to ensure that the hardware welding of the PCBA is normal, the PCBA needs to be tested. With the increasing popularity of terminal devices supporting fast charging function, the fast charging circuit included in the PCBA of such terminal devices also needs to be detected.

[0003] At present, when detecting the fast charging circuit of a terminal device supporting fast charging function, the terminal device needs to identify the fast charging protocol of a charger first, and then can enter the fast charging mode to detect the fast charging circuit. However, there are many fast charging protocols on the market, and the protocols supported by terminal devices of different companies are different, which leads to the fact that in the test environment, different types of terminal devices need to be tested by using chargers supporting corresponding fast charging protocols, and it can be seen that the test environment is not universal among different terminal devices. SUMMARY

[0004] The present application provides a fast charging circuit detection method and related device, which can improve the universality of the test environment.

[0005] In a first aspect, the embodiments of the present application provide a fast charging circuit detection method, which comprises the following steps:

[0006] receiving a first instruction, the first instruction being used to indicate entering a fast charging mode;

[0007] in response to the first instruction, entering the fast charging mode;

[0008] in the fast charging mode, obtaining detection data of the fast charging circuit;

[0009] sending the detection data to a first device.

[0010] It can be seen that by using the embodiments of the present application, without considering the fast charging protocol supported by the device to be tested, the fast charging interface can be initialized to enter the fast charging mode after receiving the first instruction, and the universality of the test environment is improved.

[0011] In an optional implementation, the method further comprises the following steps:

[0012] determining whether the Universal Serial Bus voltage provided by the power supply device to the fast charging circuit is greater than or equal to the minimum working voltage of the fast charging circuit;

[0013] If yes, it is determined to enter the fast charging state, and the step of acquiring the detection data of the fast charging circuit is performed.

[0014] In an optional implementation, before acquiring the detection data of the fast charging circuit, the method further includes:

[0015] receiving a second instruction, the second instruction being used to instruct to acquire the detection data of the fast charging circuit.

[0016] In an optional implementation, before receiving the first instruction, the method further includes:

[0017] receiving a third instruction, the third instruction being used to instruct to close the normal charging mode; the minimum working voltage of the charging circuit in the normal charging mode being less than the minimum working voltage of the fast charging circuit in the fast charging mode;

[0018] in response to the third instruction, closing the normal charging mode;

[0019] sending a message to the first device that the normal charging mode has been closed.

[0020] In an optional implementation, before receiving the third instruction, the method further includes:

[0021] receiving a fourth instruction, the fourth instruction being used to instruct to enter the test mode;

[0022] in response to the fourth instruction, entering the test mode;

[0023] sending a message to the first device that the test mode has been entered.

[0024] In an optional implementation, after entering the fast charging mode in response to the first instruction, the method further includes:

[0025] sending a message to the first device that the fast charging mode has been entered.

[0026] In an optional implementation, the method further includes:

[0027] receiving a fifth instruction, the fifth instruction being used to instruct to close the fast charging mode;

[0028] in response to the fifth instruction, closing the fast charging mode;

[0029] sending a message to the first device that the fast charging mode has been closed.

[0030] In a second aspect, an embodiment of the present application provides a fast charging circuit detection method, which includes:

[0031] sending a first instruction, the first instruction being used to instruct a second device to enter a fast charging mode;

[0032] receiving detection data of the fast charging circuit of the second device in the fast charging mode;

[0033] outputting a detection result of the fast charging circuit according to the detection data of the fast charging circuit.

[0034] It can be seen that, by using the embodiments of the present application, the test device can send an instruction indicating entering the fast charging mode to the device to be tested, so that the device to be tested can enter the fast charging mode without identifying the fast charging protocol supported by the device to be tested, thereby improving the universality of the test environment.

[0035] In an optional embodiment, the method further comprises:

[0036] controlling the power supply device to provide a universal serial bus voltage to the fast charging circuit, the universal serial bus voltage being greater than or equal to the minimum operating voltage of the fast charging circuit, and the receiving of the detection data of the fast charging circuit of the second device in the fast charging mode is performed.

[0037] In an optional embodiment, before the receiving of the detection data of the fast charging circuit of the second device in the fast charging mode, the method further comprises:

[0038] sending a second instruction, the second instruction being used to instruct the second device to acquire the detection data of the fast charging circuit.

[0039] In an optional embodiment, before the sending of the first instruction, the method further comprises:

[0040] sending a third instruction, the third instruction being used to instruct the second device to close a normal charging mode, the minimum operating voltage of a charging circuit in the normal charging mode being less than the minimum operating voltage of the fast charging circuit in the fast charging mode.

[0041] receiving a message from the second device that the normal charging mode has been closed.

[0042] In an optional embodiment, before the sending of the third instruction, the method further comprises:

[0043] sending a fourth instruction, the fourth instruction being used to instruct the second device to enter a test mode.

[0044] receiving a message from the second device that the test mode has been entered.

[0045] In an optional embodiment, after the sending of the first instruction, the method further comprises:

[0046] receiving a message from the second device that the fast charging mode has been entered.

[0047] In an optional embodiment, the method further comprises:

[0048] The fifth instruction is used to instruct the second device to close the fast charging mode.

[0049] The message that the fast charging mode is closed is received from the second device.

[0050] In an optional implementation, the method further includes:

[0051] The universal serial bus voltage provided by the power supply device to the fast charging circuit is adjusted to the initial voltage.

[0052] In a third aspect, the embodiments of the present application provide a fast charging circuit detection device, which comprises:

[0053] The receiving unit is configured to receive a first instruction, the first instruction being used to instruct to enter a fast charging mode.

[0054] The processing unit is configured to enter the fast charging mode in response to the first instruction.

[0055] The obtaining unit is configured to obtain detection data of the fast charging circuit in the fast charging mode.

[0056] The sending unit is configured to send the detection data to a first device.

[0057] Optionally, the fast charging circuit detection device performs the optional implementation and the beneficial effects can be referred to the related content of the first aspect, which will not be described in detail here.

[0058] In a fourth aspect, the embodiments of the present application provide a fast charging circuit detection device, which comprises:

[0059] The sending unit is configured to send a first instruction, the first instruction being used to instruct a second device to enter a fast charging mode.

[0060] The receiving unit is configured to receive detection data of a fast charging circuit of the second device in the fast charging mode.

[0061] The processing unit is configured to output a detection result of the fast charging circuit according to the detection data of the fast charging circuit.

[0062] Optionally, the fast charging circuit detection device performs the optional implementation and the beneficial effects can be referred to the related content in the second aspect, which will not be described in detail here.

[0063] In a fifth aspect, the embodiments of the present application provide a device, which comprises a processor and a memory, the processor and the memory are connected to each other, wherein the memory is used to store a computer program, the computer program comprises program instructions, and the processor executes the program instructions to realize the steps in the method designed in the first aspect.

[0064] In a sixth aspect, an embodiment of the present application provides a device, comprising a processor, a memory, the processor and the memory being connected with each other, wherein the memory is configured to store a computer program, the computer program comprising program instructions, and the processor executes the program instructions to implement the steps in the method designed in the second aspect.

[0065] In a seventh aspect, an embodiment of the present application provides a chip, comprising a processor, wherein the processor executes the steps in the method designed in the first aspect or the second aspect. Optionally, the chip can further comprise a memory and a computer program or instructions stored on the memory, and the processor executes the computer program or instructions to implement the method in the first aspect or the second aspect.

[0066] In an eighth aspect, an embodiment of the present application provides a chip module, comprising a transceiver assembly and a chip, wherein the chip comprises a processor, and the processor executes the steps in the method designed in the first aspect or the second aspect. Optionally, the chip can further comprise a memory and a computer program or instructions stored on the memory, and the processor executes the computer program or instructions to implement the method in the first aspect or the second aspect.

[0067] In a ninth aspect, an embodiment of the present application provides a computer readable storage medium, which stores a computer program, and the computer program comprises program instructions, and the program instructions are executed to implement the steps in the method designed in the first aspect or the second aspect.

[0068] In a tenth aspect, an embodiment of the present application provides a computer program product, comprising a computer program or program instructions, and the computer program or program instructions are executed to implement the method in the first aspect or the second aspect. BRIEF DESCRIPTION OF DRAWINGS

[0069] Figure 1 FIG. 1 is a schematic architecture diagram of a fast charging circuit detection system provided by an embodiment of the present application;

[0070] Figure 2 FIG. 2 is a hardware block diagram of a fast charging circuit provided by an embodiment of the present application;

[0071] Figure 3 FIG. 3 is a flowchart of a fast charging circuit detection method provided by an embodiment of the present application;

[0072] Figure 4 FIG. 4 is a flowchart of another fast charging circuit detection method provided by an embodiment of the present application;

[0073] Figure 5is a structural schematic diagram of a fast charging circuit detection device provided by an embodiment of the present application.

[0074] Figure 6 is a structural schematic diagram of another fast charging circuit detection device provided by an embodiment of the present application.

[0075] Figure 7 is a structural schematic diagram of a device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0076] All other embodiments obtained by those of ordinary skill in the art without creative work on the basis of the embodiments in the present application belong to the scope of protection of the present application.

[0077] The phrase "embodiments" in the present application means that the specific features, structures or characteristics described in combination with the embodiments can be included in at least one embodiment of the present application. The appearance of this phrase at various places in the specification does not necessarily mean that it refers to the same embodiment, nor is it an independent or alternative embodiment to other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in the present application can be combined with other embodiments.

[0078] It should be noted that "first", "second", "third" and the like in the present application are used to distinguish similar objects, and do not necessarily describe a specific order or sequence. In addition, the term "comprising" and any variation thereof is intended to cover non-exclusive inclusion. For example, a process, method, software, product or device including a series of steps or units is not limited to the listed steps or units, but also includes steps or units not listed or other steps or units inherent to the process, method, product or device. It should also be understood that the term "and / or" used in the present application means and includes any or all possible combinations of one or more listed items.

[0079] The embodiments of the present application can be applied to the production test scene of the device product supporting fast charging. For example, please refer to Figure 1 , Figure 1 is a structural schematic diagram of a fast charging circuit detection system provided by an embodiment of the present application. As Figure 1As shown, the fast charging circuit detection system can include a first device 101 and a second device 102, wherein the first device 101 can also be referred to as a test device, which can be a device with a test function, such as a desktop computer with a circuit test tool, a tablet computer with a circuit test tool, a notebook computer with a circuit test tool, etc., which are not limited herein. The second device 102 can also be referred to as a device to be tested, which can be a device supporting fast charging, such as a fast charging supporting mobile phone, a fast charging supporting tablet computer, a fast charging supporting wearable device, etc., which are not limited herein. Figure 1 The device form shown is used for example and does not constitute a limitation on the embodiments of the present application.

[0080] In an optional implementation, the first device 101 and the second device 102 are connected through a universal serial bus (USB), and the first device 101 can output the detection result of the fast charging circuit according to the detection data of the fast charging circuit obtained by the second device 102 in the fast charging mode. In this way, since the first device 101 and the second device 102 can exchange data through the USB, the automation of the test can be realized, thereby improving the test efficiency.

[0081] In an optional implementation, Figure 1 The first device 101 can control the power supply device to provide a universal serial bus (USB) voltage greater than or less than the minimum working voltage of the fast charging circuit in the second device 102, so that the second device 102 can enter the fast charging state, thereby obtaining the detection data of the fast charging circuit. It should be noted that the first device can control the power supply device to output two voltages, the first voltage is used to supply power to the battery of the second device, and the second voltage is used to supply power to the USB of the second device (the initial voltage value of the USB is 5V). The universal serial bus voltage provided by the power supply device to the fast charging circuit in the implementation refers to the second voltage output by the power supply device.

[0082] Optionally, at least one fast charging chip can be included in the fast charging circuit. Optionally, the fast charging circuit can further include an over voltage protection (OVP) circuit, a power management integrated circuit (PMIC), a charge integrated circuit (Charge IC), and a battery. The OVP is used to protect downstream circuits from damage caused by excessive voltage. The PMIC is an integrated circuit used for voltage conversion, voltage stabilization, and battery management, which can handle power system timing, power multiple loads, and provide protection functions in the event of overvoltage, undervoltage, overcurrent, and thermal failure.

[0083] Please refer to Figure 2 , Figure 2 is a hardware block diagram of a fast charging circuit provided by an embodiment of the present application. As shown in Figure 2 , it includes Battery, OVP, PMIC, Charge IC, fast charging chips (fast charging chip A, fast charging chip B, etc.), and battery voltage (Voltage of Battery, VBAT), charging voltage (Voltage of Charge, Vcharge), and universal serial bus voltage (Voltage of Universal Serial Bus, VBUS). VBAT is the first voltage output by the power supply device mentioned above, i.e., the voltage provided by the power supply device to the battery of the second device. VBUS is the second voltage output by the power supply device mentioned above, i.e., the voltage provided by the power supply device to the USB of the second device. As shown in Figure 2 , the fast charging chips A, B, etc. are connected in parallel. When VBUS is greater than or equal to the minimum operating voltage of the fast charging chips A, B, etc., the fast charging chips A, B, etc. can operate normally, so that the device corresponding to the fast charging circuit enters a fast charging state.

[0084] The embodiments of the present application are described below in conjunction with the accompanying drawings.

[0085] Please refer to Figure 3 , Figure 3 is a flowchart of a fast charging circuit detection method provided by an embodiment of the present application. Figure 3 The method shown in Figure 2 can be used to detect the fast charging circuit shown in Figure 3 , which can include but is not limited to the following steps:

[0086] S301, the first device sends a first instruction, and the second device receives the first instruction. The first instruction is used to instruct the second device to enter a fast charging mode.

[0087] The fast charging mode refers to a charging mode that enables the second device to quickly reach or approach a fully charged state. It should be noted that the minimum working voltage of the fast charging circuit in the fast charging mode is greater than the minimum working voltage of the charging circuit in the ordinary charging mode. It can be understood that the time required for the second device to charge from 0 to 100% in the ordinary charging mode is greater than the time required for the second device to charge from 0 to 100% in the fast charging mode. That is, the charging speed in the fast charging mode is faster than the charging speed in the ordinary charging mode.

[0088] In an optional embodiment, the second device enters the fast charging mode in response to the first instruction, which can include initializing the fast charging interface and entering the fast charging mode.

[0089] In an optional embodiment, after the second device enters the fast charging mode in response to the first instruction, the second device further sends a message to the first device that it has entered the fast charging mode, and the first device receives the message from the second device that it has entered the fast charging mode. Optionally, the first device can also control the power supply device to provide a universal serial bus voltage to the fast charging circuit that is greater than or equal to the minimum working voltage of the fast charging circuit.

[0090] S303, the second device obtains detection data of the fast charging circuit in the fast charging mode.

[0091] In an optional embodiment, the second device can also determine whether the universal serial bus voltage provided by the power supply device to the fast charging circuit is greater than or equal to the minimum working voltage of the fast charging circuit; if so, it is determined to enter the fast charging state and perform the step of obtaining the detection data of the fast charging circuit.

[0092] In an optional embodiment, before the second device obtains the detection data of the fast charging circuit, the second device further receives a second instruction, and the first device sends the second instruction. The second instruction is used to instruct the second device to obtain the detection data of the fast charging circuit.

[0093] S304, the second device sends the detection data of the fast charging circuit to the first device, and the first device receives the detection data of the fast charging circuit of the second device in the fast charging mode.

[0094] S305, the first device outputs a detection result of the fast charging circuit according to the detection data of the fast charging circuit.

[0095] The detection data of the fast charging circuit includes an output current value of each fast charging chip in at least one fast charging chip.

[0096] In an optional embodiment, the first device outputs the detection result of the fast charging circuit according to the detection data of the fast charging circuit, which can include: outputting the detection result of the fast charging circuit according to the output current value of each fast charging chip and the target current threshold.

[0097] Optionally, the target current threshold includes a first current threshold, and the first device outputs the detection result of the fast charging circuit according to the output current value of each fast charging chip and the target current threshold, which can include: if the sum of the output current values of each fast charging chip is greater than or equal to the first current threshold, outputting the detection result of the fast charging circuit as passing the detection; and if the sum of the output current values of each fast charging chip is less than the first current threshold, outputting the detection result of the fast charging chip as failing the detection.

[0098] For example, assuming that the first current threshold is 15 amperes (A), and a fast charging circuit includes five fast charging chips, if the output current values of the five fast charging chips are 2 A, 5 A, 3 A, 4 A and 1 A, the sum of the current values of the five fast charging chips (2+5+3+4+1=15 A) is equal to the first current threshold, and then the detection result of the fast charging circuit is output as passing the detection. If the output current values of the five fast charging chips are 2 A, 4 A, 3 A, 3 A and 1 A, the sum of the current values of the five fast charging chips (2+4+3+3+1=13 A) is less than the first current threshold, and then the detection result of the fast charging circuit is output as failing the detection.

[0099] Optionally, the target current threshold includes a second current threshold, and the second current threshold is less than the first current threshold. The first device outputs the detection result of the fast charging circuit according to the output current value of each fast charging chip and the target current threshold, which can include: if the output current value of each fast charging chip is greater than or equal to the second current threshold, outputting the detection result of the fast charging circuit as passing the detection; and if there is any fast charging chip whose output current value is less than the second current threshold, outputting the detection result of the fast charging chip as failing the detection. In this way, the first device can confirm the hardware welding quality of each fast charging chip according to the relationship between the output current of each fast charging chip and the second current threshold.

[0100] For example, assuming that the second current threshold is 3A, a fast charging circuit includes 5 fast charging chips, and the output current values of the 5 fast charging chips are 4A, 5A, 6A, 4A, and 3A, respectively. Since the output current value of each of the 5 fast charging chips is greater than or equal to the second current threshold (3A), the detection result of the fast charging circuit is passed. If the output current values of the 5 fast charging chips are 2A, 5A, 6A, 4A, and 3A, respectively, since the current value of one of the fast charging chips is 2A, which is less than the second current threshold (3A), the detection result of the fast charging circuit is failed.

[0101] In another optional embodiment, the first device can output the detection result of the fast charging circuit according to the detection data of the fast charging circuit and the input data of the fast charging circuit. The detection data of the fast charging circuit includes the output current value and the output voltage value of each of the at least one fast charging chip. The input data of the fast charging circuit includes the input current value and the input voltage value of each of the at least one fast charging chip. Optionally, in this embodiment, the first device further acquires the input data of the fast charging circuit. Optionally, the first device can output the detection result of the fast charging circuit according to the detection data of the fast charging circuit and the input data of the fast charging circuit, which can include: if the product of the output voltage value and the output current value of each fast charging chip is equal to the product of the input current value and the input voltage value of the fast charging chip, the detection result of the fast charging circuit is passed; if the product of the output voltage value and the output current value of any one of the fast charging chips is not equal to the product of the input current value and the input voltage value of the fast charging chip, the detection result of the fast charging circuit is failed.

[0102] For example, assuming that a fast charging circuit includes 5 fast charging chips, the input voltage of one of the fast charging chips is 10 volts (V), the input current is 1A, the output voltage of the fast charging chip is 5V, and the output current is 3A. Since the input power (10*1=10 watts (W)) is not equal to the output power (5*3=15W), the detection result of the fast charging circuit is failed.

[0103] It can be understood that the detection result of the fast charging circuit is passed, which indicates that each fast charging chip can work normally, and thus the fast charging function of the second device is normal. That is, the second device can perform fast charging.

[0104] Optionally, the detection data of the fast charging circuit can further include the number of fast charging chips.

[0105] In the embodiment of the present application, the first device sends a first instruction to instruct the second device to enter a fast charging mode; the second device enters the fast charging mode in response to the first instruction; the second device acquires detection data of the fast charging circuit in the fast charging mode; and the second device sends the detection data of the fast charging circuit to the first device. In this way, the first device can output the detection result of the fast charging circuit according to the detection data sent by the second device. As can be seen, by using the embodiment of the present application, the fast charging protocol supported by the device to be tested (i.e., the second device) does not need to be considered, and the fast charging interface can be initialized to enter the fast charging mode upon receiving the first instruction, thereby improving the universality of the test environment and saving test cost.

[0106] Please refer to Figure 4 , Figure 4 is a flowchart of another fast charging circuit detection method provided by the embodiment of the present application. Figure 4 In the fast charging circuit detection method shown in the figure, the first device also sends a third instruction to the second device to instruct the second device to close the normal charging mode. Before sending the third instruction to the second device, the first device also sends a fourth instruction to the second device to instruct the second device to enter a test mode. As Figure 4 shown in the figure, the fast charging circuit detection method includes but is not limited to the following steps:

[0107] S401, the first device sends a fourth instruction, and correspondingly, the second device receives the fourth instruction, which is used to instruct the second device to enter a test mode.

[0108] S402, the second device enters the test mode in response to the fourth instruction.

[0109] S403, the second device sends a message that the test mode has been entered to the first device, and correspondingly, the first device receives the message that the test mode has been entered from the second device.

[0110] S404, the first device sends a third instruction, and correspondingly, the second device receives the third instruction, which is used to instruct the second device to close the normal charging mode.

[0111] The minimum working voltage of the charging circuit in the normal charging mode is less than the minimum working voltage of the fast charging circuit in the fast charging mode. Therefore, the first device instructs the second device to close the normal charging mode, which can avoid damage to the normal charging chip due to excessive charging voltage in the subsequent process.

[0112] It should be noted that the minimum working voltage of the charging circuit in the normal charging mode refers to the minimum working voltage of each normal charging chip included in the normal charging circuit. The minimum working voltage of the fast charging circuit refers to the minimum working voltage of each fast charging chip included in the fast charging circuit.

[0113] S405, the second device responds to the third instruction and turns off the normal charging mode.

[0114] S406, the second device sends a message to the first device that the normal charging mode has been turned off, and correspondingly, the first device receives the message that the normal charging mode has been turned off from the second device.

[0115] S407. The first device sends a first instruction, and correspondingly, the second device receives the first instruction, which is used to instruct the second device to enter the fast charging mode.

[0116] S408, the second device responds to the first instruction and enters fast charging mode.

[0117] S409, the second device sends a message to the first device that it has entered the fast charging mode, and correspondingly, the first device receives the message from the second device that it has entered the fast charging mode.

[0118] In this embodiment, the first device receives a message from the second device that it has entered the fast charging mode, which helps the first device to clearly know when to raise the universal serial bus voltage supplied by the power supply device to the fast charging circuit to the minimum operating voltage of the fast charging chip.

[0119] S410, The voltage of the universal serial bus provided by the first device control power supply equipment to the fast charging circuit is greater than or equal to the minimum operating voltage of the fast charging circuit.

[0120] As mentioned above, the minimum operating voltage of a fast charging circuit refers to the minimum operating voltage of each fast charging chip in at least one fast charging chip included in the fast charging circuit. Therefore, the Universal Serial Bus voltage supplied to the fast charging circuit by the power supply device controlled by the first device is greater than or equal to the minimum operating voltage of the fast charging circuit, that is, the Universal Serial Bus voltage supplied to the fast charging circuit by the power supply device controlled by the first device is greater than or equal to the minimum operating voltage of each fast charging chip.

[0121] Optionally, when the second device detects that the universal serial bus voltage supplied by the power supply device to the fast charging circuit is greater than or equal to the minimum operating voltage of the fast charging circuit, it can enter the fast charging state and execute step S411.

[0122] by Figure 2 Taking the fast charging circuit shown as an example, assuming that the minimum operating voltage of fast charging chips such as fast charging chip A and fast charging chip B is 8.5V, then the first device needs to control the second voltage output by the power supply equipment (i.e., Figure 2the initial voltage value (5V) to 8.5V. That is, the first device controls the power supply device to provide the USB voltage to the fast charging circuit greater than or equal to the minimum operating voltage of the fast charging circuit. In this way, the second device determines that the VBUS is greater than or equal to the minimum operating voltage of the fast charging chip A and the fast charging chip B, and determines to enter the fast charging state.

[0123] S411, the first device sends a second instruction, and the second device receives the second instruction. The second instruction is used to instruct the second device to acquire the detection data of the fast charging circuit.

[0124] S412, the second device acquires the detection data of the fast charging circuit in response to the second instruction.

[0125] S413, the second device sends the detection data of the fast charging circuit to the first device, and the first device receives the detection data of the fast charging circuit from the second device.

[0126] S414, the first device outputs the detection result of the fast charging circuit according to the detection data of the fast charging circuit.

[0127] In an optional implementation, the implementation process of step S414 can refer to the description in the foregoing step S305, and will not be described here.

[0128] In an optional implementation, after step S414, steps S415 to S418 can be further included.

[0129] S415, the first device sends a fifth instruction, and the second device receives the fifth instruction. The fifth instruction is used to instruct the second device to close the fast charging mode.

[0130] S416, the second device closes the fast charging mode in response to the fifth instruction.

[0131] S417, the second device sends a message that the fast charging mode has been closed to the first device, and the first device receives the message that the fast charging mode has been closed from the second device.

[0132] S418, the first device adjusts the USB voltage provided by the power supply device to the fast charging circuit to the initial voltage. In this way, it is beneficial for the first device to perform other tests.

[0133] It can be seen that, by using the embodiment of the present application, the to-be-tested device (i.e., the second device) can know when to enter the test mode according to the received fourth instruction, thereby facilitating the testing device (i.e., the first device) to timely detect the fast charging circuit; after receiving the third instruction, the to-be-tested device can close the normal charging mode, thereby avoiding damage to the normal charging chip due to the excessively large charging voltage in the fast charging mode, and the to-be-tested device further sends a message that the normal charging mode has been closed to the testing device, so that the testing device can know when to raise the USB voltage provided by the power supply device to the fast charging circuit to the minimum working voltage of the fast charging chip, thereby facilitating the to-be-tested device to timely enter the fast charging state and obtain the detection data of the fast charging circuit.

[0134] Please refer to Figure 5 , Figure 5 is a structural schematic diagram of a fast charging circuit detection device provided by the embodiment of the present application. As shown in Figure 5 , the fast charging circuit detection device can include but is not limited to:

[0135] The receiving unit 501 is configured to receive a first instruction, and the first instruction is used to instruct to enter a fast charging mode.

[0136] The processing unit 502 is configured to enter the fast charging mode in response to the first instruction from the first device.

[0137] The obtaining unit 503 is configured to obtain detection data of a fast charging circuit in the fast charging mode.

[0138] The sending unit 504 is configured to send the detection data to the first device.

[0139] In an optional embodiment, the fast charging circuit detection device further includes:

[0140] The determining unit 505 is configured to determine whether a universal serial bus voltage provided by a power supply device to the fast charging circuit is greater than or equal to a minimum working voltage of the fast charging circuit; if yes, it is determined to enter a fast charging state, and the step of obtaining the detection data of the fast charging circuit is performed.

[0141] In an optional embodiment, before the obtaining unit 503 obtains the detection data of the fast charging circuit, the receiving unit 501 further receives a second instruction, and the second instruction is used to instruct to obtain the detection data of the fast charging circuit.

[0142] In an optional embodiment, before receiving the first instruction, the receiving unit 501 is further configured to receive a third instruction, and the third instruction is used to instruct to close a normal charging mode; the minimum working voltage of the charging circuit in the normal charging mode is less than the minimum working voltage of the fast charging circuit in the fast charging mode.

[0143] The processing unit 502 is further configured to, in response to the third instruction, close the normal charging mode.

[0144] The sending unit 504 is further configured to send, to the first device, a message that the normal charging mode has been closed.

[0145] In an optional implementation, before receiving the third instruction, the receiving unit 501 is further configured to receive a fourth instruction, the fourth instruction being used to indicate entering a test mode.

[0146] The processing unit 502 is further configured to, in response to the fourth instruction, enter the test mode.

[0147] The sending unit 504 is further configured to send, to the first device, a message that the test mode has been entered.

[0148] In an optional implementation, after the processing unit 502 enters the fast charging mode in response to the first instruction, the sending unit 504 is further configured to send, to the first device, a message that the fast charging mode has been entered.

[0149] In an optional implementation, the receiving unit 501 is further configured to receive a fifth instruction, the fifth instruction being used to indicate closing the fast charging mode.

[0150] The processing unit 502 is further configured to, in response to the fifth instruction, close the fast charging mode.

[0151] The sending unit 504 is further configured to send, to the first device, a message that the fast charging mode has been closed.

[0152] It can be understood that the specific implementation of each unit in the fast charging circuit detection apparatus provided by the embodiments of the present application and the beneficial effects that can be achieved can refer to the description of any of the foregoing fast charging circuit detection methods, which will not be described here in detail.

[0153] Please refer to Figure 6 , Figure 6 which is a structural schematic diagram of another fast charging circuit detection apparatus provided by the embodiments of the present application.

[0154] As shown in Figure 6 , the fast charging circuit detection apparatus can include but is not limited to:

[0155] The sending unit 601 is configured to send a first instruction, the first instruction being used to indicate a second device to enter a fast charging mode.

[0156] The receiving unit 602 is configured to receive detection data of a fast charging circuit of the second device in the fast charging mode.

[0157] The processing unit 603 is configured to output the detection result of the fast charging circuit according to the detection data of the fast charging circuit.

[0158] In an optional implementation, the fast charging circuit detection apparatus further comprises a control unit 604.

[0159] The control unit 604 is configured to control the power supply device to provide a USB voltage greater than or equal to the minimum operating voltage of the fast charging circuit to the fast charging circuit.

[0160] In an optional implementation, before the receiving unit 602 receives the detection data of the fast charging circuit of the second device in the fast charging mode, the sending unit 601 is further configured to send a second instruction, where the second instruction is used to instruct the second device to acquire the detection data of the fast charging circuit.

[0161] In an optional implementation, before the sending unit 601 is configured to send the first instruction, the sending unit 601 is further configured to send a third instruction, where the third instruction is used to instruct the second device to close a normal charging mode, and the minimum operating voltage of a charging circuit in the normal charging mode is less than the minimum operating voltage of the fast charging circuit in the fast charging mode.

[0162] The receiving unit 602 is further configured to receive a message from the second device that the normal charging mode has been closed.

[0163] In an optional implementation, before the sending unit 601 is configured to send the third instruction, the sending unit 601 is further configured to send a fourth instruction, where the fourth instruction is used to instruct the second device to enter a test mode.

[0164] The receiving unit 602 is further configured to receive a message from the second device that the test mode has been entered.

[0165] In an optional implementation, after the sending unit 601 sends the first instruction, the receiving unit 602 is further configured to receive a message from the second device that the fast charging mode has been entered.

[0166] In an optional implementation, the sending unit 601 is further configured to send a fifth instruction, where the fifth instruction is used to instruct the second device to close the fast charging mode.

[0167] The receiving unit 602 is further configured to receive a message from the second device that the fast charging mode has been closed.

[0168] In an optional implementation, the control unit 604 is further configured to adjust the USB voltage provided by the power supply device to the fast charging circuit to an initial voltage.

[0169] It can be understood that the specific implementation of each unit in the fast charging circuit detection device provided by the embodiments of the present application and the beneficial effects that can be achieved can refer to the description of any one of the foregoing fast charging circuit detection methods, which will not be repeated here.

[0170] Please refer to Figure 7 , Figure 7 is a structural schematic diagram of a device provided by the embodiments of the present application. The device includes a processor 701, a transceiver 703 and a memory 702. The processor 701 and the memory 702 are connected through one or more communication buses.

[0171] The transceiver 703 is configured to send data or receive data.

[0172] The memory 702 is configured to store commands or computer programs, and the memory 702 includes but is not limited to a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM) or a compact disc read-only memory (CD-ROM). The memory 702 is configured to store the executed program code and the transmitted data, and provide the processor 701 with commands and data. Part of the memory 702 can also include a non-volatile random access memory.

[0173] The processor 701 can be a central processing unit (CPU), and the processor 701 can also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, and optionally, the processor 701 can also be any conventional processor.

[0174] In an optional embodiment, the device can be the second device described above. The processor 701 can be configured to execute the computer programs or commands stored in the memory 702, so that the device performs:

[0175] receiving a first instruction, the first instruction being used to indicate entering a fast charging mode;

[0176] entering the fast charging mode in response to a first instruction from the first device;

[0177] obtaining detection data of the fast charging circuit in the fast charging mode;

[0178] sending the detection data to the first device.

[0179] In this embodiment, the processor 701 is further configured to determine whether the USB voltage provided by the power supply device to the fast charging circuit is greater than or equal to the minimum operating voltage of the fast charging circuit, and if so, determine to enter the fast charging state and perform the step of obtaining the detection data of the fast charging circuit.

[0180] In this embodiment, before the step of obtaining the detection data of the fast charging circuit, the processor 701 is further configured to:

[0181] receive a second instruction, the second instruction being used to instruct to obtain the detection data of the fast charging circuit.

[0182] In this embodiment, before the step of receiving the first instruction, the processor 701 is further configured to:

[0183] receive a third instruction, the third instruction being used to instruct to close the normal charging mode; the minimum operating voltage of the charging circuit in the normal charging mode being less than the minimum operating voltage of the fast charging circuit in the fast charging mode;

[0184] close the normal charging mode in response to the third instruction;

[0185] send a message that the normal charging mode has been closed to the first device.

[0186] In this embodiment, before the step of receiving the third instruction, the processor 701 is further configured to:

[0187] receive a fourth instruction, the fourth instruction being used to instruct to enter the test mode;

[0188] enter the test mode in response to the fourth instruction;

[0189] send a message that the test mode has been entered to the first device.

[0190] In this embodiment, after the step of entering the fast charging mode in response to the first instruction, the processor 701 is further configured to:

[0191] send a message that the fast charging mode has been entered to the first device.

[0192] In this embodiment, the processor 701 is further configured to:

[0193] receive a fifth instruction, the fifth instruction being used to instruct to close the fast charging mode;

[0194] in response to the fifth instruction, turn off the fast charging mode;

[0195] send a message to the first device that the fast charging mode has been turned off.

[0196] In another optional implementation, the device can be the aforementioned first device. The processor 701 can be configured to execute the computer programs or instructions stored in the memory 702 to cause the device to perform:

[0197] send a first instruction, the first instruction being used to instruct the second device to enter the fast charging mode;

[0198] receive detection data of the fast charging circuit of the second device in the fast charging mode;

[0199] output a detection result of the fast charging circuit according to the detection data of the fast charging circuit.

[0200] In this implementation, the processor 701 is further configured to control the power supply device to provide a universal serial bus voltage to the fast charging circuit, the universal serial bus voltage being greater than or equal to a minimum working voltage of the fast charging circuit.

[0201] In this implementation, before the processor 701 is configured to receive the detection data of the fast charging circuit of the second device in the fast charging mode, the processor 701 is further configured to:

[0202] send a second instruction, the second instruction being used to instruct the second device to obtain the detection data of the fast charging circuit.

[0203] In this implementation, before the processor 701 is configured to send the first instruction, the processor 701 is further configured to:

[0204] send a third instruction, the third instruction being used to instruct the second device to turn off a normal charging mode, the minimum working voltage of a charging circuit in the normal charging mode being less than the minimum working voltage of the fast charging circuit in the fast charging mode;

[0205] receive a message from the second device that the normal charging mode has been turned off.

[0206] In this implementation, before the processor 701 is configured to send the third instruction, the processor 701 is further configured to:

[0207] send a fourth instruction, the fourth instruction being used to instruct the second device to enter a test mode;

[0208] receive a message from the second device that the test mode has been entered.

[0209] In this implementation, after the processor 701 is configured to send the first instruction, the processor 701 is further configured to:

[0210] receive a message from the second device that the fast charging mode has been entered.

[0211] In this embodiment, the processor 701 is further configured to:

[0212] send a fifth instruction, the fifth instruction being used to instruct the second device to close the fast charging mode;

[0213] receive a message from the second device that the fast charging mode has been closed.

[0214] In this embodiment, the processor 701 is further configured to adjust the USB voltage provided by the power supply device to the fast charging circuit to the initial voltage.

[0215] It can be understood that the specific implementation of the processor 701 and the beneficial effects that can be achieved can refer to the description of the foregoing fast charging circuit detection method embodiments, which will not be described here.

[0216] The embodiments of the present application also provide a chip, which includes a processor, wherein the processor executes the steps described in the foregoing method embodiments. Optionally, the chip can further include a processor, a memory, and a computer program or instructions stored in the memory, wherein the processor executes the computer program or instructions to implement the steps described in the foregoing method embodiments.

[0217] The embodiments of the present application also provide a chip module, which includes a transceiver assembly and a chip, wherein the chip includes a processor, and the processor executes the steps described in the foregoing method embodiments. Optionally, the chip can further include a memory and a computer program or instructions stored in the memory, and the processor executes the computer program or instructions to implement the steps described in the foregoing method embodiments.

[0218] The embodiments of the present application also provide a computer readable storage medium, which stores a computer program or instructions, and the computer program or instructions are executed to implement the steps described in the foregoing method embodiments.

[0219] The embodiments of the present application also provide a computer program product, which includes a computer program or instructions, and the computer program or instructions are executed to implement the steps described in the foregoing method embodiments.

[0220] The various devices, products, and modules / units contained in the various devices, products described in the above embodiments can be software modules / units or hardware modules / units, or can be partially software modules / units and partially hardware modules / units. For example, for various devices, products of an application or integrated chip, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, or at least some of the modules / units can be implemented in the form of software programs that run on an integrated processor inside the chip, and the remaining modules / units can be implemented in the form of hardware such as circuits. For various devices, products of an application or integrated chip module, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component (e.g., a chip, a circuit module, etc.) or different components of the chip module, at least some of the modules / units can be implemented in the form of software programs that run on an integrated processor inside the chip module, and the remaining modules / units can be implemented in the form of hardware such as circuits. For various devices, products of an application or integrated terminal, the modules / units contained therein can all be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component (e.g., a chip, a circuit module, etc.) or different components of the terminal, or at least some of the modules / units can be implemented in the form of software programs that run on an integrated processor inside the terminal, and the remaining modules / units can be implemented in the form of hardware such as circuits.

[0221] The steps of the methods or algorithms described in the embodiments of the present application can be implemented in the form of hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, which can be stored in a random access memory (RAM), a flash memory, a read-only memory (ROM), an erasable programmable ROM (EPROM), an electrically EPROM (EEPROM), a register, a hard disk, a mobile hard disk, a compact disc read-only memory (CD-ROM), or any other form of storage medium well known in the art. An exemplary storage medium is coupled to a processor, so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an application-specific integrated circuit (ASIC). In addition, the ASIC can be located in a terminal device or a network device. Of course, the processor and the storage medium can also exist as discrete components in the terminal device or the network device.

[0222] Those skilled in the art should be aware that, in the above one or more examples, the functions described in the embodiments of the present application can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented by software, the functions can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, the computer instructions generate, in whole or in part, the processes or functions described in the embodiments of the present application. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable apparatus. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transferred from one website, computer, server or data center to another website, computer, server or data center through a wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) manner. The computer-readable storage medium can be any available medium accessible by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a magnetic tape), an optical medium (such as a digital video disc (DVD)), or a semiconductor medium (such as a solid state disk (SSD)), etc.

[0223] The above detailed description of the specific embodiments of the present application has further explained the purposes, technical solutions and beneficial effects of the embodiments of the present application. It should be understood that the above detailed description is only a specific embodiment of the present application and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made on the basis of the technical solutions of the embodiments of the present application should be included in the protection scope of the embodiments of the present application.

Claims

1. A fast charging circuit detection method, characterized in that, The method comprises: receiving a third instruction for indicating to close a normal charging mode; the minimum working voltage of the charging circuit in the normal charging mode is less than the minimum working voltage of the fast charging circuit in the fast charging mode; the minimum working voltage of the charging circuit in the normal charging mode refers to the minimum working voltage of each normal charging chip included in the normal charging circuit; the minimum working voltage of the fast charging circuit refers to the minimum working voltage of each fast charging chip included in the fast charging circuit; in response to the third instruction, closing the normal charging mode; sending a message to a first device that the normal charging mode has been closed; receiving a first instruction for indicating to enter a fast charging mode; in response to the first instruction, initializing a fast charging interface and entering the fast charging mode; determining whether the universal serial bus voltage provided by a power supply device to the fast charging circuit is greater than or equal to the minimum working voltage of the fast charging circuit; if yes, determining to enter a fast charging state; in the fast charging mode, acquiring detection data of the fast charging circuit; sending the detection data to the first device.

2. The method of claim 1, wherein, Before the acquiring of the detection data of the fast charging circuit, the method further comprises: receiving a second instruction for indicating to acquire the detection data of the fast charging circuit.

3. The method of claim 1, wherein, Before the receiving of the third instruction, the method further comprises: receiving a fourth instruction for indicating to enter a test mode; in response to the fourth instruction, entering the test mode; sending a message to the first device that the test mode has been entered.

4. The method of claim 1, wherein, After the entering of the fast charging mode in response to the first instruction, the method further comprises: sending a message to the first device that the fast charging mode has been entered.

5. The method according to any one of claims 1 to 4, characterized in that, The method further comprises: receiving a fifth instruction for indicating to close the fast charging mode; in response to the fifth instruction, closing the fast charging mode; sending a message to the first device that the fast charging mode has been closed.

6. A method for detecting a fast charging circuit, characterized in that, The method comprises: sending a third instruction for indicating a second device to close a normal charging mode; the minimum working voltage of the charging circuit in the normal charging mode is less than the minimum working voltage of the fast charging circuit in the fast charging mode; receiving a message from the second device that the normal charging mode has been closed; sending a first instruction for indicating the second device to initialize a fast charging interface and enter a fast charging mode; receiving detection data of a fast charging circuit of the second device in the fast charging mode; outputting a detection result of the fast charging circuit according to the detection data of the fast charging circuit.

7. The method of claim 6, wherein, The method further comprises: controlling the universal serial bus voltage provided by a power supply device to the fast charging circuit to be greater than or equal to the minimum working voltage of the fast charging circuit.

8. The method of claim 7, wherein, Before the receiving of the detection data of the fast charging circuit of the second device in the fast charging mode, the method further comprises: The second instruction is sent to instruct the second device to acquire detection data of the fast charging circuit.

9. The method of claim 6, wherein, Before the third instruction is sent, the method further includes: The fourth instruction is sent to instruct the second device to enter a test mode. A message is received from the second device that the test mode has been entered.

10. The method of claim 6, wherein, After the first instruction is sent, the method further includes: A message is received from the second device that the fast charging mode has been entered.

11. The method according to any one of claims 6 to 10, characterized in that, The method further includes: The fifth instruction is sent to instruct the second device to close the fast charging mode. A message is received from the second device that the fast charging mode has been closed.

12. The method of claim 11, wherein, The method further includes: The universal serial bus voltage provided by the power supply device to the fast charging circuit is adjusted to an initial voltage.

13. A quick charging circuit detection device, characterized in that, The apparatus includes modules or units for implementing the method of any one of claims 1 to 5.

14. A fast charging circuit detection device, comprising: The apparatus includes modules or units for implementing the method of any one of claims 6 to 12.

15. An apparatus, comprising: The apparatus includes a processor and a memory, which are connected to each other, wherein the memory is configured to store a computer program including program instructions, and the processor is configured to invoke the program instructions to execute the fast charging circuit detection method of any one of claims 1 to 5 or the fast charging circuit detection method of any one of claims 6 to 12.

16. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program including program instructions, which, when executed by a processor, cause the processor to execute the fast charging circuit detection method of any one of claims 1 to 5 or the fast charging circuit detection method of any one of claims 6 to 12.

17. A chip, characterized by The chip includes a processor that executes the fast charging circuit detection method of any one of claims 1 to 5 or the fast charging circuit detection method of any one of claims 6 to 12.

18. A chip module, characterized by The chip module includes a transceiver assembly and a chip, and the chip includes a processor that executes the fast charging circuit detection method of any one of claims 1 to 5 or the fast charging circuit detection method of any one of claims 6 to 12.

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