Method, device, equipment and medium for testing random access memory (RAM)

Abstract

The application discloses a random access memory (RAM) test method, device, equipment and medium. The method comprises the following steps: converting parameter information of various random access memories (RAMs) into parameter information in a preset format through a preset format conversion script, and storing the parameter information in a preset parameter document; storing test excitation signals and reference models corresponding to various random access memories (RAMs); if preset format parameter information of a measured random access memory (RAM) input by a user is acquired, then target test excitation signals and target reference models corresponding to the preset format parameter information of the measured random access memory (RAM) are acquired to perform a test. According to the application, the test excitation signals used for triggering the random access memory (RAM) test and the reference models used for simulating the random access memory (RAM) can be automatically acquired according to the parameter information, and the test can be automatically performed according to the test excitation signals and the reference models.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a method, apparatus, device and medium for testing random access memory (RAM). Background Technology

[0002] To ensure the correct functionality of the Random Access Memory (RAM) used in the project, all RAMs used in the project need to be tested. During the testing process, stimuli are applied to the RAM under test, and the response of the RAM under test is analyzed to determine whether the RAM is functioning correctly.

[0003] In related technologies, technicians typically need to first analyze the relevant parameters of the random access memory (RAM) under test, configure the stimulus addition scheme and response analysis scheme corresponding to the RAM under test based on the relevant parameters of the RAM under test, and then test the RAM under test based on the stimulus addition scheme and response analysis scheme.

[0004] However, the random access memory (RAM) used in the project includes various types and from different manufacturers. In the related testing solutions, technicians need to analyze different parameters and configure different stimulus addition and response analysis schemes for different RAMs, a cumbersome process with a high probability of errors. Summary of the Invention

[0005] This invention provides a method, apparatus, device, and medium for testing random access memory (RAM), to solve the problem that in related technical testing schemes, technicians need to analyze different relevant parameters and configure different stimulus addition schemes and response analysis schemes for different RAMs, which is a cumbersome process with a high probability of error.

[0006] According to one aspect of the present invention, a method for testing random access memory (RAM) is provided, comprising:

[0007] The parameter information of various types of random access memory (RAM) is converted into parameter information of a preset format using a preset format conversion script, and the preset format parameter information of various types of random access memory (RAM) is stored in a preset parameter document.

[0008] Establish a correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the test stimulus signals corresponding to the various types of random access memory (RAM), and store the test stimulus signals corresponding to the various types of random access memory (RAM);

[0009] Establish a correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the reference model corresponding to the various types of random access memory (RAM), and store the reference model corresponding to the various types of random access memory (RAM);

[0010] If the user inputs parameter information in a preset format for the random access memory (RAM) under test, then based on the parameter information in the preset format for the RAM under test, the target test stimulus signal and target reference model corresponding to the RAM under test are obtained, and the RAM under test is tested using the target test stimulus signal and the target reference model.

[0011] According to another aspect of the present invention, a test apparatus for random access memory (RAM) is provided, comprising:

[0012] The parameter storage module is used to convert parameter information of various types of random access memory (RAM) into parameter information of a preset format through a preset format conversion script, and store the parameter information of the various types of random access memory (RAM) in the preset format into a preset parameter document;

[0013] The signal storage module is used to establish the correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the test excitation signals corresponding to the various types of random access memory (RAM), and to store the test excitation signals corresponding to the various types of random access memory (RAM).

[0014] The model storage module is used to establish the correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the reference model corresponding to the various types of random access memory (RAM), and to store the reference model corresponding to the various types of random access memory (RAM).

[0015] The testing module is used to, if it obtains parameter information of the random access memory (RAM) under test in a preset format input by the user, acquire a target test stimulus signal and a target reference model corresponding to the RAM under test based on the parameter information of the RAM under test in the preset format, and test the RAM under test using the target test stimulus signal and the target reference model.

[0016] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0017] At least one processor, and a memory communicatively connected to the at least one processor; wherein the memory stores a computer program executable by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform a test method for random access memory (RAM) according to any embodiment of the present invention.

[0018] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions for causing a processor to execute and implement the test method for random access memory (RAM) according to any embodiment of the present invention.

[0019] The technical solution of this invention converts parameter information of various types of random access memory (RAM) into parameter information of a preset format using a preset format conversion script, and stores the preset format parameter information of various types of RAM in a preset parameter document; then, it establishes a correspondence between the preset format parameter information of various types of RAM and the corresponding test stimulus signals of various types of RAM, and stores the test stimulus signals corresponding to various types of RAM; it also establishes a correspondence between the preset format parameter information of various types of RAM and the corresponding reference models of various types of RAM, and stores the corresponding reference models of various types of RAM; upon receiving a test request corresponding to the RAM under test, it obtains the target test stimulus signal and target reference model corresponding to the RAM under test based on the preset format parameter information of the RAM under test, and performs the test on the RAM under test using the target test stimulus signal and target reference model. This method for testing RAM addresses the problem of cumbersome and error-prone manual testing, where technicians need to analyze different parameters and configure various stimulus and response analysis schemes for different RAMs. It retrieves and stores preset-format parameter information, corresponding test stimulus signals, and reference models for various RAMs. During testing, it automatically retrieves the target test stimulus signal and the target reference model to simulate the RAM, based on the preset-format parameter information. It then automatically tests the RAM based on these signals and models, determining its functionality and generating test results. This method effectively avoids the cumbersome and error-prone nature of manual testing.

[0020] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a flowchart of a test method for random access memory (RAM) provided in Embodiment 1 of the present invention.

[0023] Figure 2 This is a flowchart of a test method for random access memory (RAM) provided in Embodiment 2 of the present invention.

[0024] Figure 3A This is a schematic diagram of a test device for random access memory (RAM) provided in Embodiment 3 of the present invention.

[0025] Figure 3B This is a schematic diagram of an environment architecture provided in Embodiment 3 of the present invention.

[0026] Figure 4 A schematic diagram of the structure of an electronic device for implementing the test method of random access memory (RAM) according to an embodiment of the present invention. Detailed Implementation

[0027] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0028] It should be noted that the terms "target," "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising," "including," and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0029] Example 1

[0030] Figure 1 This is a flowchart of a testing method for random access memory (RAM) according to Embodiment 1 of the present invention. This embodiment is applicable to testing various types of RAM used in a project to determine whether the RAM functions correctly. This method can be executed by a RAM testing device, which can be implemented in hardware and / or software and can be configured in an electronic device. Figure 1 As shown, the method includes:

[0031] Step 101: Convert the parameter information of various types of random access memory (RAM) into parameter information of a preset format using a preset format conversion script, and store the preset format parameter information of various types of random access memory (RAM) into a preset parameter document.

[0032] Optionally, the parameter information of the Random Access Memory (RAM) includes the parameter names and values ​​of multiple parameters related to the RAM. These parameters include, but are not limited to: the RAM type, width, depth, error correction code (ECC) width, a value indicating whether ECC is included, read operation latency, number of instantiations, physical name, physical size, operating frequency, and / or RAM identifier.

[0033] Optionally, the physical name of the Random Access Memory (RAM) is a sequence of characters used to uniquely identify the RAM. The physical name of the RAM can be defined by the user via a computer, or it can be automatically generated by a user-written computer program based on characteristics such as the physical size, type, width, depth, and whether it has a bitmask.

[0034] In a specific example, the type of random access memory (RAM) under test is "1R1W", with a width of 132, a depth of 18, an error correction code (ECC) width of 0, a value indicating whether ECC is included (0), a read operation latency of 1 clock cycle, a number of instantiations of 2, and a physical name of "*42p24x66*". The parameter information for this type of RAM is as follows: type of RAM under test, 1R1W; width, 132; depth, 18; error correction code (ECC) width, 0; value indicating whether ECC is included, 0; read operation latency, 1; number of instantiations, 2; physical name, *42p24x66*.

[0035] Optionally, converting parameter information to a preset format means replacing the parameter names in the parameter information with preset string identifiers corresponding to the parameters. The preset string identifier is a pre-defined string used to identify the parameter.

[0036] Therefore, parameters of the random access memory (RAM) can be stored using more concise strings.

[0037] Electronic devices store the parameter names and corresponding preset string identifiers for each parameter. Based on the stored parameter names and corresponding preset string identifiers, the preset string identifier corresponding to a specified parameter can be queried and determined according to the parameter name of the specified parameter.

[0038] Optionally, the preset format conversion script is a script written and set by the user in the electronic device, used to convert the parameter information of various types of random access memory (RAM) into parameter information in a preset format, and then store the preset format parameter information of various types of random access memory (RAM) into a preset parameter document.

[0039] Optionally, the user inputs the parameter information of each type of random access memory (RAM) used in the project into the electronic device. The electronic device calls a preset format conversion script. Based on the parameter names in the parameter information of each type of RAM, the script queries and determines the preset string identifier corresponding to the parameter in the parameter information of each type of RAM. The parameter names in the parameter information of each type of RAM are then replaced with the preset string identifier corresponding to the parameter, thereby converting the parameter information of each type of RAM into parameter information in a preset format. Finally, the preset format parameter information of each type of RAM is stored in a preset parameter document.

[0040] Optionally, a preset parameter document is a document used to store parameter information in a preset format for various types of random access memory (RAM). The preset parameter information in preset formats differs for different types of RAM. Therefore, the preset parameter document allows for the unified storage and management of the preset format parameter information for various types of RAM used in the project.

[0041] In a specific example, a certain type of random access memory (RAM) has a depth of 88, a width of 128, an ECC width of 9, a read operation latency of 1 clock cycle, a single instantiation count, a physical size of "88×138", an operating frequency of 80MHz, and a RAM identifier of 0. The parameters of this type of RAM are: depth, 88; width, 128; ECC width, 9; read operation latency, 1; number of instantiations, 1; physical depth, 88; physical width, 138; operating frequency, 80MHz; RAM identifier, 0. The default string identifier for depth is defined RAM_DEPTH. The default string identifier for width is defined RAM_WIDTH. The default string identifier for ECC width is defined RAM_ECC_WIDTH. The default string identifier for read operation latency is defined RAM_RD_DELAY. The default string identifier for the number of instantiations is defined RAM_INSTANCE. The default string identifier corresponding to the physical depth is defined RAM_PHYSICS_DEPTH. The default string identifier corresponding to the physical width is defined RAM_PHYSICS_WIDTH. The default string identifier corresponding to the operating frequency is defined RAM_FREQ. The default string identifier corresponding to the random access memory identifier is defined RAM_ID. The default format parameter information for this type of random access memory (RAM) is: defined RAM_DEPTH, 88; defined RAM_WIDTH, 128; defined RAM_ECC_WIDTH, 9; defined RAM_RD_DELAY, 1; defined RAM_INSTANCE, 1; defined RAM_PHYSICS_DEPTH, 88; defined RAM_PHYSICS_WIDTH, 138; defined RAM_FREQ, 80; defined RAM_ID, 0.

[0042] Step 102: Establish the correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the test stimulus signals corresponding to the various types of random access memory (RAM), and store the test stimulus signals corresponding to the various types of random access memory (RAM).

[0043] Optionally, the test stimulus signals corresponding to various types of random access memory (RAM) are the stimulus signals used in the current test process to trigger the testing of various types of RAM. The user inputs the test stimulus signals corresponding to various types of RAM into the electronic device.

[0044] Optionally, establishing the correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the test stimulus signals corresponding to the various types of RAM, and storing the test stimulus signals corresponding to the various types of RAM, includes: acquiring the test stimulus signals corresponding to the various types of RAM; establishing the correspondence between the parameter information of the various types of RAM in a preset format and the test stimulus signals corresponding to the various types of RAM; and storing the test stimulus signals corresponding to the various types of RAM to a first storage location.

[0045] Optionally, the system acquires the test stimulus signals corresponding to various types of random access memory (RAM) input by the user, establishes a correspondence between the parameter information of each type of RAM in a preset format and the corresponding test stimulus signals, thereby obtaining the correspondence between the parameter information and the test stimulus signals. Then, the test stimulus signals corresponding to each type of RAM are stored in a first storage location. The first storage location is the storage location in the electronic device used to store the test stimulus signals corresponding to each type of RAM.

[0046] Therefore, the excitation signals used to trigger various types of random access memory (RAM) for testing during the current testing process are uniformly stored and managed.

[0047] Step 103: Establish the correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the reference model corresponding to the various types of random access memory (RAM), and store the reference model corresponding to the various types of random access memory (RAM).

[0048] Optionally, the reference models for various types of random access memory (RAM) are simulation models of various RAMs written by the user, used to simulate various types of RAMs. When an excitation signal is input to the reference model corresponding to the RAM, the reference model outputs a standard response signal based on the excitation signal. The standard response signal output by the reference model based on the excitation signal is the response signal that a functionally correct RAM would output based on the excitation signal. The user inputs the simulation models of various types of RAMs they have written into the electronic device.

[0049] Optionally, establishing the correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the reference model corresponding to the various types of RAM, and storing the reference model corresponding to the various types of RAM, includes: obtaining the reference model corresponding to the various types of RAM; wherein, the reference model corresponding to the various types of RAM is a simulation model of the various types of RAM, used to simulate the various types of RAM; establishing the correspondence between the parameter information of the various types of RAM in a preset format and the reference model corresponding to the various types of RAM, and storing the reference model corresponding to the various types of RAM in a second storage location.

[0050] Optionally, the reference models corresponding to various types of random access memory (RAM) input by the user are obtained, and a correspondence is established between the parameter information of the various types of RAM in a preset format and the reference models corresponding to the various types of RAM, thereby obtaining the correspondence between the parameter information and the reference models. Then, the reference models corresponding to the various types of RAM are stored in a second storage location. The second storage location is the storage location in the electronic device used to store the reference models corresponding to various types of RAM.

[0051] Therefore, reference models corresponding to various types of random access memory (RAM) are stored and managed in a unified manner.

[0052] Step 104: If the user-inputted parameter information of the random access memory (RAM) under test in a preset format is obtained, then according to the parameter information of the RAM under test in the preset format, the target test stimulus signal and the target reference model corresponding to the RAM under test are obtained, and the RAM under test is tested through the target test stimulus signal and the target reference model.

[0053] Optionally, the random access memory (RAM) under test is the RAM that needs to be tested at the current moment from all the random access memory RAMs used in the project.

[0054] Optionally, the user can be a tester responsible for managing the testing process of the RAM under test. The user inputs the parameter information of the RAM under test in a preset format into the electronic device.

[0055] Optionally, the step of obtaining the target test stimulus signal and target reference model corresponding to the random access memory (RAM) under test based on the parameter information of the RAM under test in a preset format includes: querying the parameter information of the RAM in the preset format of the various types of RAMs to find target parameter information that is the same as the parameter information of the RAM under test; if the target parameter information that is the same as the parameter information of the RAM under test is found, then according to the correspondence between the parameter information and the test stimulus signal, obtaining the test stimulus signal corresponding to the target parameter information, and determining the test stimulus signal corresponding to the target parameter information as the target test stimulus signal corresponding to the RAM under test; and according to the correspondence between the parameter information and the reference model, obtaining the reference model corresponding to the target parameter information, and determining the reference model corresponding to the target parameter information as the reference model corresponding to the RAM under test.

[0056] Optionally, in the parameter information of various types of random access memory (RAM) in preset format, the target parameter information that is the same as the parameter information of the RAM under test in preset format is queried, including: in the parameter information of various types of random access memory (RAM) in preset format stored in preset parameter document, the target parameter information that is the same as the parameter information of the RAM under test in preset format is queried.

[0057] Optionally, if target parameter information with the same preset format as the parameter information of the random access memory (RAM) under test is found, then according to the correspondence between the parameter information and the test stimulus signal, the test stimulus signal corresponding to the target parameter information is obtained as the target test stimulus signal corresponding to the RAM under test, and according to the correspondence between the parameter information and the reference model, the reference model corresponding to the target parameter information is obtained as the reference model corresponding to the RAM under test.

[0058] Therefore, based on the parameter information of the random access memory (RAM) under test in a preset format, the target test stimulus signal used to trigger the RAM under test to perform the test and the target reference model used to simulate the RAM under test are obtained from the test stimulus signals and reference models corresponding to various types of RAMs during the current test process.

[0059] Optionally, if no target parameter information with the same preset format as the parameter information of the random access memory (RAM) under test is found, an error message will be provided to the user. The preset error message indicates that no target parameter information with the same parameter information as the RAM under test is found, and the target test stimulus signal and target reference model corresponding to the RAM under test cannot be obtained, so the test cannot be performed.

[0060] Optionally, testing the random access memory (RAM) under test using the target test stimulus signal and the target reference model includes: inputting the target test stimulus signal to the RAM under test and the target reference model respectively; obtaining the target response signal of the RAM under test based on the target test stimulus signal; comparing the target response signal and the standard response signal output by the target reference model with the target test stimulus signal to generate the current test result of the RAM under test.

[0061] Optionally, the target test stimulus signal is input to both the random access memory under test (RAM) and the target reference model. The RAM outputs a target response signal based on the target test stimulus signal. The target reference model outputs a target standard response signal based on the target test stimulus signal. The target standard response signal is the response signal that a correctly functioning RAM would output based on the target test stimulus signal.

[0062] Optionally, inputting the target test stimulus signal to the random access memory (RAM) under test includes: determining the name of the input port of the RAM under test based on the physical name in the parameter information of the RAM under test; and inputting the target test stimulus signal to the input port of the RAM under test based on the name of the input port of the RAM under test.

[0063] Optionally, the name of the input port of the RAM under test is determined based on the physical name in the parameter information of the RAM under test. This includes: obtaining the name of the input port corresponding to the physical name of the RAM under test according to a preset correspondence between physical names and input port names. The name of the input port corresponding to the physical name of the RAM under test is the name of the input port of the RAM under test.

[0064] Optionally, the preset mapping between physical names and input port names includes the physical name of each random access memory (RAM) and the name of each RAM's input port. Each RAM's physical name corresponds one-to-one with the name of its input port.

[0065] Optionally, obtaining the target response signal of the random access memory (RAM) under test based on the target test stimulus signal includes: determining the name of the output port of the RAM under test according to the physical name in the parameter information of the RAM under test; and acquiring the target response signal output by the RAM under test based on the target test stimulus signal at the output port of the RAM under test according to the name of the output port of the RAM under test.

[0066] Optionally, the name of the output port of the RAM under test is determined based on the physical name in the parameter information of the RAM under test. This includes: obtaining the name of the output port corresponding to the physical name of the RAM under test according to a preset correspondence between physical names and output port names. The name of the output port corresponding to the physical name of the RAM under test is the name of the output port of the RAM under test.

[0067] Optionally, the preset mapping between physical names and output port names includes the physical name of each random access memory (RAM) and the name of each RAM's output port. There is a one-to-one correspondence between the physical name of each RAM and the name of its output port.

[0068] Optionally, the step of comparing the target response signal and the standard response signal corresponding to the target reference model output and the target test stimulus signal to generate the current test result of the random access memory (RAM) under test includes: determining whether the target response signal is consistent with the standard response signal; if yes, then determining that the current test result of the RAM under test is qualified; if no, then determining that the current test result of the RAM under test is unqualified. The response signal can be a write enable signal, read enable signal, write operation signal, read operation signal, write data signal, read data signal, write clock signal, or read clock signal of the RAM under test.

[0069] Optionally, the random access memory (RAM) under test outputs a target response signal based on the target test excitation signal. The target standard response signal is the response signal that a RAM under test with correct functionality would output based on the target test excitation signal. If the target response signal is consistent with the standard response signal, indicating that the functionality of the RAM under test is correct, then it is determined that the current test result of the RAM under test is qualified. If the target response signal is inconsistent with the standard response signal, indicating that there may be an abnormality in the functionality of the RAM under test, then it is determined that the current test result of the RAM under test is unqualified.

[0070] Thus, by comparing the target response signal of the RAM under test based on the target test excitation signal with the standard response signal corresponding to the target test excitation signal, it is determined whether the functionality of the RAM under test is correct, and the corresponding current test result is generated.

[0071] Optionally, it further includes: obtaining excitation signal update information input by the user, and updating the test excitation signals corresponding to various random access memories (RAMs) according to the excitation signal update information.

[0072] Optionally, the excitation signal update information is information used to update the test excitation signals corresponding to various random access memories (RAMs), and includes the latest test excitation signals corresponding to various random access memories (RAMs) set by the user. According to the excitation signal update information, the current test excitation signals corresponding to various random access memories (RAMs) are updated to the latest test excitation signals corresponding to various random access memories (RAMs) set by the user.

[0073] Thus, the user can use the excitation signal update information to update the test excitation signals corresponding to various random access memories (RAMs) in real time, so as to change the test excitation signals corresponding to various random access memories (RAMs) according to different test requirements, and then test the random access memories (RAMs) required in the project based on the changed test excitation signals.

[0074] The technical solution of this invention converts parameter information of various types of random access memory (RAM) into parameter information of a preset format using a preset format conversion script, and stores the preset format parameter information of various types of RAM in a preset parameter document; then, it establishes a correspondence between the preset format parameter information of various types of RAM and the corresponding test stimulus signals of various types of RAM, and stores the test stimulus signals corresponding to various types of RAM; it also establishes a correspondence between the preset format parameter information of various types of RAM and the corresponding reference models of various types of RAM, and stores the corresponding reference models of various types of RAM; upon receiving a test request corresponding to the RAM under test, it obtains the target test stimulus signal and target reference model corresponding to the RAM under test based on the preset format parameter information of the RAM under test, and performs the test on the RAM under test using the target test stimulus signal and target reference model. This method for testing RAM addresses the problem of cumbersome and error-prone manual testing, where technicians need to analyze different parameters and configure various stimulus and response analysis schemes for different RAMs. It retrieves and stores preset-format parameter information, corresponding test stimulus signals, and reference models for various RAMs. During testing, it automatically retrieves the target test stimulus signal and the target reference model to simulate the RAM, based on the preset-format parameter information. It then automatically tests the RAM based on these signals and models, determining its functionality and generating test results. This method effectively avoids the cumbersome and error-prone nature of manual testing.

[0075] Example 2

[0076] Figure 2 This is a flowchart of a test method for random access memory (RAM) provided in Embodiment 2 of the present invention. The embodiments of the present invention can be combined with various optional schemes in one or more of the above embodiments.

[0077] like Figure 2 As shown, the method includes:

[0078] Step 201: Convert the parameter information of various types of random access memory (RAM) into parameter information of a preset format using a preset format conversion script, and store the preset format parameter information of various types of random access memory (RAM) into a preset parameter document.

[0079] Step 202: Establish the correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the test stimulus signals corresponding to the various types of random access memory (RAM), and store the test stimulus signals corresponding to the various types of random access memory (RAM).

[0080] Step 203: Establish the correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the reference model corresponding to the various types of random access memory (RAM), and store the reference model corresponding to the various types of random access memory (RAM).

[0081] Step 204: If the user-inputted parameter information of the random access memory (RAM) under test in a preset format is obtained, then according to the parameter information of the random access memory (RAM) under test in a preset format, the target test excitation signal and target reference model corresponding to the random access memory (RAM) under test are obtained.

[0082] Optionally, the step of obtaining the target test stimulus signal and target reference model corresponding to the random access memory (RAM) under test based on the parameter information of the RAM under test in a preset format includes: querying the parameter information of the RAM in the preset format of the various types of RAMs to find target parameter information that is the same as the parameter information of the RAM under test; if the target parameter information that is the same as the parameter information of the RAM under test is found, then according to the correspondence between the parameter information and the test stimulus signal, obtaining the test stimulus signal corresponding to the target parameter information, and determining the test stimulus signal corresponding to the target parameter information as the target test stimulus signal corresponding to the RAM under test; and according to the correspondence between the parameter information and the reference model, obtaining the reference model corresponding to the target parameter information, and determining the reference model corresponding to the target parameter information as the reference model corresponding to the RAM under test.

[0083] Optionally, in the parameter information of various types of random access memory (RAM) in preset format, the target parameter information that is the same as the parameter information of the RAM under test in preset format is queried, including: in the parameter information of various types of random access memory (RAM) in preset format stored in preset parameter document, the target parameter information that is the same as the parameter information of the RAM under test in preset format is queried.

[0084] Optionally, if target parameter information with the same preset format as the parameter information of the random access memory (RAM) under test is found, then according to the correspondence between the parameter information and the test stimulus signal, the test stimulus signal corresponding to the target parameter information is obtained as the target test stimulus signal corresponding to the RAM under test, and according to the correspondence between the parameter information and the reference model, the reference model corresponding to the target parameter information is obtained as the reference model corresponding to the RAM under test.

[0085] Therefore, based on the parameter information of the random access memory (RAM) under test in a preset format, the target test stimulus signal used to trigger the RAM under test to perform the test and the target reference model used to simulate the RAM under test are obtained from the test stimulus signals and reference models corresponding to various types of RAMs during the current test process.

[0086] Optionally, if no target parameter information with the same preset format as the parameter information of the random access memory (RAM) under test is found, an error message will be provided to the user. The preset error message indicates that no target parameter information with the same parameter information as the RAM under test is found, and the target test stimulus signal and target reference model corresponding to the RAM under test cannot be obtained, so the test cannot be performed.

[0087] Step 205: Input the target test excitation signal into the random access memory (RAM) under test and the target reference model, respectively.

[0088] Step 206: Obtain the target response signal of the random access memory (RAM) under test based on the target test stimulus signal.

[0089] Step 207: Compare the target response signal and the target reference model output with the standard response signal corresponding to the target test excitation signal to generate the current test result of the tested random access memory RAM.

[0090] The technical solution of this invention obtains and stores parameter information, corresponding test stimulus signals, and corresponding reference models of various types of random access memory (RAM) in a preset format. During the testing process of the RAM under test, it automatically obtains the target test stimulus signal used to trigger the testing of the RAM under test and the target reference model used to simulate the RAM under test based on the parameter information of the RAM under test. It automatically tests the RAM under test based on the obtained target test stimulus signal and target reference model, determines whether the function of the RAM under test is correct, and generates the corresponding current test results. This has the beneficial effect of avoiding the problems of cumbersome process and high error probability in manual operation.

[0091] Example 3

[0092] Figure 3A This is a schematic diagram of a test apparatus for random access memory (RAM) provided in Embodiment 3 of the present invention. The apparatus can be configured in an electronic device. Figure 3A As shown, the device includes: a parameter storage module 301, a signal storage module 302, a model storage module 303, and a test module 304.

[0093] The system includes the following modules: a parameter storage module 301, which converts parameter information of various types of random access memory (RAM) into parameter information of a preset format using a preset format conversion script, and stores the preset format parameter information of the various types of RAM in a preset parameter document; a signal storage module 302, which establishes a correspondence between the preset format parameter information of the various types of RAM and the corresponding test stimulus signals, and stores the corresponding test stimulus signals; a model storage module 303, which establishes a correspondence between the preset format parameter information of the various types of RAM and the corresponding reference models, and stores the corresponding reference models; and a test module 304, which, if it obtains the preset format parameter information of the RAM under test input by the user, obtains the target test stimulus signal and the target reference model corresponding to the RAM under test based on the preset format parameter information of the RAM under test, and tests the RAM under test using the target test stimulus signal and the target reference model.

[0094] The technical solution of this invention converts parameter information of various types of random access memory (RAM) into parameter information of a preset format using a preset format conversion script, and stores the preset format parameter information of various types of RAM in a preset parameter document; then, it establishes a correspondence between the preset format parameter information of various types of RAM and the corresponding test stimulus signals of various types of RAM, and stores the test stimulus signals corresponding to various types of RAM; it also establishes a correspondence between the preset format parameter information of various types of RAM and the corresponding reference models of various types of RAM, and stores the corresponding reference models of various types of RAM; upon receiving a test request corresponding to the RAM under test, it obtains the target test stimulus signal and target reference model corresponding to the RAM under test based on the preset format parameter information of the RAM under test, and performs the test on the RAM under test using the target test stimulus signal and target reference model. This method for testing RAM addresses the problem of cumbersome and error-prone manual testing, where technicians need to analyze different parameters and configure various stimulus and response analysis schemes for different RAMs. It retrieves and stores preset-format parameter information, corresponding test stimulus signals, and reference models for various RAMs. During testing, it automatically retrieves the target test stimulus signal and the target reference model to simulate the RAM, based on the preset-format parameter information. It then automatically tests the RAM based on these signals and models, determining its functionality and generating test results. This method effectively avoids the cumbersome and error-prone nature of manual testing.

[0095] In an optional embodiment of the present invention, the test module 304 may include, when performing the operation of testing the random access memory (RAM) under test using the target test stimulus signal and the target reference model, specifically: inputting the target test stimulus signal to the RAM under test and the target reference model respectively; obtaining the target response signal of the RAM under test based on the target test stimulus signal; comparing the target response signal and the standard response signal output by the target reference model with the target test stimulus signal to generate the current test result of the RAM under test.

[0096] In a specific example, the test module 304 includes: an excitation unit, configured to, if it obtains parameter information of the random access memory (RAM) under test in a preset format input by the user, acquire a target test excitation signal and a target reference model corresponding to the RAM under test; a driving unit, configured to input the target test excitation signal to the RAM under test and the target reference model respectively; an acquisition unit, configured to acquire a target response signal of the RAM under test based on the target test excitation signal; and a comparison unit, configured to compare the target response signal and the standard response signal output by the target reference model with the target test excitation signal to generate the current test result of the RAM under test.

[0097] Figure 3B This is a schematic diagram of an environment architecture provided in Embodiment 3 of the present invention. Environment 311 is a test environment for testing the random access memory (RAM) 313 under test. Environment 311 includes: an excitation unit 321, a driving unit 322, a target reference model 312, an acquisition unit 323, and a comparison unit 324. The excitation unit 321 is connected to the driving unit 322, and the driving unit 322 inputs the target test excitation signal to the RAM 313 under test and the target reference model 312 respectively. The acquisition unit 323 acquires the target response signal of the RAM 313 under test based on the target test excitation signal. The comparison unit 324 compares the target response signal with the standard response signal output by the target reference model 312 corresponding to the target test excitation signal, and generates the current test result of the RAM 313 under test.

[0098] In an optional embodiment of the present invention, the test module 304, when performing the operation of obtaining a target test stimulus signal and a target reference model corresponding to the random access memory (RAM) under test based on the parameter information of the RAM under test in a preset format, specifically performs the following: querying for target parameter information that is identical to the parameter information of the RAM under test in the preset format of the various types of RAMs; if target parameter information identical to the parameter information of the RAM under test is found, then, based on the correspondence between the parameter information and the test stimulus signal, obtaining the test stimulus signal corresponding to the target parameter information, and determining the test stimulus signal corresponding to the target parameter information as the target test stimulus signal corresponding to the RAM under test; and, based on the correspondence between the parameter information and the reference model, obtaining the reference model corresponding to the target parameter information, and determining the reference model corresponding to the target parameter information as the reference model corresponding to the RAM under test.

[0099] In an optional embodiment of the present invention, the signal storage module 302 is specifically used to: acquire test stimulus signals corresponding to the various types of random access memory (RAM); establish a correspondence between the parameter information of the various types of random access memory (RAM) in a preset format and the test stimulus signals corresponding to the various types of random access memory (RAM); and store the test stimulus signals corresponding to the various types of random access memory (RAM) in a first storage location.

[0100] In an optional embodiment of the present invention, the model storage module 303 is specifically used to: obtain reference models corresponding to the various types of random access memory (RAM); wherein the reference models corresponding to the various types of RAM are simulation models of the various types of RAM, used to simulate the various types of RAM; establish a correspondence between the parameter information of the various types of RAM in a preset format and the reference models corresponding to the various types of RAM, and store the reference models corresponding to the various types of RAM in a second storage location.

[0101] In an optional embodiment of the present invention, the test module 304, when performing the comparison of the target response signal and the standard response signal corresponding to the target reference model output and the target test stimulus signal to generate the current test result of the random access memory (RAM) under test, is specifically configured to: determine whether the target response signal is consistent with the standard response signal; if yes, determine that the current test result of the RAM under test is qualified; if no, determine that the current test result of the RAM under test is unqualified.

[0102] In an optional embodiment of the present invention, the signal storage module 302 may be further configured to: acquire excitation signal update information input by the user, and update the test excitation signals corresponding to various random access memories (RAMs) according to the excitation signal update information.

[0103] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0104] The above-described random access memory (RAM) testing apparatus can execute the random access memory (RAM) testing method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects for executing the random access memory (RAM) testing method.

[0105] Example 4

[0106] Figure 4 A schematic diagram of an electronic device 10 is shown, which can be used to implement a test method for random access memory (RAM) according to embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0107] like Figure 4As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or a computer program constructed from storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0108] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0109] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the testing methods for random access memory (RAM).

[0110] In some embodiments, the method for testing the random access memory (RAM) may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage cell 18. In some embodiments, part or all of the computer program may be loaded and / or mounted on the electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is built into RAM 13 and executed by processor 11, one or more steps of the method for testing the random access memory (RAM) described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the method for testing the random access memory (RAM) by any other suitable means (e.g., by means of firmware).

[0111] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0112] Computer programs for implementing the test methods of random access memory (RAM) of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to the processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The computer programs can be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0113] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0114] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0115] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0116] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0117] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0118] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method of testing a random access memory (RAM), characterized by, The method comprises the following steps: Converting the parameter information of various random access memories (RAMs) into parameter information in a preset format by using a preset format conversion script, and storing the parameter information in a preset format of the various RAMs into a preset parameter document; wherein the conversion of the parameter information of the various RAMs into the parameter information in the preset format comprises replacing parameter names of parameters contained in the parameter information with preset string identifiers corresponding to the parameters, the preset string identifiers being preset strings used for identifying the parameters; Establishing a corresponding relationship between the parameter information in the preset format of the various RAMs and test excitation signals corresponding to the various RAMs, and storing the test excitation signals corresponding to the various RAMs; Establishing a corresponding relationship between the parameter information in the preset format of the various RAMs and reference models corresponding to the various RAMs, and storing the reference models corresponding to the various RAMs; If parameter information in the preset format of a to-be-tested RAM input by a user is obtained, then according to the parameter information in the preset format of the to-be-tested RAM, a target test excitation signal and a target reference model corresponding to the to-be-tested RAM are obtained, and the target test excitation signal is input into the to-be-tested RAM and the target reference model; a target response signal of the to-be-tested RAM based on the target test excitation signal is obtained; the target response signal and a standard response signal corresponding to the target test excitation signal output by the target reference model are compared, and a current test result of the to-be-tested RAM is generated.

2. The method of claim 1, wherein, The obtaining of the target test excitation signal and the target reference model corresponding to the to-be-tested RAM according to the parameter information in the preset format of the to-be-tested RAM comprises the following steps: In the parameter information in the preset format of the various RAMs, target parameter information identical to the parameter information in the preset format of the to-be-tested RAM is queried; If the target parameter information identical to the parameter information in the preset format of the to-be-tested RAM is queried, then according to a corresponding relationship between parameter information and test excitation signals, a test excitation signal corresponding to the target parameter information is obtained, and the test excitation signal corresponding to the target parameter information is determined as the target test excitation signal corresponding to the to-be-tested RAM; According to a corresponding relationship between parameter information and reference models, a reference model corresponding to the target parameter information is obtained, and the reference model corresponding to the target parameter information is determined as the reference model corresponding to the to-be-tested RAM.

3. The method of claim 1, wherein, The method comprises the following steps: obtaining the test excitation signals corresponding to the various types of RAMs; establishing the correspondence between the parameter information in the preset format of the various types of RAMs and the test excitation signals corresponding to the various types of RAMs, and storing the test excitation signals corresponding to the various types of RAMs in a first storage location.

4. The method of claim 1, wherein, The method comprises the following steps: obtaining the reference models corresponding to the various types of RAMs; wherein the reference models corresponding to the various types of RAMs are simulation models of the various types of RAMs, and are used for simulating the various types of RAMs; establishing the correspondence between the parameter information in the preset format of the various types of RAMs and the reference models corresponding to the various types of RAMs, and storing the reference models corresponding to the various types of RAMs in a second storage location.

5. The method of claim 1, wherein, The method comprises the following steps: comparing the target response signal with the standard response signal corresponding to the target test excitation signal, and generating the current test result of the measured RAM; determining whether the target response signal is consistent with the standard response signal; if yes, determining that the current test result of the measured RAM is qualified; 6. The method of claim 1, wherein, if no, determining that the current test result of the measured RAM is unqualified. The method further comprises the following steps:

7. A random access memory (RAM) testing apparatus, comprising: obtaining the excitation signal update information input by a user, and updating the test excitation signals corresponding to the various types of RAMs according to the excitation signal update information. The method comprises the following steps: a parameter storage module is configured to convert the parameter information of the various types of RAMs into parameter information in a preset format by using a preset format conversion script, and store the parameter information in the preset format of the various types of RAMs in a preset parameter document; wherein the conversion of the parameter information of the various types of RAMs into the parameter information in the preset format refers to replacing the parameter names of the parameters contained in the parameter information with preset string identifiers corresponding to the parameters, and the preset string identifiers are preset strings used for identifying the parameters; a signal storage module is configured to establish the correspondence between the parameter information in the preset format of the various types of RAMs and the test excitation signals corresponding to the various types of RAMs, and store the test excitation signals corresponding to the various types of RAMs. A model storage module is configured to establish a corresponding relationship between parameter information of a preset format of each type of RAM and a reference model corresponding to the each type of RAM, and store the reference model corresponding to the each type of RAM; The test module comprises: An excitation unit is configured to, if parameter information of a preset format of a tested RAM input by a user is acquired, acquire a target test excitation signal and a target reference model corresponding to the tested RAM according to the parameter information of a preset format of the tested RAM; A driving unit is configured to input the target test excitation signal to the tested RAM and the target reference model, respectively; An acquisition unit is configured to acquire a target response signal of the tested RAM based on the target test excitation signal; A comparison unit is configured to compare the target response signal with a standard response signal corresponding to the target test excitation signal output by the target reference model, and generate a current test result of the tested RAM.

8. An electronic device, comprising: The electronic device comprises: at least one processor, and a memory connected to the at least one processor in communication; wherein the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to execute the test method of the RAM according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions, and the computer instructions are used to enable the processor to execute the test method of the RAM according to any one of claims 1-6 when executed.

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