A method of manufacturing a semiconductor structure
By using self-aligned processes and selective etching techniques with amorphous elemental semiconductor materials in semiconductor manufacturing, the problem of poor stability of self-aligned processes has been solved, resulting in better control of etching depth and improved electrical performance of semiconductor structures.
CN115312385BActive Publication Date: 2026-06-26CHANGXIN MEMORY TECH INC
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGXIN MEMORY TECH INC
- Filing Date
- 2022-08-04
- Publication Date
- 2026-06-26
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Figure CN115312385B_ABST
Abstract
Embodiments of the present disclosure disclose a method for manufacturing a semiconductor structure. The method comprises: providing a substrate, forming a stack layer on the substrate, the stack layer comprising at least a first sacrificial layer, the first sacrificial layer comprising amorphous elemental semiconductor material; forming a second hard mask pattern on the first sacrificial layer by a self-alignment process; performing a doping process to dope the first sacrificial layer exposed from gaps between the second hard mask pattern; removing the second hard mask pattern; and removing undoped regions of the first sacrificial layer by a selective etching process to form a first sacrificial pattern.
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