Self-destruction chip based on porous silicon composite energetic film-energetic semiconductor bridge binary structure

Abstract

The application discloses a structure device of a self-destroying chip using a porous silicon composite energetic film-energetic semiconductor bridge binary structure, which comprises an energetic semiconductor bridge, a porous silicon composite energetic film damage area and a functional chip. The energetic semiconductor bridge part comprises a silicon substrate, an SiO2 insulating layer, a heavily doped polysilicon semiconductor bridge, a gold film and a composite energetic film. The gold film is used as a lead to connect a constant voltage source and the polysilicon ignition bridge. When a proper voltage is applied, the heavily doped polysilicon semiconductor bridge is electrically exploded to excite the upper composite energetic film. The porous silicon composite energetic film damage area comprises a single crystal silicon wafer substrate, a metal bridge foil and a porous silicon composite energetic film. The lower energetic semiconductor bridge and the upper porous silicon composite energetic film are simultaneously activated, the porous silicon composite energetic film further increases the energy of the whole structure, and the upper functional chip can be reliably destroyed. The device has a simple structure, a convenient preparation process and can achieve the self-destroying function of the chip.

Description

Technical Field

[0001] This invention belongs to the field of information security and self-destruct technology, and also falls under the category of MEMS pyrotechnics. It is a self-destruct chip based on a porous silicon composite energetic thin film-energized semiconductor bridge dual structure. Background Technology

[0002] Self-destruct is a mechanism that allows a device to automatically destroy itself under predefined conditions. For example, in the military field, portable hard drives, as portable media for information storage, are frequently used to store various important documents. Theft or accidental loss of portable hard drives during transportation or transfer is not uncommon. Therefore, adding self-destruct technology to portable hard drives is necessary to protect sensitive military secrets.

[0003] Currently, common methods for self-destructing chips include: Banerjee N et al. designed a structure using a thermally expanding polymer to drive a corrosive liquid dissolution device to achieve chip self-destruction. The advantage of this method is that it does not require any corrosive or explosive substances, but it also has the problem of cumbersome procedures. The thermally expanding polymer needs to be cryogenically treated first, and then heated to 160°C to trigger the transient pulverization of the chip (Micro Electro Mechanical Systems (MEMS), 2014 IEEE 27th International Conference on. 2014: 1123-1126.). SiM K et al. sealed a packaged corrosive solution in a reservoir with a fragile rigid membrane. During the hydrolysis of the solution, the pressure increases, eventually causing the membrane to rupture. The etching solution is released from the reservoir, thereby etching the chip (Micro Electro Mechanical Systems (MEMS), 2017 IEEE 30th International Conference on. IEEE, 2017: 620-623.). However, the aforementioned self-destructing chip methods still carry the risk of not completely destroying the functional chip. Therefore, this invention designs a self-destructing chip based on a porous silicon composite energetic thin film-energized semiconductor bridge dual structure, which destroys the functional chip through physical self-destruction.

[0004] In the field of energetic materials, porous silicon is a novel functional material with nano-silicon atom clusters as its framework, possessing extremely rich morphological characteristics and unique properties. Porous silicon composite energetic films are made by filling the porous silicon voids with oxidants such as sodium perchlorate through specific methods. Under external energy stimulation, these films can undergo reactions such as combustion and explosion, generating a large amount of energy. This makes porous silicon composite energetic materials highly promising for applications, and they are widely used in the automotive industry, micro-propulsion systems, mining industry, and testing and analysis fields. Summary of the Invention

[0005] The purpose of this invention is to provide a structural design for a self-destructing chip based on a porous silicon composite energetic thin film-energized semiconductor bridge dual structure, which can reliably and stably destroy the upper functional chip.

[0006] The technical solution of this invention to solve its technical problem is as follows:

[0007] This invention relates to a self-destructing chip based on a porous silicon composite energetic thin film-energized semiconductor bridge dual structure, comprising: an energetic semiconductor bridge region, a porous silicon composite energetic thin film damage region, and a functional chip to be damaged. The energetic semiconductor bridge region includes a single-crystal silicon substrate, a SiO2 insulating layer, a heavily doped polycrystalline silicon semiconductor bridge, a gold thin film, and a composite energetic thin film. The gold thin film pads are connected to a constant voltage source via gold leads. After the power is turned on, current is transmitted to the polycrystalline silicon semiconductor bridge. The heavily doped polycrystalline silicon semiconductor bridge converts electrical energy into heat energy, which is conducted to the upper composite energetic thin film. The porous silicon composite energetic thin film damage region includes a porous silicon composite energetic thin film based on a single-crystal silicon substrate and a metal bridge foil. The energetic chip and the semiconductor bridge are bonded using MD130 epoxy adhesive. The entire porous silicon composite energetic thin film self-destructing chip device is mechanically fixed and bonded.

[0008] Preferably, the semiconductor bridge material is n-type heavily doped polycrystalline silicon, and the pad material is gold thin film pad.

[0009] Preferably, the polycrystalline silicon semiconductor bridge has a thickness of 2.5 μm and a static sheet resistance of 3.8 Ω.

[0010] Preferably, the height of the porous silicon composite energetic thin film is 40 μm.

[0011] Preferably, the oxidant selected for the porous silicon composite energetic material is sodium perchlorate or ammonium perchlorate.

[0012] Preferably, the composite energetic thin film material is Al / MoO3, Al / Fe2O3, Al / Ni, Al / CuO, Al / Co3O4, or Al / Bi2O3 / GO.

[0013] Preferably, the materials selected for the metal bridge foil are Pt bridge, Cr bridge, and Ti bridge.

[0014] Compared with the prior art, the present invention has the following advantages:

[0015] (1) The self-destructing chip designed in this invention has a simple and compact structure, and the overall process flow belongs to the MEMS process. The assembly process is convenient and easy to operate.

[0016] (2) The self-destructing chip device uses a variety of bonding methods such as gold wire connection, MD130 epoxy glue, and mechanical fixation to ensure that the self-destructing chip is strictly sealed.

[0017] (3) The porous silicon composite energetic thin film and the energetic semiconductor bridge are applied to the field of self-destructing chips to ensure energy redundancy and ensure reliable completion of the complete destruction of the upper functional chip. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the binary structure of the present invention, which is based on a porous silicon composite energetic thin film-energized semiconductor bridge.

[0019] Figure 2 This is a flowchart illustrating the fabrication process of the energetic semiconductor bridge described in this invention.

[0020] Figure 3 This is a schematic diagram of a single polysilicon semiconductor bridge according to the present invention.

[0021] Figure 4 This is a flowchart illustrating the preparation process of the porous silicon composite energetic thin film described in this invention.

[0022] Figure 5 This is a schematic diagram of the porous silicon composite energetic thin film array described in this invention.

[0023] In the figure, 1. Monocrystalline silicon substrate; 2. SiO2 insulating layer; 3. Heavily doped polycrystalline silicon semiconductor bridge; 4. Gold thin film; 5. Energetic composite thin film; 6. Porous silicon composite energetic thin film with attached metal bridge foil; 7. Monocrystalline silicon substrate; 8. Functional chip. Detailed Implementation

[0024] The present invention will now be described in further detail with reference to the embodiments and accompanying drawings. Although the present invention discloses preferred embodiments, it should be noted that the implementation methods that can achieve the objectives of the present invention are not limited thereto.

[0025] See attached document Figure 1 As shown, the self-destructing chip based on porous silicon composite energetic thin films of this invention mainly comprises three parts: an energetic semiconductor bridge, a porous silicon composite energetic thin film damage area, and a functional chip. The energetic semiconductor bridge area includes: a single-crystal silicon substrate 1, a SiO2 insulating layer 2, a heavily doped polycrystalline silicon semiconductor bridge 3, a gold thin film 4, and an energetic composite thin film 5; the porous silicon composite energetic thin film damage area includes: a porous silicon composite energetic thin film 6 with attached metal bridge foil, and a single-crystal silicon substrate 7; the functional chip 8 is the chip to be destroyed.

[0026] Reference Appendix Figure 2 As shown, the energetic semiconductor bridge region comprises: a single-crystal silicon substrate, a SiO2 insulating layer, a heavily doped polycrystalline silicon semiconductor bridge, a gold thin film, and an energetic composite thin film. The energetic semiconductor bridge is fabricated using standard MEMS processes. First, a silicon dioxide thin film is thermally grown on the silicon substrate surface. Figure 2a); Subsequently, a polycrystalline silicon thin film with a thickness of approximately 2.5 μm was deposited on the silicon dioxide layer using low-pressure chemical vapor deposition (LPCVD). Figure 2 b); then, the polycrystalline silicon thin film was thermally diffused and heavily doped with phosphorus as the dopant element. The sheet resistance of the film after doping was 3.8Ω. Figure 2 c); The pattern of the ignition bridge is transferred onto a polycrystalline silicon thin film using photolithography and deep reactive ion etching techniques. Figure 2 d); Next, gold leads are deposited on the circuit layer using magnetron sputtering technology. Figure 2 e) Finally, a composite energetic thin film is deposited by electrophoretic deposition or magnetron sputtering. Alternatively, composite thin films such as Al / MoO3, Al / Fe2O3, Al / Ni, Al / Co3O4, Al / CuO, and Al / Bi2O3 / GO can be used. Figure 2 f). By attaching a composite energetic thin film to a heavily doped polycrystalline silicon semiconductor bridge, the resulting energetic semiconductor bridge can effectively improve the output capability of the semiconductor bridge. Subsequently, the energetic semiconductor bridge and the porous silicon composite energetic thin film work together to provide sufficient reaction output energy, thereby damaging the functional chip.

[0027] Single heavily doped polysilicon semiconductor bridge, such as Figure 3 As shown, a heavily doped polycrystalline silicon semiconductor bridge is selected as the ignition bridge. Heavily doped polycrystalline silicon semiconductor bridges have advantages such as low energy consumption, high safety, and high reliability. A gold thin film serves as a pad connected to the lead wire, transferring electrical energy to the polycrystalline silicon semiconductor bridge. The gold thin film is 1340 μm long and 1320 μm wide; the polycrystalline silicon semiconductor bridge is 100 μm long and 45 μm wide; the thickness of the polycrystalline silicon semiconductor bridge and the gold thin film is approximately 2.5 μm. The entire semiconductor bridge region consists of 4×4 individual polycrystalline silicon semiconductor bridges.

[0028] The preparation process of porous silicon composite energetic thin films is as follows: Figure 4 As shown, a single-sided polished P-type monocrystalline silicon wafer is selected as the substrate (properties of monocrystalline silicon wafers: <100> The silicon wafer has a crystal orientation, a thickness of 500 μm, and a resistivity of 0.1 Ω·cm to 0.3 Ω·cm. First, the single-crystal silicon wafer, ultrasonically cleaned with acetone and anhydrous ethanol, is placed in a spin coater and uniformly coated with photoresist. Figure 4 b); After pre-baking, photolithography is performed in an ultraviolet lithography machine. Figure 4 c); then, after post-baking and overexposure, it is placed in a developing solution for developing and shaping. Figure 4 d); Next, a porous silicon film was formed on the single-crystal silicon wafer not covered by photoresist using electrochemical etching technology. The etching solution was a hydrofluoric acid and anhydrous ethanol solution with a volume ratio of 3:1, the current intensity was 100mA, and the etching time was 20min. Figure 4e) After preparing the porous silicon array, a metal thin film, such as a Pt bridge, Cr bridge, or Ti bridge, is deposited on the porous silicon thin film using magnetron sputtering. Finally, it is placed in a saturated oxidant solution, such as sodium perchlorate or ammonium perchlorate solution, and then vacuum dried to complete the preparation of the porous silicon composite energetic thin film.

[0029] Energetic chips based on porous silicon composite energetic thin film arrays, such as Figure 5 As shown, the single-crystal silicon wafer is 20×20mm, and the middle 4×4 section is an array of porous silicon composite energetic thin film with a diameter of 3mm and a thickness of 40um.

[0030] The damaged area of ​​the porous silicon composite energetic thin film is tightly bonded to the underlying semiconductor bridge region using MD130 epoxy adhesive. For the energetic semiconductor bridge portion, gold wire bonding is used to bond the gold thin film to external leads via gold wires. The entire self-destructing chip device is mechanically fixed and bonded. Furthermore, low-temperature injection molding technology can be used to encapsulate and protect the device, improving the safety of the self-destructing chip.

Claims

1. A self-destruction chip based on a porous silicon composite energetic thin film-energetic semiconductor bridge binary structure, characterized in that, The self-destroying chip comprises a single crystal silicon wafer substrate, a SiO2 insulating layer, a heavily doped polysilicon semiconductor bridge, a gold film, a composite energetic film, a porous silicon composite energetic film attached with a metal bridge foil, a single crystal silicon wafer substrate, and a functional chip; wherein the porous silicon composite energetic film attached with the metal bridge foil and the single crystal silicon wafer substrate form a porous silicon composite energetic film damage area, and the porous silicon composite energetic film damage area and an underlying energetic semiconductor bridge area are bonded by using epoxy glue; the interconnection between the bridge foil and the lead wires of the control circuit is completed by selecting a gold wire bonding mode; the structure of the overall self-destroying chip is bonded by using mechanical fixation; the energetic semiconductor bridge area comprises a single crystal silicon wafer substrate semiconductor bridge substrate, which plays a bearing and supporting role; the SiO2 insulating layer serves as a dielectric layer and a masking layer, which can reduce parasitic resistance and reduce heat loss; the heavily doped polysilicon semiconductor bridge is used to convert the electrical energy transmitted through the gold film into heat energy, so that the electrical explosion occurs, and then the heat is transmitted to the upper composite energetic film; the gold film serves as an ignition bridge lead wire, connects a constant voltage source and a semiconductor bridge, and is a composite energetic film.

2. The self-destruction chip of the porous silicon composite energetic thin film-energetic semiconductor bridge binary structure according to claim 1, characterized in that: The porous silicon composite energetic film damage area comprises the porous silicon composite energetic film attached with the metal bridge foil and the single crystal silicon wafer substrate; the single crystal silicon wafer substrate serves as a substrate material for preparing the porous silicon composite energetic film and plays a supporting role; the porous silicon composite energetic film is prepared by the following steps: an oxidizing agent saturated solution is infiltrated into porous silicon by ultrasonic immersion, and vacuum drying is performed.

3. A self-destruction chip of a porous silicon composite energetic thin film-energetic semiconductor bridge binary structure according to claim 1 or 2, characterized in that: The material of the polysilicon semiconductor bridge is n-type heavily doped polysilicon, the doping element is phosphorus, the thickness is 2.5 μm, and the static sheet resistance is 3.8 Ω.

4. The self-destructing chip of porous silicon composite energetic thin film-energetic semiconductor bridge binary structure according to claim 1, characterized in that: The parameters of the single crystal silicon wafer substrate are as follows: a single-side polished P-type single crystal silicon wafer substrate, a <100> crystal direction, a thickness of 500 um, and a resistivity of 0.1 Ω·cm to 0.3 Ω·cm.

5. The self-destructive chip of porous silicon composite energetic thin film-energetic semiconductor bridge binary structure according to claim 1, characterized in that: The film layer height of the porous silicon composite energetic film is 40 μm.

6. The self-destructive chip of porous silicon composite energetic thin film-energetic semiconductor bridge binary structure according to claim 1, characterized in that: The material of the metal bridge foil is selected from Pt bridge, Cr bridge, or Ti bridge.

7. The self-destructive chip of porous silicon composite energetic thin film-energetic semiconductor bridge binary structure according to claim 1, characterized in that: The material of the composite energetic film is selected from Al / MoO3, Al / Fe2O3, Al / Ni, Al / CuO, and Al / Bi2O3 / GO.

8. The self-destructing chip of porous silicon composite energetic thin film-energetic semiconductor bridge binary structure according to claim 1, characterized in that: The self-destroying chip is connected with a constant voltage current source through the gold film lead wire, is powered by the power supply, and destroys the functional chip.

9. The self-destructive chip of porous silicon composite energetic thin film-energetic semiconductor bridge binary structure according to claim 1, characterized in that: The epoxy glue is MD130 epoxy glue.

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