A sip plastic package and a method for producing the same

Abstract

The application provides a SiP plastic package and a production method thereof, the plastic package is provided with individual base island isolation units, a plurality of carriers are arranged on the base island units, chips and transformers are arranged on the carriers, and the chips and the transformers are connected in correspondence through welding wires. The novel packaging material, the special packaging process and the fine packaging process of the application realize a complete set of SiP packaging technology process standards and specifications, solve the problem of data and power transmission between high-voltage and low-voltage circuits, meet the market demand for high electrical performance, high reliability, high heat dissipation power management, high voltage resistance and high safety products, replace the traditional optical coupling device, and promote the improvement of the inductance isolation IC packaging technology level.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of microelectronic assembly and packaging, and particularly relates to a SiP plastic packaging piece and a production method thereof. BACKGROUND

[0002] The packaging of integrated circuit devices gradually develops towards high density, high integration, high frequency and speed, small area, low cost, multi-chip combination, and integration with active electronic elements and optional passive devices from the development of single components. From the perspective of packaging development, under the demand considerations of volume, processing speed, or electrical characteristics, etc. of electronic products, SiP level packaging selects multiple isolated chips for arrangement and assembly, adopts a planar 2D packaging structure, and integrates components such as multi-functional transformers to form complete system functions, thereby realizing the performance requirements of products. Through long-term application effect follow-up of SiP level isolated packaging products, products with support rod or connecting rod structures on the design structure will have an impact on the performance of the products during long-term use, reduce the application of the products, and ultimately cause the failure of the products, thereby affecting the normal operation of the products, which is fatal to the use of the products and seriously affects the safety of the products. SUMMARY

[0003] The purpose of the present application is to overcome the shortcomings of the prior art, and to provide a SiP plastic packaging piece and a production method thereof to solve the problem of product failure caused by the use of support rods or connecting rods during the use of SiP plastic packaging pieces in the prior art.

[0004] To achieve the above-mentioned purpose, the following technical solutions are adopted in the present application:

[0005] A SiP plastic packaging piece comprises a base island isolation frame, and the base island isolation frame is arrayed with base island isolation units along the length direction and the width direction, respectively; each base island isolation unit is provided with pins on two opposite sides;

[0006] Each base island isolation unit is provided with a first carrier, a second carrier, a third carrier, a fourth carrier, a fifth carrier, and a sixth carrier; at least two carriers in each base island isolation unit are arranged oppositely, and there is a spacing between the oppositely arranged carriers; and each carrier is connected with at least one pin;

[0007] A chip and a transformer are mounted on the carrier, and a solder pad is mounted on the transformer; the solder pad is connected with at least one pin through a solder wire, the solder pad is connected with at least one chip through a solder wire, and the chip is connected with at least one pin through a solder wire;

[0008] The base island isolation unit is plastic encapsulated by a plastic encapsulation body.

[0009] Further improvement of the present application is that:

[0010] Preferably, the distance between the oppositely arranged carriers is ≥0.5mm.

[0011] Preferably, the plastic package body is provided with a plastic package bright band along its circumference; and a mark hole is formed on the plastic package body.

[0012] Preferably, the second carrier and the fifth carrier are oppositely arranged, the first carrier and the sixth carrier are oppositely arranged, and the third carrier and the fourth carrier are oppositely arranged; the first carrier and the third carrier are connected through a first carrier connecting part, and the fifth carrier and the fourth carrier are connected through a sixth carrier connecting part; one end of the first carrier connecting part is connected with the first carrier, and one end of the sixth carrier connecting part is connected with the sixth carrier.

[0013] The first chip and the second chip are mounted on the second carrier, the third chip is mounted on the fifth carrier, the fourth chip is mounted on the fourth carrier, and the fifth chip is mounted on the third carrier; the bottom of the transformer is connected with the first carrier and the sixth carrier at the same time.

[0014] The first chip and the second chip are connected through a solder wire, the second chip and the third chip are connected through eight groups of solder wires, the pads on the transformer are connected with the fourth chip and the fifth chip through solder wires respectively, and the fourth chip and the fifth chip are connected through a solder wire.

[0015] Preferably, the second carrier is provided with a first locking hole and a second locking hole, and the fifth carrier is provided with a process through hole.

[0016] Preferably, the sixth carrier is connected with the fifth carrier, and the first carrier and the fifth carrier are oppositely arranged; the sixth carrier is connected with the fourth carrier through a sixth carrier connecting part, the first carrier is connected with the second carrier through a first carrier connecting part, and the second carrier is connected with the third carrier.

[0017] The transformer is mounted on the first carrier and the fifth carrier at the same time, the third chip and the fifth chip are mounted on the fourth carrier, and the first chip, the second chip and the fourth chip are mounted on the second carrier; the pads on the transformer are connected with the fourth chip, the fifth chip and the first chip through solder wires respectively, the fourth chip and the fifth chip are connected through a solder wire, the second chip and the third chip are connected through eight groups of solder wires, and the second chip and the first chip are connected through a solder wire.

[0018] Preferably, the second carrier and the fifth carrier are arranged oppositely, the first carrier and the sixth carrier are arranged oppositely, and the third carrier and the fourth carrier are arranged oppositely; the second carrier and the third carrier are connected through the first carrier connecting part, the fourth carrier and the fifth carrier are connected through the sixth carrier connecting part; the other end of the first carrier connecting part is connected with the first carrier, and the other end of the sixth carrier connecting part is connected with the sixth carrier.

[0019] The first chip and the second chip are arranged on the second carrier, the third chip is arranged on the fifth carrier, the fourth chip is arranged on the fourth carrier, and the fifth chip is arranged on the third carrier; the transformer is arranged on the first carrier and the sixth carrier; the first chip and the second chip are connected through the bonding wire, the second chip and the third chip are connected through eight groups of bonding wires, the fourth chip and the fifth chip are connected through the bonding wire, and the bonding pads on the transformer are respectively connected with the fourth chip and the fifth chip through the bonding wire.

[0020] Preferably, the first carrier and the fifth carrier are arranged oppositely, the first carrier is connected with the second carrier through the first carrier connecting part, the fifth carrier is connected with the sixth carrier, the sixth carrier is connected with the fourth carrier through the sixth carrier connecting part, the second carrier is connected with the third carrier, and the second carrier and the fourth carrier are arranged oppositely.

[0021] The transformer is arranged on the first carrier and the fifth carrier, the fourth chip is arranged on the second carrier, the fifth chip is arranged on the fourth carrier, the fourth chip and the fifth chip are connected through the bonding wire, and the bonding pads on the transformer are respectively connected with the fourth chip and the fifth chip through the bonding wire.

[0022] A production method of the SiP plastic package is provided, and the method comprises the following steps:

[0023] Step 1, wafer thinning and dicing to form a chip;

[0024] Step 2, the chip is pasted on the carrier of the base island isolation unit through the chip pasting and glue spraying technology, and the transformer is bonded on the base island isolation unit; the base island isolation unit with the bonded chip and transformer is baked to solidify the chip on the base island isolation unit;

[0025] Step 3, the bonding wire is bonded through the low-arc control technology;

[0026] Step 4, the base island isolation unit is plastic encapsulated;

[0027] Step 5, the lead frame of the package is tinned by using an automatic plating line, and welding is performed.

[0028] Preferably, in step 2, the baking process adopts seven different oxygen-containing zones to solidify the island isolation frame.

[0029] Compared with the prior art, the application has the following beneficial effects:

[0030] The application provides a SiP plastic package, which is provided with island isolation units, each of which is provided with a plurality of carriers, and the carriers are provided with chips and transformers, and the chips and transformers are connected correspondingly through welding wires. The novel packaging material, special packaging process and fine packaging process of the application realize a complete set of SiP packaging technology standard and specification, solve the problem of data and power transmission between high-voltage and low-voltage circuits, meet the market demand for high electrical performance, high reliability, high heat dissipation power management, high voltage resistance and high safety products, replace the traditional optical coupling device, and promote the improvement of the level of inductance isolation IC packaging technology. The special structure design of the high-density lead frame used in the package can greatly improve the material utilization rate and production efficiency, ensure that the plastic package reaches a high reliability of MSL3 or above, and reduce the production cost and packaging and transportation cost.

[0031] The application provides a production method of a SiP plastic package, which is a method for producing a SiP plastic package with high reliability transformer isolation function through a lead frame and fixed BOM, so as to solve the problems of product failure and product safety caused by the structure of the supporting rod or the connecting rod. The provided high-efficiency production method can produce an IC package with a reliability of MSL3 or above. The SiP package of the electromagnetic isolation chip adopts a novel packaging structure and a BOM combination production method with high adaptability: the structure is reasonable, the process route is simple, and the BOM is easy to realize. Compared with the traditional optical coupling isolation product, the application can realize lower cost, smaller size, higher isolation voltage resistance, wider temperature range, higher integration performance, lower power consumption and more reliable isolation circuit, and has high communication rate and long service life. Therefore, in order to obtain better isolation voltage resistance effect, the framework structure is optimized and designed and the packaging process is improved, so as to solve the physical isolation of the product, make the high-voltage area and the low-voltage area meet the requirement of creepage, improve the production efficiency of the product, and realize the manufacturing of the multi-row and multi-island high-density isolation frame. The high-voltage isolation type DC-DC converter manufactured for this purpose has wide application in the fields of consumption, industry, automobile and communication. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 is a schematic diagram of the isolation frame of the application;

[0033] Figure 2 is a schematic diagram of the lead frame layout structure of the application;

[0034] Figure 3This is a schematic diagram of the external shape of the SOP and SOW inter-package components of the present invention;

[0035] Figure 4 This is a schematic diagram of the lead frame structure 1 of the present invention;

[0036] In this figure, (a) is a schematic diagram of the carrier; and (b) is a schematic diagram of the chip installed.

[0037] Figure 5 This is a schematic diagram of the lead frame structure 2 of the present invention;

[0038] In this figure, (a) is a schematic diagram of the carrier; and (b) is a schematic diagram of the chip installed.

[0039] Figure 6 This is a schematic diagram of the lead frame structure 3 of the present invention;

[0040] In this figure, (a) is a schematic diagram of the carrier; and (b) is a schematic diagram of the chip installed.

[0041] Figure 7 This is a schematic diagram of the lead frame structure 4 of the present invention;

[0042] In this figure, (a) is a schematic diagram of the carrier; and (b) is a schematic diagram of the chip installed.

[0043] Figure 8 This is a schematic diagram of the cross-sectional structure of the product of this invention.

[0044] In the diagram: 1. First carrier, 2. First carrier connection part, 3. External pin, 4. Internal pin, 5. Second carrier, 6. Third carrier, 7. Fourth carrier, 8. Sixth carrier connection part, 9. Fifth carrier, 10. Sixth carrier, 11. Transformer, 12. Pad, 13. First chip, 14. Second chip, 15. Third chip, 16. Fourth chip, 17. Fifth chip, 18. Bonding wire, 19. Internal pin, 20. First locking hole, 21. Second locking hole, 22. Process through hole, 23. Transformer, 24. Adhesive, 25. Molded body, 26. Molded body glossy strip, 27. Marking hole, 28. Pin, 29. Silver-plated appearance pin, 30. Base island isolation frame, 31. Frame frame, 32. Base island isolation unit. Detailed Implementation

[0045] The present invention will now be described in further detail with reference to the accompanying drawings:

[0046] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. The terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, unless otherwise explicitly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection or a detachable connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two elements. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0047] The present invention discloses a SiP plastic package, which includes a base island isolation frame 30, a first carrier 5, a second carrier 9, a third carrier 7, a fourth carrier 6, a fifth carrier 10 and a sixth carrier 1.

[0048] Example 1

[0049] See Figure 1 and Figure 2 This embodiment discloses a SiP plastic package that encapsulates an electromagnetic isolation frame and a transformer chip, which includes a base island isolation frame 30. See [link to documentation]. Figure 2 The base island isolation frame 30 has a frame border 31 on its edge, and the interior of the base island isolation frame 30 is composed of an array of several base island isolation units 32. Figure 1 and Figure 2 As can be seen, the base island isolation units 32 on the base island isolation frame 30 are arranged in an array with high density, with multiple rows and columns, and each unit 32 inside the frame is encapsulated by a transformer.

[0050] Preferably, each of the base island isolation frames 30 has 7 rows and 16 columns, with a total of 112 unit frames. The dimensions of the base island isolation frame 30 are: length × width × thickness: 269.6 × 83 mm.

[0051] Preferably, the distance between the base island isolation units 32 of adjacent columns is 16.875 mm, and the distance between the edges of the two plastic seals is 8.450 mm.

[0052] The distance between the relatively arranged carriers is greater than or equal to 0.5 mm. A plurality of radial pins 28 are arranged along the two long sides of the base island isolation unit 32. The center of the second carrier 5 is provided with n isolation locking holes 21. The center of the fifth carrier 9 is provided with n process through holes 22. Each pin 28 is provided with a T-shaped locking step. Each carrier has at least one end connected to at least one pin 28.

[0053] Example 2

[0054] See Figure 3 This embodiment discloses a plastic-encapsulated base island isolation unit 32. The base island isolation unit 32 is rectangular, with molded outer feet 28 arrayed on its two opposite long sides. The molded outer feet 28 are provided with welding areas 29. Various devices are installed inside the base island isolation unit 32. The upper part is plastic-encapsulated by a plastic body 25. A bright plastic body strip 26 is provided around the periphery of the plastic body 25. A marking hole 27 is provided on the plastic body 25. Preferably, the marking hole 27 is opened at one corner of the plastic body 25 to prevent it from affecting the devices in the base island isolation unit 32.

[0055] The distance from the positioning hole of the base island isolation frame 30 to the corner shear of the base island isolation frame plate is 8.890mm at the beginning and 9.860mm at the end.

[0056] The first carrier 5, the fourth carrier 6 and the sixth carrier 1 of the carrier isolation frame form a certain isolation distance with the second carrier 9, the third carrier 7 and the fifth carrier 10, respectively.

[0057] The carrier isolation frame has the following external features: a chip and transformer are attached to the carrier, and the outer layer is encapsulated in plastic.

[0058] Example 3

[0059] See Figure 4Figure (a) shows a lead frame structure disclosed in this embodiment, specifically including a base island isolation unit 32. The base island isolation unit 32 has multiple carriers, specifically a first carrier 1, a second carrier 5, a third carrier 6, a fourth carrier 7, a fifth carrier 9, and a sixth carrier 10. The two long sides of the base island isolation unit 32 are each arrayed with a plurality of pins 28. Each pin 28 includes an integrally connected outer pin 3 and an inner pin 4. Each pin 28 is perpendicular to the long side, and adjacent pins 28 are equally spaced. The first carrier 1 is connected to the third carrier 6 via a first carrier connection portion 2. The first carrier connection portion 2 has two pins 28; the pin 28 closer to the first carrier 1 is used to transmit relevant information of the first carrier 1, and the pin 28 closer to the third carrier 6 is used to transmit relevant information of the third carrier 6. The second carrier 5 has a first locking hole 20 and a second locking hole 21 for isolation and locking. The fifth carrier 9 is connected to the fourth carrier 7 via a sixth carrier connection portion 8. The sixth carrier connection portion 8 has a sixth carrier 10, and the fifth carrier 9 has a process through-hole 22. The locking hole can be circular or elliptical, and there can be multiple locking holes. The carrier is designed as a planar structure.

[0060] See Figure 4 In Figure (b), the chip mounting area on the second carrier 5 is equipped with a first chip 13 and a second chip 14. Each chip is connected to an inner pin 4 via a bonding wire 18. The first chip 13 and the second chip 14 are connected by eight sets of bonding wires 18. A third chip 15 is mounted on the fifth carrier 9. The third chip 15 is connected to the second chip 14 via multiple leads. The third chip 15 is also connected to an inner pin 4 via multiple leads. A transformer 11 is mounted on both the first carrier connection part 2 and the sixth carrier connection part 8, and is bonded using adhesive film or glue. The pads 12 on the surface of the transformer 11 are connected to the electroplated silver layer on the pins 28 in the left and right areas of the base island isolation frame unit 32 via bonding wires. The area of ​​the pads 12 does not exceed the edge line of the two carrier connection parts, that is, it does not exceed the carrier spacing 11. The fourth chip 16 is mounted on the fourth carrier 7, and the fifth chip 17 is mounted on the third carrier 6. The fourth chip 16 is connected to the inner pin 4, the pad 12 and the fifth chip 17 respectively through multiple bonding wires 18. The fifth chip 17 is connected to the inner pin 4, the pad 12 and the fourth chip 16 respectively through multiple bonding wires 18.

[0061] The base island isolation frame unit 32, together with the first chip 13, the second chip 14, the third chip 15, the fourth chip 16, the fifth chip 17, and the transformer 11, are covered with a plastic encapsulation to form a sealed package.

[0062] Example 4

[0063] SeeFigure 5 Figure (a) shows a lead frame structure disclosed in this embodiment, specifically including a base island isolation unit 32. The base island isolation unit 32 contains multiple carriers, specifically a first carrier 1, a second carrier 5, a fourth carrier 7, and a fifth carrier 9. The first carrier 1 is connected to the second carrier 5 via a first carrier connection portion 2, and the fifth carrier 9 is connected via a sixth carrier connection portion 8. A sixth carrier 10 is disposed within the fifth carrier 9. The first carrier 1 and the fifth carrier 9 are located on one side of the base island isolation unit 32, while the fourth carrier 7 and the second carrier 5 are located on the other side. A gap, called carrier spacing 11, is provided between the first carrier 1 and the fifth carrier 9.

[0064] See Figure 5 In Figure (b), a transformer 11 is jointly mounted on the first carrier 1 and the fifth carrier 9. A pad 12 is mounted on the upper surface of the transformer 11, and the pad 12 is connected by different bonding wires 18 and multiple pins 28. A third chip 15 and a fifth chip 17 are mounted on the fourth carrier 7, with the two chips separately mounted on the fourth carrier 7 and the fifth chip 17 closer together. A first chip 13, a second chip 14, and a fourth chip 16 are mounted on the second carrier 5, with the three chips separately mounted on the second carrier 5. The fourth chip 16 is connected by bonding wires 18 and 28. 8 is connected to pad 12, second chip 14 and fifth chip 17 respectively; first chip 13 is connected to pin 28, pad 12 and second chip 14 respectively via bonding wire 18; second chip 14 is connected to first chip 13, fourth chip 16 and third chip 15 respectively via bonding wire 18; third chip 15 is connected to second chip 14, pin 28 and fifth chip 17 respectively via bonding wire 18; fifth chip 17 is connected to third chip 15, fourth chip 16, pad 12 and pin 28 respectively via bonding wire 18.

[0065] The island isolation unit 32, transformer 11, third chip 15, fifth chip 17, first chip 13, second chip 14 and fourth chip 16 are covered with plastic encapsulation to form a sealed package.

[0066] Example 5

[0067] See Figure 6Figure (a) shows a lead frame structure disclosed in this embodiment, specifically including a base island isolation unit 32. The base island isolation unit 32 contains multiple carriers, specifically a first carrier 1, a second carrier 5, a third carrier 6, a fourth carrier 7, a fifth carrier 9, and a sixth carrier 10. Along the length of the base island isolation unit 32, each base island isolation unit 32 has a row of equally spaced pins 28 on both sides. Along the length of the base island isolation unit 32, the second carrier 5 and the fifth carrier 9 are on one side of the base island isolation unit 32, the first carrier 1 and the sixth carrier 10 are in the middle, and the third carrier 6 and the fourth carrier 7 are on the other side. There is a gap between the second carrier 5 and the fifth carrier 9, a gap between the first carrier 1 and the sixth carrier 10, and a gap between the third carrier 6 and the fourth carrier 7. The fifth carrier 9 and the fourth carrier 7 are respectively connected to both ends of the sixth carrier connection portion 8, and the other end of the sixth carrier connection portion 8 is connected to the sixth carrier 10. The second carrier 5 and the third carrier 6 are respectively connected to both ends of the first carrier connection portion 2, and the other end of the first carrier connection portion 2 is connected to the first carrier 2.

[0068] See Figure 6 In Figure (b), a first chip 13 and a second chip 14 are disposed on the second carrier 5, and a third chip 15 is disposed on the fifth carrier 9. The first chip 13 is connected to pin 28 and the second chip 14 via bonding wire 18. The second chip 14 is connected to the third chip 15, pin 28, and the first chip 13 via bonding wire 18. The third chip 15 is connected to the second chip 14 and pin 28 via bonding wire 18. A pad 12 is disposed on both the first carrier 1 and the sixth carrier 10, and the pad 12 is connected to pin 28 via bonding wire 18. A fourth chip 16 is disposed on the fourth carrier 7, and a fifth chip 17 is disposed on the third carrier 6. The fourth chip 16 is connected to pin 28, pad 12, and the fifth chip 17 via bonding wire 18. The fifth chip 17 is connected to the fourth chip 16, pad 12, and pin 28 via bonding wire 18.

[0069] The island isolation unit 32, transformer 11, third chip 15, fifth chip 17, first chip 13, fourth chip 16 and second chip 14 are covered with plastic encapsulation to form a sealed package.

[0070] Example 6

[0071] See Figure 7Figure (a) shows a lead frame structure disclosed in this embodiment, specifically including a base island isolation unit 32. The base island isolation unit 32 contains multiple carriers, specifically a first carrier 1, a fifth carrier 9, a fourth carrier 7, and a second carrier 5. The first carrier 1 is connected to a pin 28 via a first carrier connection portion 2, and is also connected to the second carrier 5 via the first carrier connection portion 2. The second carrier 5 is connected to a third carrier 6. The fifth carrier 9 is connected to a sixth carrier 10, which is connected to the fourth carrier 7 via a sixth carrier connection portion 8, and the sixth carrier connection portion 8 is connected to the pin 28. Along the length of the base island isolation unit 32, a row of pins 28 is provided on both sides of the base island isolation unit 32. The first carrier 1 and the fifth carrier 9 are close to the upper end of the base island isolation unit 32, and there is a gap between the first carrier 1 and the fifth carrier 9, which is the carrier spacing 11. The fourth carrier 7 and the second carrier 5 are close to the lower end of the base island isolation unit 32, and there is a gap between the fourth carrier 7 and the second carrier 5. The first carrier 1 and the second carrier 5 are on the right side of the base island isolation unit 32, and the fifth carrier 9 and the fourth carrier 7 are on the left side of the base island isolation unit 32.

[0072] See Figure 7 In Figure (b), pads 12 are jointly disposed on the first carrier 1 and the fifth carrier 9, and pads 12 are connected to pins 28 via bonding wires 18. A fifth chip 17 is disposed on the fourth carrier 7, and a fourth chip 16 is disposed on the second carrier 5. The fifth chip 17 is connected to pads 12, pins 28, the fourth carrier 7, and the fourth chip 16 via bonding wires 18. The fourth chip 16 is connected to pads 12, pins 28, the fifth chip 17, and the third carrier 6 via bonding wires 18.

[0073] The island isolation unit 32, transformer 11, third chip 15, fifth chip 17, first chip 13, second chip 14 and fourth chip 16 are covered with plastic encapsulation to form a sealed package.

[0074] Preferably, in the above embodiments, all chips and carriers are connected by bonding.

[0075] Example 7

[0076] See Figure 8 One embodiment of the present invention discloses a method for preparing a SiP plastic package that encapsulates a base island isolation frame and a transformer chip, comprising the following steps:

[0077] a. Thinning: Use a thinning machine to thin the wafer to a final thickness of 100μm~280μm. The rough grinding speed is controlled at ≤35μm / min; the precision grinding speed is controlled at ≤10μm / min.

[0078] b. Dicing: Dicing is performed using a dicing machine with double dicing blades to prevent chip breakage. The dicing feed speed is controlled at ≤10mm / s, and the chips are cleaned and dried promptly.

[0079] c. Chip mounting: The copper alloy electroplated lead frame 30 with elliptical longitudinal locking holes, featuring a multi-row matrix-type multi-carrier double-ribbed design developed in this invention, is mounted on the base island isolation unit 32 of the base island isolation frame 32. The bonding material is environmentally friendly conductive adhesive (insulating adhesive) or DAF film (CDAF film). A delamination and segmented baking process is adopted. The transformer 11 is mounted on the fixed base island isolation unit 32 using a dedicated chip mounting and bonding process, and then baked again to solidify the chip on the base island isolation unit 32.

[0080] d. Pressure welding, using gold wire or palladium-copper wire as the welding wire 18, pressure welding implements bonding low arc control technology, adopts a combination of flat arc and forward and reverse welding, as well as advanced line arc shape with sharp corners and advanced line arc shape with flat corners, controlling the arc height ≤180μm;

[0081] e. Molding: Using the highly reliable and high-temperature / high-pressure resistant CEL-1702HF9TS-G1 series environmentally friendly molding compound, a fully automated molding machine is used to encapsulate the transformer, isolation chip, bonding wires, and base island isolation structure frame within SOP300mil 16L and 20L molded packages with dimensions (length*width*thickness) of 10.30mm x 7.50mm x 2.30mm and 12.80mm x 7.50mm x 2.30mm, respectively. The process employs a thin-film anti-warping and delamination reduction / elimination technique to reduce the wire breakage rate to <8%, minimize reverse wrapping or re-wrapping, and shorten curing time by 10-30 seconds compared to normal. During post-curing, the IC package frame semi-finished material strip is aged in a 175℃ oven for 7.5 hours.

[0082] f. Electroplating: The process of tinning the multi-row matrix copper alloy SOW16L or SOP20L lead frame of the package using an automated electroplating line, so that the outer pin surface is plated with 11.43±3.81μm of solder, which facilitates SMT (surface mounting technology) soldering.

[0083] g. Printing: A clamp-type fixing, dual laser head, and continuous feeding positioning printing method is used to print trademarks on the surface of the plastic seal.

[0084] h. Rib cutting and forming separation: A dedicated rib cutting system and mold are used to cut off the central rib connecting rods on the frame. The gap between the rib cutting blade and the molding body is greater than 0.075mm to ensure that the molding body is not cut. At the same time, the molding residue on the mold surface is cleaned to reduce the damage to the colloid.

[0085] The punching separation method is adopted, and the distance between the punching blade and the molding body 25 is controlled at 0.075mm. The molding body is fixed and compacted from top to bottom, punched and separated, and residual glue fragments in the mold are cleaned in time to form a package of a certain shape.

[0086] i. Testing and packaging: We use specialized testing and sorting machines to test the appearance and functional parameters of electromagnetic packages, ensuring that the products provided to customers are ready for use and meet the requirements of the packages.

[0087] Receiving products → Tapeing products according to packaging quantity → Adding foam strips and protective tape according to specifications → Operators check the receiving slip and labels → Checking traceability labels and affixing reel labels → Setting vacuum packaging parameters → Packing into packaging boxes → Affixing labels and quantity list according to specifications → Checking whether relevant accessories are complete → Packaging and warehousing.

[0088] Example 8

[0089] Another technical solution adopted in this invention is: a method for producing SOW and SOP packages using the above-mentioned isolation lead frame.

[0090] a. Perform wafer thinning and dicing according to the existing SOP packaging production process to form individual chips;

[0091] b. Attach the cut chips to the various carriers of the base island isolation frame;

[0092] c. Baking: A rapid curing and anti-oxidation baking process with seven different oxygen content zones is used during baking. The detailed process of this rapid curing and anti-oxidation baking process is as follows: The seven oxygen content zones are arranged vertically. After the frame passes through the core, it is transferred to the first oxidation zone. After the initial curing in the first oxidation zone, it is transferred to the second oxidation zone, and so on, until the adhesive material of the product leaving the box has undergone sufficient cross-linking reaction. The oxygen content of each curing zone adopts a gradual difference. The oxygen content from the first oxygen content zone to the seventh oxygen content zone is 20000ppm, 18000ppm, 15000ppm, 12000ppm, 6000ppm, 3000ppm, and 1500ppm, respectively.

[0093] d. Plasma cleaning after baking;

[0094] e. Pressure bonding: The interconnection between chips uses right-angle arc-shaped multilayer bonding wires. The detailed process is as follows: first, a ball is placed at the second solder point, then a wire is bonded from the first solder point, then the wire arc is pulled up at a right angle, then the arc is pulled horizontally along the direction of the second solder point, and finally the wire is bonded vertically downwards to the solder ball of the second solder point; other connections are pressure bonded according to the existing SOP packaging production process; after pressure bonding, plasma cleaning is performed before plastic encapsulation to improve silver surface contamination;

[0095] f. Use a high-precision automatic encapsulation system for molding. When molding, the following parameters should be selected: injection pressure 800-1200 Psi, injection time 10-14s, mold temperature 170-180℃, mold closing pressure 125-135ton, and curing time 120s.

[0096] g. After molding, post-curing is performed at 175°C for 8.5 hours;

[0097] h. Next, soften the material with hot water to remove excess material, and then tin it.

[0098] i. Test and print using the entire frame;

[0099] j. A digital isolation core plastic SOW package is produced by one-time molding and rib cutting.

[0100] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A SiP plastic encapsulation component, characterized in that, The system includes a base island isolation frame (30), on which base island isolation units (32) are arrayed along the length and width directions respectively; each base island isolation unit (32) has pins (28) on two opposite sides. Each base island isolation unit (32) is provided with a first carrier (1), a second carrier (5), a third carrier (6), a fourth carrier (7), a fifth carrier (9) and a sixth carrier (10); each base island isolation unit (32) has at least two carriers arranged opposite each other, and there is a gap between the carriers arranged opposite each other; each carrier is connected to at least one pin (28). A chip and a transformer (11) are mounted on the carrier. A pad (12) is mounted on the transformer (11). The pad (12) is connected to at least one pin (28) via a bonding wire (18). The pad (12) is connected to at least one chip via a bonding wire (18). The chip is connected to at least one pin (28) via a bonding wire (18). The base island isolation unit (32) is encapsulated by the encapsulated body (25); The second carrier (5) and the fifth carrier (9) are arranged opposite to each other, the first carrier (1) and the sixth carrier (10) are arranged opposite to each other, and the third carrier (6) and the fourth carrier (7) are arranged opposite to each other; the first carrier (1) and the third carrier (6) are connected by the first carrier connection part (2), and the fifth carrier (9) and the fourth carrier (7) are connected by the sixth carrier connection part (8); one end of the first carrier connection part (2) is connected to the first carrier (1), and one end of the sixth carrier connection part (8) is connected to the sixth carrier (10); The second carrier (5) is equipped with a first chip (13) and a second chip (14), the fifth carrier (9) is equipped with a third chip (15), the fourth carrier (7) is equipped with a fourth chip (16), and the third carrier (6) is equipped with a fifth chip (17); the bottom of the transformer (11) is connected to both the first carrier (1) and the sixth carrier (10); The first chip (13) and the second chip (14) are connected by bonding wires (18), the second chip (14) and the third chip (15) are connected by eight sets of bonding wires (18), the pads (12) on the transformer (11) are connected to the fourth chip (16) and the fifth chip (17) respectively by bonding wires (18), and the fourth chip (16) and the fifth chip (17) are connected by bonding wires; The second carrier (5) has a first locking hole (20) and a second locking hole (21), and the fifth carrier (9) has a process through hole (22).

2. The SiP plastic encapsulation component according to claim 1, characterized in that, The distance between the relatively arranged carriers is ≥0.5mm.

3. The SiP plastic encapsulation component according to claim 1, characterized in that, The encapsulation body (25) is provided with a bright strip (26) around its circumference; the encapsulation body (25) is provided with a marking hole (27).

4. A SiP plastic encapsulation component according to claim 1, characterized in that, The second carrier (5) and the fifth carrier (9) are arranged opposite to each other, the first carrier (1) and the sixth carrier (10) are arranged opposite to each other, and the third carrier (6) and the fourth carrier (7) are arranged opposite to each other; the second carrier (5) and the third carrier (6) are connected through the first carrier connection part (2), and the fourth carrier (7) and the fifth carrier (9) are connected through the sixth carrier connection part (8); the other end of the first carrier connection part (2) is connected to the first carrier (1), and the other end of the sixth carrier connection part (8) is connected to the sixth carrier (10); The second carrier (5) is provided with a first chip (13) and a second chip (14), the fifth carrier (9) is provided with a third chip (15), the fourth carrier (7) is provided with a fourth chip (16), and the third carrier (6) is provided with a fifth chip (17); the transformer (11) is provided on the first carrier (1) and the sixth carrier (10); the first chip (13) and the second chip (14) are connected by bonding wires (18), the second chip (14) and the third chip (15) are connected by eight sets of bonding wires (18), the fourth chip (16) and the fifth chip (17) are connected by bonding wires (18), and the pads (12) on the transformer (11) are connected to the fourth chip (16) and the fifth chip (17) respectively by bonding wires (18).

5. A method for producing a SiP plastic encapsulation component as described in claim 1, characterized in that, Includes the following steps: Step 1: Thinning the wafer and dicing it to form a chip; Step 2: The chip is attached to the carrier of the base island isolation unit (32) by using the chip bonding spraying technology, and the transformer (11) is attached to the base island isolation unit (32); the base island isolation unit (32) with the chip and transformer (11) attached is baked to cure the chip on the base island isolation unit (32); Step 3: Bond the wires (18) using low-radius bonding control technology. Step 4: Seal the base island isolation unit (32) with plastic; Step 5: The lead frame of the package is tin-plated using an automated electroplating line and then soldered.

6. The method for producing SiP plastic encapsulation components according to claim 5, characterized in that, In step 2, the baking process uses seven different oxygen-containing zones to solidify the base island isolation frame (30).

Images