Voltage conversion circuit

Abstract

The application discloses a voltage conversion circuit, comprising: a first transistor connected between a power supply end and a voltage output end; a soft start circuit connected with a control end of the first transistor, used for controlling the first transistor to slowly conduct in a circuit starting stage, and the first transistor charges the voltage output end according to a power supply voltage of the power supply end; and a band gap core circuit used for feedback adjustment according to a feedback voltage of the voltage output end, and finally obtaining a stable output voltage at the voltage output end. The voltage conversion circuit of the application does not need an independent voltage source and a reference circuit, and does not need a high-voltage operational amplifier in a loop of an LDO, so that the number of modules is greatly reduced, and the chip area and cost are reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power supply circuit, more particularly, to a voltage conversion circuit. BACKGROUND

[0002] With the development of integrated circuits, the integration of chips is continuously improved, and higher and higher working voltage also puts higher and higher requirements on the high voltage process of chips. However, because the area occupied by the high voltage device inside the chip is very large, it is necessary to design as many modules as possible to work under low voltage conditions. Therefore, it is necessary to convert the high voltage power supply input into the chip into low voltage to supply power to the low voltage device inside the chip.

[0003] Figure 1 A circuit schematic diagram of a voltage conversion circuit according to the prior art is shown. As shown in Figure 1 The existing voltage conversion circuit 100 obtains a low voltage power supply VPRE through the clamping circuit 110 according to the power supply voltage PVDD, generates a 1.2V reference voltage Vref using the bandgap reference circuit 120 under the low voltage power supply VPRE, and finally generates an accurate 5V power supply GVDD using the LDO (low dropout regulator) circuit using the reference voltage Vref. Although this scheme can generate a constant low voltage power supply, the loop is too complex, and the required circuit modules are also more, and the chip area is large. SUMMARY

[0004] In view of the above problems, the purpose of the present application is to provide a voltage conversion circuit which can generate a stable output voltage independent of temperature without independent reference circuit and voltage source circuit, and the circuit structure is simple.

[0005] According to an embodiment of the present application, a voltage conversion circuit is provided, comprising: a first transistor connected between a power supply end and a voltage output end; a soft start circuit connected to the control end of the first transistor, used to control the first transistor to slowly conduct at the circuit start-up stage, and the first transistor charges the voltage output end according to the power supply voltage of the power supply end; and a bandgap core circuit used to feedback adjust according to the feedback voltage of the voltage output end, and finally obtain a stable output voltage at the voltage output end.

[0006] Optionally, the voltage conversion circuit further comprises: a feedback circuit coupled between the voltage output end and the ground, used to output the feedback voltage of the output voltage.

[0007] Optionally, the voltage conversion circuit further comprises: a gain amplification circuit coupled to the control end of the first transistor and the bandgap core circuit, used to improve the loop gain.

[0008] Optionally, the soft start circuit comprises: a first current source and a first capacitor coupled in sequence between the power supply end and the ground; a first switch coupled between a common connection node of the first current source and the first capacitor and the ground; and a second transistor coupled between a control end of the first transistor and the ground, and the control end of the second transistor being coupled with the common connection node of the first current source and the first capacitor.

[0009] Optionally, during the circuit start-up phase, the first switch is turned off, the first current source charges the first capacitor, and the control end voltage of the first transistor is clamped by the second transistor, so that the control end voltage of the first transistor slowly rises.

[0010] Optionally, the bandgap core circuit comprises: a third transistor, a first end of which is coupled with the voltage output end, and a control end of which is coupled with the feedback voltage; a second resistor and a fourth transistor coupled in sequence between a second end of the third transistor and the ground, and a control end and a first end of the fourth transistor being coupled with each other; and a third resistor, a fifth transistor and a first resistor coupled in sequence between the second end of the third transistor and the ground, and a control end of the fifth transistor being coupled with the control end of the fourth transistor.

[0011] Optionally, the gain amplification circuit comprises: a second current source and a sixth transistor coupled in sequence between the power supply end and the ground, wherein a common connection node of the second current source and the sixth transistor is coupled with the control end of the first transistor, and a control end of the sixth transistor is coupled with a common connection node of the fifth transistor and the third resistor.

[0012] Optionally, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor are NPN type bipolar transistors.

[0013] Optionally, the first transistor is an N-type metal oxide semiconductor field effect transistor.

[0014] Optionally, the second transistor is a P-type metal oxide semiconductor field effect transistor.

[0015] In summary, the voltage conversion circuit of the embodiment of the present application adopts a scheme of combining a bandgap reference circuit with an LDO, and a stable voltage independent of temperature can be generated by using the basic architecture of the bandgap reference core and the feedback to form a closed LDO loop. Compared with the traditional scheme of designing a high-voltage LDO, the embodiment of the present application does not need an independent voltage source circuit and a reference circuit, and a high-voltage operational amplifier is also not needed in the loop of the LDO, which greatly reduces the number of modules, and reduces the chip area and cost. BRIEF DESCRIPTION OF DRAWINGS

[0016] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0017] Figure 1 A circuit diagram of a voltage conversion circuit according to the prior art is shown;

[0018] Figure 2 A circuit diagram of a voltage conversion circuit according to an embodiment of the present invention is shown. Detailed Implementation

[0019] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0020] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0021] In this invention, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) includes a first terminal, a second terminal, and a control terminal. When the MOSFET is in the ON state, current flows from the first terminal to the second terminal. For a P-type MOSFET, the first terminal, second terminal, and control terminal are the source, drain, and gate, respectively; for an N-type MOSFET, the first terminal, second terminal, and control terminal are the drain, source, and gate, respectively. A bipolar junction transistor (BJT) includes a first terminal, second terminal, and a control terminal. When the BJT is in the ON state, current flows from the first terminal to the second terminal. For a PNP transistor, the first terminal, second terminal, and control terminal are the emitter, collector, and base, respectively; for an NPN transistor, the first terminal, second terminal, and control terminal are the collector, emitter, and base, respectively.

[0022] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0023] like Figure 2As shown, the voltage conversion circuit 200 of the embodiment of the present application comprises a transistor N1, a soft start circuit 210, a bandgap core circuit 220, a gain amplification circuit 230 and a feedback circuit 240.

[0024] The transistor N1 is, for example, an N-type MOSFET, having a source, a gate and a drain, the drain of which is coupled to the power supply end 201 of the voltage conversion circuit 200, the source of which is coupled to the voltage output end 202 of the voltage conversion circuit 200, and the gate of which is coupled to the soft start circuit 210. The soft start circuit 210 is used to control the transistor N1 to slowly turn on in the start-up phase of the circuit, and the transistor N1 charges the voltage output end 202 according to the power supply voltage PVDD of the power supply end 201.

[0025] Specifically, the soft start circuit 210 comprises a current source I1, a capacitor C1, a switch K1 and a transistor P1. The current source I1 and the capacitor C1 are coupled between the power supply voltage PVDD and the ground, the switch K1 is coupled between the common connection node of the current source I1 and the capacitor C1 and the ground, and the transistor P1 is, for example, a P-type MOSFET, the gate of which is coupled to the common connection node of the current source I1 and the capacitor C1, the source of which is coupled to the gate of the transistor N1, and the drain of which is grounded.

[0026] In the start-up phase of the circuit, the switch K1 is turned off, the current source I1 charges the capacitor C1, the voltage Vsoft of the first end of the capacitor C1 slowly rises, and then the gate voltage Vgate of the transistor N1 is clamped through the transistor P1, so that the gate voltage Vgate of the transistor N1 also slowly rises, and then the voltage output end 202 is charged through the transistor N1. When the voltage Vsoft is higher than the gate voltage Vgate of the transistor N1, the soft start of the circuit is completed.

[0027] The soft start time of the circuit is T1=C1*Vgate / I1, where C1 is the capacitance value of the capacitor C1, I1 is the current provided by the current source I1, and Vgate is the gate voltage of the transistor N1 after the circuit is stabilized.

[0028] As the voltage of the voltage output end 202 gradually rises, the feedback circuit 240 and the bandgap core circuit 220 start to work. The feedback circuit 240 is coupled between the voltage output end 202 and the ground, and is used to provide a feedback voltage Vfb of the output voltage GVDD. The bandgap core circuit 220 adjusts the voltage of the voltage output end 202 according to the feedback voltage Vfb, and finally obtains a stable and temperature-independent output voltage GVDD at the voltage output end 202.

[0029] Specifically, the feedback circuit 240 includes resistors R4 and R5 coupled in sequence between the voltage output terminal 202 and the ground, and a voltage dividing network formed by the resistors R4 and R5 divides the output voltage GVDD to obtain a feedback voltage Vfb. The bandgap core circuit 220 includes transistors Q1, Q2, Q4, and resistors R1 to R3. Among them, the transistors Q1, Q2, and Q4 are NPN type bipolar transistors, the collector of the transistor Q4 is coupled with the voltage output terminal 202, the base is coupled with the feedback voltage Vfb, the emitter is coupled with the first end of the resistor R2 and the resistor R3, the second end of the resistor R2 is coupled with the collector and the base of the transistor Q2, the emitter of the transistor Q2 is grounded, the second end of the resistor R3 is coupled with the collector of the transistor Q1, the base of the transistor Q1 is coupled with the base and the collector of the transistor Q2, the emitter of the transistor Q1 is coupled with the first end of the resistor R1, and the second end of the resistor R1 is grounded. Among them, the resistors R2 and R3 have equal resistance values, the size ratio between the transistors Q2 and Q1 is 1:n, and n is an integer greater than 1 (for example, n=8). The working principle of the bandgap core circuit 220 is similar to that of a conventional bandgap reference voltage source, and will not be described here. Through the bandgap core circuit 220, a feedback voltage Vfb can be obtained:

[0030]

[0031] where ΔVbe=V BE2 -V BE1 , V BE1 , V BE2 , and V BE4 are the base-emitter voltages of the transistors Q1, Q2, and Q4, respectively. As can be seen from equation (1), by adjusting the ratio of the resistors R1 and R3, a feedback voltage Vfb with zero temperature coefficient can be obtained.

[0032] Since the feedback voltage Vfb is obtained by dividing the output voltage GVDD through the resistors R4 and R5, it can be obtained that:

[0033]

[0034] As can be seen from equation (2), in the voltage conversion circuit of the embodiment, by reasonably adjusting the ratio of the resistors R3 and R1, an output voltage independent of temperature can be obtained, and by reasonably adjusting the ratio of the resistors R4 and R5, an output voltage GVDD with different voltage values can be obtained.

[0035] Further, the gain amplification circuit 230 of the embodiment is coupled with the transistor N1 and the bandgap core circuit 220, and is used to provide a loop gain. As shown in Figure 2As shown, the gain amplification circuit 230 includes a current source I2 and a transistor Q3 coupled in series between a power supply voltage PVDD and ground, the transistor Q3 being, for example, an NPN bipolar transistor, the collector of which is coupled to the current source I2 and to the gate of the transistor N1, the base of which is coupled to the common node of the resistor R3 and the transistor Q1, and the emitter of which is coupled to ground.

[0036] Assuming that the transistors Q1-Q3 are ideal devices, the gain of the feedback voltage Vfb to the voltage at the common node of the resistor R3 and the transistor Q1 is approximately 2 / 3, i.e.:

[0037]

[0038] In summary, the voltage conversion circuit of the embodiment of the present application adopts the scheme of combining the bandgap reference circuit with the LDO, and by using the basic architecture of the bandgap reference core and the feedback to form a closed LDO loop, a stable voltage independent of temperature can be generated. Compared with the conventional scheme of designing the high-voltage LDO, the embodiment of the present application does not need an independent voltage source circuit and a reference circuit, and at the same time, a high-voltage operational amplifier is also not needed in the loop of the LDO, which greatly reduces the number of modules, and reduces the chip area and cost.

[0039] It should be noted that although devices are described herein as being certain N-channel or P-channel devices, or as being certain N-type or P-type doped regions, one of ordinary skill in the art will understand that complementary devices are also possible in accordance with the present application. One of ordinary skill in the art will understand that conductivity type is the mechanism by which conduction occurs, e.g., by holes or electrons, and thus conductivity type does not refer to doping concentration but rather to doping type, e.g., P-type or N-type. One of ordinary skill in the art will understand that the words "during," "while," and "when" as used herein in relation to circuit operation are not strict temporal terms but rather mean that there can be some small, but reasonable, delay(s) between the initiation of an action and the reaction to it that it initiates, e.g., various propagation delays, etc. The words "about" or "substantially" as used herein mean that an element has a value or position that is intended to be close to the stated value or position. However, as is well known in the art, there are always minor deviations that make it difficult to be the stated value exactly. It has been determined by those of ordinary skill in the art that a deviation of at least ten percent (10%) (and at least twenty percent (20%) for semiconductor doping concentrations) is a reasonable deviation from the described ideal goal. When used in connection with signal states, the actual voltage value or logic state of a signal (e.g., "1" or "0") depends on whether positive logic or negative logic is used.

[0040] It is also to be noted that, as used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Furthermore, to the extent that the terms "including," "includes," "having," "has," "with," or "contains" are used in either the detailed description and the claims section below, such terms are intended to be inclusive in a manner similar to the term "comprising" as an open transition term without precluding any additional or other elements.

[0041] In accordance with the practices of the present application, these embodiments have been described in relation to particular embodiments thereof, which are to be taken as illustrative only and not as restrictive. It will be apparent to those skilled in the art that modifications and variations can be made to the described embodiments without departing from the spirit and scope of the application. It is intended that the scope of the application disclosed herein should not be limited by the particular disclosed embodiments described above. Rather, the entire scope of the application is to be determined only by the following claims.

Claims

1. A voltage conversion circuit, comprising: The first transistor connected between the power supply terminal and the voltage output terminal; A soft-start circuit is connected to the control terminal of the first transistor and is used to control the first transistor to turn on slowly during the circuit startup phase. The first transistor charges the voltage output terminal according to the power supply voltage of the power supply terminal. as well as The bandgap core circuit is used to perform feedback regulation based on the feedback voltage at the voltage output terminal, ultimately obtaining a stable output voltage at the voltage output terminal. The soft-start circuit includes: A first current source and a first capacitor are sequentially coupled between the power supply terminal and ground; A first switch is coupled between the common connection node of the first current source and the first capacitor and ground; and A second transistor is coupled between the control terminal of the first transistor and ground, and the control terminal of the second transistor is coupled to the common connection node of the first current source and the first capacitor.

2. The voltage conversion circuit according to claim 1 further includes: A feedback circuit, coupled between the voltage output terminal and ground, is used to output a feedback voltage of the output voltage.

3. The voltage conversion circuit according to claim 1 further includes: A gain amplifier circuit coupled to the control terminal of the first transistor and the bandgap core circuit is used to improve the loop gain.

4. The voltage conversion circuit according to claim 1, wherein, During the circuit startup phase, the first switch is turned off, the first current source charges the first capacitor, and the second transistor clamps the control terminal voltage of the first transistor, causing the control terminal voltage of the first transistor to rise slowly.

5. The voltage conversion circuit according to claim 3, wherein, The bandgap core circuit includes: The third transistor has its first terminal coupled to the voltage output terminal and its control terminal coupled to the feedback voltage. A second resistor and a fourth transistor are sequentially coupled between the second terminal of the third transistor and ground, the control terminal and the first terminal of the fourth transistor being coupled to each other; and A third resistor, a fifth transistor, and a first resistor are sequentially coupled between the second terminal of the third transistor and ground. The control terminal of the fifth transistor is coupled to the control terminal of the fourth transistor.

6. The voltage conversion circuit according to claim 5, wherein, The gain amplifier circuit includes: A second current source and a sixth transistor are sequentially coupled between the power supply terminal and ground. The common connection node of the second current source and the sixth transistor is coupled to the control terminal of the first transistor, and the control terminal of the sixth transistor is coupled to the common connection node of the fifth transistor and the third resistor.

7. The voltage conversion circuit according to claim 6, wherein, The third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are NPN bipolar transistors.

8. The voltage conversion circuit according to claim 1, wherein, The first transistor is an N-type metal-oxide-semiconductor field-effect transistor.

9. The voltage conversion circuit according to claim 1, wherein, The second transistor is a P-type metal-oxide-semiconductor field-effect transistor.

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