A non-cooled infrared wafer-level packaged detector

Abstract

The present invention belongs to the technical field of wafer-level packaged detectors, and specifically provides an uncooled infrared wafer-level packaged detector. By using MEMS technology, the solder ring and the large-area metal on the device reflective layer are connected to the ground potential of the readout circuit through the contact part, and the parasitic capacitance and parasitic resistance are reduced by grounding the metal, thereby improving the detector performance. Due to the large amount of charge accumulated in the large-area metal etching process, which will affect the device structure, connecting the solder ring and the device reflective layer of the wafer-level package to the ground potential through the readout circuit will also release the large amount of charge accumulated in the metal etching process by grounding, improving the detector performance and the stability of the device structure, and at the same time increasing the production yield of the detector.

Description

Technical Field

[0001] The present invention relates to the technical field of wafer-level packaged detectors, and particularly to a non-cooled infrared wafer-level packaged detector. Background Art

[0002] In a non-cooled infrared wafer-level packaged detector, since a large area of solder ring metal in the detector is integrated on the readout circuit as the base layer of the wafer-level package, and at the same time the device reflection layer is also a large area of metal integrated on the readout circuit, and there is no fixed potential for the large area of solder ring metal and the reflection layer, there will be parasitic capacitance, parasitic resistance, etc., which will affect the normal parameters of the detector, increase the detector noise, and result in poor detector performance. Moreover, during the process etching production of the large area of metal, a large amount of charge will accumulate, and it will have a certain impact on the detector structure during the wafer-level package bonding. Therefore, we need to propose a non-cooled infrared wafer-level packaged detector. Summary of the Invention

[0003] The purpose of the present invention is to provide a non-cooled infrared wafer-level packaged detector. The present invention connects the large area of metal on the solder ring and the device reflection layer to the ground potential of the readout circuit through the contact part, and reduces the parasitic capacitance and parasitic resistance by grounding the metal, and also releases the large amount of charge accumulated in the metal etching process through grounding, so as to solve the problems proposed in the above background art.

[0004] To achieve the above purpose, the present invention provides the following technical solutions:

[0005] A non-cooled infrared wafer-level packaged detector includes a readout circuit and a package cap sealed on the readout circuit. The readout circuit and the package cap are connected by a solder ring, and the solder ring is grounded.

[0006] As a preferred solution of a non-cooled infrared wafer-level packaged detector according to the present invention, wherein: the readout circuit has a focal plane array structure, the focal plane array structure includes a device reflection layer and a microbridge structure located above the device reflection layer, and the device reflection layer is grounded.

[0007] As a preferred solution of a non-cooled infrared wafer-level packaged detector according to the present invention, wherein: an insulating layer is provided on the readout circuit, the solder ring and the device reflection layer are both located above the insulating layer, an electrical contact part is provided on the insulating layer, and the solder ring and / or the device reflection layer are connected to the ground potential of the readout circuit through the electrical contact part.

[0008] As a preferred solution of a non-cooled infrared wafer-level packaged detector according to the present invention, wherein: multiple groups of electrical contact parts are provided on the insulating layer corresponding to the solder ring and / or the device reflection layer.

[0009] As a preferred embodiment of the uncooled infrared wafer-level packaged detector of the present invention, wherein: each group of the electrical contact portions includes a plurality of electrical contact elements.

[0010] As a preferred embodiment of the uncooled infrared wafer-level packaged detector of the present invention, wherein: the electrical contact element includes a through hole formed in the insulating layer and a connecting metal located in the through hole.

[0011] As a preferred embodiment of the uncooled infrared wafer-level packaged detector of the present invention, wherein: the electrical contact element is fabricated by MEMS process.

[0012] As a preferred embodiment of the uncooled infrared wafer-level packaged detector of the present invention, wherein: the solder ring is arranged as a multi-layer metal stacked bonding structure.

[0013] As a preferred embodiment of the uncooled infrared wafer-level packaged detector of the present invention, wherein: the multi-layer metals of the stacked bonding structure of the solder ring include copper, nickel, gold and tin.

[0014] As a preferred embodiment of the uncooled infrared wafer-level packaged detector of the present invention, wherein: the package cap includes a package pillar and a package cover plate, the package pillar is vertically arranged between the package cover plate and the readout circuit, and the package pillar is connected to the readout circuit through the solder ring.

[0015] As a preferred embodiment of the uncooled infrared wafer-level packaged detector of the present invention, wherein: the electrical contact portion includes a first electrical contact portion, a second electrical contact portion and a third electrical contact portion; several groups are provided for the first electrical contact portion, the second electrical contact portion and the third electrical contact portion; the first electrical contact portion and the second electrical contact portion correspond to the solder ring, and the third electrical contact portion corresponds to the device reflective layer.

[0016] Compared with the prior art, the beneficial effects of the present invention are:

[0017] The present invention provides an uncooled infrared wafer-level packaged detector, which uses MEMS process to connect the solder ring and the large-area metal on the device reflective layer to the ground potential of the readout circuit through the contact portion, and reduces the parasitic capacitance and parasitic resistance by grounding the metal, thereby improving the performance of the detector; due to the large amount of charge accumulated in the large-area metal etching process, which will affect the device structure, connecting the solder ring and the device reflective layer of the wafer-level package to the ground potential through the readout circuit will also release the large amount of charge accumulated in the metal etching process by grounding, improving the performance of the detector and the stability of the device structure, and at the same time increasing the production yield of the detector.

[0018] Other features and advantages of the present invention will be described in the following specification, and in part will be obvious from the specification, or will be understood by implementing the present invention. The objectives and other advantages of the present invention can be achieved and obtained by the structure pointed out in the specification and the drawings. Brief Description of the Drawings

[0019] Figure 1 It is a schematic diagram of the solder ring in the present invention;

[0020] Figure 2 It is a schematic diagram of the wafer array solder ring of the present invention;

[0021] Figure 3 It is a schematic diagram of the solder ring process of the present invention.

[0022] In the figure: 1 - insulation layer; 2 - solder ring; 3 - encapsulation cover plate; 4 - encapsulation support pillar; 5 - MEMS microbridge structure; 6 - device reflection layer; 7 - third electrical contact part; 8 - first electrical contact part; 9 - second electrical contact part. Detailed Description of the Embodiments

[0023] The same or similar components are labeled with the same reference numerals in different drawings; in addition, please understand that terms such as "first", "second", "third", "upper", "lower", "front", "rear", "inner", "outer", "end", "part", "section", "width", "thickness", "area", etc. and similar terms are only for the convenience of the viewer to refer to the structure in the drawings and are only used to help describe the present invention, and are not limitations to the present invention.

[0024] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0025] A non-cooled infrared wafer-level packaged detector includes a readout circuit, on which a solder ring 2 serving as a base layer for wafer-level packaging is integrated. The solder ring 2 is grounded. An encapsulation cap is connected to the readout circuit through the solder ring 2. The encapsulation cap includes an encapsulation support pillar 4 and an encapsulation cover plate 3. The encapsulation cover plate 3 is connected to the solder ring 2 through the encapsulation support pillar 4. An insulation layer 1 is provided between the solder ring 2 and the readout circuit.

[0026] The technical solutions of the present invention will be further described below in conjunction with specific embodiments.

[0027] Please refer to Figures 1-3, the uncooled infrared wafer-level packaged detector according to an embodiment of the present invention includes a readout circuit. A solder ring 2 serving as a base layer for wafer-level packaging is integrated on the readout circuit. A device reflective layer 6 is also integrated on the readout circuit. A packaging cover plate 3 is connected to the solder ring 2 through a packaging support pillar 4. An insulating layer 1 is provided between both the solder ring 2 and the device reflective layer 6 and the readout circuit. The material of the insulating layer 1 is silicon oxide or silica. The insulating layer is an insulating layer fabricated on a standard readout circuit, and its function is to form electrical contact parts on the insulating layer without the need to redesign the readout circuit. Electrical contact parts are provided on the insulating layer 1. The solder ring 2 and the device reflective layer 6 are connected to the ground potential of the readout circuit through the electrical contact parts. The solder ring 2 is distributed in an array. The solder ring 2 is arranged as a multi-layer metal stacked bonding structure. The multi-layer metals of the stacked bonding structure of the solder ring 2 include copper, nickel, gold, and tin. The large-area metals on the solder ring 2 and the device reflective layer 6 are connected to the ground potential of the readout circuit through the electrical contact parts, and the electrical contact parts are fabricated using MEMS technology. The solder ring 2 and the device reflective layer 6 can reduce parasitic capacitance and parasitic resistance through metal grounding. This metal grounding method can also release a large amount of charge accumulated in the metal etching process through grounding, ensuring the performance of the detector and the stability of the device structure.

[0028] Please refer to Figures 1-3 , the uncooled infrared wafer-level packaged detector according to another embodiment of the present invention. Compared with the previous embodiment, it includes a readout circuit. A solder ring 2 serving as a base layer for wafer-level packaging is integrated on the readout circuit. A device reflective layer 6 is also integrated on the readout circuit. A packaging cover plate 3 is connected to the solder ring 2 through a packaging support pillar 4. An insulating layer 1 is provided between both the solder ring 2 and the device reflective layer 6 and the readout circuit. Electrical contact parts are provided on the insulating layer 1. The solder ring 2 and the device reflective layer 6 are connected to the ground potential of the readout circuit through the electrical contact parts. The large-area metals on the solder ring 2 and the device reflective layer 6 are connected to the ground potential of the readout circuit through the electrical contact parts, and the electrical contact parts are fabricated using MEMS technology. The solder ring 2 in the wafer-level packaging is realized by stacking and bonding multi-layer metals such as copper, nickel, gold, tin, etc. Since the large-area metal of the solder ring 2 in the detector is integrated on the readout circuit as the base layer of the wafer-level packaging, and the large-area metal of the solder ring 2 has no fixed potential, as Figure 1 , Figure 2 shown; connecting the large-area metals on the solder ring 2 and the device reflective layer 6 to the ground potential of the readout circuit through the contact parts, reducing parasitic capacitance and parasitic resistance through metal grounding, and also releasing a large amount of charge accumulated in the metal etching process through grounding, as Figure 3As shown. A MEMS microbridge structure 5 is provided on the device reflective layer 6. Multiple sets of electrical contact parts can be provided on the insulating layer 1 corresponding to the solder ring 2 or the device reflective layer 6. Each set of the electrical contact parts includes one or more electrical contact elements, and the electrical contact elements can be fabricated by MEMS technology, which includes through holes formed in the insulating layer (1) and connection metals located in the through holes. In this embodiment, the electrical contact parts include a first electrical contact part 8, a second electrical contact part 9, and a third electrical contact part 7. The first electrical contact part 8 and the second electrical contact part 9 correspond to the solder ring 2, and the third electrical contact part 7 corresponds to the device reflective layer 6. By providing multiple sets of electrical contact parts and each set of electrical contact parts including multiple electrical contact elements, stable release of charges can be achieved, parasitic capacitance and parasitic resistance can be reduced, the performance of the detector can be improved, and at the same time, the reliability of the ground connection can be ensured.

[0029] The present invention uses MEMS technology to connect the large-area metals on the solder ring 2 and the device reflective layer 6 to the ground potential of the readout circuit through the contact parts, and reduces the parasitic capacitance and parasitic resistance by grounding the metal to improve the performance of the detector; due to the large amount of charges accumulated in the large-area metal etching process, which will affect the device structure, connecting the solder ring 2 and the device reflective layer 6 of the wafer-level package to the ground potential through the readout circuit will also release the large amount of charges accumulated in the metal etching process through grounding, improving the performance of the detector and the stability of the device structure, and at the same time increasing the production yield of the detector.

[0030] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A non-cooled infrared wafer-level packaged detector, characterized in that, It includes a readout circuit and a packaging cap sealed on the readout circuit. The readout circuit and the packaging cap are connected by a solder ring (2), and the solder ring (2) is grounded; the readout circuit has a focal plane array structure, and the focal plane array structure includes a device reflective layer (6) and a microbridge structure located above the device reflective layer (6), and the device reflective layer (6) is grounded.

2. The uncooled infrared wafer-level packaged detector according to claim 1, wherein: An insulating layer is provided on the readout circuit. The solder ring (2) and the device reflective layer (6) are both located above the insulating layer. Electrical contact parts are provided on the insulating layer (1), and the solder ring (2) and / or the device reflective layer (6) are connected to the ground potential of the readout circuit through the electrical contact parts.

3. The uncooled infrared wafer-level packaged detector according to claim 2, characterized in that: Multiple groups of electrical contact parts are provided on the insulating layer (1) corresponding to the solder ring (2) and / or the device reflective layer (6).

4. The uncooled infrared wafer-level packaged detector according to claim 3, wherein: Each group of the electrical contact parts includes a plurality of electrical contact elements.

5. The uncooled infrared wafer-level packaged detector according to claim 4, wherein: The electrical contact element includes a through hole opened on the insulating layer (1) and a connecting metal located in the through hole.

6. The uncooled infrared wafer-level packaged detector according to claim 5, wherein: The electrical contact element is fabricated by MEMS technology.

7. The uncooled infrared wafer-level packaged detector according to claim 1, wherein: The solder ring (2) is arranged as a multi-layer metal stacked bonding structure.

8. A non-cooled infrared wafer-level packaged detector according to claim 7, characterized in that: The multi-layer metals of the stacked bonding structure of the solder ring (2) include copper, nickel, gold and tin.

9. The uncooled infrared wafer-level packaged detector according to claim 1, wherein: The packaging cap includes packaging pillars (4) and a packaging cover plate (3). The packaging pillars (4) are vertically arranged between the packaging cover plate (3) and the readout circuit, and the packaging pillars (4) are connected to the readout circuit through the solder ring (2).

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