Substrate processing method and system

By forming spacers on the substrate and passing into deposition gas to excite plasma, adjusting the distance difference value of adjacent spacers, the problems of gap wall deformation and key dimension difference in the dry etching process are solved, and wafer productivity and integrated circuit preparation process optimization are improved.

CN115376911BActive Publication Date: 2025-08-08ADVANCED MICRO FAB EQUIP INC CHINA
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Patent Information

Application Number
CN202110557429.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-05-21
Publication Date
2025-08-08
Estimated Expiration
2041-05-21

AI Technical Summary

Technical Problem

In the process of self-aligning multi-pattern preparation, the gap wall deformation and key dimensional difference loss lead to uneven distances between spacers, affecting the defects of multi-pattern devices and the output of integrated circuits.

Method used

By forming a spacer on the substrate and excitating plasma through the deposition gas, the polymer is deposited on the surface of the spacer, and the distance difference value of adjacent spacers is adjusted for subsequent etching processes.

Benefits of technology

It improves wafer productivity, optimizes the preparation process of integrated circuits, and enhances the accuracy of multiple pattern etching and product yield.

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Abstract

The present invention discloses a substrate processing method and system, comprising: forming a plurality of spacers on a substrate; introducing a deposition gas and stimulating it into a plasma; forming a polymer deposit on the surface of the spacers, thereby reducing the difference in distance between adjacent spacers; and introducing a processing gas to etch the substrate. Advantageously, this method, by introducing a deposition gas and stimulating it into a plasma, forms a polymer deposit on the surface of the spacers, thereby varying the difference in distance between adjacent spacers according to process requirements, facilitating subsequent etching processes, improving wafer yield, and optimizing the integrated circuit manufacturing process.
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Description

Technical Field

[0001] The present invention relates to the field of plasma etching, and in particular to a substrate processing method and system. Background Art

[0002] With the rapid development of semiconductor technology, chip sizes are shrinking. To ensure chip quality, semiconductor process requirements are becoming increasingly stringent. Size reduction is one of the driving forces behind the development of integrated circuit processing. By reducing size, cost-effectiveness and device performance can be simultaneously improved. A typical wafer requires thousands of process steps from silicon wafer to final packaging. These multiple process steps inevitably create complexity during processing, especially in multi-patterning technology.

[0003] The self-aligned multi-patterning (SAMP) process typically includes core etching, spacer deposition, spacer etching, and core stretching. In these processes, the final feature critical dimensions are controlled by the spacer deposition thickness and spacer physical characteristics, such as line-edge roughness (LER) and line-width roughness (LWR).

[0004] When using conventional dry etching processes to fabricate self-aligned multiple patterns, spacer etching often suffers from distortion of the final spacer profile (such as the spacer facet) and loss of critical dimension (CD). However, maintaining the spacer profile and CD throughout the etching process is very important because the spacer profile has a significant impact on the mask budget and the final self-aligned multiple patterning.

[0005] In existing dry etching processes, spacer deposition often produces spacers with a bull's-horn shape. This creates a discrepancy between the distances between adjacent spacers, leading to uneven distribution of spacers. Traditional processes also lack selectivity between core and spacer materials, resulting in spacer height loss or step height differences between spacers. These substrate spacer defects can easily lead to defects in multi-patterned devices, reducing product productivity and impacting the yield and scale of integrated circuit production. Summary of the Invention

[0006] The object of the present invention is to provide a substrate processing method and system, in which a deposition gas is introduced and excited into plasma, thereby forming a polymer deposited on the surface of the spacer. The difference in distance between adjacent spacers is changed according to process requirements to facilitate subsequent etching of multiple patterns, thereby improving product productivity and optimizing the preparation process of integrated circuits.

[0007] In order to achieve the above object, the present invention is implemented through the following technical solutions:

[0008] A substrate processing method, comprising:

[0009] forming a plurality of spacers on the substrate;

[0010] The adjacent spacers have a first opening and a second opening, wherein the opening distance of the first opening is smaller than the bottom distance of the first opening, and the opening distance of the second opening is larger than the bottom distance of the second opening;

[0011] Passing deposition gas and exciting it into plasma;

[0012] forming a polymer deposition amount on the surface of the adjacent spacer corresponding to the first opening that is smaller than a polymer deposition amount on the surface of the adjacent spacer corresponding to the second opening, thereby reducing the opening distance of the second opening;

[0013] A processing gas is introduced to etch the substrate.

[0014] Optionally, forming a plurality of spacers on the substrate includes:

[0015] forming a plurality of cores by plasma etching a core layer on a substrate;

[0016] depositing a spacer layer on the core by chemical vapor deposition;

[0017] The spacers are formed by plasma etching the core and the spacer layer.

[0018] Optionally, forming a polymer deposited on the spacer surface comprises:

[0019] The extent of the polymer deposition is proportional to the distance between the spacers.

[0020] Optionally, the deposition gas contains C x H y F z gas.

[0021] Optionally, one or more of CH3F, CH2F2, C4F6, C4H2F6, C3H2F4, C3F6, C2F4, CHF3 and C4F8 are selected as the deposition gas.

[0022] Optionally, the CH3F gas flow rate is 5-20 sccm, and / or the C4F6 gas flow rate is 3-12 sccm, and / or the C4F8 gas flow rate is 5-20 sccm, and / or the CH2F2 gas flow rate is 5-12 sccm, and / or the CHF3 gas flow rate is 3-12 sccm, and / or the C4H2F6 gas flow rate is 3-20 sccm, and / or the C3H2F4 gas flow rate is 5-12 sccm.

[0023] Optionally, the deposition time of the polymer is 5-20 seconds.

[0024] Optionally, the deposition gas is a gas without double bonds, and the relationship between the contents of F, H, and C in the deposition gas satisfies (FH) / C≤2.

[0025] Optionally, the deposition gas is a gas containing double bonds, including one or more of C4F6, C4H2F6, C3H2F4, C3F6 and C2F4 as deposition gases.

[0026] Optionally, the deposition gas further contains an inert gas.

[0027] Optionally, the inert gas is N2.

[0028] Optionally, the N2 gas flow rate is 200-800 sccm.

[0029] Optionally, the working pressure range of the deposition gas is 40-160 mT, the radio frequency power range is 300-1200 W, the radio frequency frequency is 60 MHz, and the deposition gas flow time is 5-20 s.

[0030] Optionally, the materials of the substrate and the core may be carbon, polysilicon or silicon oxide;

[0031] And / or, the spacer may be made of silicon oxide, nitride or polysilicon.

[0032] Optionally, the bottom distance of the first opening is equal to the bottom distance of the second opening.

[0033] Optionally, a system for substrate processing comprises:

[0034] An ion etching chamber configured to:

[0035] receiving a substrate having a spacer;

[0036] Passing deposition gas and exciting it into plasma;

[0037] a source controller coupled to the ion etching chamber, the source controller being configured to control the formation of polymer deposition on the surface of the spacers so as to reduce the difference in opening distances between adjacent spacers;

[0038] A processing gas is introduced to etch the substrate.

[0039] Compared with the prior art, the present invention has the following advantages:

[0040] In a substrate processing method and system of the present invention, the substrate processing method forms a polymer deposited on the surface of the spacer by introducing a deposition gas and exciting it into plasma. The difference in distance between adjacent spacers is changed according to process requirements to facilitate subsequent etching processes, thereby improving chip productivity and optimizing the integrated circuit preparation process. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 A substrate processing system of the present invention;

[0043] Figure 2 Schematic diagram of forming a plurality of spacers on a substrate in the substrate processing method of the present invention;

[0044] Figure 3 It is a schematic diagram of forming a polymer deposited on the spacer surface in the substrate processing method of the present invention. DETAILED DESCRIPTION

[0045] To facilitate understanding of the features, contents, advantages, and effects that can be achieved by the present invention, the present invention is described in detail below in conjunction with the accompanying drawings and in the form of embodiments. The drawings used therein are for illustration and auxiliary description purposes only and may not represent the actual proportions and precise configurations after the implementation of the present invention. Therefore, the proportions and configuration relationships of the attached drawings should not be interpreted to limit the scope of rights of the present invention in actual implementation.

[0046] Various operations will be described in turn as a plurality of discrete operations in a manner that is most helpful for understanding the present invention. However, the order of description should not be understood to mean that these operations are necessarily dependent on the order. Specifically, these operations do not need to be performed in the order presented. The described operations can be performed in an order different from the described embodiment. In other embodiments, various additional operations can be performed and / or the described operations can be ignored.

[0047] As used herein, the term "substrate" refers to and includes the base material or structure on which a material is formed. It should be understood that a substrate can include a single material, multiple layers of different materials, one or more layers with regions of different materials or different structures therein, etc. These materials can include semiconductors, insulators, conductors, or combinations thereof. For example, a substrate can be a semiconductor base, a base semiconductor layer on a support structure, a metal electrode or a semiconductor substrate on which one or more layers, structures or regions are formed. The substrate can be a conventional silicon substrate or other bulk substrate including a layer of semiconductor material. The substrate can be doped or undoped.

[0048] It should be noted that the drawings are in very simplified form and use non-precise ratios, which are only used for the purpose of conveniently and clearly assisting in explaining the embodiments of the present invention. Reference is now made to the accompanying drawings, in which the same reference numerals represent the same or corresponding parts throughout the several views.

[0049] Figure 1 is an embodiment of a system for substrate processing of the present invention. In this embodiment, the substrate processing system can be coordinated to perform the following Figure 2-Figure 3 The substrate processing method for plasma etching is configured to perform the etching under the above process conditions. Figure 1 As shown in FIG, it comprises: an ion etching chamber 100, which is surrounded by an etching chamber 101 and a chamber end cover 102. A wafer transfer port 103 is provided on the ion etching chamber 100, and the wafer transfer port 103 is used to realize the transfer of wafers between the inside and outside of the ion etching chamber 100. The outside of the wafer transfer port 103 can be connected to the transfer chamber and the airlock chamber (not shown in the figure). The airlock chamber can perform pressure conversion between vacuum and atmospheric pressure to keep the ion etching chamber 100 in the substrate processing system in a stable state. Several groups of robotic arms can be set in the transfer chamber to transfer the wafer W between the airlock chamber, the transfer chamber and the ion etching chamber 100 through the robotic arms. Optionally, the wafer W can be a semiconductor substrate.

[0050] The ion etching chamber 100 includes a lower electrode assembly 110 disposed at the bottom of the ion etching chamber 100. The lower electrode assembly 110 includes a base having a supporting surface on which a wafer W to be processed is placed. The ion etching chamber 100 also includes an upper electrode assembly 120 disposed opposite the lower electrode assembly 110. The processing chamber space between the upper electrode assembly 120 and the lower electrode assembly 110 can be configured as a processing area for etching the surface of the wafer W.

[0051] A temperature control device 130 may be disposed within the insulating material layer of the lower electrode assembly 110 to provide a suitable temperature for the wafer W. The temperature control device 130 may be a Joule heating device, such as one that achieves temperature control through a resistor, or a heat conduction channel, such as one that achieves temperature control through a coolant in the heat conduction channel. Furthermore, the temperature control device 130 may be arranged in zones, allowing the temperature of different zones of the wafer W to be controlled separately, thereby achieving uniform temperature control.

[0052] The ionizable gas or mixture of process gases is introduced via a gas distribution system 140. For a given process gas flow, a vacuum pumping system is used to adjust the process pressure. The gas distribution system 140 may include a showerhead 141 for introducing the process gas. Optionally, the gas distribution system 140 may include a multi-zone showerhead design for introducing a mixture of process gases and adjusting the distribution of the mixture of process gases above the wafer W. For example, the multi-zone showerhead design can be configured to adjust the amount of process gas flow or components flowing to the peripheral area above the wafer W by adjusting the amount of process gas flow or components flowing into the central area above the wafer W. In this embodiment, the gases can be distributed in appropriate combinations to form a highly uniform plasma within the processing area.

[0053] Furthermore, an exhaust port 104 is provided on the etching chamber 101. In this embodiment, the exhaust port is provided at the bottom of the ion etching chamber 100, i.e., the bottom of the etching chamber 101. A gas extraction device 150 discharges the gas inside the ion etching chamber 100, i.e., the reaction waste products, out of the chamber through the exhaust port. Optionally, the gas extraction device 150 can be a molecular pump or a dry pump. Of course, the structure of the gas extraction device 150 is not limited to this, and it can also be any other device that can achieve the same gas extraction function.

[0054] Optionally, the lower electrode assembly 110 can be connected to one or more RF matchers 160, for example, two RF matchers 160 can be connected. In the embodiment where multiple RF matchers 160 are connected, each RF matcher 160 can provide a different RF frequency and power from other RF matchers 160 to meet the requirements of different processing technologies. In these embodiments, the upper electrode assembly 120 can be grounded. In other embodiments, the upper electrode assembly 120 can be connected to one RF matcher 160, and the lower electrode assembly 110 can be connected to one RF matcher 160, and the two RF matchers 160 can provide different RF frequencies and powers.

[0055] In this embodiment, at least one RF matcher 160 is applied to the lower electrode assembly 110 via a matching network to dissociate the process gas into plasma, creating a plasma environment in the processing region between the upper electrode assembly 120 and the lower electrode assembly 110. This plasma environment contains a large number of active species, such as electrons, ions, excited atoms, molecules, and free radicals. These active species can undergo various physical and / or chemical reactions with the surface of the wafer W to be processed, thereby changing the morphology of the wafer W to be processed and completing the processing of the wafer W to be processed.

[0056] In this embodiment, a source controller in a substrate processing system controls the entire process. The source controller may include a microprocessor, memory, and digital I / O ports capable of generating control voltages sufficient to transmit and activate inputs to the system and monitor outputs from the system. For example, a program stored in the memory may be used to activate inputs to various components of the system according to the process in order to perform a plasma-assisted process on a wafer W, such as a substrate pretreatment process or a plasma etching process.

[0057] Based on the above substrate processing system, the present invention provides a substrate processing method, such as Figure 2 and Figure 3 As shown in FIG. 1 , the method includes:

[0058] (1) A plurality of spacers 210 are formed on the substrate 200. In the present invention, the method of forming the spacers 210 is not limited.

[0059] like Figure 2 As shown, the forming of several spacers 210 on the substrate 200 includes: forming several cores 221 by plasma etching the core layer on the substrate 200; depositing a spacer layer 222 on the core 221 by chemical vapor deposition; and forming the spacer 210 by plasma etching the core 221 and the spacer layer 222.

[0060] In certain embodiments, the materials of the substrate 200 and the core 221 may be carbon, such as one or more of an advanced patterned film (APF), an amorphous carbon layer (ACL), a spin-on carbon (SOC), a spin-on hard film (SOH) type amorphous carbon, and polycrystalline silicon. Appropriate materials for the substrate 200 and the core 221 are selected based on process conditions and process requirements. Of course, the materials of the core 221 and the spacer layer 222 are not limited to one or more of the above-mentioned materials. They may also be other materials applicable to the field of semiconductor wafer W etching. The material of the spacer 210 may be silicon oxide, nitride, or polycrystalline silicon. Table 1 shows some examples of core 221 / spacer layer 222 combinations. For example, when the core 221 is polycrystalline silicon, the spacer layer 222 may be nitride. In this embodiment, the substrate 200 is made of SiOxNy (a composite material of silicon oxide and silicon nitride), the core 221 is made of carbon (such as amorphous carbon), the spacer layer 222 is made of silicon oxide, and the material of the spacer 210 is silicon oxide. Optionally, the core 221 layer on the substrate 200 may be formed by a photolithography process, the core 221 may be formed by a plasma etching process, and the spacer layer 222 may be formed by a CVD deposition process. Figure 2 As shown, adjacent spacers 210 have a first opening with a distance CD1 between them and a second opening with a distance CD2 between them. The first opening distance CD1 is less than the bottom distance of adjacent spacers 210, meaning that adjacent spacers corresponding to the first opening distance CD1 bend inward at the opening. The second opening distance CD2 is greater than the bottom distance of adjacent spacers 210, meaning that adjacent spacers corresponding to the second opening distance CD2 bend outward at the opening. In some embodiments, the bottom distance of the first opening is equal to the bottom distance of the second opening. After polymer deposition, the distances of the first and second openings will approach the bottom distance, achieving the technical effect of having adjacent spacers with nearly equal distances.

[0061] Table 1 Schematic diagram of core / spacer layer

[0062] Serial number Core / Spacer 1 Polysilicon / Nitride 2 Polysilicon / Oxide 3 Amorphous carbon / nitride 4 Amorphous carbon / oxide

[0063] (2) Introducing deposition gas and exciting it into plasma. Specifically, the controller controls the RF matcher 160 to apply RF power to the upper electrode assembly 120 or the lower electrode assembly 110 of the substrate processing system, exciting the deposition gas in the processing area of the ion etching chamber 100 to form plasma.

[0064] (3) forming a polymer 230 deposited on the surface of the spacer 210, so that the difference in the distance between adjacent spacers 210 is reduced, such as Figure 2The distance CD1 between the first openings of two adjacent spacers and the distance CD2 between the second openings of another two adjacent spacers are reduced by depositing polymer 230 on the spacers, minimizing the distance between adjacent spacers. The difference in distance between adjacent spacers 210 is the critical dimension difference. A smaller critical dimension difference results in a more uniform distribution of distances between spacers 210. In a multi-patterning etching process, a smaller critical dimension difference leads to a more effective plasma etching effect for the multi-patterning process.

[0065] The deposition gas is processed in the ion etching chamber 100 to form a polymer 230. The present invention has found that the formed polymer 230 is viscous. When deposited from top to bottom, it will preferentially fall on the top of the spacer surface with a large opening distance. The subsequent polymer will preferentially combine with the already deposited polymer. Specifically, the polymer 230 is deposited more on the surface of the adjacent spacer with the second opening relative to the adjacent spacer with the first opening. For the same adjacent spacer, the polymer is deposited more on the top of the spacer relative to the bottom, that is, the polymer 230 gradually accumulates along the edges and shoulders of each part of the spacer 210 to change the distance between adjacent spacers 210. Different gases are selected for different deposition processes according to process requirements. Because the spacer layer 222 is deposited around the core 221, after plasma etching, the spacer 210 will form as follows. Figure 2 The bullhorn shape shown results in uneven spacing between the spacers. The processing method of the present invention allows the polymer deposition process to further control the difference in distance between adjacent spacers 210 on the substrate 200, helping to improve etching performance in subsequent processes. When the shape and spacing of the spacers 210 are relatively uniform, this operation can adjust the distance between each spacer 210 according to process requirements.

[0066] In this embodiment, the deposition gas comprises C x H y F z Gas. In the radio frequency environment of the ion etching chamber 100, C x H y F z The gas can be decomposed into different polymers 230 according to its own characteristics and attached to the spacer 210 . Different gas components decompose different polymers 230 and their attachment positions are different. The present invention mainly utilizes the generated polymers to be deposited on the shoulder of the spacer 210 .

[0067] The deposition gas forms polymer 230 by two main mechanisms: free radical coupling or free radical chain growth. Each deposition gas tends to favor one of these mechanisms depending on its specific composition and structure. Optionally, one or more of CH3F, CH2F2, C4F6, C4H2F6, C3H2F4, C3F6, C2F4, CHF3, and C4F8 can be used as the deposition gas.

[0068] The deposition gas may include a first type of deposition gas that does not contain double bonds and / or a second type of deposition gas that contains double bonds.

[0069] Among them, the first type of deposition gas that does not contain double bonds is CH2F2, CHF3, CH3F and C4F8, etc. A small part of them will decompose into active free radicals in the radio frequency environment of the ion etching chamber 100, that is, the above gases contain free radicals with multiple active sites (such as ·CF2·, ·CHF·, ·CF··, etc.) and free radicals containing a single active site (such as CF3·, CF2H·) in the radio frequency environment.

[0070] Among them, free radicals with multiple active sites are more likely to couple in pairs to form linear or even three-dimensional polymers 230, while free radicals with a single active site are more likely to terminate the continued coupling reaction, which is equivalent to sealing both ends of the chain. Therefore, the first type of deposition gas without double bonds can produce polymers 230 formed by free radical coupling. The more multi-active site free radicals produced, the easier it is to form long-chain polymers 230. Therefore, the molecular weight of polymer 230 will increase, and the viscosity or adsorption coefficient will be stronger, so it is more likely to hang on the sidewall rather than the bottom (that is, when the formed polymer 230 descends, it will first touch the top and hang on it, without having the opportunity to fall to the bottom). Therefore, the use of the above-mentioned first type of deposition gas is more likely to produce polymers 230 attached to the shoulders of spacers 210 in an RF environment, thereby adjusting the distance between adjacent spacers 210. In addition, as the H content in the gas molecules increases, the molecular weight of the polymer will increase. That is, when the relationship between the F, H and C contents in the gas molecules meets the condition (FH) / C≤2, the smaller the ratio is, the larger the molecular weight of the formed polymer will be, and the easier it will be to improve the distance heterogeneity between adjacent spacers. For example, CH3F and CH2F2 are more likely to form long-chain polymers 230, which hang on the side walls of the spacer 210, because the C-H bond is easier to break than the CF bond, and H can generate HF gas with F, thereby increasing the C content in the gas and the number of free radicals at multiple active sites. That is, the higher the C / F ratio and the higher the H content, the heavier the polymer 230 produced by the deposited gas.

[0071] Examples of the second type of deposition gas containing double bonds include C4F6, C4H2F6, C3H2F4, C3F6, C2F4, etc. The double bonds in the second type of deposition gas will generate free radical active points and then become active monomers under the RF environment of the ion etching chamber 100. The active monomer will then quickly combine with the next active monomer to form a double monomer active point, and then continue to combine with the third active monomer, and so on, completing the continuous growth of the free radical chain. The chain length is not limited, and larger polymers can be formed with stronger adsorption. The free radical chain grows until it combines with a single active free radical or a similar active monomer to cause chain termination.

[0072] In addition, according to process requirements, the formation of the polymer 230 deposited on the surface of the spacer 210 can be set to include: the amount of the polymer 230 deposited increases as the distance between the spacers 210 increases, and the two adjacent spacers 210 with the second distance CD2 have a larger open contact area with the plasma, i.e., the polymer, relative to the two adjacent spacers with the first distance CD1. Therefore, the polymer 230 will be deposited more, and through the deposition of the polymer, the distance difference between different adjacent spacers is balanced.

[0073] As shown in Table 2, different critical dimension differences can be generated by using different deposition gas components. The critical dimension depends on the distance between two adjacent spacers. When the distance between two adjacent spacers is the same, the critical dimension difference is 0. Therefore, the smaller the distance difference between different adjacent spacers, the smaller the critical dimension difference generated, and the more uniform the hole size of plasma etching. Different deposition gas components are used according to process requirements. For example, when the process requires the distance difference between adjacent spacers 210, that is, the critical dimension difference, the smaller the better, gases such as C4F6 and C3H2F4 can be used. The distance area between each spacer 210 is uniform, and the subsequent ion etching multiple patterning process is more accurate, which improves the accuracy of ion etching and also improves the product yield.

[0074] Table 2 Critical dimension differences of different deposition gas compositions

[0075] Deposition gas composition Critical size difference <![CDATA[CH3F]]> 6.7nm <![CDATA[C4F6]]> 1.0nm <![CDATA[C4F8]]> 2.9nm <![CDATA[CH2F2]]> 7.3nm <![CDATA[CHF3]]> 8.5nm <![CDATA[C4H2F6]]> 1.0nm <![CDATA[C3H2F4]]> 1.1nm

[0076] Table 2 shows the critical dimension difference when using a single active gas component, where the specific process parameters are: CH3F gas flow rate of 5-20 sccm, C4F6 gas flow rate of 3-12 sccm, C4F8 gas flow rate of 5-20 sccm, CH2F2 gas flow rate of 5-12 sccm, CHF3 gas flow rate of 3-12 sccm, C4H2F6 gas flow rate of 3-20 sccm, and C3H2F4 gas flow rate of 5-12 sccm. During the process, the operating pressure of the deposition gas ranges from 40 to 160 mT, the RF power ranges from 300 to 1200 W, the RF frequency is 60 MHz, and the deposition gas flow time is 5-20 s. The deposition time affects the total amount of polymer deposited on the spacer. Excessive deposition time will block the openings between adjacent spacers, affecting subsequent etching. A deposition flow time of 5-20 s can achieve the best uniformity without blocking the openings.

[0077] On the other hand, according to the required deposition gas type and deposition gas concentration, the deposition gas further contains an inert gas to dilute the reactive process gas.

[0078] Optionally, the inert gas is nitrogen (N2). During the process, the N2 gas flow rate can range from 200 to 800 sccm, with different N2 gas flow rates being used depending on the desired active component concentration or deposition thickness. It should be noted that the inert gas is not limited to N2 and can also be other gases that do not affect the reaction of the active components in the deposition gas (such as helium), which will not be further described here.

[0079] (4) A processing gas is introduced to etch the substrate 200 to complete the etching of the wafer W.

[0080] In summary, the present invention provides a substrate processing method and system, which introduces a deposition gas and excites it into plasma, thereby forming a polymer 230 deposited on the surface of the spacer 210. According to process requirements, the difference in distance between adjacent spacers 210 is changed to facilitate the etching process of subsequent processes, thereby improving the chip yield and optimizing the integrated circuit preparation process.

[0081] Although the present invention has been described in detail through the above preferred embodiments, it should be understood that the above description is not intended to limit the present invention. After reading the above description, various modifications and substitutions of the present invention will become apparent to those skilled in the art. Therefore, the scope of protection of the present invention should be defined by the appended claims.

Claims

1. A substrate processing method, characterized in that: Include: forming a plurality of spacers on the substrate; The adjacent spacers have a first opening and a second opening, wherein the opening distance of the first opening is smaller than the bottom distance of the first opening, and the opening distance of the second opening is larger than the bottom distance of the second opening; Passing deposition gas and exciting it into plasma; forming a polymer deposition amount on the surface of the adjacent spacer corresponding to the first opening that is smaller than the deposition amount on the surface of the adjacent spacer corresponding to the second opening, so that the difference between the opening distance of the second opening and the opening distance of the first opening is reduced; introducing a processing gas to etch the substrate; Wherein, forming a plurality of spacers on the substrate comprises: A plurality of cores are formed by plasma etching a core layer on a substrate, wherein the cross section of the top of the core is in an arc shape; depositing a spacer layer on the core by chemical vapor deposition; The spacers are formed by plasma etching the core and the spacer layer.

2. The substrate processing method according to claim 1, wherein: Forming a polymer deposit on the spacer surface comprises: The extent of the polymer deposition is proportional to the distance between the spacers.

3. The substrate processing method according to claim 1, wherein: The deposition gas contains C x H y F z gas.

4. The substrate processing method according to claim 1 or 3, wherein: One or more of CH3F, CH2F2, C4F6, C4H2F6, C3H2F4, C3F6, C2F4, CHF3 and C4F8 are selected as deposition gases.

5. The substrate processing method according to claim 4, wherein: The CH3F gas flow rate is 5-20 sccm, and / or the C4F6 gas flow rate is 3-12 sccm, and / or the C4F8 gas flow rate is 5-20 sccm, and / or the CH2F2 gas flow rate is 5-12 sccm, and / or the CHF3 gas flow rate is 3-12 sccm, and / or the C4H2F6 gas flow rate is 3-20 sccm, and / or the C3H2F4 gas flow rate is 5-12 sccm.

6. The substrate processing method according to claim 5, wherein: The deposition time of the polymer is 5-20 seconds.

7. The substrate processing method according to claim 3, wherein: The deposition gas is a gas without double bonds, and the relationship between the contents of F, H, and C in the deposition gas satisfies (FH) / C≤2.

8. The substrate processing method according to claim 3, wherein: The deposition gas is a gas containing double bonds, including one or more of C4F6, C4H2F6, C3H2F4, C3F6 and C2F4 as deposition gases.

9. The substrate processing method according to claim 1 or 3, wherein: The deposition gas further includes an inert gas.

10. The substrate processing method according to claim 9, wherein: The inert gas is N2.

11. The substrate processing method according to claim 10, wherein: The N2 gas flow rate is 200-800 sccm.

12. The substrate processing method according to claim 1, wherein: The working pressure range of the deposition gas is 40-160 mT, the radio frequency power range is 300-1200 W, the radio frequency frequency is 60 MHz, and the deposition gas flow time is 5-20 s.

13. The substrate processing method according to claim 1, wherein: The materials of the substrate and the core are carbon, polysilicon or silicon oxide; And / or, the spacer is made of silicon oxide, nitride or polysilicon.

14. The substrate processing method according to claim 1, wherein: The bottom distance of the first opening is equal to the bottom distance of the second opening.

15. A system for substrate processing, characterized in that Include: An ion etching chamber configured to: receiving a substrate having a spacer; Passing deposition gas and exciting it into plasma; a source controller coupled to the ion etching chamber, the source controller being configured to implement the substrate processing method according to any one of claims 1 to 14, the source controller being configured to control the formation of polymer deposition on the surface of the spacers so as to reduce the difference in opening distances between adjacent spacers; A processing gas is introduced to etch the substrate.

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