Mode switching circuit for a voltage boosting charge pump and voltage management circuit

Abstract

The application discloses a mode switching circuit of a voltage-lifting and voltage-lowering charge pump and a voltage management circuit. The mode switching circuit comprises a first comparator, a second comparator and a logic module. Half of a first port voltage of the voltage-lifting and voltage-lowering charge pump and a second port voltage are compared by using the first comparator and the second comparator, logic judgment is performed according to outputs of the two comparators, and the voltage-lifting and voltage-lowering charge pump is controlled to work in a voltage-lowering mode or a voltage-lifting mode according to a judgment result, so that automatic mode switching is realized. The voltage-lifting and voltage-lowering functions can be realized by using only one charge pump, the structure of the circuit is simplified, the cost is greatly saved, the system power consumption is reduced, the system efficiency is improved, and the use and standby time of a battery are increased.

Description

Technical Field

[0001] This invention relates to the field of power converter technology, and more specifically, to a mode switching circuit and voltage management circuit for a buck-boost charge pump. Background Technology

[0002] With the increasing demand for power electronic products and the development of semiconductor technology, power management chips are being used more widely in portable computers, mobile phones, personal digital assistants, and other portable or non-portable electronic devices. Switching converters in switching power supplies are widely used due to their advantages such as high conversion efficiency, large output current, low quiescent current, and wide output load range.

[0003] A charge pump is a typical non-magnetic component converter, consisting of a number of switching devices and voltage-dividing capacitors. The operation of the capacitors is controlled by the switches to achieve the transfer and conversion of electrical energy. It can generate a higher number of output levels with fewer switching devices, and has advantages such as small size, high efficiency, and high power density, making it a research trend in the field of battery charging. However, existing charge pumps can only perform boost or buck conversion and cannot achieve automatic switching between buck and boost modes. Therefore, both boost and buck charge pumps need to be used in the power management chip, leading to a complex chip structure and increased system power consumption. Summary of the Invention

[0004] In view of the above problems, the purpose of this invention is to provide a mode switching circuit and voltage management circuit for a buck-boost charge pump, which solves the problem of automatic bidirectional switching between buck and boost in switched capacitor voltage converters, and improves the flexibility and application range of the circuit.

[0005] According to one aspect of the present invention, a mode switching circuit for a buck-boost charge pump is provided. The buck-boost charge pump includes a first port and a second port. The mode switching circuit includes: a first comparator, with a non-inverting input receiving the voltage of the second port, an inverting input receiving a reference voltage related to the voltage of the first port, and an output for outputting a first comparison signal; a second comparator, with a non-inverting input receiving the reference voltage, an inverting input receiving the reference voltage, and an output for outputting a second comparison signal; and a logic module for performing a logical judgment based on the first comparison signal and the second comparison signal, and generating a buck mode control signal or a boost mode control signal based on the judgment result. The buck-boost charge pump switches to buck mode according to the buck mode control signal or switches to boost mode according to the boost mode control signal.

[0006] Optionally, the reference voltage is equal to half of the first port voltage.

[0007] Optionally, the first comparator and the second comparator are hysteresis comparators.

[0008] Optionally, the first comparator and the second comparator have a first threshold voltage and a second threshold voltage, the first threshold voltage being an upper limit voltage and the second threshold voltage being a lower limit voltage, and the upper limit voltage being less than the lower limit voltage.

[0009] Optionally, the first comparator is configured to: when the voltage difference between the reference voltage and the second port voltage is less than the first threshold voltage, the first comparison signal flips to a high level; when the voltage difference between the reference voltage and the second port voltage is greater than the second threshold voltage, the first comparison signal flips to a low level.

[0010] Optionally, the second comparator is configured such that when the voltage difference between the second port voltage and the reference voltage is less than the first threshold voltage, the second comparison signal flips to a high level, and when the voltage difference between the second port voltage and the reference voltage is greater than the second threshold voltage, the second comparison signal flips to a low level.

[0011] Optionally, the logic module is configured to: output the boost mode control signal when the first comparison signal and the second comparison signal indicate that the reference voltage is less than the second port voltage and the voltage difference between them is greater than the second threshold voltage; and output the buck mode control signal when the first comparison signal and the second comparison signal indicate that the reference voltage is greater than the second port voltage and the voltage difference between them is greater than the second threshold voltage.

[0012] Optionally, the logic module includes first to third inverters, a first NOR gate, and a second NOR gate. The input of the first inverter receives the first comparison signal, and its output is connected to the first input of the first NOR gate. The input of the second inverter receives the second comparison signal, and its output is connected to the first input of the second NOR gate. The second input of the first NOR gate is connected to the output of the second NOR gate, and the second input of the second NOR gate is connected to the output of the first NOR gate. The output of the first NOR gate is used to output the boost mode control signal. The input of the third inverter is connected to the output of the first NOR gate, and its output is used to output the buck mode control signal.

[0013] According to another aspect of the present invention, a voltage management circuit is provided, comprising: a buck-boost charge pump, the buck-boost charge pump including a first port and a second port; and the mode switching circuit described above.

[0014] Optionally, in buck mode, the first port of the buck-boost charge pump is electrically connected to the power supply voltage to step down the power supply voltage and output it through the second port; in boost mode, the second port of the buck-boost charge pump is electrically connected to the power supply voltage to perform bootstrap boosting of the power supply voltage and output it through the first port.

[0015] The mode switching circuit of the buck-boost charge pump of the present invention uses a first comparator and a second comparator to compare half of the first port voltage and the second port voltage of the buck-boost charge pump. Based on the output of the two comparators, a logical judgment is made, and the buck-boost charge pump is controlled to work in buck mode or boost mode according to the judgment result, thereby realizing automatic mode switching. Only one charge pump is needed to realize the functions of boost and buck, simplifying the circuit structure, greatly saving costs, reducing system power consumption, improving system efficiency, and helping to extend battery life and standby time. Attached Figure Description

[0016] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0017] Figure 1 A schematic diagram of a voltage management circuit according to an embodiment of the present invention is shown;

[0018] Figure 2 A schematic circuit diagram of a step-up / step-down charge pump according to an embodiment of the present invention is shown;

[0019] Figure 3A A schematic circuit diagram of a buck-boost charge pump in buck mode is shown.

[0020] Figure 3B Show Figure 3A Schematic diagram of the waveform at the middle node;

[0021] Figure 4A A schematic circuit diagram of a boost / buck charge pump in boost mode is shown.

[0022] Figure 4B Show Figure 4A Schematic diagram of the waveform at the middle node;

[0023] Figure 5 A schematic circuit diagram of a mode switching circuit according to an embodiment of the present invention is shown;

[0024] Figure 6A and Figure 6B Show respectively Figure 5 Timing diagram of the first and second comparators in the mode switching circuit;

[0025] Figure 7A timing diagram of a voltage management circuit according to an embodiment of the present invention is shown. Detailed Implementation

[0026] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0027] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0028] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0029] Figure 1 A schematic diagram of a voltage management circuit according to an embodiment of the present invention is shown. Figure 1 As shown, the voltage management circuit includes a buck-boost charge pump 100 and a mode switching circuit 200. The mode switching circuit 200 controls the operating mode of the buck-boost charge pump 100 by providing a boost mode control signal and a buck mode control signal to the buck-boost charge pump 100. When the buck-boost charge pump 100 receives a boost mode control signal, its operating mode switches from buck mode to boost mode; conversely, when the buck-boost charge pump 100 receives a buck mode control signal, its operating mode switches from boost mode to buck mode.

[0030] The boost-boost charge pump 100 provided by this invention operates in boost mode to boost the voltage when the power supply voltage is low, and operates in buck mode to buck the voltage when the power supply voltage is high. This overcomes the problems of low efficiency when the power supply voltage is high and inability to work when the power supply voltage is low in existing power management applications using linear regulators.

[0031] Optionally, the buck-boost charge pump 100 of the present invention includes first to third ports Port-A to Port-C, a switch array 110, a switch control circuit 120, and a charge / discharge circuit 130. The third port Port-C is used to receive a boost mode control signal or a buck mode control signal. The switch control circuit 120 is used to receive a clock signal CLK to control the switching state of the switch array 110 according to the phase sequence time reference of the clock signal CLK.

[0032] In buck mode, the switch control circuit 120 controls the switches in the switch array 110 to close or open according to the phase sequence time reference, so as to control the charge-discharge circuit 130 to receive the power supply voltage Vin through the first port Port-A of the buck-boost charge pump 110, and step down the power supply voltage Vin to obtain the output voltage and output it from the second port Port-B of the buck-boost charge pump 110.

[0033] In boost mode, the switch control circuit 120 controls the switches in the switch array 110 to close or open according to the phase sequence time reference, so as to control the charge and discharge circuit 130 to receive the power supply voltage Vin through the second port Port-B of the boost charge pump 110, and boost the power supply voltage Vin to obtain the output voltage and output it from the first port Port-A.

[0034] Optionally, the mode switching circuit 200 compares the reference voltage Vref related to the first port voltage V2X with the second port voltage V1X, and generates the boost mode control signal and buck mode control signal based on the comparison result to control the operating mode of the boost / buck charge pump 100.

[0035] Optionally, the charging / discharging circuit 130 can digitally implement the function of a capacitor (i.e., remove the capacitor), thus allowing the charging / discharging circuit 130 to be integrated into a chip. The charging / discharging circuit 130 may also include a capacitor connected to a buck-boost charge pump via a switch array 110.

[0036] Optionally, the buck-boost charge pump 100 further includes a clock generation circuit 140, which outputs a clock signal CLK to control the phase sequence time reference of the switching states in the switch array 110. The clock generation circuit 140 can be an oscillator. In other embodiments, the clock signal CLK can also be generated by external circuitry.

[0037] The voltage management circuit provided by this invention only requires a charging / discharging circuit and a switch array to achieve boost and buck functions, simplifying the structure of the charge pump, greatly saving costs, reducing system power consumption, improving system efficiency, and increasing battery (pack) usage time and standby time.

[0038] refer to Figure 2 , Figures 3A-3B as well as Figures 4A-4B , Figure 2 A schematic circuit diagram of a step-up / step-down charge pump according to an embodiment of the present invention is shown. Figure 3A A schematic circuit diagram of a buck-boost charge pump in buck mode is shown. Figure 3B Show Figure 3A A schematic diagram of the waveforms at the middle nodes. Figure 4A A schematic circuit diagram of a boost / buck charge pump in boost mode is shown. Figure 4B Show Figure 4A A schematic diagram of the waveforms at the middle nodes.

[0039] Specifically, the switch array 110 includes four sets of switches S1-S4. The first terminal of the first switch S1 is electrically connected to the first port Port-A, and its second terminal is electrically connected to the first node P1 of the switch array 110. The first terminal of the second switch S2 is electrically connected to the first node P1, and its second terminal is electrically connected to the second port Port-B. The first terminal of the third switch S3 is grounded, and its second terminal is electrically connected to the second node P2. The first terminal of the fourth switch S4 is electrically connected to the second node P2, and its second terminal is electrically connected to the second port Port-B.

[0040] The charging and discharging circuit 130 is connected in series between the first node P1 and the second node P2. Specifically, the charging and discharging circuit 130 uses a flying capacitor CFly to charge and discharge the input voltage. The upper plate of the flying capacitor CFly is electrically connected to the first node P1, and its lower plate is electrically connected to the second node P2.

[0041] Specifically, the clock generation circuit 140 (optional component) can be an oscillator that outputs a high-frequency clock CLK to provide the phase sequence time reference for switches S1-S4.

[0042] In buck mode, the first port (Port-A) of the buck-boost charge pump 100 is electrically connected to the power supply voltage Vin, and the second port (Port-B) is electrically connected to the load. The switch control circuit 120 controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to open and close according to the phase sequence time reference. This allows the flying capacitor CFly to receive the first port voltage V2X (V2X = Vin) through the first port (Port-A) and step down the power supply voltage Vin to obtain the second port voltage V1X, which is then output from the second port (Port-B). That is, when the power supply voltage is high, the buck-boost charge pump operates in buck mode, with the power supply voltage Vin input from the first port (Port-A) and the stepped-down voltage V1X output from the second port (Port-B). A schematic circuit diagram of the buck-boost charge pump in buck mode is shown below. Figure 3A As shown.

[0043] Specifically, the phase sequence time reference includes a first buck phase sequence and a second buck phase sequence. In the first buck phase sequence, the switch control circuit 120 controls the first switch S1 and the fourth switch S4 to close, while simultaneously controlling the second switch S2 and the third switch S3 to open, so that the flying capacitor CFly is connected in series between the first port Port-A and the second port Port-B through the first switch S1 and the fourth switch S4, so as to receive the power supply voltage Vin through the first port Port-A for discharge. In the second buck phase sequence, the switch control circuit 120 controls the first switch S1 and the fourth switch S4 to open, while simultaneously controlling the second switch S2 and the third switch S3 to close, so that the flying capacitor CFly is connected in series between the ground terminal GND and the second port Port-B through the second switch S2 and the third switch S3, so as to perform voltage reduction to obtain the second port voltage V1X and output it through the second port Port-B. The timing of the first buck sequence and the second buck sequence are in a first preset ratio. By changing the time ratio of the first buck sequence and the second buck sequence, the duty cycle of the control signal of the control switch array can be adjusted to obtain different sizes of bucked output voltage.

[0044] Depend on Figure 3B As shown in the node waveforms, in the first buck timing phase 11 of the clock signal CLK, the first switch S1 and the fourth switch S4 are closed, the second switch S2 and the third switch S3 are open, the upper plate of the flying capacitor CFly is connected to the first port Port-A, and the lower plate is connected to the second port Port-B. The voltage difference across the flying capacitor CFly is V2X - V1X (where V2X = Vin). In the second buck timing phase 12, the first switch S1 and the fourth switch S4 are open, the second switch S2 and the third switch S3 are closed, the upper plate of the flying capacitor CFly is connected to the second port Port-B, and the lower plate is grounded to GND. The voltage difference across the flying capacitor CFly is V1X. Since the voltage across the capacitor CFly remains constant, V2X - V1X = V1X, that is, V1X = V2X / 2 = Vin / 2, which means the output voltage is equal to half of the power supply voltage Vin. The time ratios of the first buck timing Phase 11 and the second buck timing Phase 12 are different, resulting in different ratios between the output voltage after bucking and the input power supply voltage Vin.

[0045] In boost mode, the first port (Port-A) of the buck-boost charge pump 100 is electrically connected to the load, and the second port (Port-B) is electrically connected to the power supply voltage Vin. The switch control circuit 120 controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to open and close according to the phase sequence time reference. This allows the flying capacitor CFly to receive the second port voltage V1X (V1X = Vin) through the second port (Port-B) and boost the power supply voltage Vin to obtain the first port voltage V2X, which is then output from the first port (Port-A). That is, when the power supply voltage is too low, the buck-boost charge pump operates in boost mode, with the power supply voltage Vin input from the second port (Port-B) and the boosted voltage V1X output from the first port (Port-A). A schematic circuit diagram of the buck-boost charge pump in boost mode is shown below. Figure 4A As shown.

[0046] Specifically, the phase sequence time reference includes a first boost phase sequence and a second boost phase sequence. In the first boost phase sequence, the switch control circuit 120 controls the second switch S2 and the third switch S3 to close, while simultaneously controlling the first switch S1 and the fourth switch S4 to open, so that the flying capacitor CFly is connected in series between the second port Port-B and ground GND through the second switch S2 and the third switch S3, so as to receive the power supply voltage Vin for charging through the second port Port-B. In the second boost phase sequence, the switch control circuit 120 controls the first switch S1 and the fourth switch S4 to close, while simultaneously controlling the second switch S2 and the third switch S3 to open, so that the flying capacitor CFly is connected in series between the first port Port-A and the second port Port-B through the first switch S1 and the fourth switch S4, so as to boost the voltage to obtain the first port voltage V2X and output it through the first port Port-A. The timing of the first boost timing sequence and the second boost timing sequence are in a second preset ratio. By changing the time ratio of the first boost timing sequence and the second boost timing sequence, the duty cycle of the control signal of the control switch array can be adjusted to obtain different boosted output voltages.

[0047] Depend on Figure 4BAs shown in the node waveforms, in the first boost timing Phase 21 of the clock signal CLK, the first switch S1 and the fourth switch S4 are open, the second switch S2 and the third switch S3 are closed, the upper plate of the flying capacitor CFly is connected to the second port Port-B, and the lower plate is grounded to GND. The voltage difference across the flying capacitor CFly is V1X (where V1X = Vin). In the second boost timing Phase 22, the first switch S1 and the fourth switch S4 are closed, the second switch S2 and the third switch S3 are open, the upper plate of the flying capacitor CFly is connected to the first port Port-A, and the lower plate is connected to the second port Port-A. The voltage difference across the flying capacitor CFly is V2X - V1X. Since the voltage across the capacitor CFly remains constant, V2X - V1X = V1X, that is, V2X = 2 * V1X = 2 * Vin, which means the output voltage is twice the power supply voltage Vin. The time ratios of the first boost timing Phase 21 and the second boost timing Phase 22 are different, resulting in different ratios between the boosted output voltage and the input power supply voltage Vin.

[0048] refer to Figure 5 The mode switching circuit 200 of the present invention includes a first comparator 201, a second comparator 202, and a logic module 203. The non-inverting input of the first comparator 201 receives a second port voltage V1X, the inverting input receives a reference voltage Vref (the reference voltage Vref is equal to half of the first port voltage V2X), and the output is used to output a first comparison signal V1. The non-inverting input of the second comparator 202 receives the reference voltage Vref, the inverting input receives the second port voltage V1X, and the output is used to output a second comparison signal V2.

[0049] Figure 6A and Figure 6B Show respectively Figure 5 The timing diagram of the first and second comparators in the mode switching circuit is shown. For example, the first and second comparators of this invention are implemented using hysteresis comparators. Figure 6A As shown, when the buck-boost charge pump 100 operates in buck mode, the first port Port-A is the input terminal and the second port Port-B is the load terminal. Since the second port Port-B needs to discharge load current, the actual second port voltage V1X is less than the reference voltage Vref. When the second port voltage V1X increases to the point that the voltage difference between the two is less than or equal to the first threshold voltage VTH1, it indicates that the system has entered the light load mode, and the first comparison signal V1 flips to a high level. When the second port voltage V1X decreases to the point that the voltage difference between the two is greater than or equal to the second threshold voltage VTH2, it indicates that the system has entered the heavy load mode, and the first comparison signal V1 flips to a low level.

[0050] Similarly, such as Figure 6B As shown, when the boost-boost charge pump 100 operates in boost mode, the first port Port-A is the load terminal and the second port Port-B is the input terminal. Since the first port Port-A needs to output load current, the actual first port voltage V2X is less than the ideal 2*V1X, that is, the reference voltage Vref is less than the ideal V1X. When the reference voltage Vref increases to the point that the voltage difference between the two is less than or equal to the first threshold voltage VTH1, it indicates that the system has entered the light load mode, and the second comparison signal V2 flips to a high level. When the reference voltage Vref decreases to the point that the voltage difference between the two is greater than or equal to the second threshold voltage VTH2, it indicates that the system has entered the heavy load mode, and the second comparison signal V2 flips to a low level.

[0051] Depend on Figure 6A and 6B It is known that when the buck-boost charge pump 100 switches between buck and boost modes, the voltage V1X at the second port will cross with the reference voltage Vref. Therefore, the output states of the first comparator 201 and the second comparator 202 will change during this process. Thus, by using the output signals of the first comparator 201 and the second comparator 202 for logic conversion by the logic module 203, the buck-boost charge pump 100 can be automatically switched between buck mode and boost mode.

[0052] Optionally, logic module 203 includes inverters INV1-INV3 and NOR1 and NOR2. The input of inverter INV1 receives the first comparison signal V1, and its output is connected to the first input of NOR1. The input of inverter INV2 receives the second comparison signal V2, and its output is connected to the first input of NOR2. The second input of NOR1 is connected to the output of NOR2, and the second input of NOR2 is connected to the output of NOR1. The output of NOR1 is used to output the boost mode control signal RVS_Mode. The input of inverter INV3 is connected to the output of NOR1, and its output is used to output the buck mode control signal FWD_Mode.

[0053] Figure 7 A timing diagram of a voltage management circuit according to an embodiment of the present invention is shown. Figure 7 The diagram shows the voltage waveforms of the first port voltage V2X, the second port voltage V1X, the reference voltage Vref, as well as the first comparison signal V1, the second comparison signal V2, the buck mode control signal FWD_Mode, and the boost mode control signal RVS_Mode.

[0054] Taking the buck-boost charge pump 100 operating in buck mode as an example, in buck mode, the first port Port-A of the buck-boost charge pump 100 is electrically connected to the power supply voltage Vin, and the second port Port-B is electrically connected to the load.

[0055] At time t1, the voltage V2X at the first port Port-A is established, the buck-boost charge pump 100 is working normally, and the voltage V1X at the second port gradually rises. At this time, the voltage V1X at the second port is much smaller than the reference voltage Vref. Therefore, the first comparison signal V1 and the second comparison signal V2 are both low level, the buck mode control signal FWD_Mode is high level, and the boost mode control signal RVS_Mode is low level.

[0056] At time t2, when the voltage V1X at the second port increases to the point that the voltage difference between the two is less than or equal to the first threshold voltage VTH1, the system enters the light load mode. At this time, the first comparison signal V1 flips to a high level. Since the reference voltage Vref is still greater than the voltage V1X at the second port, the second comparison signal V2 remains at a high level. The buck mode control signal FWD_Mode remains at a high level, and the boost mode control signal RVS_Mode remains at a low level.

[0057] At time t3, when the voltage at the second port V1X decreases to a level that makes the voltage difference between the two ports greater than or equal to the second threshold voltage VTH2, the system enters the heavy load mode. The first comparison signal V1 flips to a low level, while the second comparison signal V2 remains at a high level. The buck mode control signal FWD_Mode remains at a high level, and the boost mode control signal RVS_Mode remains at a low level.

[0058] At time t4, due to the decrease in power supply voltage Vin, the first port voltage V2X and the reference voltage Vref gradually decrease. When the reference voltage Vref decreases to the point that the voltage difference between the reference voltage Vref and the second port voltage V1X is less than the first threshold voltage VTH1, the first comparison signal V1 flips to a high level, while the second comparison signal V2 remains high. The buck mode control signal FWD_Mode remains high, and the boost mode control signal RVS_Mode remains low. As the power supply voltage Vin further decreases, at time t5, the reference voltage Vref is less than the second port voltage V1X, and the voltage difference between them is greater than or equal to the second threshold voltage VTH2. At this time, the second comparison signal V2 flips to a low level, and simultaneously, the buck mode control signal FWD_Mode flips to a low level, while the boost mode control signal RVS_Mode flips to a high level. The buck-boost charge pump 100 switches from buck mode to boost mode.

[0059] Between time t5 and t7, the boost-boost charge pump 100 operates in boost mode, with its first port Port-A electrically connected to the load and its second port Port-B electrically connected to the power supply voltage Vin.

[0060] At time t6, as the load decreases, the first port voltage V2X and the reference voltage Vref gradually increase. When the reference voltage Vref increases to the point that the voltage difference between the reference voltage Vref and the second port voltage V2X is less than the first threshold voltage VTH1, the system enters a light load mode. The second comparison signal V2 flips to a high level. Since the reference voltage Vref is still less than the second port voltage V1X at this time, the first comparison signal V1 remains high. The boost mode control signal RVS_Mode remains high, and the buck mode control signal FWD_Mode remains low. As the load continues to decrease, at time t7, the reference voltage Vref is greater than the second port voltage V1X, and the voltage difference between them is greater than or equal to the second threshold voltage VTH2. At this time, the first comparison signal V1 flips to a low level, and the buck mode control signal FWD_Mode flips to a high level, while the boost mode control signal RVS_Mode flips to a low level. The buck-boost charge pump 100 switches from boost mode to buck mode.

[0061] As described above, the mode switching circuit 200 of the present invention compares half of the first port voltage V2X with the second port voltage V1X. When half of the first port voltage V2X is less than the second port voltage V1X, and the voltage difference between the two is greater than or equal to the second threshold voltage VTH2, the mode switching circuit 200 controls the buck-boost charge pump 100 to switch from buck mode to boost mode. When half of the first port voltage V2X is greater than the second port voltage V1X, and the voltage difference between the two is greater than or equal to the second threshold voltage VTH2, the mode switching circuit 200 controls the buck-boost charge pump 100 to switch from boost mode to buck mode, thereby realizing automatic mode switching.

[0062] In summary, the mode switching circuit of the buck-boost charge pump of the present invention uses a first comparator and a second comparator to compare half of the first port voltage and the second port voltage of the buck-boost charge pump. Based on the outputs of the two comparators, a logical judgment is made, and the buck-boost charge pump is controlled to operate in buck mode or boost mode according to the judgment result, thereby realizing automatic mode switching. Only one charge pump is needed to realize the functions of boost and buck, simplifying the circuit structure, greatly saving costs, reducing system power consumption, improving system efficiency, and helping to extend battery life and standby time.

[0063] The present invention also provides a voltage management circuit (chip or device) that integrates the buck-boost charge pump and mode switching circuit described above, which can also simplify the structure of the voltage management circuit, save circuit costs, reduce system power consumption, and improve efficiency.

[0064] It should be noted that relational terms such as "first" and "second" used herein are merely used to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0065] As described above, these embodiments of the present invention do not exhaustively describe all details, nor do they limit the invention to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The scope of protection of this invention should be determined by the scope defined in the claims of this invention.

Claims

1. A mode switching circuit for a buck-boost charge pump, the buck-boost charge pump comprising a first port and a second port, wherein, The mode switching circuit includes: The first comparator receives the voltage at the second port at its non-inverting input, receives a reference voltage related to the voltage at the first port at its inverting input, and outputs a first comparison signal at its output. A second comparator receives the reference voltage at its non-inverting input and inverting input, and its output is used to output a second comparison signal; and The logic module is used to perform logical judgments based on the first comparison signal and the second comparison signal, and generate a buck mode control signal or a boost mode control signal based on the judgment result. The buck-boost charge pump switches to buck mode according to the buck mode control signal or switches to boost mode according to the boost mode control signal. Specifically, when the buck-boost charge pump operates in buck mode, the first port is the input terminal and the second port is the load terminal; when the buck-boost charge pump operates in boost mode, the first port is the load terminal and the second port is the input terminal. Wherein, the reference voltage is equal to 1 / 2 of the first port voltage. When 1 / 2 of the first port voltage is less than the second port voltage, and the voltage difference between the two is greater than or equal to the second threshold voltage, the mode switching circuit controls the buck-boost charge pump to switch from buck mode to boost mode. When 1 / 2 of the first port voltage is greater than the second port voltage, and the voltage difference between the two is greater than or equal to the second threshold voltage, the mode switching circuit controls the buck-boost charge pump to switch from boost mode to buck mode.

2. The mode switching circuit according to claim 1, wherein, The first comparator and the second comparator are hysteresis comparators.

3. The mode switching circuit according to claim 2, wherein, The first comparator and the second comparator have a first threshold voltage and a second threshold voltage, the first threshold voltage being an upper limit voltage and the second threshold voltage being a lower limit voltage, and the upper limit voltage being less than the lower limit voltage.

4. The mode switching circuit according to claim 3, wherein, The first comparator is configured such that when the voltage difference between the reference voltage and the second port voltage is less than the first threshold voltage, the first comparison signal flips to a high level, and when the voltage difference between the reference voltage and the second port voltage is greater than the second threshold voltage, the first comparison signal flips to a low level.

5. The mode switching circuit according to claim 4, wherein, The second comparator is configured such that when the voltage difference between the second port voltage and the reference voltage is less than the first threshold voltage, the second comparison signal flips to a high level, and when the voltage difference between the second port voltage and the reference voltage is greater than the second threshold voltage, the second comparison signal flips to a low level.

6. The mode switching circuit according to claim 5, wherein, The logic module is configured as follows: When the first comparison signal and the second comparison signal indicate that the reference voltage is less than the second port voltage, and the voltage difference between them is greater than the second threshold voltage, the boost mode control signal is output. When the first comparison signal and the second comparison signal indicate that the reference voltage is greater than the second port voltage, and the voltage difference between them is greater than the second threshold voltage, the buck mode control signal is output.

7. The mode switching circuit according to claim 6, wherein, The logic module includes first to third inverters, as well as a first NOR gate and a second NOR gate. The first inverter receives the first comparison signal at its input terminal, and its output terminal is connected to the first input terminal of the first NOR gate. The input of the second inverter receives the second comparison signal, and its output is connected to the first input of the second NOR gate. The second input terminal of the first NOR gate is connected to the output terminal of the second NOR gate, and the second input terminal of the second NOR gate is connected to the output terminal of the first NOR gate. The output of the first NOR gate is used to output the boost mode control signal, the input of the third inverter is connected to the output of the first NOR gate, and the output of the third inverter is used to output the buck mode control signal.

8. A voltage management circuit, wherein, include: A step-up / step-down charge pump, the step-up / step-down charge pump including a first port and a second port; as well as The mode switching circuit according to any one of claims 1-7.

9. The voltage management circuit according to claim 8, wherein, In buck mode, the first port of the buck-boost charge pump is electrically connected to the power supply voltage, which is then stepped down and output through the second port. In boost mode, the second port of the boost / buck charge pump is electrically connected to the power supply voltage, and the power supply voltage is boosted and output through the first port.

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