A low insertion loss, high power RF switch fast switching circuit

Abstract

This invention belongs to the field of radio frequency (RF) switch technology, specifically providing a low-insertion-loss, high-power RF switch fast switching circuit to solve the trade-off between low insertion loss, high power, and fast switching in existing SOI switch designs. The fast switching circuit of this invention is connected to each control signal path between the analog control module and the RF switch module. A delay branch formed by inverters I1 and I2 in series delays the transmission of the control signal output from the analog control module to the RF switch module. Simultaneously, the control signal, after passing through inverter I3, controls PMOS transistor M1 and NMOS transistor M2 respectively, thereby achieving the positive power rail V. DD After M1, the filter capacitor C L charging or negative power rail -V DD After M2, the filter capacitor C L The discharge allows the control signal to reach the threshold voltage for RF switch switching more quickly, thus increasing the switching speed. In summary, this invention significantly improves the switching speed of RF switches while ensuring low insertion loss and high power RF performance.

Description

Technical Field

[0001] This invention belongs to the field of radio frequency switch technology, specifically providing a low insertion loss, high power radio frequency switch fast switching circuit. Background Technology

[0002] With the development of 5G communication, modern wireless mobile terminal devices have integrated multiple wireless communication services of different modes and frequency bands. In order to improve sensitivity and avoid crosstalk, multi-antenna design is becoming more and more popular, which makes RF switches play an increasingly important role in the RF front-end design of wireless mobile terminal devices. RF switches are often required to have excellent performance such as low insertion loss, high power and fast switching.

[0003] Currently, SOI (Silicon-on-Insulator) technology, as a next-generation silicon-based process, uses a layered silicon-insulator-silicon substrate to replace the silicon substrate in CMOS, reducing external parasitic capacitance and thus improving performance. Furthermore, the isolation provided by the high resistivity substrate and buried oxide layer allows SOI-based RF switches (SOI switches for short) to achieve better switching performance. Commonly used RF switch architectures with analog control include... Figure 1 As shown, it includes: a series-parallel RF switch module and an analog control module; wherein, V ctrl and The external control signal for the RF switch is converted into a control signal for the internal control switch by the analog control module; the LDO regulates the external power supply to provide bias for the negative voltage charge pump and the three-phase logic conversion circuit. The negative voltage charge pump generates a negative voltage to provide bias for the three-phase logic conversion circuit, so that the three-phase logic conversion circuit can convert V... ctrl and Convert to V DD , 0, -V DD Three-phase control signals; when the control signal is positive, the switch is open; the other path uses negative voltage to close. Because the gate is negatively charged, it is more difficult for carriers in the transistor channel to move, thus optimizing the overall switching performance. Furthermore, the control signal entering the RF switch gate passes through filter capacitors C1 and C2 and the gate resistor R. G1 ~R G4 The filter capacitor is used to prevent the radio frequency signal from being coupled to the analog control module through the parasitic capacitance of the transistor via the radio frequency switch, thus affecting the function of the analog control circuit. The gate resistor is generally tens of kΩ and its main functions are: on the one hand, to isolate the radio frequency signal from the DC signal and prevent the radio frequency signal from affecting the DC bias circuit; on the other hand, to prevent the radio frequency signal waveform from being distorted and to reduce radio frequency loss. Generally, the larger the gate resistor value, the better the radio frequency signal isolation effect, and the signal applied to the cutoff transistor will be more evenly distributed between the gate source and the gate drain.

[0004] Therefore, in existing SOI switch designs, to improve the power carrying capacity of the switch and reduce the insertion loss, it is necessary to increase the number of stacked transistors and increase the gate resistance. However, the RC discharge circuit composed of the gate resistance and the filter capacitor will cause a delay in the voltage reaching the gate of the RF switch, thus affecting the switching speed. Summary of the Invention

[0005] The purpose of this invention is to provide a low-insertion-loss, high-power, fast-switching RF switch circuit connected between the analog control module and the RF switch module, to solve the trade-off between low insertion loss, high power, and fast switching in existing SOI switch designs. This invention designs a fast-start circuit at the analog control module end, which pre-processes the node's filter capacitor C using the same control signal. L By performing charging and discharging, the RF switch can be quickly turned on and off. While ensuring low insertion loss and high power RF performance, the switching time is significantly optimized, that is, the switching speed is improved.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] A low-insertion-loss, high-power radio frequency switch fast switching circuit includes: inverters I1-I3, PMOS transistor M1, NMOS transistor M2, and current-limiting resistors R1 and R2. The inverters I1 and I2 are connected in series as a delay branch. The input terminal of inverter I1 is connected to the control signal output terminal of an analog control module, and the output terminal of inverter I2 is connected to the control terminal of an radio frequency switch module, with a filter capacitor C connected between the two terminals. L The input terminal of the inverter I1 is connected to the control signal output terminal of the analog control module, and the output terminal is connected to the gates of PMOS transistor M1 and NMOS transistor M2. The source of the PMOS transistor M1 is connected to the positive power rail V of the analog control module. DD The source of the NMOS transistor M2 is connected to the negative power rail -V of the analog control module. DD The drain of PMOS transistor M1 is connected to the drain of NMOS transistor M2 and is also connected to the output of inverter I2.

[0008] Furthermore, the inverters I1 to I3 use the same components to ensure that the delay time of the delay branch is the same; the current limiting resistors R1 and R2 use the same components to ensure that the operating current of the upper and lower branches is the same; in addition, the size of the switching transistors PMOS transistor M1 and NMOS transistor M2 must be large enough to ensure that the switching transistors are not damaged when current flows through the MOS transistors.

[0009] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0010] This invention provides a low-insertion-loss, high-power RF switch fast switching circuit, connected to each control signal path between the analog control module and the RF switch module. A delay branch, formed by inverters I1 and I2 connected in series, delays the transmission of the control signal output from the analog control module to the RF switch module. Simultaneously, the control signal output from the analog control module, after passing through inverter I3, controls PMOS transistor M1 and NMOS transistor M2 respectively, thereby achieving the positive power rail V... DD After passing through PMOS transistor M1 and filter capacitor C L Positive voltage pre-charge (charging) or negative power rail -V DD The filter capacitor C is filtered by NMOS transistor M2. L The negative voltage pre-charge (discharge) affects the filter capacitor C. L The pre-charging causes the filter capacitor C L The shortening of the RC time, formed by the parasitic resistance, allows the control signal reaching the RF switch module through the delay branch to reach the RF switch switching threshold voltage more quickly, thus improving the switching speed. In summary, this invention significantly optimizes the switching time and improves the switching speed of the RF switch while ensuring low insertion loss and high power RF performance, perfectly solving the trade-off between low insertion loss, high power, and fast switching in existing SOI switch designs. In addition, the introduction of a fast switching circuit on the basis of traditional analog control modules and RF switch modules ensures circuit stability, saves design costs for modifying traditional modules, and avoids circuit risks. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of an existing RF switch architecture with analog control.

[0012] Figure 2 This is a schematic diagram of the low insertion loss, high power RF switch fast switching circuit in this invention.

[0013] Figure 3 This is a schematic diagram of the control signals for the low insertion loss, high power RF switch fast switching circuit in this invention. Detailed Implementation

[0014] To make the objectives, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0015] This embodiment provides a low insertion loss, high power RF switch fast switching circuit, such as... Figure 3As shown, it is independent of the RF switch module and the analog control module, and is connected to each control signal path between the analog control module and the RF switch module; specifically, it includes: inverters I1 to I3, PMOS transistor M1, NMOS transistor M2, and current-limiting resistors R1 and R2. Inverters I1 and I2 are connected in series as a delay branch. The input terminal of inverter I1 is connected to the control signal output terminal of the analog control module, and the output terminal of inverter I2 is connected to the control terminal of the RF switch module, with a filter capacitor C connected between the two terminals. L The input terminal of the inverter I1 is connected to the control signal output terminal of the analog control module, and the output terminal is connected to the gates of PMOS transistor M1 and NMOS transistor M2. The source of PMOS transistor M1 is connected to the positive power rail V of the analog control module through a current-limiting resistor R1. DD The source of the NMOS transistor M2 is connected to the negative power rail -V of the analog control module via a current-limiting resistor R2. DD The drain of PMOS transistor M1 is connected to the drain of NMOS transistor M2 and is also connected to the output of inverter I2.

[0016] Furthermore, the aforementioned analog control module and RF switch module employ, as follows: Figure 3 The conventional structure shown employs an LDO linear regulator to stabilize the power supply voltage to the positive power rail V required by the internal RF switches. DD (In this embodiment, it is 2.5V); the positive voltage output by the LDO provides a positive bias for the three-phase logic conversion circuit and the negative charge pump, which converts the positive voltage into the negative power rail -V required by the internal RF switch. DD (In this embodiment, it is -2.5V); the negative voltage output by the negative voltage charge pump provides a negative voltage bias for the three-phase logic conversion circuit; the three-phase logic conversion circuit converts the external input control signal V ctrl and (V ctrl and The voltage (typically 0V and 3.3V) is converted into positive and negative voltage control signals for internally driving the RF switch to achieve a high-power, low-insertion-loss, high-performance switch design.

[0017] In terms of working principle:

[0018] Each control signal path between the analog control module and the RF switch module is connected to the aforementioned low insertion loss high power RF switch fast switching circuit. Taking a single control signal as an example, in the low insertion loss high power RF switch fast switching circuit of the present invention, inverters I1 to I3 are used to buffer the control signal. The control signal is split into two signals S1 and S2 by I3. S1 and S2 have the same frequency and opposite phase as the control signal. I1 and I2 are used to delay the control signal, so that the output signal of I2 is slower than S1 and S2.

[0019] When the control signal output by the three-phase logic converter circuit is V DD Switch to -V DD At that time, the signal output by the low insertion loss high power RF switch fast switching circuit is also changed from V DD Switch to -V DD Because signals S1 and S2 are faster than the output of I2, signals S1 and S2 arrive at PMOS transistors M1 and NMOS transistor M2 first; because the control signal switches to -V DD Therefore, signals S1 and S2 are affected by -V DD Switch to V DD Therefore, PMOS transistor M1 is off and NMOS transistor M2 is on. Since the on-resistance of the MOS transistors is very small, the negative power rail -V... DD The filter capacitor C is filtered by NMOS transistor M2. L Current is injected into the upper plate to pre-charge the filter capacitor with a negative voltage, so that the filter capacitor C is charged before the control signal is switched. L The positive charge accumulated on the surface is quickly eliminated by the negative voltage;

[0020] Similarly, when the control signal output by the three-phase logic conversion circuit is -V DD Switch to V DD At that time, signals S1 and S2 are controlled by V DD Switch to -V DD Therefore, PMOS transistor M1 is turned on and NMOS transistor M2 is turned off, and the positive power rail V... DD After passing through PMOS transistor M1 and filter capacitor C L Current is injected into the upper plate to pre-charge the filter capacitor with a positive voltage, so that the filter capacitor C is pre-charged before the control signal is switched. L The negative charge accumulated on the surface is quickly eliminated by the positive voltage;

[0021] Therefore, after the control signal passes through I1 and I2, the filter capacitor C L The current drawn from I2 will decrease, and the filter capacitor C... L The charging current is mainly determined by the power rail V. DD and -V DD Instead of being provided by the internal analog control module in the traditional structure, the control signal is provided by the chip itself. This significantly reduces the load-carrying capacity of the internal analog control module, allowing the control signal to reach the threshold voltage for RF switching more quickly, thus increasing the switching speed. Specifically, the control signal diagram is shown below. Figure 3 As shown, at the rising edge of the control signal, PMOS transistor M1 is turned on and NMOS transistor M2 is turned off, and the positive power rail V... DD For filter capacitor C LPre-charge, with an optimized rise time of T1; at the falling edge of the control signal, PMOS transistor M1 is turned off, NMOS transistor M2 is turned on, and the negative power rail -V... DD For filter capacitor C L Pre-charging optimizes the fall-rise time to T2; that is, the optimized time for the entire switching process is T = T1 + T2.

[0022] Furthermore, in the fast switching circuit of the radio frequency switch of the present invention, one transistor must be turned on when the control signal is switched. Therefore, the PMOS transistor M1 and NMOS transistor M2 need to be large in size. Larger transistors help to improve current carrying capacity. At the same time, in order to reduce power consumption, the transistors (PMOS transistor M1, NMOS transistor M2) and the power rail (positive power rail V) are connected. DD Negative power rail -V DD Adding current-limiting resistors R1 and R2 between the PMOS transistor M1 and NMOS transistor M2 reduces the branch current when either M1 or M2 is turned on, thereby reducing power consumption. It should be noted that, compared to the case without current-limiting resistors, the reduction in branch current will cause the filter capacitor C to flow through the power rail. L The reduced current means that the current-limiting resistors R1 and R2 will slightly reduce the charging speed, but it is still faster than the switching speed under the traditional structure. Therefore, the values ​​of the current-limiting resistors R1 and R2 should be adaptively selected according to the maximum current and power consumption limit that the branch can withstand during the design.

[0023] In summary, this invention adds a fast switching circuit between the analog control module and the RF switch module to quickly charge the node filter capacitor, which greatly optimizes the switching speed of traditional high-performance RF switches. Moreover, it does not change the existing analog control module or RF switch module, improves the stability of the circuit, saves the design cost of modifying the existing circuit, and avoids circuit risks.

[0024] The above description is merely a specific embodiment of the present invention. Any feature disclosed in this specification may be replaced by other equivalent or similar features unless otherwise specified. All disclosed features, or steps in all methods or processes, may be combined in any way except for mutually exclusive features and / or steps.

Claims

1. A low insertion loss, high power radio frequency switch fast switching circuit, comprising: inverter I 1~ I 3. PMOS transistor M 1. NMOS transistor M 2. Current-limiting resistor R 1 and R 2, characterized in that the inverter I 1 and inverter I Two inverters connected in series serve as a delay branch. I The input terminal of 1 is connected to the control signal output terminal of the analog control module, and the inverter is used. I The output terminal of 2 is connected to the control terminal of the RF switch module, and a filter capacitor is connected between the two terminals. C L The inverter I The input terminal of 3 is connected to the control signal output terminal of the analog control module, and the output terminal is connected to the PMOS transistor. M 1 and NMOS transistor M 2's gate, the PMOS transistor M The source of 1 is connected to the positive power rail of the analog control module. V DD The NMOS transistor M The source of 2 is connected to the negative power rail of the analog control module. V DD PMOS transistor M 1's drain and NMOS transistor M The drains of 2 are connected together and connected to an inverter. I The output terminal of 2; the current limiting resistor R 1. Positive power rail connected to the analog control module V DD With PMOS transistor M Between the sources of 1, the current-limiting resistor R 2. The negative power rail connected to the analog control module - V DD With NMOS transistor M Between the sources of 2.

2. The low insertion loss, high power RF switch fast switching circuit according to claim 1, characterized in that, The inverter I 1~ I 3. Using the same components, the current-limiting resistor R 1 and R 2. Use the same components.

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