Method for manufacturing MEMS device

Abstract

The present invention provides a method for manufacturing a MEMS device, wherein a P-type injection region is formed in a semiconductor substrate, and a loosening treatment is performed on the P-type injection region so that multiple pores are formed in the P-type injection region, thereby facilitating the subsequent removal of the P-type injection region. Thus, in the process of etching to form a comb-tooth structure, the patterned mask layer used can be formed on a flat surface, which correspondingly improves the accuracy of the patterned mask layer and the accuracy of the comb-tooth structure etched thereby. At the same time, since the P-type injection region is loosened so that multiple pores are formed in the P-type injection region, the P-type injection region can also be conveniently removed to form a groove.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for manufacturing a MEMS device. Background Art

[0002] MEMS devices, which are manufactured based on MEMS (Micro-Electro-Mechanical System) technology, have attracted widespread attention due to their simple structure, good compatibility with microelectronics manufacturing processes, mass production, and small size. MEMS devices usually include comb-tooth structures to achieve functions such as driving.

[0003] In the MEMS device formed by the prior art, the precision of the comb-tooth structure is low, thereby affecting the function and reliability of the entire MEMS device. Summary of the invention

[0004] The object of the present invention is to provide a method for manufacturing a MEMS device to solve the problem of low precision of the comb-tooth structure in the MEMS device in the prior art.

[0005] In order to solve the above technical problems, the present invention provides a method for manufacturing a MEMS device, the method for manufacturing a MEMS device comprising:

[0006] Providing a semiconductor substrate, and performing a P-type ion implantation process on the semiconductor substrate to form a P-type implantation region in the semiconductor substrate;

[0007] forming a patterned mask layer, wherein the patterned mask layer covers the P-type implantation region and the semiconductor substrate;

[0008] performing an etching process on the P-type implantation region and the semiconductor substrate at the bottom of the P-type implantation region using the patterned mask layer to form a comb-tooth structure in the semiconductor substrate; and,

[0009] removing the patterned mask layer and the P-type implantation region to form a groove in the semiconductor substrate;

[0010] Before removing the P-type implantation region, a loosening process is performed on the P-type implantation region so as to form multiple pores in the P-type implantation region.

[0011] Optionally, in the method for manufacturing the MEMS device, before forming a patterned mask layer, the P-type injection region is subjected to a loosening treatment; or, after removing the patterned mask layer and before removing the P-type injection region, the P-type injection region is subjected to a loosening treatment.

[0012] Optionally, in the manufacturing method of the MEMS device, before forming a patterned mask layer, a loosening treatment is performed on the P-type injection area, and before the loosening treatment is performed on the P-type injection area, the manufacturing method of the MEMS device also includes: forming a grid structure on the P-type injection area; wherein, when the loosening treatment is performed, it is easier to form pores in the P-type injection area than in the grid structure.

[0013] Optionally, in the method for manufacturing the MEMS device, forming the grid structure on the P-type implantation region includes: performing an N-type ion implantation process on the P-type implantation region to form the grid structure on the P-type implantation region.

[0014] Optionally, in the method for manufacturing the MEMS device, the doping concentration of the N-type ion implantation process is greater than 1×10 16 cm -3 .

[0015] Optionally, in the method for manufacturing the MEMS device, forming a grid structure on the P-type implantation region includes:

[0016] forming a silicon nitride layer, wherein the silicon nitride layer covers the P-type implantation region and the semiconductor substrate; and,

[0017] An etching process is performed on the silicon nitride layer to form the grid structure.

[0018] Optionally, in the method for manufacturing the MEMS device, the thickness of the silicon nitride layer is

[0019] Optionally, in the method for manufacturing the MEMS device, performing a loosening treatment on the P-type implantation region includes: applying a positive pressure to the P-type implantation region in an HF solution to perform the loosening treatment.

[0020] Optionally, in the method for manufacturing the MEMS device, forming a patterned mask layer includes:

[0021] forming a hard mask layer, wherein the hard mask layer covers the P-type implantation region and the semiconductor substrate;

[0022] forming a photoresist layer, wherein the photoresist layer covers the hard mask layer;

[0023] performing an exposure and development process on the photoresist layer to form a patterned photoresist layer; and,

[0024] The hard mask layer is etched using the patterned photoresist layer to form a patterned hard mask layer, wherein the patterned mask layer includes the patterned hard mask layer and the patterned photoresist layer.

[0025] Optionally, in the method for manufacturing the MEMS device, the thickness of the hard mask layer is The thickness of the photoresist layer is 500nm-2μm.

[0026] Optionally, in the manufacturing method of the MEMS device, performing an etching process on the P-type injection area and the semiconductor substrate at the bottom of the P-type injection area using the patterned mask layer includes: performing a dry etching process on the P-type injection area and the semiconductor substrate at the bottom of the P-type injection area using the patterned mask layer.

[0027] Optionally, in the method for manufacturing the MEMS device, removing the patterned mask layer and the P-type implantation region comprises: removing the patterned mask layer by a stripping process and removing the P-type implantation region by a wet etching process.

[0028] Optionally, in the method for manufacturing the MEMS device, providing a semiconductor substrate includes:

[0029] providing a first semiconductor substrate having a cavity formed therein; and,

[0030] A second semiconductor substrate is bonded on the first semiconductor substrate, wherein the semiconductor substrate includes the first semiconductor substrate and the second semiconductor substrate.

[0031] The inventors have found that one of the main reasons for the low precision of the comb-tooth structure in the MEMS device in the prior art is that in the prior art, the formation process of the comb-tooth structure mainly includes: forming a groove in the semiconductor substrate; forming a photoresist layer to cover the surface of the semiconductor substrate and the groove, and performing exposure and development processes on the photoresist layer to form a patterned photoresist layer; using the patterned photoresist layer to etch the semiconductor substrate at the bottom of the groove to form a comb-tooth structure, wherein the depth of the groove is usually between 2μm and 3μm. Due to the presence of the groove, the photoresist layer is formed on an uneven surface, so that the exposure and development precision will be reduced during the exposure and development process of the photoresist layer to form a patterned photoresist layer, resulting in poor precision of the patterned photoresist layer. Correspondingly, the precision of the comb-tooth structure in the MEMS device in the prior art is low.

[0032] Based on this, in the manufacturing method of the MEMS device provided by the present invention, a P-type injection region is formed in the semiconductor substrate, and a loosening treatment is performed on the P-type injection region so that multiple holes are formed in the P-type injection region, thereby facilitating the subsequent removal of the P-type injection region. Thus, in the process of etching to form a comb-tooth structure, the patterned mask layer used can be formed on a flat surface, which correspondingly improves the accuracy of the patterned mask layer and the accuracy of the comb-tooth structure etched thereby. At the same time, since the P-type injection region is loosened to form multiple holes in the P-type injection region, the P-type injection region can also be easily removed to form a groove. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a flow chart of a method for manufacturing a MEMS device according to the first embodiment of the present invention.

[0034] Figure 2 It is a schematic cross-sectional view of a device providing a semiconductor substrate in a method for manufacturing a MEMS device according to a first embodiment of the present invention.

[0035] Figure 3 It is a schematic cross-sectional view of a device for forming a P-type implantation region in a method for manufacturing a MEMS device according to a first embodiment of the present invention.

[0036] Figure 4 It is a schematic cross-sectional view of a device in which a loosening process is performed on a P-type implantation region in a method for manufacturing a MEMS device according to a first embodiment of the present invention.

[0037] Figure 5 It is a schematic cross-sectional view of a device for forming a patterned mask layer in a method for manufacturing a MEMS device according to a first embodiment of the present invention.

[0038] Figure 6 It is a schematic cross-sectional view of a device for forming a comb-tooth structure in a method for manufacturing a MEMS device according to a first embodiment of the present invention.

[0039] Figure 7 It is a schematic cross-sectional view of a device for removing a patterned mask layer and a P-type implantation region in a method for manufacturing a MEMS device according to a first embodiment of the present invention.

[0040] Figure 8 It is a flow chart of a method for manufacturing a MEMS device according to a second embodiment of the present invention.

[0041] Fig. 9 It is a schematic cross-sectional view of a device providing a semiconductor substrate in a method for manufacturing a MEMS device according to a second embodiment of the present invention.

[0042] Fig.10 It is a schematic cross-sectional view of a device for forming a P-type implantation region in a method for manufacturing a MEMS device according to a second embodiment of the present invention.

[0043] Fig.11 It is a schematic cross-sectional view of a device for forming a grid structure in a method for manufacturing a MEMS device according to a second embodiment of the present invention.

[0044] Fig.12 It is a schematic cross-sectional view of a device in which a loosening process is performed on a P-type implantation region in a method for manufacturing a MEMS device according to a second embodiment of the present invention.

[0045] Fig.13 It is a schematic cross-sectional view of a device for forming a patterned mask layer in a method for manufacturing a MEMS device according to a second embodiment of the present invention.

[0046] Fig.14 It is a schematic cross-sectional view of a device for forming a comb-tooth structure in a method for manufacturing a MEMS device according to a second embodiment of the present invention.

[0047] Fig.15 It is a schematic cross-sectional view of a device for removing a patterned mask layer and a P-type implantation region in a method for manufacturing a MEMS device according to a second embodiment of the present invention.

[0048] Fig.16 It is a flow chart of a method for manufacturing a MEMS device according to a third embodiment of the present invention.

[0049] Fig.17 It is a schematic cross-sectional view of a device providing a semiconductor substrate in a method for manufacturing a MEMS device according to a third embodiment of the present invention.

[0050] Fig.18 It is a schematic cross-sectional view of a device for forming a P-type implantation region in a method for manufacturing a MEMS device according to a third embodiment of the present invention.

[0051] Fig.19 It is a schematic cross-sectional view of a device for forming a patterned mask layer in a method for manufacturing a MEMS device according to a third embodiment of the present invention.

[0052] Fig. 20 It is a schematic cross-sectional view of a device for forming a comb-tooth structure in a method for manufacturing a MEMS device according to a third embodiment of the present invention.

[0053] Fig.21 It is a schematic cross-sectional view of a device for removing a patterned mask layer in a method for manufacturing a MEMS device according to a third embodiment of the present invention.

[0054] Fig. 22 It is a schematic cross-sectional view of a device in which a loosening process is performed on a P-type implantation region in a method for manufacturing a MEMS device according to a third embodiment of the present invention.

[0055] Fig.23 It is a schematic cross-sectional view of a device in which a P-type implantation region is removed in a method for manufacturing a MEMS device according to a third embodiment of the present invention.

[0056] The reference numerals are described as follows:

[0057] 100-semiconductor substrate; 101-first semiconductor substrate; 1010-cavity; 102-second semiconductor substrate; 110-P-type injection region; 111-porous; 120-patterned mask layer; 121-patterned photoresist layer; 122-patterned hard mask layer; 130-comb tooth structure; 140-groove; 150-boss structure.

[0058] 200-semiconductor substrate; 201-first semiconductor substrate; 2010-cavity; 202-second semiconductor substrate; 210-P-type injection region; 211-porous; 212-grid structure; 220-patterned mask layer; 221-patterned photoresist layer; 222-patterned hard mask layer; 230-comb tooth structure; 240-groove; 250-boss structure.

[0059] 300-semiconductor substrate; 301-first semiconductor substrate; 3010-cavity; 302-second semiconductor substrate; 310-P-type injection region; 311-porous; 320-patterned mask layer; 321-patterned photoresist layer; 322-patterned hard mask layer; 330-comb tooth structure; 340-groove; 350-boss structure. DETAILED DESCRIPTION

[0060] The following is a further detailed description of the method for manufacturing the MEMS device proposed in the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description and claims. It should be noted that the accompanying drawings are in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0061] The terms used in the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. Unless otherwise defined in the present application document, the technical terms or scientific terms used in the present invention should be the common meaning understood by people with ordinary skills in the field to which the present invention belongs. The words "first", "second" and similar words used in the present specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantitative limitation, but indicate that there is at least one. "Multiple" or "several" means two or more. Unless otherwise specified, words such as "front", "rear", "lower" and / or "upper" are only for convenience of explanation and are not limited to one position or one spatial orientation. Words such as "include" or "comprise" mean that the elements or objects appearing in front of "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, and can include electrical connections, whether direct or indirect. The singular forms "a", "said" and "the" used in the present specification and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0062] In the MEMS device formed by the prior art, the precision of the comb-tooth structure is low, thus affecting the function and reliability of the entire MEMS device. The inventor has conducted in-depth research and found that one of the main reasons for the low precision of the comb-tooth structure in the MEMS device in the prior art is that in the prior art, the formation process of the comb-tooth structure mainly includes: forming a groove in the semiconductor substrate; forming a photoresist layer to cover the surface of the semiconductor substrate and the groove, and performing exposure and development processes on the photoresist layer to form a patterned photoresist layer; using the patterned photoresist layer to etch the semiconductor substrate at the bottom of the groove to form a comb-tooth structure, wherein the depth of the groove is usually between 2μm and 3μm. Due to the presence of the groove, the photoresist layer is formed on an uneven surface, so that the exposure and development precision will be reduced during the exposure and development process of the photoresist layer to form a patterned photoresist layer, resulting in poor precision of the patterned photoresist layer. Correspondingly, the precision of the comb-tooth structure in the MEMS device in the prior art is low.

[0063] In addition, the inventors found that in the prior art, during the process of etching to form a comb-tooth structure, the thickness of the photoresist layer used is relatively large, usually requiring 4μm to 5μm. Such a large thickness also causes a certain degree of process accuracy in performing exposure and development processes on the photoresist layer to form a patterned photoresist layer, and accordingly reduces the accuracy of the formed comb-tooth structure.

[0064] Based on this, the core idea of ​​the present invention provides a method for manufacturing a MEMS device, wherein a P-type injection region is formed in a semiconductor substrate, and a loosening treatment is performed on the P-type injection region so that multiple pores are formed in the P-type injection region, thereby facilitating the subsequent removal of the P-type injection region. Thus, in the process of etching to form a comb-tooth structure, the patterned mask layer used can be formed on a flat surface, which correspondingly improves the accuracy of the patterned mask layer and the accuracy of the comb-tooth structure etched thereby. At the same time, since the P-type injection region is loosened so that multiple pores are formed in the P-type injection region, the P-type injection region can also be easily removed to form a groove.

[0065] Furthermore, the patterned mask layer used includes a patterned hard mask layer and a patterned photoresist layer. Preferably, the thickness of the hard mask layer is The thickness of the photoresist layer is 500nm to 2μm. Here, the double-layer structure of the hard mask layer and the photoresist layer can reduce the use of the photoresist layer, reduce the thickness of the photoresist layer, and also reduce the overall thickness of the patterned mask layer used, thereby further improving the accuracy of the patterned mask layer formed and the accuracy of the comb structure etched thereby.

[0066] Next we will combine Figures 1 to 23 The following three embodiments further illustrate the method for manufacturing the MEMS device proposed by the present invention.

[0067] [Example 1]

[0068] Please refer to Figures 1 to 7 ,in, Figure 1 is a schematic flow chart of a method for manufacturing a MEMS device according to a first embodiment of the present invention, Figures 2 to 7 It is a device cross-sectional schematic diagram of a method for manufacturing a MEMS device according to a first embodiment of the present invention.

[0069] like Figure 1 As shown, in the first embodiment, the manufacturing method of the MEMS device specifically includes the following steps:

[0070] Step S10: providing a semiconductor substrate, and performing a P-type ion implantation process on the semiconductor substrate to form a P-type implantation region in the semiconductor substrate;

[0071] Step S11: performing a loosening process on the P-type implantation region to form multiple pores in the P-type implantation region;

[0072] Step S12: forming a patterned mask layer, wherein the patterned mask layer covers the P-type implantation region and the semiconductor substrate;

[0073] Step S13: performing an etching process on the P-type implantation region and the semiconductor substrate at the bottom of the P-type implantation region using the patterned mask layer to form a comb-tooth structure in the semiconductor substrate; and

[0074] Step S14: removing the patterned mask layer and the P-type implantation region to form a groove in the semiconductor substrate.

[0075] Please refer to Figure 2 , providing a semiconductor substrate 100. In the embodiment of the present application, it specifically includes: providing a first semiconductor substrate 101, in which a cavity 1010 is formed, and the material of the first semiconductor substrate 101 is, for example, silicon; bonding a second semiconductor substrate 102 on the first semiconductor substrate 101. The material of the second semiconductor substrate 102 is, for example, silicon, and further, the material of the second semiconductor substrate 102 can be undoped polysilicon or N-type doped polysilicon. The semiconductor substrate 100 includes the first semiconductor substrate 101 and the second semiconductor substrate 102.

[0076] Next, please refer to Figure 3 , a P-type ion implantation process is performed on the semiconductor substrate 100 to form a P-type implantation region 110 in the semiconductor substrate 100. Here, a P-type ion implantation process is specifically performed on the second semiconductor substrate 102 to form a P-type implantation region 110 in the second semiconductor substrate 102, and the P-type implantation region 110 extends from the surface of the second semiconductor substrate 102 into the second semiconductor substrate 102.

[0077] Furthermore, the P-type implantation region 110 is aligned with the cavity 1010. Figure 3 As shown, the figure shows two cavities 1010 and two P-type injection regions 110, wherein the two P-type injection regions 110 are respectively aligned with the two cavities 1010. Here, each of the P-type injection regions 110 is located directly above the corresponding cavity 1010.

[0078] Please refer to Figure 4In the embodiment of the present application, the P-type injection region 110 is then subjected to a loosening treatment so that multiple pores 111 are formed in the P-type injection region 110. Since the P-type injection region 110 is subjected to a loosening treatment, the subsequent removal of the P-type injection region 110 to form a groove can be achieved very conveniently and efficiently, and the quality of the formed groove is also guaranteed. Here, a plurality of holes are formed in the P-type injection region 110, that is, porous silicon is formed, so that the P-type injection region 110 becomes loose. Preferably, the volume proportion of the multiple pores 111 in the P-type injection region 110 is greater than 50%. Specifically, the semiconductor substrate 100 can be placed in an HF (hydrofluoric acid) solution, and a positive pressure is applied to the P-type injection region 110, and the applied positive pressure is, for example, 0.1V to 10V, so that multiple pores 111 are formed in the P-type injection region 110.

[0079] Then, if Figure 5 As shown, a patterned mask layer 120 is formed, and the patterned mask layer 120 covers the P-type implantation region 110 and the semiconductor substrate 100. Here, a mask layer ( Figure 5 ), and then the mask layer is subjected to photolithography and etching processes to form the patterned mask layer 120. In the embodiment of the present application, the semiconductor substrate 100 has not yet formed a groove, and its surface is flat. Accordingly, the mask layer is formed on a flat surface, and a mask layer with uniform film thickness can be obtained. Therefore, when the mask layer is subjected to photolithography and etching processes, a high-precision, high-reliability patterned mask layer 120 can be formed, thereby improving the accuracy of the comb-tooth structure formed by etching.

[0080] In the embodiment of the present application, the patterned mask layer 120 is a double-layer structure, including a patterned hard mask layer and a patterned photoresist layer. Here, the double-layer structure of the hard mask layer and the photoresist layer can reduce the use of the photoresist layer, reduce the thickness of the photoresist layer, and also reduce the overall thickness of the patterned mask layer used, thereby further improving the accuracy of the patterned mask layer formed and the accuracy of the comb structure etched thereby.

[0081] Specifically, forming the patterned mask layer 120 includes: forming a hard mask layer ( Figure 5 The hard mask layer covers the P-type implantation region 110 and the semiconductor substrate 100; a photoresist layer ( Figure 5), the photoresist layer covers the hard mask layer; the photoresist layer is subjected to exposure and development processes to form a patterned photoresist layer 121; and the hard mask layer is subjected to an etching process using the patterned photoresist layer 121 to form a patterned hard mask layer 122. The material of the hard mask layer may be, for example, tetraethyl orthosilicate (TEOS). Preferably, the thickness of the hard mask layer is The thickness of the photoresist layer is 500nm-2μm.

[0082] Then, if Figure 6 As shown, the patterned mask layer 120 is used to perform an etching process on the P-type implantation region 110 and the semiconductor substrate 100 at the bottom of the P-type implantation region 110, so as to form a comb-tooth structure 130 in the semiconductor substrate 100. Specifically, the patterned mask layer 120 is used as a mask to perform a dry etching process on the P-type implantation region 110, and the second semiconductor substrate 102 is extended to be etched through the second semiconductor substrate 102, so as to form the comb-tooth structure 130. The comb-tooth structure 130 is aligned with the cavity 1010, as shown in FIG. Figure 6 As shown, the two comb-tooth structures 130 are respectively aligned with the two cavities 1010. In the embodiment of the present application, the accuracy and reliability of the patterned mask layer 120 are improved, and accordingly, the accuracy and reliability of the comb-tooth structure 130 formed thereby are improved.

[0083] For further information, please refer to Figure 7 , remove the patterned mask layer 120 and the P-type injection region 110. Specifically, the patterned mask layer 120 can be removed by a stripping process to expose the P-type injection region 110 and the semiconductor substrate 100. Furthermore, the patterned photoresist layer 121 and the patterned hard mask layer 122 can be removed by a stripping process and / or a dry etching process. In an embodiment of the present application, the P-type injection region 110 is removed by a wet etching process to form a groove 140 in the semiconductor substrate 100 and expose the comb-tooth structure 130. That is, in an embodiment of the present application, the surface of the comb-tooth structure 130 is lower than the surface of the semiconductor substrate 100, and boss structures 150 are formed on both sides of the comb-tooth structure 130, thereby improving the performance of the formed MEMS device, such as improving its driving performance.

[0084] Specifically, a DHF (diluted hydrofluoric acid) solution may be used to perform a wet etching process on the P-type implant region 110. For example, a mixed solution of hydrofluoric acid (HF) with a mass percentage concentration of 49% and hydrogen peroxide (H2O2) with a mass percentage concentration of 30% may be used, wherein the ratio of hydrofluoric acid to hydrogen peroxide is, for example, 1:5; or a mixed solution of hydrofluoric acid (HF) with a mass percentage concentration of 49%, nitric acid (HNO3) with a mass percentage concentration of 70%, and acetic acid (CH3COOH) with a mass percentage concentration of 3:16:1 may be used. The DHF solution has a high etching selectivity ratio for the P-type implant region 110 and the semiconductor substrate 100, thereby being able to efficiently and reliably remove the P-type implant region 110. In particular, in the aforementioned process steps, the embodiment of the present application performs a loosening treatment on the P-type injection region 110 so that multiple holes 111 are formed in the P-type injection region 110. Therefore, when the wet etching process is performed on the P-type injection region 110 in this step, the P-type injection region 110 can be removed efficiently and reliably, and the formed groove has an excellent morphology.

[0085] [Example 2]

[0086] Please refer to Figures 8 to 15 ,in, Figure 8 is a schematic flow chart of a method for manufacturing a MEMS device according to a second embodiment of the present invention, Figures 9 to 15 It is a schematic cross-sectional view of a device of a method for manufacturing a MEMS device according to a second embodiment of the present invention.

[0087] like Figure 8 As shown, in the second embodiment, the manufacturing method of the MEMS device specifically includes the following steps:

[0088] Step S20: providing a semiconductor substrate, and performing a P-type ion implantation process on the semiconductor substrate to form a P-type implantation region in the semiconductor substrate;

[0089] Step S21: forming a grid structure on the P-type implantation region;

[0090] Step S22: performing a loosening process on the P-type implantation region to form multiple pores in the P-type implantation region;

[0091] Step S23: forming a patterned mask layer, wherein the patterned mask layer covers the P-type implantation region and the semiconductor substrate;

[0092] Step S24: performing an etching process on the P-type implantation region and the semiconductor substrate at the bottom of the P-type implantation region using the patterned mask layer to form a comb-tooth structure in the semiconductor substrate; and

[0093] Step S25: removing the patterned mask layer, the grid structure and the P-type implantation region to form a groove in the semiconductor substrate.

[0094] Please refer to Fig. 9 , providing a semiconductor substrate 200. In the embodiment of the present application, it specifically includes: providing a first semiconductor substrate 201, in which a cavity 2010 is formed, and the material of the first semiconductor substrate 201 is, for example, silicon; bonding a second semiconductor substrate 202 on the first semiconductor substrate 201. The material of the second semiconductor substrate 202 is, for example, silicon, and further, the material of the second semiconductor substrate 202 can be undoped polysilicon or N-type doped polysilicon. The semiconductor substrate 200 includes the first semiconductor substrate 201 and the second semiconductor substrate 202.

[0095] Next, please refer to Fig.10 , a P-type ion implantation process is performed on the semiconductor substrate 200 to form a P-type implantation region 210 in the semiconductor substrate 200. Here, a P-type ion implantation process is specifically performed on the second semiconductor substrate 202 to form a P-type implantation region 210 in the second semiconductor substrate 202, and the P-type implantation region 210 extends from the surface of the second semiconductor substrate 202 into the second semiconductor substrate 202.

[0096] Furthermore, the P-type implantation region 210 is aligned with the cavity 2010. Fig.10 As shown, the figure shows two cavities 2010 and two P-type injection regions 210, wherein the two P-type injection regions 210 are respectively aligned with the two cavities 2010. Here, each of the P-type injection regions 210 is located directly above the corresponding cavity 2010.

[0097] Please refer to Fig.11 In the embodiment of the present application, a grid structure 212 is then formed on the P-type injection region 210, wherein, when a loosening process is subsequently performed, it is easier to form more pores in the P-type injection region 210 than in the grid structure 212, that is, after the loosening process, the P-type injection region 210 is looser than the grid structure 212. In the embodiment of the present application, the patterned mask layer formed subsequently is located on the grid structure 212, thereby, the patterned mask layer can be supported by the grid structure 212 to protect the P-type injection region 210 that has been loosened, thereby further improving the process quality and reliability, and further improving the quality and reliability of the formed MEMS device.

[0098] In one embodiment of the present application, forming a grid structure on the P-type implantation region 210 includes: performing an N-type ion implantation process on the P-type implantation region 210 to form the grid structure 212 on the P-type implantation region 210. For example, performing an N-type ion implantation process in a first direction and a second direction of the P-type implantation region 210, respectively, the first direction and the second direction intersect, so as to form a first number of N-type implantation strips in the first direction, and a second number of N-type implantation strips in the second direction, the N-type implantation strips in the first direction and the N-type implantation strips in the second direction intersect, thereby forming the grid structure 212. Preferably, the doping concentration of the N-type ion implantation process is greater than 1×10 16 cm -3 The preferred doping concentration of the N-type ion implantation process is between 1×10 16 cm -3 ~1×10 18 cm -3 between.

[0099] In another embodiment of the present application, forming a grid structure on the P-type implantation region 210 includes: forming a silicon nitride layer ( Fig.11 (not shown), the silicon nitride layer covers the P-type implantation region 210 and the semiconductor substrate 200; and, an etching process is performed on the silicon nitride layer to form the grid structure 212. Preferably, the thickness of the silicon nitride layer is

[0100] Please refer to Fig.12 In the embodiment of the present application, the P-type injection region 210 is then subjected to a loosening treatment so that multiple pores 211 are formed in the P-type injection region 210. Since the P-type injection region 210 is subjected to a loosening treatment, the subsequent removal of the P-type injection region 210 to form a groove can be achieved very conveniently and efficiently, and the quality of the formed groove is also guaranteed. Here, it means that a plurality of holes are formed in the P-type injection region 210, that is, porous silicon is formed, so that the P-type injection region 210 becomes loose. Preferably, the volume proportion of the multiple pores 211 in the P-type injection region 210 is greater than 50%. Specifically, the semiconductor substrate 200 can be placed in an HF (hydrofluoric acid) solution, and a positive pressure is applied to the P-type injection region 210, and the applied positive pressure is, for example, 0.1V to 10V, so that multiple pores 211 are formed in the P-type injection region 210. In the embodiment of the present application, the grid structure 212 is not loosened or the degree of loosening is less than that of the P-type injection area 210 , that is, when the loosening process is performed, no corresponding pores are formed in the grid structure 212 or the formed pores are less than those of the P-type injection area 210 .

[0101] Then, if Fig.13As shown, a patterned mask layer 220 is formed, and the patterned mask layer 220 covers the grid structure 212, the P-type implantation region 210 and the semiconductor substrate 200. Here, a mask layer ( Fig.13 ), and then the mask layer is subjected to photolithography and etching processes to form the patterned mask layer 220. In the embodiment of the present application, the semiconductor substrate 200 has not yet formed a groove, and its surface is flat. Accordingly, the mask layer is formed on a flat surface, and a mask layer with uniform film thickness can be obtained. Therefore, when the mask layer is subjected to photolithography and etching processes, a high-precision, high-reliability patterned mask layer 220 can be formed, thereby improving the accuracy of the comb-tooth structure formed by etching.

[0102] In the embodiment of the present application, the patterned mask layer 220 is a double-layer structure, including a patterned hard mask layer and a patterned photoresist layer. Here, the double-layer structure of the hard mask layer and the photoresist layer can reduce the use of the photoresist layer, reduce the thickness of the photoresist layer, and also reduce the overall thickness of the patterned mask layer used, thereby further improving the accuracy of the patterned mask layer formed and the accuracy of the comb structure formed by etching.

[0103] Specifically, forming the patterned mask layer 220 includes: forming a hard mask layer ( Fig.13 The hard mask layer covers the grid structure 212, the P-type implantation region 210 and the semiconductor substrate 200; a photoresist layer ( Fig.13 ), the photoresist layer covers the hard mask layer; the photoresist layer is subjected to exposure and development processes to form a patterned photoresist layer 221; and the hard mask layer is subjected to an etching process using the patterned photoresist layer 221 to form a patterned hard mask layer 222. The material of the hard mask layer may be, for example, tetraethyl orthosilicate (TEOS). Preferably, the thickness of the hard mask layer is The thickness of the photoresist layer is 500nm-2μm.

[0104] Then, if Fig.14 As shown, the patterned mask layer 220 is used to perform an etching process on the grid structure 212, the P-type injection region 210, and the semiconductor substrate 200 at the bottom of the P-type injection region 210, so as to form a comb-tooth structure 230 in the semiconductor substrate 200. Specifically, the patterned mask layer 220 is used as a mask to perform a dry etching process on the grid structure 212 and the P-type injection region 210, and the second semiconductor substrate 202 is extended to be etched through the second semiconductor substrate 202, so as to form a comb-tooth structure 230. The comb-tooth structure 230 is aligned with the cavity 2010, as shown in FIG. Fig.14As shown, the two comb-tooth structures 230 are respectively aligned with the two cavities 2010. In the embodiment of the present application, the accuracy and reliability of the patterned mask layer 220 are improved, and accordingly, the accuracy and reliability of the comb-tooth structure 230 formed thereby are improved.

[0105] For further information, please refer to Fig.15 , remove the patterned mask layer 220, the grid structure 212 and the P-type injection region 210. Specifically, the patterned mask layer 220 can be removed by a stripping process to expose the grid structure 212, the P-type injection region 210 and the semiconductor substrate 200. Furthermore, the patterned photoresist layer 221 and the patterned hard mask layer 222 can be removed by a stripping process and / or a dry etching process, and the grid structure 212 can be removed by the dry etching process at the same time. In the embodiment of the present application, the P-type injection region 210 is removed by a wet etching process to form a groove 240 in the semiconductor substrate 200 and expose the comb-tooth structure 230. That is, in the embodiment of the present application, the surface of the comb-tooth structure 230 is lower than the surface of the semiconductor substrate 200, and a boss structure 250 is formed on both sides of the comb-tooth structure 230, thereby improving the performance of the formed MEMS device, such as improving its driving performance.

[0106] Specifically, a DHF (diluted hydrofluoric acid) solution may be used to perform a wet etching process on the P-type implant region 210. For example, a mixed solution of hydrofluoric acid (HF) with a mass percentage concentration of 49% and hydrogen peroxide (H2O2) with a mass percentage concentration of 30% may be used, wherein the ratio of hydrofluoric acid to hydrogen peroxide is, for example, 1:5; or a mixed solution of hydrofluoric acid (HF) with a mass percentage concentration of 49%, nitric acid (HNO3) with a mass percentage concentration of 70%, and acetic acid (CH3COOH) with a mass percentage concentration of 3:16:1 may be used. The DHF solution has a high etching selectivity ratio for the P-type implant region 210 and the semiconductor substrate 200, thereby being able to efficiently and reliably remove the P-type implant region 210. In particular, in the aforementioned process steps, the embodiment of the present application performs a loosening treatment on the P-type injection region 210 so that multiple holes 211 are formed in the P-type injection region 210. Therefore, when the wet etching process is performed on the P-type injection region 210 in this step, the P-type injection region 210 can be removed efficiently and reliably, and the formed groove has an excellent morphology.

[0107] [Example 3]

[0108] Please refer to Figures 16 to 23 ,in, Fig.16is a schematic flow chart of a method for manufacturing a MEMS device according to a third embodiment of the present invention, Figures 17 to 23 It is a device cross-sectional schematic diagram of a method for manufacturing a MEMS device according to a third embodiment of the present invention.

[0109] like Fig.16 As shown, in the third embodiment, the manufacturing method of the MEMS device specifically includes the following steps:

[0110] Step S30: providing a semiconductor substrate, and performing a P-type ion implantation process on the semiconductor substrate to form a P-type implantation region in the semiconductor substrate;

[0111] Step S31: forming a patterned mask layer, wherein the patterned mask layer covers the P-type implantation region and the semiconductor substrate;

[0112] Step S32: performing an etching process on the P-type implantation region and the semiconductor substrate at the bottom of the P-type implantation region using the patterned mask layer to form a comb-tooth structure in the semiconductor substrate;

[0113] Step S33: removing the patterned mask layer;

[0114] Step S34: performing a loosening process on the P-type implantation region to form multiple pores in the P-type implantation region; and

[0115] Step S35: removing the P-type implantation region to form a groove in the semiconductor substrate.

[0116] Please refer to Fig.17 , providing a semiconductor substrate 300. In the embodiment of the present application, it specifically includes: providing a first semiconductor substrate 301, in which a cavity 3010 is formed, and the material of the first semiconductor substrate 301 is, for example, silicon; bonding a second semiconductor substrate 302 on the first semiconductor substrate 301. The material of the second semiconductor substrate 302 is, for example, silicon, and further, the material of the second semiconductor substrate 302 can be undoped polysilicon or N-type doped polysilicon. The semiconductor substrate 300 includes the first semiconductor substrate 301 and the second semiconductor substrate 302.

[0117] Next, please refer to Fig.18 , a P-type ion implantation process is performed on the semiconductor substrate 300 to form a P-type implantation region 310 in the semiconductor substrate 300. Here, a P-type ion implantation process is specifically performed on the second semiconductor substrate 302 to form a P-type implantation region 310 in the second semiconductor substrate 302, and the P-type implantation region 310 extends from the surface of the second semiconductor substrate 302 to the second semiconductor substrate 302.

[0118] Furthermore, the P-type implantation region 310 is aligned with the cavity 3010. Fig.18 As shown, the figure shows two cavities 3010 and two P-type injection regions 310, wherein the two P-type injection regions 310 are respectively aligned with the two cavities 3010. Here, each of the P-type injection regions 310 is located directly above the corresponding cavity 3010.

[0119] Then, if Fig.19 As shown, a patterned mask layer 320 is formed, and the patterned mask layer 320 covers the P-type implantation region 310 and the semiconductor substrate 300. Here, a mask layer ( Fig.19 ), and then the mask layer is subjected to photolithography and etching processes to form the patterned mask layer 320. In the embodiment of the present application, the semiconductor substrate 300 has not yet formed a groove, and its surface is flat. Accordingly, the mask layer is formed on a flat surface, and a mask layer with uniform film thickness can be obtained. Therefore, when the mask layer is subjected to photolithography and etching processes, a high-precision, high-reliability patterned mask layer 320 can be formed, thereby improving the accuracy of the comb-tooth structure formed by etching.

[0120] In the embodiment of the present application, the patterned mask layer 320 is a double-layer structure, including a patterned hard mask layer and a patterned photoresist layer. Here, the double-layer structure of the hard mask layer and the photoresist layer can reduce the use of the photoresist layer, reduce the thickness of the photoresist layer, and also reduce the overall thickness of the patterned mask layer used, thereby further improving the accuracy of the patterned mask layer formed and the accuracy of the comb structure etched thereby.

[0121] Specifically, forming the patterned mask layer 320 includes: forming a hard mask layer ( Fig.19 The hard mask layer covers the P-type implantation region 310 and the semiconductor substrate 300; a photoresist layer ( Fig.19 ), the photoresist layer covers the hard mask layer; the photoresist layer is subjected to exposure and development processes to form a patterned photoresist layer 321; and the hard mask layer is subjected to an etching process using the patterned photoresist layer 321 to form a patterned hard mask layer 322. The material of the hard mask layer may be, for example, tetraethyl orthosilicate (TEOS). Preferably, the thickness of the hard mask layer is The thickness of the photoresist layer is 500nm-2μm.

[0122] Then, if Fig. 20As shown, the patterned mask layer 320 is used to perform an etching process on the P-type injection region 310 and the semiconductor substrate 300 at the bottom of the P-type injection region 310, so as to form a comb-tooth structure 330 in the semiconductor substrate 300. Specifically, the patterned mask layer 320 is used as a mask to perform a dry etching process on the P-type injection region 310, and the second semiconductor substrate 302 is extended to be etched through the second semiconductor substrate 302, so as to form a comb-tooth structure 330. The comb-tooth structure 330 is aligned with the cavity 3010, as shown in FIG. Fig. 20 As shown, the two comb-tooth structures 330 are respectively aligned with the two cavities 3010. In the embodiment of the present application, the accuracy and reliability of the patterned mask layer 320 are improved, and accordingly, the accuracy and reliability of the comb-tooth structure 330 formed thereby are improved.

[0123] For further information, please refer to Fig.21 , remove the patterned mask layer 320 to expose the P-type implantation region 310 and the semiconductor substrate 300. Specifically, the patterned mask layer 320 can be removed by a stripping process to expose the P-type implantation region 310 and the semiconductor substrate 300. Furthermore, the patterned photoresist layer 321 and the patterned hard mask layer 322 can be removed by a stripping process and / or a dry etching process.

[0124] Please refer to Fig. 22 In the embodiment of the present application, the P-type injection region 310 is then subjected to a loosening treatment so that multiple pores 311 are formed in the P-type injection region 310. Since the P-type injection region 310 is subjected to a loosening treatment, the P-type injection region 310 can be removed to form a groove very conveniently and efficiently, and the quality of the groove formed is also guaranteed. Here, it means that a plurality of holes are formed in the P-type injection region 310, that is, porous silicon is formed, so that the P-type injection region 310 becomes loose. Preferably, the volume proportion of the multiple pores 311 in the P-type injection region 310 is greater than 50%. Specifically, the semiconductor substrate 300 can be placed in an HF (hydrofluoric acid) solution, and a positive pressure is applied to the P-type injection region 310, and the applied positive pressure is, for example, 0.1V to 10V, so that multiple pores 311 are formed in the P-type injection region 310.

[0125] Next, please refer to Fig.23, remove the P-type implantation region 310. In the embodiment of the present application, the P-type implantation region 310 is removed by a wet etching process to form a groove 340 in the semiconductor substrate 300 and expose the comb-tooth structure 330. That is, in the embodiment of the present application, the surface of the comb-tooth structure 330 is lower than the surface of the semiconductor substrate 300, and boss structures 350 are formed on both sides of the comb-tooth structure 330, thereby improving the performance of the formed MEMS device, such as improving its driving performance.

[0126] Specifically, a DHF (diluted hydrofluoric acid) solution may be used to perform a wet etching process on the P-type implant region 310. For example, a mixed solution of hydrofluoric acid (HF) with a mass percentage concentration of 49% and hydrogen peroxide (H2O2) with a mass percentage concentration of 30% may be used, wherein the ratio of hydrofluoric acid to hydrogen peroxide is, for example, 1:5; or a mixed solution of hydrofluoric acid (HF) with a mass percentage concentration of 49%, nitric acid (HNO3) with a mass percentage concentration of 70%, and acetic acid (CH3COOH) with a mass percentage concentration of 3:16:1 may be used. The DHF solution has a high etching selectivity ratio for the P-type implant region 310 and the semiconductor substrate 300, thereby being able to efficiently and reliably remove the P-type implant region 310. In particular, in the aforementioned process steps, the embodiment of the present application performs a loosening treatment on the P-type injection region 310 so that multiple holes 311 are formed in the P-type injection region 310. Therefore, when a wet etching process is performed on the P-type injection region 310 in this step, the P-type injection region 310 can be removed efficiently and reliably, and the formed groove has an excellent morphology.

[0127] In summary, in the manufacturing method of the MEMS device provided by the present invention, a P-type injection region is formed in the semiconductor substrate, and the P-type injection region is subjected to a loosening treatment so that multiple pores are formed in the P-type injection region, thereby facilitating the subsequent removal of the P-type injection region. Thus, in the process of etching to form a comb-tooth structure, the patterned mask layer used can be formed on a flat surface, which correspondingly improves the accuracy of the patterned mask layer and the accuracy of the comb-tooth structure etched thereby. At the same time, since the P-type injection region is subjected to a loosening treatment so that multiple pores are formed in the P-type injection region, the P-type injection region can also be conveniently removed to form a groove.

[0128] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for manufacturing a MEMS device, characterized in that: The method for manufacturing the MEMS device comprises: Providing a semiconductor substrate, and performing a P-type ion implantation process on the semiconductor substrate to form a P-type implantation region in the semiconductor substrate; forming a patterned mask layer, wherein the patterned mask layer covers the P-type implantation region and the semiconductor substrate; performing an etching process on the P-type implantation region and the semiconductor substrate at the bottom of the P-type implantation region using the patterned mask layer to form a comb-tooth structure in the semiconductor substrate; and, removing the patterned mask layer and the P-type implantation region to form a groove in the semiconductor substrate; Before removing the P-type implantation region, a loosening process is performed on the P-type implantation region so as to form multiple pores in the P-type implantation region.

2. The method for manufacturing a MEMS device according to claim 1, wherein: Before forming the patterned mask layer, the P-type implant region is subjected to a loosening treatment; or after removing the patterned mask layer and before removing the P-type implant region, the P-type implant region is subjected to a loosening treatment.

3. The method for manufacturing a MEMS device according to claim 2, wherein: Before forming a patterned mask layer, a loosening treatment is performed on the P-type injection area, and before the loosening treatment is performed on the P-type injection area, the manufacturing method of the MEMS device also includes: forming a grid structure on the P-type injection area; wherein, when the loosening treatment is performed, it is easier to form pores in the P-type injection area than in the grid structure.

4. The method for manufacturing a MEMS device according to claim 3, wherein: Forming a grid structure on the P-type implantation region includes: performing an N-type ion implantation process on the P-type implantation region to form the grid structure on the P-type implantation region.

5. The method for manufacturing a MEMS device according to claim 4, wherein: The doping concentration of the N-type ion implantation process is greater than 1×10 16 cm -3 .

6. The method for manufacturing a MEMS device according to claim 3, wherein: Forming a grid structure on the P-type implantation region includes: forming a silicon nitride layer, wherein the silicon nitride layer covers the P-type implantation region and the semiconductor substrate; and, An etching process is performed on the silicon nitride layer to form the grid structure.

7. The method for manufacturing a MEMS device according to claim 6, wherein: The thickness of the silicon nitride layer is 8. The method for manufacturing a MEMS device according to any one of claims 1 to 7, characterized in that: The loosening treatment of the P-type implant region includes: applying a positive pressure to the P-type implant region in an HF solution to perform the loosening treatment.

9. The method for manufacturing a MEMS device according to any one of claims 1 to 7, characterized in that: The patterned mask layer includes: forming a hard mask layer, wherein the hard mask layer covers the P-type implantation region and the semiconductor substrate; forming a photoresist layer, wherein the photoresist layer covers the hard mask layer; performing an exposure and development process on the photoresist layer to form a patterned photoresist layer; and, The hard mask layer is etched using the patterned photoresist layer to form a patterned hard mask layer, wherein the patterned mask layer includes the patterned hard mask layer and the patterned photoresist layer.

10. The method for manufacturing a MEMS device according to claim 9, wherein: The thickness of the hard mask layer is The thickness of the photoresist layer is 500nm-2μm.

11. The method for manufacturing a MEMS device according to any one of claims 1 to 7, characterized in that: Performing an etching process on the P-type implantation region and the semiconductor substrate at the bottom of the P-type implantation region using the patterned mask layer includes: performing a dry etching process on the P-type implantation region and the semiconductor substrate at the bottom of the P-type implantation region using the patterned mask layer.

12. The method for manufacturing a MEMS device according to any one of claims 1 to 7, characterized in that: Removing the patterned mask layer and the P-type implantation region includes: removing the patterned mask layer by a stripping process and removing the P-type implantation region by a wet etching process.

13. The method for manufacturing a MEMS device according to any one of claims 1 to 7, characterized in that: Providing a semiconductor substrate includes: providing a first semiconductor substrate having a cavity formed therein; and, A second semiconductor substrate is bonded on the first semiconductor substrate, wherein the semiconductor substrate includes the first semiconductor substrate and the second semiconductor substrate.

Images