Detection circuit

Abstract

This invention discloses a detection circuit, comprising: a detection unit for detecting liquid ion concentration, including a first output terminal and a second output terminal, wherein the output voltages of the first output terminal and the second output terminal are different when detecting liquid ion concentration; a signal acquisition module electrically connected to the detection unit for acquiring the output voltages of the first output terminal and the second output terminal; and a controller electrically connected to both the signal acquisition module and the voltage processing module, wherein the controller controls the voltage processing module to provide a variable voltage with adjustable frequency and amplitude to the detection unit based on the output voltages of the first output terminal and the second output terminal, so that the output voltages of the first output terminal and the second output terminal are the same, and the ion concentration is obtained according to the amplitude of the variable voltage. This invention, by controlling the voltage processing module through the controller, can provide different voltages to the detection unit, measure the change in the threshold voltage of the detection unit under different ion concentrations, and also avoid or reduce detection errors.

Description

Technical Field

[0001] This invention relates to the field of detection technology, and more specifically, to a detection circuit. Background Technology

[0002] An ion-sensitive field-effect transistor (ISFET) is a microelectronic ion-selective sensing element that combines the characteristics of both electrochemistry and transistors. ISFETs are widely used in clinical, food, environmental, military, and even robotics fields due to their advantages such as small sensitive area, fast response, high sensitivity, low output impedance, low sample consumption, ease of mass production, and low cost. They are particularly important in the field of biochemical sensors.

[0003] Existing ISFETs utilize surface treatment technology to enable their sensitive membranes to adsorb specific ions or molecules. These charged ions or molecules alter the channel conductivity of the ISFET. By monitoring changes in the ISFET channel conductivity through an external circuit, the concentration of ions or molecules in the test solution can be indirectly determined. For example, in the substrate structure of a dual-gate ion-sensitive field-effect transistor used for pH detection, when the ISFET surface has an ion-sensitive layer and the device is immersed in the test solution, the surface charge of the ion-sensitive layer changes according to the different / changing concentrations of hydrogen ions (H+), thus affecting the threshold voltage of the ISFET. By testing the change in its threshold voltage or output signal, the pH value can be determined. Furthermore, by setting different ion-sensitive membranes on the surface, the concentrations of other ions in the surface liquid can be obtained through a similar principle. Existing technologies using ISFETs can achieve the detection of pH, metal ions, blood glucose, genes, and proteins, among others.

[0004] Currently, ISFETs are affected by environmental factors (light, temperature, etc.) and fluctuations in their own characteristics. Changes in the threshold voltage cause significant fluctuations in the output signal, resulting in large detection errors. In addition, the lack of a mature detection circuit further limits the detection accuracy.

[0005] Therefore, there is an urgent need to provide a detection circuit that can improve detection accuracy. Summary of the Invention

[0006] In view of this, the present invention provides a detection circuit to improve detection accuracy.

[0007] The detection circuit of the present invention includes a signal acquisition module, a controller, a voltage processing module, and a detection unit, wherein,

[0008] A detection unit is used to detect the concentration of liquid ions. The detection unit includes a first output terminal and a second output terminal. When detecting the concentration of liquid ions, the output voltages of the first output terminal and the second output terminal are different.

[0009] The signal acquisition module is electrically connected to the detection unit and is used to acquire the output voltage of the first output terminal and the second output terminal.

[0010] The controller is electrically connected to the signal acquisition module and the voltage processing module respectively. The controller controls the voltage processing module to provide a variable voltage with adjustable frequency and amplitude to the detection unit according to the output voltage of the first output terminal and the second output terminal, so that the output voltage of the first output terminal and the second output terminal are the same, and the ion concentration is obtained according to the amplitude of the variable voltage.

[0011] Compared with the prior art, the detection circuit provided by the present invention achieves at least the following beneficial effects:

[0012] The detection circuit of this invention includes a detection unit, a signal acquisition module, a controller, and a voltage processing module. When detecting the ion concentration of a liquid, the output voltages of the first and second output terminals of the detection unit are different. The signal acquisition module acquires the voltages of the first and second output terminals. The controller controls the voltage processing module to provide a variable voltage with adjustable frequency and amplitude to the detection unit, so that the output voltages of the first and second output terminals are the same. The ion concentration is calculated based on the amplitude of the variable voltage. This makes the detection unit unaffected by environmental factors and fluctuations in its own characteristics during detection, eliminating or reducing detection errors. This detection circuit is accurate and reliable, improving detection precision. In this invention, the detection circuit is designed with multiple voltage outputs, and both the frequency and amplitude are adjustable, making it versatile and suitable for detecting any ion concentration. The gate voltage of the detection unit is controllable, and the output signal is monitored in real time, achieving fully automatic and rapid detection.

[0013] Of course, any product implementing this invention does not necessarily need to achieve all of the technical effects described above at the same time.

[0014] Other features and advantages of the invention will become clear from the following detailed description of exemplary embodiments of the invention with reference to the accompanying drawings. Attached Figure Description

[0015] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of the invention and, together with their description, serve to explain the principles of the invention.

[0016] Figure 1 This is a schematic diagram of the circuit connection structure of a detection circuit provided by the present invention;

[0017] Figure 2 This is a schematic diagram of the circuit connection structure of a detection unit provided by the present invention;

[0018] Figure 3 This is a schematic diagram of the circuit connection structure of a voltage processing module provided by the present invention;

[0019] Figure 4 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0020] Figure 5 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0021] Figure 6 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0022] Figure 7 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0023] Figure 8 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0024] Figure 9 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0025] Figure 10 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0026] Figure 11 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0027] Figure 12 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention.

[0028] Figure 13 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0029] Figure 14 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention;

[0030] Figure 15 This is a schematic diagram of the circuit connection structure of another detection circuit provided by the present invention;

[0031] Figure 16 This is a schematic diagram of the circuit connection structure of a differential amplifier circuit provided by the present invention;

[0032] Figure 17 This is a schematic diagram of the circuit connection structure of another detection circuit provided by the present invention;

[0033] Figure 18 This is a schematic diagram of the circuit connection structure of a second filter circuit provided by the present invention. Detailed Implementation

[0034] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention.

[0035] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0036] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0037] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0038] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0039] Reference Figure 1 and Figure 2 , Figure 1 This is a schematic diagram of the circuit connection structure of a detection circuit provided by the present invention. Figure 2 This is a schematic diagram of the circuit connection structure of a detection unit provided by the present invention. (Refer to...) Figure 1 As shown, the detection circuit 000 provided in this embodiment includes a signal acquisition module 200, a controller 300, a voltage processing module 400, and a detection unit 100. Optionally, a schematic diagram of the circuit connection structure of the detection unit 100 can be referred to... Figure 2A detection unit 100 is used to detect the concentration of liquid ions. The detection unit 100 includes a first output terminal IN+ and a second output terminal IN-. The output voltages of the first output terminal IN+ and the second output terminal IN- are different when detecting the concentration of liquid ions. A signal acquisition module 200, electrically connected to the detection unit 100, is used to acquire the output voltages of the first output terminal IN+ and the second output terminal IN-. A controller 300 is electrically connected to both the signal acquisition module 200 and the voltage processing module 400. Based on the output voltages of the first output terminal IN+ and the second output terminal IN-, the controller 300 controls the voltage processing module 400 to provide a variable voltage with adjustable frequency and amplitude to the detection unit 100, so that the output voltages of the first output terminal IN+ and the second output terminal IN- are the same, and the ion concentration is obtained based on the amplitude of the variable voltage.

[0040] Specifically, the detection unit 100 provided in this embodiment can be used to detect the concentration of ions in a solution, such as hydrogen ions (pH value) and ammonium ions (NH4+). + The detection unit 100 may include at least one repeating unit, optionally, such as... Figure 2 As shown, the detection unit 100 may include only one repeating unit, or in other embodiments, the detection unit 100 may also include multiple repeating units such as... Figure 2 The repeating units shown are not specifically limited in this embodiment.

[0041] Optionally, the circuit connection structure of the detection unit 100 can be referred to Figure 2 The detection unit 100 further includes a first voltage signal terminal VG1, a second voltage signal terminal VG2, and a third voltage signal terminal VG3. The first voltage signal terminal VG1 is connected to the gate of the first transistor T1, providing a potential to the gate of the first transistor T1. The second voltage signal terminal VG2 is connected to the gate of the second transistor T2, providing a potential to the gate of the second transistor T2. The third voltage signal terminal VG3 is connected to the gate of the third transistor T3, providing a potential to the gate of the third transistor T3. The gate of the fourth transistor T4 is electrically connected to the variable voltage signal terminal VGx. This allows the detection unit 100 to detect the ion concentration in the solution when the potential at the ion-sensitive membrane above the channel of the fourth transistor T4 changes after the detection unit 100 is immersed in the detection solution, by adjusting the potential of the fourth voltage signal terminal. When the fourth transistor T4 is in a saturated state, according to... Where μ is the electron mobility, Cox is the capacitance per unit area of ​​the MIS structure of the TFT device, W / L is the ratio of the channel width to the channel length of the TFT device, Vgs is the voltage between the gate and the source, and Vth is the threshold voltage of the fourth transistor T4. Figure 2When the surface ion concentration at point P changes, the potential at point P and the threshold voltage Vth of the fourth transistor T4 will change accordingly. By adjusting VGx so that the voltage difference between the first output terminal IN+ and the second output terminal IN- is 0 or a fixed value, the threshold voltage offset ΔVth of the fourth transistor T4 is ΔVth = VGx - VG3, thus deriving the relationship of surface ion concentration change.

[0042] Because the transistor output current is small and greatly affected by factors such as the detection environment (temperature, light, etc.) and process, it is difficult to obtain the corresponding threshold voltage change through direct detection. Therefore, in this embodiment, four transistors with the same structure are electrically connected to each other. Only one transistor needs to be used as the detection transistor. Since the four transistors are manufactured using the same process and are in the same environment during the detection process, the characteristic fluctuations of the four transistors can be kept synchronized. It is sufficient to detect the minute potential change at the ion-sensitive membrane above the channel of the fourth transistor T4, which serves as the detection potential terminal. Moreover, the potential at the ion-sensitive membrane above the channel of the fourth transistor T4, which serves as the detection transistor, is affected by the solution to be detected. This potential influence is independent of other factors of the transistor and is only related to the ion concentration in the solution. Furthermore, since the first output terminal IN+ and the second output terminal IN- do not output current, the potentials of the first output terminal IN+ and the second output terminal IN- are not affected by the solution to be detected, making the potentials of the first output terminal IN+ and the second output terminal IN- highly reliable. In this embodiment, the relationship between the potential of the detection potential terminal and the ion concentration of the detection solution depends only on the type of ion to be detected. During the detection process, the potential of the variable voltage signal terminal VGx is adjusted so that the potential difference between the first output terminal IN+ and the second output terminal IN- is zero or a fixed value. This enables the self-calibration of the detection device, resulting in a small error in the final detection result, which is beneficial to improving the detection accuracy and stability of the detection device.

[0043] In this invention, the controller 300 controls the voltage processing module 400 to output a corresponding variable voltage to the voltage pin of the detection unit 100 based on the signal input from the acquisition module. The voltage processing module 400 can dynamically provide a variable voltage. This invention achieves the final required voltage and the required acquired value by dynamically adjusting the voltage provided to the detection unit 100 and the closed-loop operation of signal acquisition, thereby obtaining the relationship between solution concentration and voltage value, and thus realizing ion concentration detection with higher detection accuracy.

[0044] In some alternative embodiments, combined with Figure 1 and reference Figure 3 , Figure 3This is a schematic diagram of the circuit connection structure of a voltage processing module provided by the present invention. The voltage processing module 400 includes a voltage signal output circuit 1, a first amplification circuit 2, and a first filtering circuit 3. The input terminal of the voltage signal output circuit 1 is electrically connected to the controller 300. The controller 300 inputs a pulse width modulation signal (PWM) to the input terminal of the voltage signal output circuit 1. The output terminal of the voltage signal output circuit 1 outputs a first voltage or a second voltage and sends it to the first amplification circuit 2. The first amplification circuit 2 amplifies the first voltage or the second voltage and sends it to the first filtering circuit 3. The first filtering circuit 3 filters the high-frequency signal in the first voltage or the second voltage to obtain a variable voltage.

[0045] Optionally, pulse width modulation (PWM) is a method of digitally encoding analog signal levels. Using a high-resolution counter, the duty cycle of a square wave is modulated to encode the level of a specific analog signal. PWM remains digital because at any given moment, the full-amplitude DC supply is either fully on or fully off; the voltage or current source is applied to the analog load as a repetitive pulse sequence of on / off states. In this invention, the controller 300 inputs a PWM signal to the input terminal of the voltage signal output circuit 1, thereby enabling a frequency-adjustable variable voltage.

[0046] Understandably, the controller 300 inputs a pulse width modulation (PWM) signal to the input terminal of the voltage signal output circuit 1. The voltage signal output circuit 1 provides a first voltage or a second voltage. The first amplifier circuit 2 amplifies the first voltage or the second voltage. The amplified first voltage and second voltage are then input to the first filter circuit 3. The first filter circuit 3 filters the high-frequency signals in the first voltage or the second voltage. The resulting variable voltage is then input to the variable voltage signal terminal VGx, thereby achieving dynamic provision of a variable voltage. This invention achieves the final required voltage and the required acquired value by dynamically adjusting the voltage provided to the detection unit 100 and the closed-loop operation of signal acquisition, thus obtaining the relationship between solution concentration and voltage value, and thereby realizing ion concentration detection with higher detection accuracy.

[0047] In some alternative embodiments, combined with Figure 3 and Figure 4 , Figure 4 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. The voltage signal output circuit 1 includes a first voltage input terminal +Vref, a second voltage input terminal -Vref, a first resistor R01 and a second resistor R02, and also includes a single-pole double-throw switch SPDT and an enable control circuit 4.

[0048] One end of the first resistor R01 is electrically connected to the first voltage input terminal +Vref, and the other end of the first resistor R01 is electrically connected to the single-pole double-throw switch SPDT; one end of the second resistor R02 is electrically connected to the second voltage input terminal -Vref, and the other end of the second resistor R02 is electrically connected to the single-pole double-throw switch SPDT.

[0049] The input terminal of the enable control circuit 4 is electrically connected to the controller 300. The input terminal of the enable control circuit 4 receives a pulse width modulation signal PWM. The output terminal of the enable control circuit 4 is electrically connected to the enable terminal of the single-pole double-throw switch SPDT. When the pulse width modulation signal PWM is high, the single-pole double-throw switch SPDT is controlled to conduct with the first resistor R01. When the pulse width modulation signal PWM is low, the single-pole double-throw switch SPDT is controlled to conduct with the second resistor R02.

[0050] Specifically, the first voltage input terminal +Vref and the second voltage input terminal -Vref input different voltages. The first voltage input terminal +Vref and the second voltage input terminal -Vref can be connected to a voltage module or chip respectively. The voltage module or chip inputs a positive voltage to the first voltage input terminal +Vref and a negative voltage to the second voltage input terminal -Vref. The two voltage values ​​can be the same or different, which can be determined according to the actual use requirements.

[0051] In this embodiment, the first resistor R01 acts as a voltage divider protection circuit to prevent the single-pole double-throw switch SPDT from being damaged when the voltage at the first voltage input terminal +Vref is too high and the switch is conducting with the first resistor R01. The second resistor R02 also acts as a voltage divider protection circuit to prevent the single-pole double-throw switch SPDT from being damaged when the voltage at the second voltage input terminal -Vref is too high and the switch is conducting with the second resistor R02.

[0052] The input terminal of the enable control circuit 4 is electrically connected to the controller 300. Under the control of the controller 300, the input terminal of the enable control circuit 4 is a pulse width modulation signal (PWM). The output terminal of the enable control circuit 4 is electrically connected to the enable terminal of the single-pole double-throw switch (SPDT). When the pulse width modulation signal (PWM) is high, the single-pole double-throw switch (SPDT) is controlled to conduct through the first resistor R01. The voltage input at the first voltage input terminal +Vref is input to the first amplifier circuit 2 through the first resistor R01 and the single-pole double-throw switch (SPDT). When the pulse width modulation signal (PWM) is low, the single-pole double-throw switch (SPDT) is controlled to conduct through the second resistor R02. The voltage signal input at the second voltage input terminal -Vref is input to the first amplifier circuit 2 through the second resistor R02 and the single-pole double-throw switch (SPDT).

[0053] In some alternative embodiments, combined with Figure 3and Figure 5 , Figure 5 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. The enable control circuit 4 includes a sixth resistor R06, a seventh resistor R07, an eighth resistor R08, and a first transistor Q1. One end of the first resistor R01 is electrically connected to the input terminal of the enable control circuit 4, and the other end of the first resistor R01 is electrically connected to one end of the seventh resistor R07 and the gate of the first transistor Q1. The other end of the seventh resistor R07 is grounded. One end of the eighth resistor R08 is electrically connected to the high-potential signal terminal, and the other end is electrically connected to the first terminal of the first transistor Q1. The first transistor Q1 is an NPN transistor. The first terminal of the first transistor Q1 is also electrically connected to the enable terminal of a single-pole double-throw switch (SPDT), and the second terminal of the first transistor Q1 is grounded.

[0054] Specifically, the controller 300 outputs a pulse width modulation (PWM) signal of a certain frequency, which is input to the input terminal of the enable control circuit 4. When the PWM signal is high, the first transistor Q1 is turned on when high and turned off when low, utilizing its characteristics. Therefore, when the PWM signal is high, the enable terminal of the single-pole double-throw (SPDT) switch is disabled, and S0 and SA are turned on. The output of S0 is the positive voltage of the first voltage input terminal +Vref. After being amplified n times by the first amplifier circuit 2, it is then filtered by the first filter circuit 3. At this time, the output voltage of the first filter circuit 3 is n times +Vref. Of course, this n times +Vref is input to the variable voltage signal terminal VGx of the detection unit 100. When the pulse... When the pulse width modulation signal (PWM) is low, the first transistor Q1 is turned off, and the voltage at the high-potential signal terminal is input to the enable terminal of the single-pole double-throw (SPDT) switch. At this time, the enable terminal of the SPDT switch is enabled, and S0 and SB are turned on. The output of S0 is the negative voltage of the second voltage input terminal -Vref. After being amplified n times by the first amplifier circuit 2, it is then filtered by the first filter circuit 3. At this time, the output voltage of the first filter circuit 3 is n times -Vref. Of course, this n times -Vref is input to the variable voltage signal terminal VGx of the detection unit 100. This realizes the input of a frequency-adjustable variable voltage to the variable voltage signal terminal VGx. It should be noted that the frequency adjustment is determined by the frequency of the pulse width modulation signal (PWM).

[0055] In some alternative embodiments, combined with Figure 3 and Figure 6 , Figure 6This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. The first amplification circuit includes a third resistor R03, a fourth resistor R04, a fifth resistor R05, a first amplifier F1, a first variable resistor VR1, and a first capacitor C1. One end of the third resistor R03 is grounded, and the other end of the third resistor R03 is electrically connected to one end of the first variable resistor VR1, one plate of the first capacitor C1, and the first input terminal of the first amplifier F1. One end of the fourth resistor R04 is electrically connected to the output terminal of the single-pole double-throw switch SPDT, and the other end of the fourth resistor R04 is electrically connected to the second input terminal of the first amplifier F1 and one end of the fifth resistor R05. The other end of the fifth resistor R05 is grounded. The other end of the first variable resistor VR1, the other plate of the first capacitor C1, and the output terminal of the first amplifier F1 are all electrically connected to the first filter circuit 3.

[0056] Specifically, the voltage output from the single-pole double-throw (SPDT) switch is input to one end of the fourth resistor R04. Here, the fourth resistor R04 serves as a protection circuit to prevent damage from excessive voltage output from the SPDT. It then passes through the first input of the first amplifier F1, and finally through the output of the first amplifier F1 to the first filter circuit 3. The fifth resistor R05 also serves...

[0057] It is understandable that when the voltages input to the first voltage input terminal +Vref and the second voltage input terminal -Vref are constant, the output value of the first amplifier circuit 2 can be adjusted by adjusting the resistance value of the first variable resistor VR1. Based on the working principle of the amplifier circuit, the amplification factor... Here, the third resistor R03, the fourth resistor R04, and the fifth resistor R05 are all fixed values, while the first variable resistor VR1 is a variable. When the resistance value of the first variable resistor VR1 changes, the amplification factor n of the first amplifier circuit 2 also changes, thereby realizing the input of an adjustable voltage to the variable voltage signal terminal VGx.

[0058] Thus, by combining the voltage signal output circuit 1 and the first amplifier circuit 2, when the frequency of the variable voltage needs to be adjusted, only the frequency of the pulse width modulation signal PWM needs to be adjusted; when the amplitude of the variable voltage needs to be adjusted, only the resistance value of the first variable resistor VR1 needs to be adjusted. This realizes the input of a variable voltage with adjustable frequency and amplitude to the variable voltage signal terminal VGx.

[0059] In some alternative embodiments, combined with Figure 3 and Figure 7 , Figure 7This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. The first filter circuit 3 includes a ninth resistor R09 and a second capacitor C2. One end of the ninth resistor R09 is electrically connected to the output terminal of the first amplifier circuit 2, and the other end of the ninth resistor R09 is electrically connected to the input terminal of the detection unit 100. The first plate of the second capacitor C2 is electrically connected to the input terminal of the detection unit 100, and the second plate of the second capacitor C2 is grounded.

[0060] Specifically, one end of the ninth resistor R09 is electrically connected to the output terminal of the first amplifier F1, and the second end of the ninth resistor R09 is electrically connected to the first plate of the second capacitor C2 and simultaneously electrically connected to the input terminal of the detection unit 100. The second plate of the second capacitor C2 is grounded, and the first plate of the second capacitor C2 is also electrically connected to the input terminal of the detection unit 100. According to the working principle of the capacitor, the first filter circuit 3 can filter out high-frequency signals. In this way, the variable voltage input to the detection unit 100 is a signal with a frequency within a controllable range, thereby improving the detection accuracy.

[0061] In some alternative embodiments, reference continues to be made to... Figure 2 and reference Figure 8 and Figure 10 , Figure 8 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. Figure 10 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. For example... Figure 2The detection unit 100 shown includes a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4 that are electrically connected to each other. It also includes a first voltage signal terminal VG1, a second voltage signal terminal VG2, a third voltage signal terminal VG3, and a variable voltage signal terminal VGx. The first voltage signal terminal VG1 is connected to the gate of the first transistor T1, the second voltage signal terminal VG2 is connected to the gate of the second transistor T2, the third voltage signal terminal VG3 is connected to the gate of the third transistor T3, and the variable voltage signal terminal VGx is connected to the gate of the fourth transistor T4. An ion-sensitive membrane covers the gate channel of the fourth transistor T4. The source of the first transistor T1 and the source of the second transistor T2 are also present. The first power supply terminal VDD is connected, the drain of the first transistor T1 and the source of the third transistor T3 are connected to the first output terminal IN+, and the drain of the second transistor T2 and the source of the fourth transistor T4 are connected to the second output terminal IN-. The drains of the third transistor T3 and the fourth transistor T4 are connected to the second power supply terminal GND. The detection device is placed in the solution to be detected, and the potential of the variable voltage signal terminal VGx is adjusted so that the potential difference between the first output terminal IN+ and the second output terminal IN- is 0 or a fixed value. When the potential difference between the first potential output terminal and the second potential output terminal is 0 or a fixed value, the concentration of the solution to be detected is calculated based on the potential of the variable voltage signal terminal VGx after adjustment.

[0062] Combination Figure 8 and Figure 10 The first amplifier circuit 2 includes parallel first amplifier sub-circuit 201, second amplifier sub-circuit 202, third amplifier sub-circuit 203, and fourth amplifier sub-circuit 204. The first filter circuit 3 includes parallel first filter sub-circuit 301, second filter sub-circuit 302, third filter sub-circuit 303, and fourth filter sub-circuit 304. The input terminal of the first filter sub-circuit 301 is electrically connected to the output terminal of the first amplifier sub-circuit 201, and the output terminal of the first filter sub-circuit 301 is electrically connected to the first voltage signal terminal VG1. The second filter... The input terminal of sub-circuit 302 is electrically connected to the output terminal of the second amplification sub-circuit 202, and the output terminal of the second filtering sub-circuit 302 is electrically connected to the second voltage signal terminal VG2; the input terminal of the third filtering sub-circuit 303 is electrically connected to the output terminal of the third amplification sub-circuit 203, and the output terminal of the third filtering sub-circuit 303 is electrically connected to the third voltage signal terminal VG3; the input terminal of the fourth filtering sub-circuit 304 is electrically connected to the output terminal of the fourth amplification sub-circuit 204, and the output terminal of the fourth filtering sub-circuit 304 is electrically connected to the variable voltage signal terminal VGx.

[0063] Optional, refer to Figure 2The circuit connection diagram in this embodiment shows that the four transistors are electrically connected to form a structure capable of detecting the ion concentration in a solution. Specifically, the source of the first transistor T1 and the source of the second transistor T2 are connected to the first power supply terminal VDD, which can be used to provide a first power signal to the detection unit 100. The drain of the first transistor T1 and the source of the third transistor T3 are connected to the first output terminal IN+, which can be used as a detection potential terminal. The drain of the second transistor T2 and the source of the fourth transistor T4 are connected to the second output terminal IN-, which can be used as another detection potential terminal. Optionally, during the detection process, an ammeter can be connected between the first output terminal IN+ and the second output terminal IN- to test the potential difference between them. The drains of the third transistor T3 and the fourth transistor T4 are connected to the second power supply terminal GND. The second power supply terminal GND can be used to provide a second power signal to the detection unit 100. Optionally, the voltage of the first power supply terminal VDD is greater than the voltage of the second power supply terminal GND. The second power supply terminal GND can be connected to a ground signal or a negative potential signal, so that a path is formed between the first power supply terminal VDD and the second power supply terminal GND.

[0064] Optionally, the potentials of the first voltage signal terminal VG1 and the second voltage signal terminal VG2 can be equal. When the detection unit 100 is placed in the solution to be detected, since there is an ion-sensitive membrane above the channel of the fourth transistor T4, when the ion-sensitive membrane comes into contact with ions in the solution to be detected, for example, if the ion-sensitive membrane is sensitive to hydrogen ions, the potential on the surface of the ion-sensitive membrane will change, causing the potential at the ion-sensitive membrane above the channel of the fourth transistor T4 to change. That is, the ion-sensitive membrane above the channel of the fourth transistor T4 can be used as the detection potential terminal. When the voltage value of the detection potential terminal changes, the potential difference between the first output terminal IN+ and the second output terminal IN- will also change. The two may not be equal. At this time, the potential of the variable voltage signal terminal VGx is adjusted so that the potential values ​​of the first output terminal IN+ and the second output terminal IN- are kept equal, that is, the voltage difference between the first output terminal IN+ and the second output terminal IN- is zero or a fixed value. When the voltage difference between the first output terminal IN+ and the second output terminal IN- is zero or a fixed value, the potential at the ion-sensitive membrane above the channel of the fourth transistor T4, which serves as the potential terminal to be detected, is the potential of the variable voltage signal terminal VGx after adjustment. Thus, the potential at the ion-sensitive membrane above the channel of the fourth transistor T4 after the detection device is immersed in the solution to be detected can be obtained, and the ion concentration in the solution to be detected can be calculated.

[0065] Optionally, the potentials connected to the first voltage signal terminal VG1 and the second voltage signal terminal VG2 do not have to be fixed potentials, as long as the potential difference between the first output terminal IN+ and the second output terminal IN- is a fixed value. In this case, the potentials input to the first voltage signal terminal VG1 and the second voltage signal terminal VG2 can be adjusted.

[0066] In this embodiment, the voltage output by the voltage signal output circuit 11 can be transmitted to the first amplification sub-circuit 201, the second amplification sub-circuit 202, the third amplification sub-circuit 203, and the fourth amplification sub-circuit 204, respectively. The first amplification sub-circuit 201, the second amplification sub-circuit 202, the third amplification sub-circuit 203, and the fourth amplification sub-circuit 204 can amplify the voltage by the same factor or by different factors, as can be seen from [reference needed]. Figure 10 The first amplification sub-circuit 201 has a first variable resistor VR1a, and the amplification factor of the first amplification sub-circuit 201 can be changed by adjusting the resistance value of the first variable resistor VR1a. The second amplification sub-circuit 202 has a first variable resistor VR1b, and the amplification factor of the second amplification sub-circuit 202 can be changed by adjusting the resistance value of the first variable resistor VR1b. The third amplification sub-circuit 203 has a first variable resistor VR1c, and the amplification factor of the third amplification sub-circuit 203 can be changed by adjusting the resistance value of the first variable resistor VR1c. The fourth amplification sub-circuit 204 has a first variable resistor VR1d, and the amplification factor of the fourth amplification sub-circuit 204 can be changed by adjusting the resistance value of the first variable resistor VR1d. Here, the first variable resistor VR1a, the first variable resistor VR1b, and the first variable resistor VR1c are used to change the amplification factor of the fourth amplification sub-circuit 204. The resistance values ​​of resistors VR1c and the first variable resistor VR1d can be equal or unequal. When the resistance values ​​of the first variable resistors VR1a, VR1b, VR1c, and VR1d are equal, the amplification factors of the first amplification sub-circuit 201, the second amplification sub-circuit 202, the third amplification sub-circuit 203, and the fourth amplification sub-circuit 204 are the same. When the resistance values ​​of the first variable resistors VR1a, VR1b, VR1c, and VR1d are unequal, the amplification factors of the first amplification sub-circuit 201, the second amplification sub-circuit 202, the third amplification sub-circuit 203, and the fourth amplification sub-circuit 204 are different, but the frequencies are the same because they share the same voltage signal output circuit 1.

[0067] Continue to refer to Figure 2 , Figure 8 and Figure 10The first filter circuit 3 includes a first filter sub-circuit 301, a second filter sub-circuit 302, a third filter sub-circuit 303, and a fourth filter sub-circuit 304 in parallel. It can be understood that the first filter sub-circuit 301, the second filter sub-circuit 302, the third filter sub-circuit 303, and the fourth filter sub-circuit 304 respectively filter the voltage after amplification by the first amplifier sub-circuit 201, the second amplifier sub-circuit 202, the third amplifier sub-circuit 203, and the fourth amplifier sub-circuit 204, specifically filtering out high-frequency signals. The input terminal of the first filter sub-circuit 301 is electrically connected to the output terminal of the first amplifier sub-circuit 201, that is, electrically connected to the output terminal of the first amplifier F1 of the first amplifier sub-circuit 201. The output terminal of the first filter sub-circuit 301 is electrically connected to the first voltage signal terminal VG1. The input terminal of the second filter sub-circuit 302 is electrically connected to the second amplifier sub-circuit 204. The output terminal of the second filter sub-circuit 202 is electrically connected to the output terminal of the first amplifier F1 of the second amplifier sub-circuit 202. The output terminal of the second filter sub-circuit 302 is electrically connected to the second voltage signal terminal VG2. The input terminal of the third filter sub-circuit 303 is electrically connected to the output terminal of the third amplifier sub-circuit 203, that is, electrically connected to the output terminal of the first amplifier F1 of the third amplifier sub-circuit 203. The output terminal of the third filter sub-circuit 303 is electrically connected to the third voltage signal terminal VG3. The input terminal of the fourth filter sub-circuit 304 is electrically connected to the output terminal of the fourth amplifier sub-circuit 204, that is, electrically connected to the output terminal of the first amplifier F1 of the fourth amplifier sub-circuit 204. The output terminal of the fourth filter sub-circuit 304 is electrically connected to the variable voltage signal terminal VGx. Since the first filter sub-circuit 301, the second filter sub-circuit 302, the third filter sub-circuit 303, and the fourth filter sub-circuit 304 are respectively connected to... Figure 2 The first voltage signal terminal VG1, the second voltage signal terminal VG2, the third voltage signal terminal VG3, and the variable voltage signal terminal VGx are electrically connected, so that the voltage input to the first voltage signal terminal VG1, the second voltage signal terminal VG2, the third voltage signal terminal VG3, and the variable voltage signal terminal VGx can all be adjusted, and of course, the frequency is the same at this time.

[0068] In another embodiment of the present invention, if the signal frequencies and amplitudes to be provided to the first voltage signal terminal VG1, the second voltage signal terminal VG2, the third voltage signal terminal VG3, and the variable voltage signal terminal VGx are all different, then four [signals / signals] are required. Figure 6 The voltage processing module 400 in the middle.

[0069] In some alternative embodiments, refer to Figure 9 and continue to refer to Figure 10 , Figure 9This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. The voltage processing module 400 further includes a first voltage follower circuit 5, which includes a first sub-voltage follower circuit 501, a second sub-voltage follower circuit 502, a third sub-voltage follower circuit 503, and a fourth sub-voltage follower circuit 504. Each of the first sub-voltage follower circuit 501, the second sub-voltage follower circuit 502, the third sub-voltage follower circuit 503, and the fourth sub-voltage follower circuit 504 includes a second amplifier F2. The first input terminals of the first sub-voltage follower circuit 501, the second sub-voltage follower circuit 502, the third sub-voltage follower circuit 503, and the fourth sub-voltage follower circuit 504 are shown. All are electrically connected to the output terminal of voltage signal output circuit 1; the second input terminal of the first sub-voltage follower circuit 501 is electrically connected to the output terminal of the first sub-voltage follower circuit 501 and to the first amplification sub-circuit 201; the second input terminal of the second sub-voltage follower circuit 502 is electrically connected to the output terminal of the second sub-voltage follower circuit 502 and to the second amplification sub-circuit 202; the second input terminal of the third sub-voltage follower circuit 503 is electrically connected to the output terminal of the third sub-voltage follower circuit 503 and to the third amplification sub-circuit 203; the second input terminal of the fourth sub-voltage follower circuit 504 is electrically connected to the output terminal of the fourth sub-voltage follower circuit 504 and to the fourth amplification sub-circuit 204.

[0070] It should be noted that when four signals with identical amplitude and frequency are required to be supplied to detection unit 100, it can be done in... Figure 7 Four voltage follower circuits are added after the first filter circuit 3 of the voltage processing module 400. The output terminals of the four voltage follower circuits are electrically connected to the first voltage signal terminal VG1, the second voltage signal terminal VG2, the third voltage signal terminal VG3 and the variable voltage signal terminal VGx, respectively, which are not shown in this embodiment.

[0071] This embodiment refers to Figure 9 and Figure 10The voltage processing module 400 can provide signals with the same frequency but different amplitudes to the first voltage signal terminal VG1, the second voltage signal terminal VG2, the third voltage signal terminal VG3, and the variable voltage signal terminal VGx. The amplitude can be adjusted so that the resistance values ​​of the first variable resistor VR1a, the first variable resistor VR1b, the first variable resistor VR1c, and the first variable resistor VR1d are equal. At this time, the signals input to the first voltage signal terminal VG1, the second voltage signal terminal VG2, the third voltage signal terminal VG3, and the variable voltage signal terminal VGx have the same amplitude because they share the voltage signal output circuit 1, and the frequency of the input signals is the frequency of the pulse width modulation signal PWM. In this embodiment, the function of the first voltage follower circuit 5 is to isolate the input terminals of the four first amplifier circuits 2 (i.e., the first amplifier sub-circuit 201, the second amplifier sub-circuit 202, the third amplifier sub-circuit 203, and the fourth amplifier sub-circuit 204) to avoid interference. Specifically, the first voltage follower circuit 5 includes a first sub-voltage follower circuit 501, a second sub-voltage follower circuit 502, a third sub-voltage follower circuit 503, and a fourth sub-voltage follower circuit 504. The output terminal of the first sub-voltage follower circuit 501 is electrically connected to the input terminal of the first amplifier sub-circuit 201, the output terminal of the second sub-voltage follower circuit 502 is electrically connected to the input terminal of the second amplifier sub-circuit 202, the output terminal of the third sub-voltage follower circuit 503 is electrically connected to the input terminal of the third amplifier sub-circuit 203, and the output terminal of the fourth sub-voltage follower circuit 504 is electrically connected to the input terminal of the fourth amplifier sub-circuit 204. This achieves the isolation of the input terminals of the first amplifier sub-circuit 201, the second amplifier sub-circuit 202, the third amplifier sub-circuit 203, and the fourth amplifier sub-circuit 204, thus avoiding mutual interference.

[0072] In some alternative embodiments, refer to Figure 11 , Figure 11This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. The voltage processing module 400 includes a first circuit 6 and a third voltage follower circuit 7. The first circuit 6 includes a tenth resistor R010, an eleventh resistor R011, a third amplifier F3, a second variable resistor VR2, and a third capacitor C3. One end of the eleventh resistor R011 is electrically connected to the first digital-to-analog converter port DAC1 of the controller 300, and the other end of the eleventh resistor R011 is electrically connected to the first input terminal of the third amplifier F3. One end of the tenth resistor R010 is grounded, and the other end of the tenth resistor R010 is connected to the third amplifier F3. The second input terminal of the amplifier F3, the first plate of the third capacitor C3, and one end of the second variable resistor VR2 are electrically connected; the other end of the third amplifier F3 is electrically connected to the first input terminal of the third voltage follower circuit 7; the other end of the second variable resistor VR2 is electrically connected to the first input terminal of the third voltage follower circuit 7; the second plate of the third capacitor C3 is electrically connected to the first input terminal of the third voltage follower circuit 7; the second input terminal of the third voltage follower circuit 7 is electrically connected to the output terminal of the third voltage follower circuit 7; the output terminal of the third voltage follower circuit 7 is electrically connected to the detection unit 100, and outputs a variable voltage to the detection unit 100.

[0073] It is understandable that when the controller 300 chip has a digital-to-analog converter, it can use a digital-to-analog conversion signal instead of a pulse width modulation (PWM) signal. The input of the digital-to-analog conversion signal is a binary data stream from the digital subsystem, and its output discrete value can be approximated as an analog signal. In this embodiment, the frequency of the analog signal at the first digital-to-analog converter port DAC1 (i.e., the DAC pin) of the controller 300 is adjustable.

[0074] Optionally, the purpose of the third voltage follower circuit 7 is to prevent the signal input to the variable voltage signal terminal VGx from interfering with other circuits, such as... Figure 2 The voltage signals input to the first voltage signal terminal VG1, the second voltage signal terminal VG2, and the third voltage signal terminal VG3 in the detection unit 100 can cause interference, which can be isolated by the third voltage follower circuit 7. The third voltage follower circuit 7 also contains an amplifier, which will not be described in detail here. The output terminal of the third voltage follower circuit 7 can be electrically connected to any voltage signal terminal in the detection unit 100; no specific limitation is made here. Figure 11 The diagram only illustrates the connection between the output of the third voltage follower circuit 7 and the variable voltage signal terminal VGx.

[0075] The eleventh resistor R011 here serves as a protection circuit. If the signal output from the first digital-to-analog converter port DAC1 is too large, it will damage the amplifier. Therefore, the eleventh resistor R011 is used for voltage division protection. Furthermore, according to the working principle of the amplifier circuit, if the amplification factor is m, then... Of course, the resistance of the tenth resistor R010 remains constant. The amplification factor is related to the resistance value of the second variable resistor VR2. If the resistance value of the second variable resistor VR2 increases, the amplification factor m increases; if the resistance value of the second variable resistor VR2 decreases, the amplification factor m decreases. In this embodiment, the amplitude of the voltage signal input to the detection unit 100 can be adjusted by adjusting the resistance value of the second variable resistor VR2. Of course, since the frequency of the signal input to the first digital-to-analog converter port DAC1 is adjustable, both the amplitude and frequency of the voltage signal input to the detection unit 100 can be adjusted.

[0076] In some alternative embodiments, reference continues to be made to... Figure 2 as well as Figure 11 The detection unit 100 includes a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4 that are electrically connected to each other. It also includes a first voltage signal terminal VG1, a second voltage signal terminal VG2, a third voltage signal terminal VG3, and a variable voltage signal terminal VGx. The first voltage signal terminal VG1 is connected to the gate of the first transistor T1, the second voltage signal terminal VG2 is connected to the gate of the second transistor T2, the third voltage signal terminal VG3 is connected to the gate of the third transistor T3, and the variable voltage signal terminal VGx is connected to the gate of the fourth transistor T4. An ion-sensitive membrane covers the gate channel of the fourth transistor T4. The source of the first transistor T1 and the source of the second transistor T2 are connected... The first power supply terminal VDD is connected, the drain of the first transistor T1 and the source of the third transistor T3 are connected to the first output terminal IN+, and the drain of the second transistor T2 and the source of the fourth transistor T4 are connected to the second output terminal IN-. The drains of the third transistor T3 and the fourth transistor T4 are connected to the second power supply terminal GND. The detection device is placed in the solution to be detected, and the potential of the variable voltage signal terminal VGx is adjusted so that the potential difference between the first output terminal IN+ and the second output terminal IN- is 0 or a fixed value. When the potential difference between the first potential output terminal and the second potential output terminal is 0 or a fixed value, the concentration of the solution to be detected is calculated based on the potential of the variable voltage signal terminal VGx after adjustment.

[0077] The output of the third voltage follower circuit 7 is electrically connected to the variable voltage signal terminal VGx.

[0078] The structure and detection principle of the corresponding detection unit 100 will not be described in detail here.

[0079] In this embodiment, the output terminal of the third voltage follower circuit 7 is electrically connected to the variable voltage signal terminal VGx. According to the working principle of the amplifier circuit, if the amplification factor is m, then... Of course, the resistance of the tenth resistor R010 remains constant. The amplification factor is related to the resistance value of the second variable resistor VR2. If the resistance value of the second variable resistor VR2 increases, the amplification factor m increases; if the resistance value of the second variable resistor VR2 decreases, the amplification factor m decreases. In this embodiment, the amplitude of the voltage signal input to the variable voltage signal terminal VGx can be adjusted by adjusting the resistance value of the second variable resistor VR2. Of course, since the frequency of the signal input to the first digital-to-analog converter port DAC1 is adjustable, both the amplitude and frequency of the voltage signal input to the variable voltage signal terminal VGx can be adjusted.

[0080] In some alternative embodiments, reference continues to be made to... Figure 2 and reference Figure 12 , Figure 12 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. The voltage processing module further includes a second circuit 8, which includes a twelfth resistor R012, a thirteenth resistor R013, a third variable resistor VR3, a fourth capacitor C4, a fourth amplifier F4, a fourth voltage follower circuit 9, a fifth voltage follower circuit 10, and a sixth voltage follower circuit 11. One end of the thirteenth resistor R013 is electrically connected to the second digital-to-analog converter port DAC2 of the controller 300, and the other end of the thirteenth resistor R013 is electrically connected to the first input terminal of the fourth amplifier F4. One end of the twelfth resistor R012 is grounded, and the other end of the twelfth resistor R012 is electrically connected to the second input terminal of the fourth amplifier F4, one end of the third variable resistor VR3, and the first plate of the fourth capacitor C4, respectively. The output terminal of the fourth amplifier F4 is connected to the first input terminal of the fourth voltage follower circuit 9, the first input terminal of the fifth voltage follower circuit 10, and the first plate of the sixth voltage follower circuit 11, respectively. The input terminals are electrically connected; the other end of the third variable resistor VR3 is electrically connected to the first input terminal of the fourth voltage follower circuit 9, the first input terminal of the fifth voltage follower circuit 10, and the first input terminal of the sixth voltage follower circuit 11, respectively; the second plate of the fourth capacitor C4 is electrically connected to the first input terminal of the fourth voltage follower circuit 9, the first input terminal of the fifth voltage follower circuit 10, and the first input terminal of the sixth voltage follower circuit 11, respectively; the second input terminal of the fourth voltage follower circuit 9 is electrically connected to the output terminal of the fourth voltage follower circuit 9, and the output terminal of the fourth voltage follower circuit 9 is electrically connected to the first voltage signal terminal VG1; the second input terminal of the fifth voltage follower circuit 10 is electrically connected to the output terminal of the fifth voltage follower circuit 10, and the output terminal of the fifth voltage follower circuit 10 is electrically connected to the second voltage signal terminal VG2; the second input terminal of the sixth voltage follower circuit 11 is electrically connected to the output terminal of the sixth voltage follower circuit 11, and the output terminal of the sixth voltage follower circuit 11 is electrically connected to the third voltage signal terminal VG3.

[0081] Specifically, the voltage processing module 400 in this embodiment includes a first circuit 6 and a second circuit 8. The first circuit 6 provides a variable voltage with adjustable amplitude and frequency to the variable voltage signal terminal VGx, and the second circuit 8 provides a variable voltage with adjustable amplitude and frequency to the first voltage signal terminal VG1, the second voltage signal terminal VG2, and the third voltage signal terminal VG3.

[0082] In this embodiment, the thirteenth resistor R013 is used to protect the second circuit 8 from damage when the analog signal input to the second digital-to-analog converter port DAC2 is too large.

[0083] It is understandable that the amplitude of the voltage signal input to the variable voltage signal terminal VGx can also be adjusted by adjusting the resistance value of the second variable resistor VR2. Of course, since the frequency of the signal input to the first digital-to-analog converter port DAC1 is adjustable, both the amplitude and frequency of the voltage signal input to the variable voltage signal terminal VGx can be adjusted.

[0084] The voltage input to port DAC2 of the second digital-to-analog converter is a frequency-adjustable analog signal, so the signal after amplification is also a frequency-adjustable signal. According to the working principle of the amplifier circuit, if the amplification factor of the second circuit 8 is k, then... Of course, the resistance of the twelfth resistor R012 remains constant. The amplification factor is related to the resistance value of the third variable resistor VR3. If the resistance value of the third variable resistor VR3 increases, the amplification factor k of the second circuit 8 increases; if the resistance value of the third variable resistor VR3 decreases, the amplification factor k of the second circuit 8 decreases. In this embodiment, the amplitude of the voltage signals input to the first voltage signal terminal VG1, the second voltage signal terminal VG2, and the third voltage signal terminal VG3 can be adjusted by adjusting the resistance value of the third variable resistor VR3. Of course, since the frequency of the signal input to the second digital-to-analog converter port DAC2 is adjustable, the amplitude and frequency of the voltage signals input to the first voltage signal terminal VG1, the second voltage signal terminal VG2, and the third voltage signal terminal VG3 can all be adjusted.

[0085] Of course, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 in the second circuit 8 all have amplifiers. The function of the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 is to isolate the first voltage signal terminal VG1, the second voltage signal terminal VG2, and the third voltage signal terminal VG3 to prevent the voltage signals transmitted to the first voltage signal terminal VG1, the second voltage signal terminal VG2, and the third voltage signal terminal VG3 from interfering with each other.

[0086] It should be noted that the frequencies and amplitudes of the analog signals output from the first digital-to-analog converter port DAC1 and the second digital-to-analog converter port DAC2 connected to the first circuit 6 can be the same or different. When the frequencies of the analog signals output from the first digital-to-analog converter port DAC1 and the second digital-to-analog converter port DAC2 are the same, then the frequencies of the voltage signals output from the third voltage follower circuit 7, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 will also be the same. At the same time, if the resistance values ​​of the second variable resistor VR2 and the third variable resistor VR3 are also equal, then the amplitudes of the voltage signals output from the third voltage follower circuit 7, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 will also be the same.

[0087] Of course, when the frequencies of the analog signals output from the first digital-to-analog converter port DAC1 and the second digital-to-analog converter port DAC2 are different, the frequency of the voltage signal output from the third voltage follower circuit 7 will also be different from the frequency of the voltage signals output from the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11. When the amplitudes of the analog signals output from the first digital-to-analog converter port DAC1 and the second digital-to-analog converter port DAC2 are different, and if the resistance values ​​of the second variable resistor VR2 and the third variable resistor VR3 are also unequal, the amplitudes of the voltage signals output from the third voltage follower circuit 7, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 may be equal or unequal.

[0088] In some alternative embodiments, reference continues to be made to... Figure 12 The signal output from the first digital-to-analog converter port DAC1 is the same as the signal output from the second digital-to-analog converter port DAC2.

[0089] In this embodiment, the signal output from the first digital-to-analog converter port DAC1 being the same as the signal output from the second digital-to-analog converter port DAC2 means that the frequency and amplitude of the signals output from the first digital-to-analog converter port DAC1 and the second digital-to-analog converter port DAC2 are the same. When the frequencies of the analog signals output from the first digital-to-analog converter port DAC1 and the second digital-to-analog converter port DAC2 are the same, then the frequencies of the voltage signals output from the third voltage follower circuit 7, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 are the same. At the same time, if the resistance values ​​of the second variable resistor VR2 and the third variable resistor VR3 are also equal, then the amplitudes of the voltage signals output from the third voltage follower circuit 7, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 are also the same. If the resistance values ​​of the second variable resistor VR2 and the third variable resistor VR3 are not equal, then the amplitudes of the voltage signals output from the third voltage follower circuit 7, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 are also different.

[0090] In some alternative embodiments, refer to Figure 13 , Figure 13 This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention, wherein the first digital-to-analog converter port DAC1 is multiplexed as the second digital-to-analog converter port DAC2.

[0091] from Figure 13 As can be seen, the first digital-to-analog converter port DAC1 and the second digital-to-analog converter port DAC2 are the same port. This means that the analog signal input by the controller 300 to the first circuit 6 and the second circuit 8 is the same signal. Thus, the voltage signals output by the third voltage follower circuit 7, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 have the same frequency. By adjusting the resistance values ​​of the second variable resistor VR2 and the third variable resistor VR3, the amplitude of the voltage signals transmitted to the first voltage signal terminal VG1, the second voltage signal terminal VG2, the third voltage signal terminal VG3, and the variable voltage signal terminal VGx can be made the same or different.

[0092] In some alternative embodiments, refer to Figure 14 , Figure 14This is a schematic diagram of the circuit connection structure of another voltage processing module provided by the present invention. The voltage processing module 400 further includes a second amplification circuit 12, which includes a fifth amplification sub-circuit 1201, a sixth amplification sub-circuit 1202, a seventh amplification sub-circuit 1203, and an eighth amplification sub-circuit 1204 in parallel. The input terminal of the fifth amplification sub-circuit 1201 is electrically connected to the output terminal of the fourth voltage follower circuit 9, and the output terminal of the fifth amplification sub-circuit 1201 is electrically connected to the first voltage signal terminal VG1; the sixth amplification sub-circuit 1203... The input terminal of 202 is electrically connected to the output terminal of the fifth voltage follower circuit 10, and the output terminal of the sixth amplification sub-circuit 1202 is electrically connected to the second voltage signal terminal VG2; the input terminal of the seventh amplification sub-circuit 1203 is electrically connected to the output terminal of the sixth voltage follower circuit 11, and the output terminal of the seventh amplification sub-circuit 1203 is electrically connected to the third voltage signal terminal VG3; the input terminal of the eighth amplification sub-circuit 1204 is electrically connected to the output terminal of the third voltage follower circuit 7, and the output terminal of the eighth amplification sub-circuit 1204 is electrically connected to the variable voltage signal terminal VGx.

[0093] Figure 14 The second circuit 8 is not shown. The third voltage follower circuit 7, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 are electrically connected to the first circuit 6. The function of the third voltage follower circuit 7, the fourth voltage follower circuit 9, the fifth voltage follower circuit 10, and the sixth voltage follower circuit 11 is to isolate the parallel fifth amplification sub-circuit 1201, the sixth amplification sub-circuit 1202, the seventh amplification sub-circuit 1203, and the eighth amplification sub-circuit 1204. The amplification factors of the fifth amplification sub-circuit 1201, the sixth amplification sub-circuit 1202, the seventh amplification sub-circuit 1203, and the eighth amplification sub-circuit 1204 can be the same or different.

[0094] It is understood that in this embodiment, the voltage processing module 400 amplifies the analog signal output from the first digital-to-analog converter port DAC1 twice: the first amplification is performed in the first circuit 6, and then the second amplification is performed in the fifth amplification sub-circuit 1201 before being input to the first voltage signal terminal VG1; the analog signal output from the first digital-to-analog converter port DAC1 is amplified twice: the first amplification is performed in the first circuit 6, and then the second amplification is performed in the sixth amplification sub-circuit 1202 before being input to the second voltage signal terminal VG2; the analog signal output from the first digital-to-analog converter port DAC1 is amplified twice: the first amplification is performed in the first circuit 6, and then the second amplification is performed in the seventh amplification sub-circuit 1203 before being input to the third voltage signal terminal VG3; the analog signal output from the first digital-to-analog converter port DAC1 is amplified twice: the first amplification is performed in the first circuit 6, and then the second amplification is performed in the eighth amplification sub-circuit 1204 before being input to the variable voltage signal terminal VGx. This enables the detection unit 100 to provide four adjustable voltage signals.

[0095] In some alternative embodiments, reference continues to be made to... Figure 14 The fifth amplification sub-circuit 1201, the sixth amplification sub-circuit 1202, the seventh amplification sub-circuit 1203 and the eighth amplification sub-circuit 1204 all include a fourth variable resistor VR4, and the second variable resistor VR2 and the fourth variable resistor VR4 are digital potentiometers.

[0096] The amplification principle of the first circuit 6 will not be elaborated here. The amplification principles of the fifth amplification sub-circuit 1201, the sixth amplification sub-circuit 1202, the seventh amplification sub-circuit 1203, and the eighth amplification sub-circuit 1204 are similar. Figure 6 and Figure 7 The working principle of the first amplifier circuit 2 is the same. In this embodiment, the amplification factor of the first circuit 6 is adjusted by adjusting the resistance value of the second variable resistor VR2, and the amplification factor of the fifth amplifier sub-circuit 1201, the sixth amplifier sub-circuit 1202, the seventh amplifier sub-circuit 1203, and the eighth amplifier sub-circuit 1204 is changed by adjusting the resistance value of the fourth variable resistor VR4 in the fifth amplifier sub-circuit 1201, the sixth amplifier sub-circuit 1202, the seventh amplifier sub-circuit 1203, and the eighth amplifier sub-circuit 1204. Of course, the amplification factors of the fifth amplifier sub-circuit 1201, the sixth amplifier sub-circuit 1202, the seventh amplifier sub-circuit 1203, and the eighth amplifier sub-circuit 1204 can be the same or different. If the resistance value of the fourth variable resistor VR4 in the fifth amplifier sub-circuit 1201, the sixth amplifier sub-circuit 1202, the seventh amplifier sub-circuit 1203, and the eighth amplifier sub-circuit 1204 is not equal, then the amplification factors are not equal.

[0097] In this embodiment, the voltage processing module 400 amplifies the analog signal output from the first digital-to-analog converter port DAC1 twice. The first amplification is performed by adjusting the second variable resistor VR2 in the first circuit 6, and the second amplification is performed by adjusting the fourth variable resistor VR4 in the fifth amplification sub-circuit 1201 before being input to the first voltage signal terminal VG1. Similarly, the analog signal output from the first digital-to-analog converter port DAC1 is amplified twice: the first amplification is performed by adjusting the second variable resistor VR2 in the first circuit 6, and the second amplification is performed by adjusting the fourth variable resistor VR4 in the sixth amplification sub-circuit 1202 before being input to the second voltage signal terminal VG2. The analog signal output from the analog-to-digital converter port DAC1 is amplified twice. First, the second variable resistor VR2 is adjusted in the first circuit 6 for the first amplification, and then the fourth variable resistor VR4 is adjusted in the seventh amplification sub-circuit 1203 for the second amplification before being input to the third voltage signal terminal VG3. Similarly, the analog signal output from the first digital-to-analog converter port DAC1 is amplified twice. First, the second variable resistor VR2 is adjusted in the first circuit 6 for the first amplification, and then the fourth variable resistor VR4 is adjusted in the eighth amplification sub-circuit 1204 for the second amplification before being input to the variable voltage signal terminal VGx. This enables the detection unit 100 to provide four adjustable voltage signals.

[0098] Optionally, the second variable resistor VR2 and the fourth variable resistor VR4 are digital potentiometers. A digital potentiometer is a digitally controlled resistor that can change the impedance between the terminals and the cursor according to the code loaded in the RDAC register. Digital potentiometers avoid the problems faced by mechanical potentiometers, such as physical size, wear, and sensitivity to vibration, temperature, and humidity. In this embodiment, the second variable resistor VR2 and the fourth variable resistor VR4 can be uniformly adjusted via the controller 300 using digital potentiometers, resulting in more precise amplification.

[0099] In some alternative embodiments, refer to Figure 15 , Figure 15 This is a schematic diagram of the circuit connection structure of another detection circuit provided by the present invention. The detection circuit 000 also includes a differential amplifier circuit 13, which is electrically connected to the detection unit 100 and the signal acquisition module 200 respectively. It is used to differentially amplify the output voltage of the first output terminal IN+ and the second output terminal and send it to the signal acquisition module 200.

[0100] Optionally, the voltage processing module 400 in the detection circuit 000 can be any of the voltage processing modules 400 in the above embodiments, which will not be described in detail here.

[0101] In this embodiment, the output voltages of the first output terminal IN+ and the second output terminal of the detection unit 100 are differentially amplified, and the amplified output voltages are then sent to the signal acquisition module 200 to reduce interference and improve detection accuracy.

[0102] In some alternative embodiments, reference continues to be made to... Figure 15 and reference Figure 16 , Figure 16 This is a schematic diagram of the circuit connection structure of a differential amplifier circuit provided by the present invention. The differential amplifier circuit 13 includes: a fifth amplifier F5, the first input terminal of the fifth amplifier F5 being electrically connected to the first output terminal IN+; a fourteenth resistor R014, one end of the fourteenth resistor R014 being electrically connected to the second input terminal of the fifth amplifier F5; a fifteenth resistor R015, one end of the fifteenth resistor R015 being electrically connected to the second input terminal of the fifth amplifier F5, and the other end of the fifteenth resistor R015 being electrically connected to the output terminal of the fifth amplifier F5; a sixth amplifier F6, the first input terminal of the sixth amplifier F6 being electrically connected to the second output terminal IN-, and the second input terminal of the sixth amplifier F6 being electrically connected to the second terminal of the fourteenth resistor R014; and a sixteenth resistor R016, the first terminal of the sixteenth resistor R016 being electrically connected to the second input terminal of the sixth amplifier F6, and the second terminal of the sixteenth resistor R016 being electrically connected to the output terminal of the sixth amplifier F6. The seventeenth resistor R017 has one end electrically connected to the output of the fifth amplifier F5; the eighteenth resistor R018 has one end electrically connected to the output of the sixth amplifier F6; the nineteenth resistor R019 has one end grounded and the second end electrically connected to the second end of the seventeenth resistor R017; the twentieth resistor R020 has one end electrically connected to the second end of the eighteenth resistor R018; the seventh amplifier F7 has its first input terminal electrically connected to the second end of the nineteenth resistor R019, its second input terminal electrically connected to the second end of the eighteenth resistor R018 and the first end of the twentieth resistor R020, and its output terminal electrically connected to the second end of the twentieth resistor R020; the output terminal of the seventh amplifier F7 is also electrically connected to the signal acquisition module 200.

[0103] The signals from the first output terminal IN+ and the second output terminal IN- are simultaneously input into the differential amplifier circuit 13. This differential amplifier circuit 13 amplifies the signals from the first output terminal IN+ and the second output terminal IN- twice, through a first-stage amplification and a second-stage amplification. After two amplifications, the signals are output to the signal acquisition module 200 via the output terminal Vol of the seventh amplifier F7. Figure 16 When R014 = R015 = R, the first-stage magnification Av1 is: Figure 16When R017 = R018 = R019 = R020, the second-stage amplification factor Av2 is 1; the amplification factor Av of the entire circuit is Av1 × Av2, which is... Of course, the amplification factor here can vary depending on the resistance values ​​of the fourteenth resistor R014, the fifteenth resistor R015, the sixteenth resistor R016, the seventeenth resistor R017, the eighteenth resistor R018, the nineteenth resistor R019, and the twentieth resistor R020. This will not be elaborated upon here.

[0104] In this embodiment, the output voltages of the first output terminal IN+ and the second output terminal of the detection unit 100 are differentially amplified by the differential amplifier circuit 13. The amplified output voltages are then sent to the signal acquisition module 200 to reduce interference and improve detection accuracy.

[0105] In some alternative embodiments, refer to Figure 17 , Figure 17 This is a schematic diagram of the circuit connection structure of another detection circuit provided by the present invention. The detection circuit 000 also includes a second filter circuit 14. One end of the second filter circuit 14 is electrically connected to the output end of the differential amplifier circuit 13, and the other end of the second filter circuit 14 is electrically connected to the signal acquisition module 200, which is used to filter the voltage amplified by the differential amplifier circuit 13.

[0106] Specifically, the voltage processing module 400 can be any of the voltage processing modules 400 described above, and the differential amplifier circuit 13 can also be the differential amplifier circuit 13 described above, which will not be elaborated here. The second filter circuit 14 is electrically connected to the differential amplifier circuit 13 and the signal acquisition module 200 respectively, and is used to filter the voltage amplified by the differential amplifier circuit 13.

[0107] In this embodiment, a second filter circuit 14 is added before the signal acquisition module 200, which can better filter out noise, improve the accuracy of signal acquisition, and reduce the burden of subsequent data processing, thereby shortening the detection time.

[0108] In some alternative embodiments, reference continues to be made to... Figure 17 and reference Figure 18 , Figure 18 This is a schematic diagram of the circuit connection structure of a second filter circuit provided by the present invention. Figure 18The second filter circuit 14 includes: a twenty-first resistor R021, the first end of which is connected to the output terminal of the differential amplifier circuit 13; a fifth capacitor C5, the first plate of which is grounded, and the second plate of which is electrically connected to the second end of the twenty-first resistor R021; a twenty-second resistor R022, the first end of which is electrically connected to the second end of the twenty-first resistor R021; a sixth capacitor C6, the first plate of which is grounded, and the second plate of which is electrically connected to the second end of the twenty-second resistor R022; a twenty-third resistor R023, the first end of which is electrically connected to the second end of the twenty-second resistor R022 and the second plate of the sixth capacitor C6; a twenty-fourth resistor R024, the first end of which is grounded; and an eighth amplifier... Amplifier F8: The first input terminal of the eighth amplifier F8 is electrically connected to the second terminal of the twenty-fourth resistor R024, and the second input terminal of the eighth amplifier F8 is electrically connected to the second terminal of the twenty-third resistor R023. The output terminal of the eighth amplifier F8 is electrically connected to the input terminal of the signal acquisition module 200. Resistor R025: The first terminal of resistor R025 is electrically connected to the second terminal of resistor R022, the second plate of capacitor C6, and the first terminal of resistor R023. The second terminal of resistor R025 is electrically connected to the output terminal of amplifier F8. Capacitor C7: The first plate of capacitor C7 is electrically connected to the second terminal of resistor R023 and the second input terminal of amplifier F8. The second plate of capacitor C7 is electrically connected to the output terminal of amplifier F8.

[0109] Understandable, Figure 18 This is just one example of a filter circuit; of course, other circuits can also be used, as long as they can achieve filtering.

[0110] The second filter circuit 14 in this embodiment can filter out noise of a certain frequency.

[0111] In some alternative embodiments, reference continues to be made to... Figure 18 The resistance values ​​of resistors R021 (21st), R022 (22nd), R023 (23rd), and R025 (25th) are all equal to R. The capacitance values ​​of capacitors C5 (5th), C6 (6th), and C7 (7th) are all equal to C. The cutoff frequency of the second filter circuit 14 is fc.

[0112] It is understandable that the aforementioned second filter circuit 14 can filter out noise of a certain frequency, with a cutoff frequency of fc. When the signal frequency is lower than this cutoff frequency fc, the signal can pass through; when the signal frequency is higher than this cutoff frequency fc, the signal output will be significantly attenuated. This cutoff frequency fc is defined as the boundary between the passband and the stopband. In this embodiment, the cutoff frequency is related to the resistance values ​​of the twenty-first resistor R021, the twenty-second resistor R022, the twenty-third resistor R023, and the twenty-fifth resistor R025, as well as the capacitance values ​​of the fifth capacitor C5, the sixth capacitor C6, and the seventh capacitor C7. When the resistance values ​​of the twenty-first resistor R021, the twenty-second resistor R022, the twenty-third resistor R023, and the twenty-fifth resistor R025 are all equal, and the capacitance values ​​of the fifth capacitor C5, the sixth capacitor C6, and the seventh capacitor C7 are all equal, ... In other words, any frequency greater than the frequency of fc can be filtered out, and only frequencies less than the frequency of fc can pass through.

[0113] In some alternative embodiments, reference continues to be made to... Figure 18 The resistance of the twenty-first resistor R021 is R1, the resistance of the twenty-second resistor R022 is R2, the resistance of the twenty-fifth resistor R025 is R5, and the passband voltage gain of the second filter circuit 14 is Av.

[0114] In this embodiment, the second filter circuit 14 also has an inverting amplification function. The passband voltage gain refers to the factor by which the amplitude of a signal within the allowed frequency band increases when it passes through the second filter circuit 14. If the passband voltage gain is 1, the amplitude of the transmitted signal increases by a factor of 1. In this embodiment, the passband voltage gain is related to the resistance values ​​of the twenty-first resistor R021, the twenty-second resistor R022, and the twenty-fifth resistor R025. Specifically...

[0115] As can be seen from the above embodiments, the detection circuit provided by the present invention achieves at least the following beneficial effects:

[0116] The detection circuit of this invention includes a detection unit, a signal acquisition module, a controller, and a voltage processing module. When detecting the ion concentration of a liquid, the output voltages of the first and second output terminals of the detection unit are different. The signal acquisition module acquires the voltages of the first and second output terminals. The controller controls the voltage processing module to provide a variable voltage with adjustable frequency and amplitude to the detection unit, so that the output voltages of the first and second output terminals are the same. The ion concentration is calculated based on the amplitude of the variable voltage. This makes the detection unit unaffected by environmental factors and fluctuations in its own characteristics during detection, eliminating or reducing detection errors. This detection circuit is accurate and reliable, improving detection precision. In this invention, the detection circuit is designed with multiple voltage outputs, and both the frequency and amplitude are adjustable, making it versatile and suitable for detecting any ion concentration. The gate voltage of the detection unit is controllable, and the output signal is monitored in real time, achieving fully automatic and rapid detection.

[0117] While specific embodiments of the invention have been described in detail by way of examples, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A detection circuit, characterized by, The application relates to a liquid ion concentration detection device, which comprises a signal acquisition module, a controller, a voltage processing module and a detection unit, wherein, a detection unit is arranged for detecting the liquid ion concentration, the detection unit comprises a first output end and a second output end, and the output voltages of the first output end and the second output end are different when the liquid ion concentration is detected; the signal acquisition module is electrically connected with the detection unit and is arranged for acquiring the output voltages of the first output end and the second output end; the controller is electrically connected with the signal acquisition module and the voltage processing module respectively, the controller controls the voltage processing module to provide a variable voltage with adjustable frequency and amplitude to the detection unit according to the output voltages of the first output end and the second output end, so that the output voltages of the first output end and the second output end are the same, and the ion concentration is obtained according to the amplitude of the variable voltage; the voltage processing module comprises a voltage signal output circuit, a first amplification circuit and a first filter circuit, wherein, the input end of the voltage signal output circuit is electrically connected with the controller, the controller inputs a pulse width modulation signal to the input end of the voltage signal output circuit, the output end of the voltage signal output circuit outputs a first voltage or a second voltage and sends the first voltage or the second voltage to the first amplification circuit, the first amplification circuit amplifies the first voltage or the second voltage and sends the first voltage or the second voltage to the first filter circuit, and the first filter circuit filters high-frequency signals in the first voltage or the second voltage to obtain the variable voltage; wherein the voltage signal output circuit comprises a first voltage input end, a second voltage input end, a first resistor and a second resistor, further comprises a single-pole double-throw switch and an enable control circuit, wherein, one end of the first resistor is electrically connected with the first voltage input end, and the other end of the first resistor is electrically connected with the single-pole double-throw switch; one end of the second resistor is electrically connected with the second voltage input end, and the other end of the second resistor is electrically connected with the single-pole double-throw switch; the input end of the enable control circuit is electrically connected with the controller, the input end of the enable control circuit inputs a pulse width modulation signal, the output end of the enable control circuit is electrically connected with the enable end of the single-pole double-throw switch, and when the pulse width modulation signal is high level, the single-pole double-throw switch is controlled to be conductive with the first resistor, and when the pulse width modulation signal is low level, the single-pole double-throw switch is controlled to be conductive with the second resistor.

2. The detection circuit of claim 1, wherein, the enable control circuit comprises a sixth resistor, a seventh resistor, an eighth resistor and a first triode, wherein, one end of the sixth resistor is electrically connected with the input end of the enable control circuit, and the other end of the sixth resistor is electrically connected with one end of the seventh resistor and the gate of the first triode respectively; the other end of the seventh resistor is grounded; one end of the eighth resistor is electrically connected with a high potential signal end, and the other end of the eighth resistor is electrically connected with the first electrode of the first triode; the first triode is an NPN type triode, the first electrode of the first triode is also electrically connected with the enable end of the single-pole double-throw switch, and the second electrode of the first triode is grounded.

3. The detection circuit of claim 1, wherein, The first amplification circuit comprises a third resistor, a fourth resistor, a fifth resistor, a first amplifier, a first variable resistor and a first capacitor, wherein, One end of the third resistor is grounded, and the other end of the third resistor is electrically connected with one end of the first variable resistor, one pole plate of the first capacitor and a first input end of the first amplifier respectively; One end of the fourth resistor is electrically connected with the output end of the single-pole double-throw switch, and the other end of the fourth resistor is electrically connected with a second input end of the first amplifier and one end of the fifth resistor respectively; The other end of the fifth resistor is grounded; The other end of the first variable resistor, the other pole plate of the first capacitor and the output end of the first amplifier are electrically connected with the first filter circuit.

4. The detection circuit of claim 1, wherein, The first filter circuit comprises a ninth resistor and a second capacitor, wherein, One end of the ninth resistor is electrically connected with the output end of the first amplification circuit, and the other end of the ninth resistor is electrically connected with the input end of the detection unit; The first pole plate of the second capacitor is electrically connected with the input end of the detection unit, and the second pole plate of the second capacitor is grounded.

5. The detection circuit of claim 1, wherein, The detection unit comprises a first transistor, a second transistor, a third transistor and a fourth transistor which are electrically connected with each other, and further comprises a first voltage signal end, a second voltage signal end, a third voltage signal end and a variable voltage signal end; the first voltage signal end is connected with the gate of the first transistor, the second voltage signal end is connected with the gate of the second transistor, the third voltage signal end is connected with the gate of the third transistor, and the variable voltage signal end is connected with the gate of the fourth transistor; an ion-sensitive membrane is covered above the gate channel of the fourth transistor; the source of the first transistor and the source of the second transistor are connected to a first power supply end, the drain of the first transistor and the source of the third transistor are connected to the first output end, and the drain of the second transistor and the source of the fourth transistor are connected to the second output end; the drain of the third transistor and the drain of the fourth transistor are connected to a second power supply end; the detection circuit is placed in a to-be-detected solution, the potential of the variable voltage signal end is adjusted so that the potential difference between the first output end and the second output end is 0 or a fixed value; when the potential difference between the first output end and the second output end is 0 or a fixed value, the concentration of the to-be-detected solution is calculated according to the potential of the variable voltage signal end after adjustment at this time; The first amplification circuit comprises a first amplification sub-circuit, a second amplification sub-circuit, a third amplification sub-circuit and a fourth amplification sub-circuit in parallel, and the first filter circuit comprises a first filter sub-circuit, a second filter sub-circuit, a third filter sub-circuit and a fourth filter sub-circuit in parallel, wherein, The input end of the first filter sub-circuit is electrically connected with the output end of the first amplification sub-circuit, and the output end of the first filter sub-circuit is electrically connected with the first voltage signal end; The input end of the first filter sub-circuit is electrically connected with the output end of the first amplification sub-circuit, and the output end of the first filter sub-circuit is electrically connected with the first voltage signal end; An input end of the second filter sub-circuit is electrically connected with an output end of the second amplification sub-circuit, and an output end of the second filter sub-circuit is electrically connected with the second voltage signal end; An input end of the third filter sub-circuit is electrically connected with an output end of the third amplification sub-circuit, and an output end of the third filter sub-circuit is electrically connected with the third voltage signal end; An input end of the fourth filter sub-circuit is electrically connected with an output end of the fourth amplification sub-circuit, and an output end of the fourth filter sub-circuit is electrically connected with the variable voltage signal end.

6. The detection circuit of claim 5, wherein, Further comprising a first voltage follower circuit, the first voltage follower circuit comprising a first sub-voltage follower circuit, a second sub-voltage follower circuit, a third sub-voltage follower circuit and a fourth sub-voltage follower circuit, wherein, The first sub-voltage follower circuit, the second sub-voltage follower circuit, the third sub-voltage follower circuit and the fourth sub-voltage follower circuit all comprise a second amplifier; First input ends of the first sub-voltage follower circuit, the second sub-voltage follower circuit, the third sub-voltage follower circuit and the fourth sub-voltage follower circuit are all electrically connected with an output end of the voltage signal output circuit; A second input end of the first sub-voltage follower circuit is electrically connected with an output end of the first sub-voltage follower circuit and the first amplification sub-circuit; A second input end of the second sub-voltage follower circuit is electrically connected with an output end of the second sub-voltage follower circuit and the second amplification sub-circuit; A second input end of the third sub-voltage follower circuit is electrically connected with an output end of the third sub-voltage follower circuit and the third amplification sub-circuit; A second input end of the fourth sub-voltage follower circuit is electrically connected with an output end of the fourth sub-voltage follower circuit and the fourth amplification sub-circuit.

7. A detection circuit, characterized by Comprise a signal acquisition module, a controller, a voltage processing module and a detection unit, wherein, The detection unit is used for detecting the ion concentration of the liquid, and the detection unit comprises a first output end and a second output end, and the output voltages of the first output end and the second output end are different when detecting the ion concentration of the liquid; The signal acquisition module is electrically connected with the detection unit and is used for acquiring the output voltages of the first output end and the second output end; The controller is electrically connected with the signal acquisition module and the voltage processing module respectively, and the controller controls the voltage processing module to provide a variable voltage with adjustable frequency and amplitude to the detection unit according to the output voltages of the first output end and the second output end, so that the output voltages of the first output end and the second output end are the same, and the ion concentration is obtained according to the amplitude of the variable voltage; The voltage processing module comprises a first circuit and a third voltage follower circuit, and the first circuit comprises a tenth resistor, an eleventh resistor, a third amplifier, a second variable resistor and a third capacitor, wherein, One end of the eleventh resistor is electrically connected with a first digital-to-analog converter port of the controller, and the other end of the eleventh resistor is electrically connected with a first input end of the third amplifier; One end of the tenth resistor is grounded, and the other end of the tenth resistor is electrically connected with the second input end of the third amplifier, the first plate of the third capacitor, and one end of the second variable resistor, respectively; The output end of the third amplifier is electrically connected with the first input end of the third voltage follower circuit; The other end of the second variable resistor is electrically connected with the first input end of the third voltage follower circuit; The second plate of the third capacitor is electrically connected with the first input end of the third voltage follower circuit; The second input end of the third voltage follower circuit is electrically connected with the output end of the third voltage follower circuit, and the output end of the third voltage follower circuit is electrically connected with the detection unit, and the variable voltage is output to the detection unit.

8. The detection circuit according to claim 7, characterized in that, The detection unit comprises first, second, third and fourth transistors which are electrically connected with each other, and further comprises first, second and third voltage signal ends and a variable voltage signal end; the first voltage signal end is connected with the gate of the first transistor, the second voltage signal end is connected with the gate of the second transistor, the third voltage signal end is connected with the gate of the third transistor, and the variable voltage signal end is connected with the gate of the fourth transistor, and an ion-sensitive membrane is covered above the gate channel of the fourth transistor; the source of the first transistor and the source of the second transistor are connected to a first power supply end, the drain of the first transistor and the source of the third transistor are connected to the first output end, and the drain of the second transistor and the source of the fourth transistor are connected to the second output end; the drain of the third transistor and the drain of the fourth transistor are connected to a second power supply end; the detection circuit is placed in a solution to be detected, the potential of the variable voltage signal end is adjusted so that the potential difference between the first output end and the second output end is 0 or a fixed value; when the potential difference between the first output end and the second output end is 0 or a fixed value, the concentration of the solution to be detected is calculated according to the potential of the variable voltage signal end after the adjustment at this time; The output end of the third voltage follower circuit is electrically connected with the variable voltage signal end.

9. The detection circuit of claim 8, wherein, The voltage processing module further comprises a second circuit, a fourth voltage follower circuit, a fifth voltage follower circuit and a sixth voltage follower circuit, and the second circuit comprises a twelfth resistor, a thirteenth resistor, a third variable resistor, a fourth capacitor and a fourth amplifier, wherein, One end of the thirteenth resistor is electrically connected with the second digital-to-analog converter port of the controller, and the other end of the thirteenth resistor is electrically connected with the first input end of the fourth amplifier; One end of the twelfth resistor is grounded, and the other end of the twelfth resistor is electrically connected with the second input end of the fourth amplifier, one end of the third variable resistor, and the first plate of the fourth capacitor, respectively. An output end of the fourth amplifier is electrically connected with a first input end of the fourth voltage follower circuit, a first input end of the fifth voltage follower circuit and a first input end of the sixth voltage follower circuit respectively; The other end of the third variable resistor is electrically connected with the first input end of the fourth voltage follower circuit, the first input end of the fifth voltage follower circuit and the first input end of the sixth voltage follower circuit respectively; The second pole plate of the fourth capacitor is electrically connected with the first input end of the fourth voltage follower circuit, the first input end of the fifth voltage follower circuit and the first input end of the sixth voltage follower circuit respectively; The second input end of the fourth voltage follower circuit is electrically connected with an output end of the fourth voltage follower circuit, and the output end of the fourth voltage follower circuit is electrically connected with the first voltage signal end; The second input end of the fifth voltage follower circuit is electrically connected with an output end of the fifth voltage follower circuit, and the output end of the fifth voltage follower circuit is electrically connected with the second voltage signal end; The second input end of the sixth voltage follower circuit is electrically connected with an output end of the sixth voltage follower circuit, and the output end of the sixth voltage follower circuit is electrically connected with the third voltage signal end.

10. The detection circuit of claim 9, wherein, The signal output by the first digital-to-analog converter port is the same as the signal output by the second digital-to-analog converter port.

11. The detection circuit of claim 9, wherein, The first digital-to-analog converter port is multiplexed as the second digital-to-analog converter port.

12. The detection circuit of claim 11, wherein, The voltage processing module further comprises a second amplification circuit, the second amplification circuit comprises a fifth amplification sub-circuit, a sixth amplification sub-circuit, a seventh amplification sub-circuit and an eighth amplification sub-circuit in parallel, wherein, The input end of the fifth amplification sub-circuit is electrically connected with the output end of the fourth voltage follower circuit, and the output end of the fifth amplification sub-circuit is electrically connected with the first voltage signal end; The input end of the sixth amplification sub-circuit is electrically connected with the output end of the fifth voltage follower circuit, and the output end of the sixth amplification sub-circuit is electrically connected with the second voltage signal end; The input end of the seventh amplification sub-circuit is electrically connected with the output end of the sixth voltage follower circuit, and the output end of the seventh amplification sub-circuit is electrically connected with the third voltage signal end; The input end of the eighth amplification sub-circuit is electrically connected with the output end of the third voltage follower circuit, and the output end of the eighth amplification sub-circuit is electrically connected with the variable voltage signal end.

13. The detection circuit of claim 12, wherein, The fifth amplification sub-circuit, the sixth amplification sub-circuit, the seventh amplification sub-circuit and the eighth amplification sub-circuit all comprise a fourth variable resistor, and the second variable resistor and the fourth variable resistor are digital potentiometers.

14. The detection circuit of claim 1 or 7, wherein, Further comprising a differential amplification circuit, the differential amplification circuit is electrically connected with the detection unit and the signal acquisition module respectively, and is used for differentially amplifying the output voltages of the first output end and the second output end and sending to the signal acquisition module.

15. The detection circuit of claim 14, wherein, The differential amplification circuit comprises: A fifth amplifier, a first input end of the fifth amplifier is electrically connected with the first output end; A fourteenth resistor, one end of the fourteenth resistor is electrically connected with a second input end of the fifth amplifier; A fifteenth resistor, one end of the fifteenth resistor is electrically connected with the second input end of the fifth amplifier, and the other end of the fifteenth resistor is electrically connected with the output end of the fifth amplifier; A sixth amplifier, a first input end of the sixth amplifier is electrically connected with the second output end, and a second input end of the sixth amplifier is electrically connected with the second end of the fourteenth resistor; A sixteenth resistor, a first end of the sixteenth resistor is electrically connected with the second input end of the sixth amplifier, and a second end of the sixteenth resistor is electrically connected with the output end of the sixth amplifier; A seventeenth resistor, one end of the seventeenth resistor is electrically connected with the output end of the fifth amplifier; An eighteenth resistor, one end of the eighteenth resistor is electrically connected with the output end of the sixth amplifier; A nineteenth resistor, one end of the nineteenth resistor is grounded, and a second end of the nineteenth resistor is electrically connected with the second end of the seventeenth resistor; A twentieth resistor, a first end of the twentieth resistor is electrically connected with the second end of the eighteenth resistor; A seventh amplifier, a first input end of the seventh amplifier is electrically connected with the second end of the nineteenth resistor, a second input end of the seventh amplifier is electrically connected with the second end of the eighteenth resistor and the first end of the twentieth resistor respectively, and an output end of the seventh amplifier is electrically connected with the second end of the twentieth resistor; The output end of the seventh amplifier is also electrically connected with the signal acquisition module.

16. The detection circuit of claim 14, wherein, Further comprising a second filter circuit, one end of the second filter circuit is electrically connected with the output end of the differential amplification circuit, and the other end of the second filter circuit is electrically connected with the signal acquisition module, for filtering the voltage amplified by the differential amplification circuit.

17. The detection circuit of claim 16, wherein, The second filter circuit comprises: A twenty-first resistor, a first end of the twenty-first resistor is connected with the output end of the differential amplification circuit; A fifth capacitor, a first plate of the fifth capacitor is grounded, and a second plate of the fifth capacitor is electrically connected with a second end of the twenty-first resistor; A twenty-second resistor, a first end of the twenty-second resistor is electrically connected with the second end of the twenty-first resistor; A sixth capacitor, a first plate of the sixth capacitor is grounded, and a second plate of the sixth capacitor is electrically connected with the second end of the twenty-second resistor; A twenty-third resistor, a first end of the twenty-third resistor is electrically connected with the second end of the twenty-second resistor and the second plate of the sixth capacitor; A twenty-fourth resistor, a first end of the twenty-fourth resistor is grounded; An eighth amplifier, a first input end of the eighth amplifier is electrically connected with a second end of the twenty-fourth resistor, a second input end of the eighth amplifier is electrically connected with a second end of the twenty-third resistor, and an output end of the eighth amplifier is electrically connected with an input end of the signal acquisition module; A twenty-fifth resistor, a first end of the twenty-fifth resistor is electrically connected with the second end of the twenty-second resistor, the second plate of the sixth capacitor and the first end of the twenty-third resistor respectively, and a second end of the twenty-fifth resistor is electrically connected with the output end of the eighth amplifier; A seventh capacitor, a first plate of the seventh capacitor is electrically connected with the second end of the twenty-third resistor and the second input end of the eighth amplifier respectively, and a second plate of the seventh capacitor is electrically connected with the output end of the eighth amplifier.

18. The detection circuit of claim 17, wherein, The resistance values of the twenty-first resistor, the twenty-second resistor, the twenty-third resistor and the twenty-fifth resistor are all equal to R, the capacitance values of the fifth capacitor, the sixth capacitor and the seventh capacitor are all equal to C, and the cutoff frequency of the second filter circuit is fc, wherein, .

19. The detection circuit of claim 17, wherein, The resistance of the twenty-first resistor is R1, the resistance of the twenty-second resistor is R2, the resistance of the twenty-fifth resistor is R5, and the passband voltage gain of the second filter circuit is Av, wherein, .

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