A high-precision overlay compensation method

By using Zernike polynomial calculations and compensation formulas, high-precision wafer overlay compensation was achieved, solving the problem of low efficiency in existing technologies and improving overlay accuracy and production efficiency.

CN115407618BActive Publication Date: 2026-04-10NANJING CHENGXIN INTEGRATED CIRCUIT TECH RES INST CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NANJING CHENGXIN INTEGRATED CIRCUIT TECH RES INST CO LTD
Filing Date
2022-09-14
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Existing overlay compensation methods are inefficient, resulting in insufficient wafer overlay accuracy and failing to meet high-precision requirements.

Method used

Zernike polynomials are used to calculate the global overlay error of the wafer, and the field-by-field compensation model parameters are obtained. The actual wafer overlay compensation parameters are calculated by the compensation formula and compared to determine whether they are within the preset range. If they are within the range, they are applied to the production process for compensation.

Benefits of technology

It achieves high-precision overlay compensation, improves compensation efficiency, and can quickly complete high-precision wafer overlay error compensation, reducing the number of measurements and improving production efficiency.

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Abstract

The present application relates to the technical field of semiconductor lithography, and particularly relates to a high-precision overlay compensation method, comprising: using Zernike polynomials to calculate global overlay error of a wafer to obtain field-by-field compensation model parameters; using a compensation formula based on the field-by-field compensation model parameters to calculate to obtain actual wafer overlay compensation parameters; comparing the actual wafer overlay compensation parameters and the field-by-field compensation model parameters of the actual wafer to obtain a comparison result. The comparison result is judged, if the comparison result is within a preset range, the comparison result is applied to production process for compensation, if the comparison result is not within the preset range, the problem is explored and diagnosed, by using the Zernike polynomial model and the field-by-field compensation model of the reference wafer, the overlay error of the wafer of any batch and any machine is quickly compensated, thereby solving the problem of low efficiency of the existing compensation method.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor lithography technology, and particularly relates to a high-precision overlay compensation method. BACKGROUND

[0002] The overlay precision refers to the overlay position precision of a layer pattern and a previous layer pattern in a lithography manufacturing process. Since the integrated circuit chip is manufactured by stacking multiple circuit layers, if the current layer and the previous layer are not aligned, the chip will not work normally. Therefore, in the process of forming the current layer, it is extremely important to reduce the overlay precision and ensure that the overlay precision is within the deviation range.

[0003] Generally, the to-be-tested wafer is obtained in a previous batch of wafers; the overlay precision of the to-be-tested wafer is detected to obtain the overlay precision information of the previous batch; the overlay deviation model is obtained according to the overlay precision information of the previous batch; and the overlay deviation of the current batch of wafers is compensated according to the overlay deviation model.

[0004] In the above manner, the overlay precision of the current batch of wafers is still poor, thereby reducing the efficiency of the overlay deviation compensation. SUMMARY

[0005] The present application aims to provide a high-precision overlay compensation method, and aims to solve the problem of low efficiency of the existing compensation method.

[0006] To achieve the above-mentioned purpose, the present application provides a high-precision overlay compensation method, comprising the following steps:

[0007] using Zernike polynomials to calculate the global overlay error of the wafer to obtain the field-by-field compensation model parameters;

[0008] calculating using a compensation formula based on the field-by-field compensation model parameters to obtain actual wafer overlay compensation parameters;

[0009] comparing the actual wafer overlay compensation parameters and the actual wafer field-by-field compensation model parameters to obtain a comparison result;

[0010] judging the comparison result, if the comparison result is within a preset range, then applying it to the production process for compensation.

[0011] The wafer includes a reference wafer and an actual wafer.

[0012] The specific way of using Zernike polynomials to calculate the global overlay error of the wafer to obtain the field-by-field compensation model parameters is as follows:

[0013] using Zernike polynomials to calculate the reference wafer and the actual wafer to obtain the reference wafer Zernike model difference and the actual wafer Zernike model difference;

[0014] Based on the reference wafer Zernike model difference and the actual wafer Zernike model difference, a field-by-field compensation model parameter is obtained by calculation.

[0015] The specific way of calculating the actual wafer overlay compensation parameter based on the field-by-field compensation model parameter using a compensation formula is:

[0016] The reference wafer is calculated using the field-by-field compensation model to obtain a reference wafer field-by-field compensation model parameter.

[0017] The reference wafer field-by-field compensation model parameter and the field-by-field compensation model parameter are calculated using a compensation formula to obtain an actual wafer overlay compensation parameter.

[0018] The specific way of comparing the actual wafer overlay compensation parameter and the actual wafer field-by-field compensation model parameter to obtain a comparison result is:

[0019] The actual wafer is calculated using the field-by-field compensation model to obtain an actual wafer field-by-field compensation model parameter.

[0020] The actual wafer overlay compensation parameter and the actual wafer field-by-field compensation model parameter are compared to obtain a comparison result.

[0021] The present application discloses a high-precision overlay compensation method, which uses Zernike polynomials to calculate the global overlay error of a wafer to obtain a field-by-field compensation model parameter. Based on the field-by-field compensation model parameter, a compensation formula is used to calculate an actual wafer overlay compensation parameter. The actual wafer overlay compensation parameter and the actual wafer field-by-field compensation model parameter are compared to obtain a comparison result. The comparison result is judged. If the comparison result is within a predetermined range, it is applied to the production process for compensation. The present application proposes an overlay compensation model and system, which realizes fast compensation of wafer overlay error of any batch and any machine by using Zernike polynomial model and field-by-field compensation model of reference wafer. The compensation precision is high, the number of identification measurements is small, and the purpose of high-precision compensation with small amount of data is achieved, thereby solving the problem of low efficiency of existing compensation methods. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed in the embodiments or prior art description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creative labor.

[0023] Figure 1 is a flow chart of a high-precision overlay compensation method provided by the present application.

[0024] Figure 2 is a flow chart of a compensation method.

[0025] Figure 3 is an overlay error distribution map of a reference wafer.

[0026] Figure 4 is an overlay error distribution map of an actual wafer.

[0027] Figure 5 is a Zernike model fitting distribution map of a reference wafer.

[0028] Figure 6 is a Zernike model fitting distribution map of an actual wafer.

[0029] Figure 7 is a field-by-field compensation model distribution map of a reference wafer.

[0030] Figure 8 is a field-by-field compensation model distribution map of an actual wafer.

[0031] Figure 9 is a new field-by-field compensation model distribution map obtained by superimposing the Zernike model difference of the reference wafer and the Zernike model difference of the actual wafer after calculating the reference wafer and the actual wafer using the Zernike polynomial.

[0032] Figure 10 is a residual result map after the actual wafer is calculated using the Zernike polynomial to obtain the field-by-field compensation model parameters.

[0033] Figure 11 is a residual result of the actual wafer directly using the field-by-field compensation model. DETAILED DESCRIPTION

[0034] Embodiments of the present application are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by reference to the accompanying drawings are exemplary and are intended to explain the present application, and cannot be understood as a limitation of the present application.

[0035] Please refer to Figures 1 to 11 , the present application provides a high-precision overlay compensation method, comprising the following steps:

[0036] S1 using Zernike polynomial to calculate the global overlay error of the wafer, and obtain the field-by-field compensation model parameters;

[0037] The wafer includes a reference wafer and an actual wafer.

[0038] The reference wafer is a wafer containing overlay marks in the same process selected randomly or specially, and the actual wafer refers to a wafer containing the same overlay marks after the same or different machines. There is no essential difference between the two.

[0039] It can be seen that the two have similar overlay distribution characteristics, but there are different numerical values in different exposure fields.

[0040] S11 uses Zernike polynomials to calculate the reference wafer and the actual wafer to obtain the Zernike model difference of the reference wafer and the Zernike model difference of the actual wafer;

[0041] Specifically, using the Zernike polynomial model, the reference wafer and the actual wafer are fitted with Zernike polynomials respectively to obtain the Zernike compensation parameters 13 of the reference wafer and the Zernike compensation parameters 14 of the actual wafer.

[0042] The Zernike polynomial is written as:

[0043] z{1}=R*cos(θ)

[0044] z{2}=R*sin(θ)

[0045] z{3}=2R 2 -1

[0046] z{4}=R 2 *cos(2θ)

[0047] z{5}=R 2 *sin(2θ)

[0048] z{6}=R*(3R 2 -2)*cos(θ)

[0049] z{7}=R*(3R 2 -2)*sin(θ)

[0050] z{8}=6R 4 -6R 2 +1 ...

[0052] Wherein, R represents the radius of the overlay mark position, and θ represents the angle of the overlay mark position in polar coordinates. When calculating the overlay compensation model, the Zernike polynomial parameters in the horizontal and vertical directions are calculated respectively;

[0053] Calculate the Zernike model difference between the actual wafer and the reference wafer.

[0054] S12 calculates based on the Zernike model difference of the reference wafer and the Zernike model difference of the actual wafer to obtain the field-by-field compensation model parameters.

[0055] Specifically, the model difference is used to calculate the field-by-field compensation model parameters.

[0056] S2 calculates actual wafer overlay compensation parameters using a compensation formula based on the field-by-field compensation model parameters.

[0057] S21 calculates the reference wafer using the field-by-field compensation model to obtain reference wafer field-by-field compensation model parameters.

[0058] Specifically, the field-by-field compensation model 11 is used to calculate the model parameters of the reference wafer 100 and the actual wafer 101 respectively. The field-by-field compensation model refers to independent compensation for each exposure area. The compensation model adopts a polynomial form, and the compensation calculation formula is as follows:

[0059]

[0060]

[0061] wherein k1-k19 are the coefficients of the polynomials that can be compensated in the exposure area, dx(xf, yf) and dy(xf, yf) are the x and y direction overlay errors measured at the (xf, yf) position in the exposure area, and xf and yf are the coordinates inside the exposure area.

[0062] S22 calculates the actual wafer overlay compensation parameters using a compensation formula based on the reference wafer field-by-field compensation model parameters and the field-by-field compensation model parameters.

[0063] Specifically, the reference wafer field-by-field compensation model parameters and the field-by-field compensation model parameters are added to calculate the overlay compensation parameters of the actual wafer 101.

[0064] S3 compares the actual wafer overlay compensation parameters and the actual wafer field-by-field compensation model parameters to obtain a comparison result.

[0065] S31 calculates the actual wafer field-by-field compensation model parameters using the field-by-field compensation model.

[0066] Specifically, the compensation parameters of the actual wafer under the field-by-field compensation model are calculated.

[0067] S32 compares the actual wafer overlay compensation parameters and the actual wafer field-by-field compensation model parameters to obtain a comparison result.

[0068] Specifically, the differences between the actual wafer overlay compensation parameters and the actual wafer field-by-field compensation model parameters are compared to obtain a comparison result.

[0069] S4 judges the comparison result, if the comparison result is in the preset range, then applies to the production process for compensation.

[0070] Specifically, it is judged whether the comparison result meets the expectation of residual error. When it meets the expectation, it is applied to the mass production process, and in the subsequent stage, the actual wafer is randomly selected to perform step S3. If it does not meet the requirement, the problem is explored and diagnosed (step S32), including reselecting the Zernike polynomial coefficient or reselecting the global compensation model, performing step S1 and step S2.

[0071] The above only discloses a preferred embodiment of the high-precision overlay compensation method of the present application, and of course cannot limit the scope of the present application. Those skilled in the art can understand that all or part of the above-mentioned embodiments can be implemented, and equivalent changes made according to the claims of the present application still fall within the scope of the present application.

Claims

1. A high precision overlay compensation method, characterized by, The method comprises the following steps: using Zernike polynomials to calculate global overlay error of a wafer to obtain field-by-field compensation model parameters, the wafer comprising a reference wafer and an actual wafer; calculating using a compensation formula based on the field-by-field compensation model parameters to obtain actual wafer overlay compensation parameters; comparing the actual wafer overlay compensation parameters and the field-by-field compensation model parameters of the actual wafer to obtain a comparison result, in particular as follows: calculating the actual wafer using the field-by-field compensation model to obtain field-by-field compensation model parameters of the actual wafer; comparing the actual wafer overlay compensation parameters and the field-by-field compensation model parameters of the actual wafer to obtain a comparison result; judging the comparison result, if the comparison result is within a preset range, applying the actual wafer overlay compensation parameters to a production process for compensation, in particular as follows: judging whether the comparison result meets a residual expectation, if the comparison result meets the expectation, applying to a mass production process, and randomly selecting an actual wafer for comparison in a subsequent stage, if the comparison result does not meet the requirement, exploring and diagnosing a problem.

2. The high-precision overlay compensation method of claim 1, wherein the specific way of using Zernike polynomials to calculate global overlay error of a wafer to obtain field-by-field compensation model parameters is as follows: calculating the reference wafer and the actual wafer using Zernike polynomials to obtain a reference wafer Zernike model difference and an actual wafer Zernike model difference; calculating based on the reference wafer Zernike model difference and the actual wafer Zernike model difference to obtain field-by-field compensation model parameters.

3. The high-precision overlay compensation method of claim 1, wherein the specific way of calculating using a compensation formula based on the field-by-field compensation model parameters to obtain actual wafer overlay compensation parameters is as follows: calculating the reference wafer using the field-by-field compensation model to obtain reference wafer field-by-field compensation model parameters; calculating the reference wafer field-by-field compensation model parameters and the field-by-field compensation model parameters using a compensation formula to obtain actual wafer overlay compensation parameters.

Citation Information

Patent Citations

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