Host system and operating method thereof

By introducing the enablement and status indicators of the submission queue (SQ) in the host system, the repeated query and delay problems caused by data transfer uncertainty between the host and storage devices are solved, and more efficient data transfer management is achieved.

CN115407930BActive Publication Date: 2025-09-16MEDIATEK INC
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Patent Information

Application Number
CN202210469707.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2022-04-19
Filing Date
2022-04-28
Publication Date
2025-09-16
Estimated Expiration
2042-04-28

AI Technical Summary

Technical Problem

During data transmission between the host and storage devices, existing technologies fail to effectively manage repeated queries and delays due to uncertainty.

Method used

By introducing an enable indicator and a status indicator for the submission queue (SQ) in the host system, it is ensured that commands are aborted after being sent to the storage device, thus avoiding repeated queries.

Benefits of technology

Improved data transfer management between host systems and storage devices, reducing delays and repeated queries and increasing transfer efficiency.

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Abstract

The present invention discloses a host system and an operating method thereof, comprising: detecting, by a host controller, that a host driver has disabled an enable indicator of a submission queue (SQ); stopping further retrieval from the SQ; sending all entries that have been retrieved from the SQ to a storage device coupled to the host system; and setting, by the host controller, a status indicator of the SQ to indicate the cessation of retrieval from the SQ. The present invention can improve management of data transmission between the host system and the storage device.
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Description

Technical Field

[0001] The present invention relates to a storage device, and more particularly, to management of data transmission between a host and a storage device. Background Art

[0002] An electronic system typically includes a host coupled to a storage device. The host and the storage device are interconnected via an interface, such as a Universal Flash Storage (UFS) interface, a Serial Advanced Technology Attachment (SATA) interface, a Small Computer Small Interface (SCSI), a Serial Attached SCSI (SAS), or an embedded Multi-Media Card (eMMC) interface.

[0003] The UFS interface is primarily used for transferring data between a host and a non-volatile memory (NVM) storage device. The host includes a host controller that manages data transfer between the host system and the UFS storage device.

[0004] When an error condition occurs in an electronic system, the host system can abort a data transfer command. For example, the error condition may be caused by a software crash, electrical or network problems, or other runtime anomalies. However, a race condition may occur between a) the host controller sending the aborted command to the storage device and b) the storage device responding to the host system's query as to whether the storage device has received the command. Whether the storage device has received the aborted command is uncertain. This may occur when the host controller has received the command but is too busy to send it to the storage device. In the presence of this uncertainty, the host system may repeatedly query the storage device to check whether the storage device has received the command. Repeated queries may result in delays between the host and storage device and increased data transfer. Therefore, there is a need for improved management of data transfer between the host and storage devices. Summary of the Invention

[0005] In view of this, the present invention provides a host system and an operating method thereof, which are used to improve the management of data transmission between the host system and a storage device.

[0006] In one embodiment, a method of operating a host system is provided, comprising: detecting, by a host controller, that a host driver has disabled an enable indicator of a submission queue (SQ); stopping further acquisitions from the SQ; sending all entries that have been acquired from the SQ to a storage device coupled to the host system; and setting, by the host controller, a status indicator of the SQ to indicate the stopping of acquisitions from the SQ.

[0007] In another embodiment, a host system is provided, comprising a host controller, one or more processors for performing operations of a host driver, and a memory for storing the host driver and a plurality of SQs, wherein the host controller is configured to: detect that the host driver has disabled an enable indicator of the SQ; stop further acquisition from the SQ; send all entries that have been acquired from the SQ to a storage device coupled to the host system; and set a status indicator of the SQ to indicate the stop of acquisition of the SQ.

[0008] In the present invention, through the SQ enable and status indicators, when the host driver aborts a command and the command has been removed from the SQ, the host driver can ensure that the command has been sent to the storage device, eliminating the need to repeatedly query the storage device to confirm command receipt. This improves the management of data transfer between the host system and the storage device.

[0009] Other aspects and features will become apparent to those of ordinary skill in the art upon reading the following description of specific embodiments in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings wherein like reference numerals indicate similar elements. In addition, when a particular feature, structure, or characteristic is described in conjunction with an embodiment, it is intended that such feature, structure, or characteristic may be implemented in conjunction with other embodiments within the scope of those skilled in the art.

[0011] Figure 1 is a block diagram illustrating a host system coupled to a storage system according to one embodiment.

[0012] Figure 2 is a diagram illustrating a submission queue (SQ) and a completion queue (CQ) according to one embodiment.

[0013] Figure 3 is a diagram illustrating host system operations for enabling and disabling SQ acquisition according to one embodiment.

[0014] Figure 4 is a flow chart illustrating an example of usage of an SQ enable indicator and an SQ status indicator according to one embodiment.

[0015] Figure 5 is a flow chart illustrating a method of a host controller responding to a disable indication of an SQ according to one embodiment.

[0016] Figure 6 is a flow chart illustrating a method of a host controller responding to an enable indication of an SQ according to one embodiment. DETAILED DESCRIPTION

[0017] In the following description, many specific details are set forth. However, it should be understood that embodiments of the present invention can be practiced without these specific details. In other cases, well-known circuits, structures, and techniques are not shown in detail to avoid obscuring an understanding of the present invention. However, those skilled in the art will understand that the present invention can be implemented without these specific details. Those of ordinary skill in the art will be able to implement appropriate functionality based on the description of the present invention without undue experimentation.

[0018] Embodiments of the present invention provide hardware support for a host driver to abort commands sent to a storage system. The host driver resides in a host system coupled to a storage device. The host driver includes multiple registers to check whether a command has been sent to the storage device. Methods for using these registers are also provided. These methods define steps to be followed by the host driver and host hardware in the host system.

[0019] In one embodiment, hardware support can be implemented by a set of submission queue (SQ) enable indicators and a set of SQ status indicators. These indicators can be stored in registers of the host system. For each SQ, the SQ enable register stores a 1-bit value (SQx.Enable) as an enable indicator, and the SQ status register stores a 1-bit value (SQx.Status) as a status indicator. By changing the bit value of SQx.Enable, the host driver can enable or disable the host controller from further obtaining commands from the corresponding SQ. By changing the bit value of SQx.Status, the host controller can ensure to the host driver that all commands that have been obtained or are being obtained from the SQ are sent to the storage device. Therefore, when the host driver aborts a command and the command has been taken out of the SQ, the host driver can ensure that the command has been sent to the storage device. Therefore, there is no need to repeatedly query the storage device to confirm that the command has been received.

[0020] Figure 1is a block diagram illustrating a host system 100 coupled to a storage device 150 (also referred to as a device) according to an embodiment of the present invention. The host system 100 includes a host driver 130 and application software 140. The host driver 130 and the application software 140 can be stored in a host memory 110 of the host system 100. The host memory 110 can include memory devices such as dynamic random access memory (DRAM), static RAM (SRAM), and / or other volatile and non-volatile memories. The host system 100 also includes one or more processors 190, such as general-purpose processors (e.g., central processing unit (CPU), digital signal processor (DSP), graphics processing unit (GPU), etc.) and / or dedicated circuits to perform operations of the host driver 130 and the application software 140. In one embodiment, the host system 100 can be a multi-core system.

[0021] The host system 100 also includes a host controller 120 for managing data transfer between the host system 100 and the storage device 150. The host controller 120 can be implemented by a combination of processing hardware and software programs. An example of NVM memory is flash memory. In one embodiment, the host system 100 can be integrated into a system-on-a-chip (SOC). It will be understood that for ease of description, Figure 1 The embodiments shown have been simplified. Additional hardware components may also be included.

[0022] Storage device 150 includes a storage unit such as non-volatile memory (NVM) memory 160. In one embodiment, storage device 150 is a UFS device. That is, requests, data, and responses exchanged between host controller 120 and storage device 150 comply with standards such as the UFS standard. Although UFS is described in the present invention, it should be understood that the methods and systems described herein can be applied to other storage system standards.

[0023] The host system 100 is referred to as the "host," and the storage device 150 is referred to as the "device." Each UFS command consists of three phases: a request phase (from the host to the device), a data input / output phase (from the device to the host, or from the host to the device), and a response phase (from the device to the host). In the present invention, the request phase of a command occurs when the host retrieves a command and sends it to the device.

[0024] In one embodiment, host system 100 manages multiple queues in host memory 110. The multiple queues include a set of submission queues (SQs) 125 and a set of completion queues (CQs) 126. Host controller 120 and host driver 130 can communicate through these queues and a set of registers 123. For each SQ 125, host driver 130 is the producer and host controller 120 is the consumer. Host driver 130 uses SQ 125 to submit command descriptors to host controller 120, indicating commands to be processed by storage device 150. It should be understood that for ease of description, "submitting a command to an SQ" and "retrieving a command from an SQ" are used interchangeably with "submitting a command descriptor to an SQ" and "retrieving a command descriptor from an SQ," respectively, in this disclosure. A command descriptor identifies a command and points to instructions for the command stored in host memory 110.

[0025] Each SQ 125 can identify a CQ 126, which will receive command completion notifications from the SQ 125. For each CQ 126, the host controller 120 is the producer and the host driver 130 is the consumer. The host controller 120 uses the CQ 126 to indicate the overall command status (OCS) to the host driver 130. Each CQ entry can identify the SQ from which the command originated, a unique identifier for the command, and an OCS field.

[0026] For example, the host driver 130 can request a data transfer to the storage device 150 (on behalf of the application software 140) by writing a command in the form of a command descriptor to one of the SQs 125. The host controller 120 can send the commands in the SQ to the storage device 150 in the order in which they were placed in the SQ. After the storage device 150 executes the command, it notifies the host controller 120 of the completion status. The host controller 120 publishes completion information in the CQ corresponding to the originating SQ to notify the host driver 130 of the completion of the requested data transfer.

[0027] In one embodiment, both SQ 125 and CQ 126 are circular queues and are collectively referred to as multi-circular queues (MCQs). A circular queue uses a head pointer and a tail pointer to track its current contents. Queue entries are removed from the head of the queue for processing, and new entries are added to the tail of the queue.

[0028] In one embodiment, register 123 includes an SQ enable register 170 and an SQ status register 180. The SQ enable register 170 includes a 1-bit SQ enable indicator for each SQ for the host driver 130 to indicate whether the acquisition of the SQ is enabled or disabled. The SQ status register 180 includes a 1-bit SQ status indicator for each SQ for the host controller 120 to confirm whether the acquisition of the corresponding SQ is running or stopped. For each SQ, the host driver 130 can enable and disable the acquisition operation of the host controller by setting the 1-bit SQ enable indicator in the SQ enable register 170. For each SQ, the host controller 120 can notify the host driver 130 of the status of the SQ (e.g., stopped or running) by setting the 1-bit SQ status indicator in the SQ status register 180.

[0029] Figure 2 is a diagram illustrating a submission queue (SQ) 210 and a completion queue (CQ) 220 according to one embodiment. Figure 1 , SQ 210 can be any of SQ 125, and CQ 220 can be any of CQ 126. Both SQ 210 and CQ 220 are circular queues, and each queue has a head pointer and a tail pointer. The head pointer and the tail pointer can be stored in Figure 1 The host driver 130 may add an entry (e.g., entry N+3) to the SQ 210 and update the tail pointer of the SQ 210 to point to the added entry. The host controller 120 may obtain an entry (e.g., entry N+1) from the SQ 210 and update the head pointer of the SQ 210 to point to the entry (e.g., entry N+1).

[0030] For simplicity of description, SQ entries and commands within SQ entries use the same numerical index; for example, entry N contains command (Cmd) N. It should be understood that the index is used to indicate the order of placement in the queue. Therefore, command N can be any data transfer command or request that conforms to the predetermined protocol.

[0031] In one embodiment, each SQ has a corresponding CQ. In this example, CQ 220 is the completion queue corresponding to SQ 210. That is, after host controller 120 sends command N to storage device 150 and storage device 150 completes the requested operation, host controller 120 updates CQ 220 with the response from storage device 150 to indicate the completion of command N. Host controller 120 places the response at the end of CQ 220 and updates the tail pointer of CQ 220 to point to the response.

[0032] In one embodiment, when the host driver 130 aborts command N, the host driver 130 and the host controller 120 coordinate their operations regarding stopping and resuming acquisition from the SQ 210. Coordination is performed through the enable indicator (SQx.Enable) and status indicator (SQx.Status) of the SQ 210. The suffix "x" in SQx represents an index used to identify the SQ. The enable indicator may be stored in the SQ enable register 170 and the status indicator may be stored in the SQ status register 180.

[0033] Figure 3 is a diagram illustrating host system operations for enabling and disabling acquisition of an SQ according to one embodiment. Top block 310 includes steps for disabling further acquisition of the SQ, and bottom block 350 includes steps for enabling acquisition of the SQ. Figure 1 , Figure 3 The host driver (HD) indicated in FIG may be the host driver 130, and the host controller (HW) may be the host controller 120. The host driver sets SQx.Enable = 0 at the start of the abort to prevent the host controller from further acquiring the SQ. The host driver sets SQx.Enable = 1 to resume acquiring the SQ. The host controller sets SQx.Status = 0 to indicate that all acquired commands have been sent to the storage device, and sets SQx.Status = 1 to indicate that acquisition of the SQ has resumed.

[0034] The following description provides further details of top block 310; i.e., SQx.Enable 1→0. In step 311, when the host driver sets the enable indicator SQx.Enable = 0, the host controller detects that the SQx.Enable register value has changed from 1 to 0; i.e., by detecting a falling edge. Upon detecting that SQx.Enable has changed from 1 to 0, the host controller completes fetching the current entry in step 312 and stops fetching further SQ entries in step 313. The host controller sends all fetched SQ entries to the storage device in step 314 (until SQx.Enable 1→0 is detected). Then, in step 315, the host controller sets SQx.Status = 0 to indicate that SQ fetching has stopped and all fetched SQ entries have been sent to the storage device.

[0035] When the host driver initiates an abort command N and changes SQx.Enable from 1 to 0, the host controller completes fetching the current command and sends all fetched commands to the storage device. In one embodiment, the commands fetched and sent include command N. In one embodiment, command N is "currently executing." "Currently executing" means that the host controller has fetched or is in the process of fetching the command. Using SQx.Enable 1→0 and SQx.Status = 0 provides the host driver and host controller with certainty that command N has been fetched and sent to the storage device.

[0036] The following description provides further details of the bottom block 350; namely, SQx.Enable 0→1. In step 351, the host driver sets the enable indicator SQx.Enable = 1. The enable indicator will be set to 1 when the abort is processed in one of the following possible ways, such as the storage device completed command N before the command abort occurred, the host controller skipped fetching command N from the SQ, or the storage device completed an abort of command N. The host controller detects the change in SQx.Enable from 0 to 1 (e.g., by rising edge detection) and sets SQx.Status = 1 in step 352 to indicate that fetching of the SQ has resumed. The host controller then continues fetching from the SQ in step 353.

[0037] It should be understood that in alternative embodiments, the meanings of the binary values ​​0 and 1 can be reversed. For example, an enable indicator value of 1 can indicate that acquisition is disabled, while 0 can indicate that acquisition is enabled. Similarly, a status indicator value of 1 can indicate that acquisition is stopped, while 0 can indicate that acquisition is resumed.

[0038] Figure 4 FIG4 is a flow chart 400 illustrating an example of the use of an SQ enable indicator and an SQ status indicator according to one embodiment. Figure 1 , Figure 4 The host controller and host driver in can be Figure 1 The host controller 120 and host driver 130 in FIG. As previously described, the host driver places SQ entries at the end of the SQ, and the host controller retrieves SQ entries from the head of the SQ. In step 410, the host controller selects an SQ from multiple SQs based on queue priority. In step 420, the host controller retrieves an SQ entry from the selected SQ and moves the entry to an internal buffer. In step 430, the host controller updates the SQ head index register. The host controller may repeat steps 410 to 430 for all SQs. At some point during steps 410 to 430, the host driver begins to abort commands N that have been retrieved or are being retrieved from a given SQ (e.g., SQx) and changes the enable indicator of SQx from 1 to 0 (i.e., SQx.Enable 1→0) to stop further retrieval from the given SQ. The host controller detects SQx.Enable 1→0 in step 440. The host controller completes retrieval of the current SQ entry (if any) and stops further retrieval. At step 450, the host controller sends all fetched commands from the internal buffer to the storage device and changes SQx.Status from 1 to 0 to indicate that fetching at SQx has stopped and all fetched SQx entries have been sent to the storage device.

[0039] The following steps describe a scenario in which the storage device completes a command abort. In this scenario, the host driver sends a Task Management request to notify the storage device to abort Command N, identified by a unique tag. In step 460, the storage device receives the Task Management request to abort Command N and aborts Command N accordingly. In step 470, the host system receives a response to the abort request from the storage device. In step 480, the host system cleans up resources used by Command N. In step 490, the host driver changes the SQ enable indicator to Enable (i.e., SQx.Enable 0→1), and the host controller changes the SQ state to Running (i.e., Resume Acquisition).

[0040] At step 430, the head pointer may point to an entry that has been fetched or is being fetched. That is, all SQ entries preceding and including the SQ entry pointed to by the head pointer may have been fetched, but may or may not have been sent to the storage device. In this case, using SQx.Enable ensures that the host controller sends all SQ entries that have been fetched by the host controller.

[0041] Figure 55 is a flow chart illustrating a method 500 of a host system coupled to a storage device according to one embodiment. More specifically, method 500 may be performed by a host controller in response to a disable indication of an SQ. At step 510, the host controller detects that the host driver has disabled the enable indicator of the SQ (e.g., SQx.Enable 1→0). At step 520, the host controller stops further fetches from the SQ. At step 530, the host controller sends all entries that have been fetched from the SQ to the storage device. At step 540, the host controller sets the status register of the SQ to indicate that fetches from the SQ have been stopped (e.g., SQx.Status=0).

[0042] Figure 6 FIG6 is a flow chart illustrating a method 600 of a host controller responding to an enable indication of an SQ according to one embodiment. The host controller detects at step 610 that the host driver has enabled the enable indicator of the SQ (e.g., SQx.Enable0→1). At step 620, the host controller sets the status register of the SQ to indicate the resumption of retrieval of the SQ (e.g., SQx.Status=1). At step 630, the host controller resumes retrieval of entries from the SQ.

[0043] In one embodiment, upon detecting the disabling of the enable indicator, the host controller completes any entry currently being retrieved from the SQ and sends the entry to the storage device. In one embodiment, after the status indicator is set to indicate that retrieval has stopped, the host system sends an abort request to the storage device (e.g., the host driver requests the host controller to send the abort request via the host controller) to abort the command being retrieved from the SQ and sent to the storage device. After the host system (e.g., the host controller) receives a response to the abort request from the storage system, the host driver enables the enable indicator of the SQ.

[0044] In one embodiment, the enable indicator of the SQ is a 1-bit value writable by the host driver to enable or disable the acquisition operation. The status indicator of the SQ is a 1-bit value writable by the host controller to indicate a stopped or resumed acquisition operation.

[0045] In one embodiment, the SQ is a circular queue and the host controller has retrieved all entries before the head pointer of the SQ. The host controller can detect the change in the enable indicator by falling edge or rising edge detection. In one embodiment, the host controller communicates with the storage device according to the Universal Flash Storage (UFS) standard.

[0046] In the foregoing description, the host driver is described as being part of the host software. However, it should be understood that some of the host driver operations described herein may be performed by host hardware. For example, the host hardware may perform host driver operations to enable and / or disable an enable indicator for the SQ.

[0047] Already referenced Figure 1 The exemplary embodiments describe Figure 4-Figure 6 However, it should be understood that Figure 4-Figure 6 The flowchart can be operated by Figure 1 to perform the embodiments of the present invention other than the embodiments of Figure 1 Embodiments of the invention may perform operations different from those shown in the flowchart. Figure 4-Figure 6 The flowcharts illustrate a particular order of operations performed by certain embodiments of the present invention, but it should be understood that this order is exemplary (for example, alternative embodiments may perform operations in a different order, combine certain operations, or repeat certain operations, etc.).

[0048] Various functional components, blocks, or modules have been described herein. As will be appreciated by those skilled in the art, the functional blocks or modules may be implemented by circuits (special purpose or general purpose circuits operating under the control of one or more processors and coded instructions) comprising transistors, which are generally configured to control the operation of the circuits according to the functions and operations described herein.

[0049] Although the present invention has been described in terms of several embodiments, those skilled in the art will recognize that the present invention is not limited to the embodiments described and can be modified and altered within the spirit and scope of the appended claims. This specification is to be regarded as illustrative rather than restrictive.

Claims

1. A method for operating a host system, comprising: detecting, by the host controller, that a host driver has disabled an enable indicator of a submission queue SQ, wherein the enable indicator of the SQ is used to indicate enablement or disablement of acquisition of the SQ; Stop further acquisition from said SQ; sending all entries that have been retrieved from the SQ to a storage device coupled to the host system; and The host controller sets a status indicator of the SQ to indicate stopping acquisition of the SQ, wherein the status indicator of the SQ is used to indicate stopping or resuming acquisition of the SQ.

2. The method of claim 1, further comprising: detecting, by the host controller, the enable indicator that the host driver has enabled the SQ; setting, by the host controller, the status indicator of the SQ to indicate a resume retrieval from the SQ; as well as Resume fetching entries from the SQ.

3. The method according to claim 1, wherein When disabling of the enable indicator is detected, the method further comprises: Complete the retrieval of the entry being retrieved from the SQ; and The entry is sent to the storage device.

4. The method of claim 1 , further comprising: After the status indicator is set to stop fetching, an abort request is sent from the host system to the storage device to abort the command that has been fetched from the SQ and sent to the storage device.

5. The method according to claim 4, wherein: After the host system receives a response to the suspend request from the storage device, the host driver enables the enable indicator of the SQ.

6. The method of claim 1, wherein the enable indicator of the SQ is a 1-bit value writable by the host driver.

7. The method of claim 1, wherein: The status indicator of the SQ is a 1-bit value writable by the host controller.

8. The method of claim 1, wherein: The SQ is a circular queue, and the host controller has fetched all entries preceding the head pointer of the SQ.

9. The method of claim 1, wherein: The host controller detects a change in the enable indicator through falling edge or rising edge detection.

10. The method of claim 1, wherein: The host controller communicates with the storage device according to the Universal Flash Storage (UFS) standard.

11. A host system comprising: Host controller; one or more processors for executing host driver operations; as well as a memory for storing the host driver and a plurality of SQs, wherein the host controller is configured to: detecting that the host driver has disabled an enable indicator of the SQ, wherein the enable indicator of the SQ is used to indicate enablement or disablement of acquisition of the SQ; ceasing further acquisition from said SQ; sending all entries retrieved from the SQ to a storage device coupled to the host system; and The status indicator of the SQ is set to indicate stopping acquisition of the SQ, wherein the status indicator of the SQ is used to indicate stopping or resuming acquisition of the SQ.

12. The host system of claim 11, wherein: The host controller is further configured to: detecting the enable indicator that the host driver has enabled the SQ; Setting the status indicator of the SQ to indicate resume retrieval from the SQ; and Continue getting entries from the SQ.

13. The host system of claim 11, wherein: The host controller is further configured to: Finishes retrieving the entry being retrieved from the SQ; and Send the entry being fetched from the SQ to the storage device.

14. The host system of claim 11, wherein: After the status indicator is set to stop acquiring, the host system is further configured to: An abort request is sent to the storage device to abort a command that has been obtained from the SQ and sent to the storage device.

15. The host system of claim 14, wherein: The enable indicator of the SQ is enabled after the host system receives a response to the abort request from the storage device.

16. The host system of claim 11, wherein: The enable indicator for the SQ is a 1-bit value in an enable register writable by the host driver.

17. The host system of claim 11, wherein: The status indicator of the SQ is a 1-bit value in a status register writable by the host controller.

18. The host system of claim 11, wherein: The SQ is a circular queue, and the host controller has fetched all entries preceding the head pointer of the SQ.

19. The host system of claim 11, wherein: The host controller detects the change of the enable indicator through falling edge or rising edge detection.

20. The host system of claim 11, wherein: The host controller communicates with the storage device according to the UFS standard.

Citation Information

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