Word line testing method and device

Abstract

An embodiment of the present application provides a word line testing method and device. After the repair of the storage array is completed, if there is a target word line in the storage array that is in a failed state, then after writing a second value into the target word line, according to the values output by each word line in the storage array, it is determined whether there are at least two word lines in the storage array that are in the simultaneous on state; if there are at least two word lines in the storage array that are in the simultaneous on state, then the current value generated during the process of the target word line turning from on to off is detected; when the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold, it is determined that there is a repair fault in the target word line. The word line testing method and device provided by the embodiments of the present application solve the technical problem in the prior art that it is difficult to accurately detect a word line that fails due to a repair fault.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of integrated circuit technology, and in particular, to a word line testing method and device. Background Art

[0002] As memories continue to develop towards higher integration and larger capacity, the possibility of defects occurring during the manufacturing process of memories also increases. In order to compensate for the physical defects generated during the manufacturing process of memories, it is usually necessary to repair defective memories to improve the storage performance and yield of memories.

[0003] Currently, two repair techniques are generally used for the internal repair circuits of memories, namely the laser-fuse repair technique and the E-fuse repair technique. Among them, the laser-fuse and E-fuse repair techniques are mainly used for wafer repair on the production line, and the E-fuse repair technique is also used for repair after post-packaging.

[0004] When a certain word line (abbreviated as WL) fails after laser-fuse or E-fuse repair and the E-fuse repair is wrongly activated again, the word line may fail due to double repair, and it is very difficult to accurately find such failed word lines using conventional testing techniques, resulting in poor testing effects. Summary of the Invention

[0005] The embodiments of the present application provide a word line testing method and device, which can solve the technical problem that it is very difficult for existing testing techniques to accurately detect word lines that fail due to repair failures.

[0006] In a first aspect, the embodiments of the present application provide a word line testing method, which includes:

[0007] After the storage array is repaired, detecting whether there is a target word line in the storage array that is in a failed state;

[0008] If there is a target word line in the storage array that is in a failed state, then after writing a second value into the target word line, determine whether there are at least two word lines in the storage array that are in an on state at the same time according to the values output by each word line in the storage array;

[0009] If there are at least two word lines in the storage array that are in an on state at the same time, then detect the current value generated during the process of the target word line turning from on to off;

[0010] When the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold, determine that there is a repair failure in the target word line.

[0011] In a feasible implementation, detecting whether there is a target word line in a failed state in the storage array includes:

[0012] After writing a first value to each word line in the storage array, determine whether there is a target word line in a failed state in the storage array according to the values output by each word line.

[0013] In a feasible implementation, after writing a first value to each word line in the storage array, determining whether there is a target word line in a failed state in the storage array according to the values output by each word line includes:

[0014] Write 0 to each word line in the storage array and read the values output by each word line;

[0015] Determine the word lines with an output value of 1 among each word line as the target word lines.

[0016] In a feasible implementation, after writing a second value to the target word line, determining whether there are at least two word lines in the storage array in a simultaneously on state according to the values output by each word line in the storage array includes:

[0017] Write 1 to the target word line and read the values output by each word line in the storage array;

[0018] When there are at least two word lines in the storage array with an output value of 0, determine that there are at least two word lines in the storage array in a simultaneously on state.

[0019] In a feasible implementation, when the current value generated during the process of the target word line changing from on to off is greater than a preset current threshold, determining that there is a repair fault in the target word line includes:

[0020] When the current value generated during the process of the target word line changing from on to off is greater than a preset current threshold, turn on the target word line and start a preset detection device to detect the signal source in the storage array;

[0021] If there are at least two signal sources in the storage array, determine that there is a repair fault in the target word line.

[0022] In a feasible implementation, the preset current threshold is greater than the current value generated during the process of the target word line changing from on to off in a normal state.

[0023] In a feasible implementation, after determining that there is a repair fault in the target word line, further includes:

[0024] Determine the abnormal repair module corresponding to the target word line in the repair circuit according to the target word line and the corresponding relationship between each repair module and each word line in the repair circuit.

[0025] In a second aspect, an embodiment of the present application provides a word line testing device, which includes:

[0026] A first detection module, configured to detect whether there is a target word line in a failed state in the storage array after the storage array is repaired;

[0027] A first determination module, configured to, if there is a target word line in a failed state in the storage array, after writing a second value into the target word line, determine whether there are at least two word lines in the storage array in a simultaneously-on state according to the values output by each word line in the storage array;

[0028] A second detection module, configured to, if there are at least two word lines in the storage array in a simultaneously-on state, detect the current value generated during the process of the target word line from turning on to turning off;

[0029] A second determination module, configured to determine that there is a repair fault in the target word line when the current value generated during the process of the target word line from turning on to turning off is greater than a preset current threshold.

[0030] In a feasible implementation manner, the first detection module is specifically configured to:

[0031] After writing a first value into each word line of the storage array, determine whether there is a target word line in a failed state according to the values output by each word line.

[0032] In a feasible implementation manner, the first detection module is specifically configured to:

[0033] Write 0 into each word line of the storage array, and read the values output by each word line;

[0034] Determine the word line with an output value of 1 among each word line as the target word line.

[0035] In a feasible implementation manner, the first determination module is specifically configured to:

[0036] After writing 1 into the target word line, read the values output by each word line in the storage array;

[0037] When there are at least two word lines with an output value of 0 in the storage array, determine that there are at least two word lines in the storage array in a simultaneously-on state.

[0038] In a feasible implementation, it further includes:

[0039] A test module, configured to turn on the target word line and start a preset detection device to detect a signal source in the storage array when a current value generated during the process of the target word line turning from on to off is greater than a preset current threshold; if there are at least two signal sources in the storage array, it is determined that the target word line has a repair fault.

[0040] In a feasible implementation, the preset current threshold is greater than a current value generated during the process of the target word line turning from on to off in a normal state.

[0041] In a feasible implementation, the second determination module is further configured to:

[0042] After determining that the target word line has a repair fault, according to the target word line and the corresponding relationship between each repair module in the repair circuit and each word line, determine the abnormal repair module corresponding to the target word line in the repair circuit.

[0043] In a third aspect, an embodiment of the present application provides a test device, including: at least one processor and a memory;

[0044] The memory stores computer-executable instructions;

[0045] The at least one processor executes the computer-executable instructions stored in the memory, so that the at least one processor executes the word line test method provided in the first aspect.

[0046] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored, and when a processor executes the computer-executable instructions, the word line test method provided in the first aspect is implemented.

[0047] For the word line test method and device provided in the embodiments of the present application, since when a word line fails due to a repair fault, it will cause multiple word lines to be turned on simultaneously, and the current value generated during the process of the target word line turning from on to off is also greater than the current value in the normal state. Therefore, after the storage array is repaired, if there is a target word line in the storage array that is in a failed state, a second value is written into the target word line, and according to the values output by each word line in the storage array, it is determined whether there are multiple word lines in the storage array that are in the on state simultaneously. If there are multiple word lines in the storage array that are in the on state simultaneously, and the current value generated during the process of the target word line turning from on to off is greater than the preset current threshold, it can be determined that the target word line has a repair fault, solving the technical problem in the prior art that it is difficult to accurately detect a word line that fails due to a repair fault. Description of the Drawings

[0048] To more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments of the present application or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0049] Figure 1 Flow schematic of a word line testing method provided in an embodiment of the present application Figure 1 ;

[0050] Figure 2a Structural schematic diagram of a storage array provided in an embodiment of the present application;

[0051] Figure 2b Structural schematic diagram of another storage array provided in an embodiment of the present application;

[0052] Figure 3 Second flow schematic diagram of a word line testing method provided in an embodiment of the present application;

[0053] Figure 4 Program module schematic diagram of a word line testing device provided in an embodiment of the present application;

[0054] Figure 5 Hardware structural schematic diagram of a testing device provided in an embodiment of the present application. Detailed implementation manners

[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application. In addition, although the disclosed content in the present application is introduced according to exemplary one or several examples, it should be understood that each aspect of these disclosed contents can also be separately constituted as a complete implementation manner.

[0056] It should be noted that the brief description of the terms in the present application is only for the convenience of understanding the subsequent described implementation manners, rather than intending to limit the implementation manners of the present application. Unless otherwise specified, these terms should be understood according to their ordinary and common meanings.

[0057] In this application, terms such as "first" and "second" in the description, claims, and the above-mentioned drawings are used to distinguish similar or like objects or entities, and do not necessarily imply a specific order or sequence, unless otherwise noted. It should be understood that such terms can be interchanged under appropriate circumstances, for example, it is possible to implement in an order other than those given in the illustration or description of the embodiments of this application.

[0058] In addition, the terms "comprising" and "having" and any variations thereof are intended to cover but not exclude inclusion. For example, a product or device comprising a series of components does not necessarily have to be limited to those components clearly listed, but may include other components not clearly listed or inherent to these products or devices.

[0059] The term "module" used in this application refers to any known or later-developed hardware, software, firmware, artificial intelligence, fuzzy logic, or a combination of hardware or / and software code that can perform functions related to that element.

[0060] During the manufacturing process of memory chips, in order to compensate for physical defects generated during the manufacturing process of the memory, it is usually necessary to repair defective memories to improve the storage performance and yield of the memory. Among them, the repair circuits inside the memory generally adopt two repair technologies, namely laser-fuse repair technology and E-fuse repair technology.

[0061] The repair failure mentioned in the embodiments of this application can be understood as a repair failure caused by the incorrect activation of the E-fuse repair again after a certain word line has been repaired by laser-fuse; it can also be understood as other repair failures that cause multiple word lines to fail simultaneously after repairing a certain address, and no limitation is made in the embodiments of this application.

[0062] Since it is difficult to accurately locate the real word line causing the problem in the above-mentioned repair failure during conventional testing, it is difficult to accurately detect the source word line where the repair failure occurs relying on existing detection technologies after the storage array is repaired.

[0063] To solve the above technical problems, an embodiment of this application provides a word line testing method. This method adopts a reverse detection method and can accurately detect the source word line that causes multiple word lines to fail simultaneously due to repair failure. The following will be described in detail with detailed embodiments.

[0064] Refer to Figure 1 , Figure 1 which is a schematic flow of a word line testing method provided in the embodiments of this application Figure 1 In a feasible implementation manner, this method includes:

[0065] S101. After the storage array is repaired, detect whether there is a target word line in the storage array that is in a failed state.

[0066] In the embodiments of the present application, after the storage array is repaired, a preset detection method can be used to detect whether there is a target word line in the storage array that is in a failed state.

[0067] Exemplarily, a specific value can be written into each word line of the storage array first, and then the values output by each word line are read. Based on the values output by each word line, it is determined whether there is a target word line in the storage array that is in a failed state.

[0068] It can be understood that when the word line is in a failed state, there will be a difference between the value written into the word line and the value read from the word line. Therefore, in the embodiments of the present application, when a specific value is written into a certain word line, if the value read from the word line is inconsistent with the written value, it can be considered that the word line is in a failed state; on the contrary, if the value read from the word line is consistent with the written data, it can be considered that the word line is in a normal state.

[0069] S102. If there is a target word line in the storage array that is in a failed state, then after writing a second value into the target word line, determine whether there are at least two word lines in the storage array that are in an on state simultaneously according to the values output by each word line in the storage array.

[0070] Refer to Figure 2a , Figure 2a which is a schematic structural diagram of a storage array provided in the embodiments of the present application. Normally, only one word line is turned on during writing and reading inside the chip, and other word lines are in an off state. Therefore, when the second value is written into this word line, only this word line outputs relevant values.

[0071] Refer to Figure 2b , Figure 2b which is another schematic structural diagram of a storage array provided in the embodiments of the present application. When there is a repair failure in the target word line, after the target word line is turned on, it will cause multiple word lines to be turned on simultaneously. At this time, after writing the second value into the above-mentioned target word line, multiple word lines will output relevant values.

[0072] In the embodiments of the present application, when it is determined that there is a target word line in the storage array that is in a failed state, then the second value is written into the target word line, and then the values output by each word line in the storage array are read. If at least two word lines output relevant values, it can be determined that there are at least two word lines in the storage array that are in an on state simultaneously.

[0073] S103. If there are at least two word lines in the storage array in the simultaneous on state, detect the current value generated during the process of the target word line turning from on to off.

[0074] Since when the target word line causes multiple word lines to be in the simultaneous on state due to a repair failure, the current value generated during the process of the target word line turning from on to off will increase, and it is usually several times the current value generated during the process of the target word line turning from on to off under normal circumstances. Therefore, in the embodiments of the present application, if there are at least two word lines in the storage array in the simultaneous on state, the current value generated during the process of the target word line turning from on to off can be further detected, and then according to the detection result, it can be determined whether the target word line has a repair failure caused by a double repair problem.

[0075] S104. When the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold, determine that the target word line has a repair failure.

[0076] In the embodiments of the present application, when it is determined that the current value generated during the process of the target word line turning from on to off is greater than the preset current threshold, it can be determined that the target word line has a repair failure caused by a double repair problem.

[0077] Among them, the above preset current threshold is greater than the current value generated during the process of the target word line turning from on to off in the normal state.

[0078] For the word line testing method provided by the embodiments of the present application, since when the word line fails due to a repair failure, it will cause multiple word lines to be simultaneously on, and the current value generated during the process of the target word line turning from on to off will also be greater than that in the normal state. Therefore, after the storage array is repaired, if there is a target word line in the storage array in the failed state, write a second value into the target word line, and according to the values output by each word line in the storage array, determine whether there are multiple word lines in the storage array in the simultaneous on state. If there are multiple word lines in the storage array in the simultaneous on state, and the current value generated during the process of the target word line turning from on to off is greater than the preset current threshold, it can be determined that the target word line has a repair failure, solving the technical problem in the prior art that it is difficult to accurately detect the word line that fails due to a repair failure.

[0079] Based on the content described in the above embodiments, refer to Figure 3 , Figure 3 FIG. 2 is a second flowchart of a word line testing method provided by the embodiments of the present application. In a feasible implementation manner, the method includes:

[0080] S301. After the storage array is repaired, detect whether there is a target word line in the storage array in the failed state.

[0081] In this embodiment, after the storage array is repaired, a first value can be written into each word line of the storage array first, and then the values output from each word line of the storage array are read. According to the values output from each word line, it is determined whether there is a target word line in the storage array in a failed state.

[0082] Exemplarily, after the storage array is repaired, 0 (low level) can be written into each word line of the storage array first, and then the values output from each word line are read. If there is a value of 1 in the reading result, the word line with the output value of 1 (high level) among each word line is determined as the target word line in a failed state.

[0083] S302. If there is a target word line in the storage array in a failed state, after writing a second value into the target word line, according to the values output from each word line in the storage array, it is determined whether there are at least two word lines in the storage array in a simultaneously-on state.

[0084] In a feasible implementation manner, if there is a target word line in the storage array in a failed state, 1 can be written into the target word line, and then the values output from each word line in the storage array are read; when there are at least two word lines with an output value of 0 in the storage array, it is determined that there are at least two word lines in the storage array in a simultaneously-on state.

[0085] It can be understood that after writing 1 into the target word line, if only the target word line is in an on state, only the target word line in the storage array will output 0, and other word lines have no output; if the target word line causes other word lines to be simultaneously in an on state due to double repair problems, after writing 1 into the target word line, not only the target word line outputs 0, but also the other word lines that are simultaneously in an on state will output 0.

[0086] That is, in the embodiment of the present application, if there are multiple word lines outputting 0 after writing 1 into the target word line, it can be considered that there are multiple word lines in the storage array in a simultaneously-on state.

[0087] S303. If there are at least two word lines in the storage array in a simultaneously-on state, the current value generated during the process of the target word line turning from on to off is detected.

[0088] S304. When the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold, it is determined that there is a repair fault in the target word line.

[0089] S305. According to the target word line and the corresponding relationship between each repair module in the repair circuit and each word line, the abnormal repair module corresponding to the target word line in the repair circuit is determined.

[0090] In the embodiments of the present application, after determining that there is a repair fault in the target word line, the usage of the internal repair circuit of the chip can be read, and according to the corresponding relationship between each repair module in the repair circuit and each word line, the abnormal repair module corresponding to the target word line in the repair circuit can be determined.

[0091] Among them, the above abnormal repair module can be an abnormal E-fuse repair module in the repair circuit.

[0092] The word line testing method provided by the embodiments of the present application can quickly locate the abnormal repair module in the repair circuit after determining that there is a repair fault in the target word line, which helps to quickly repair the abnormal situation and improve the repair efficiency.

[0093] Based on the content described in the above embodiments, in a feasible implementation manner of the present application, when the current value generated during the process of the target word line from being turned on to being turned off is greater than a preset current threshold, turn on the target word line and start the signal source in the storage array of the preset detection device.

[0094] That is, in the embodiments of the present application, when it is determined that the current value generated during the process of the target word line from being turned on to being turned off is greater than a preset current threshold, it can be preliminarily determined that there is a repair fault in the target word line due to the double repair problem. Since a current will be generated in the word line when a word line in the storage array is turned on, after preliminarily determining that there is a repair fault in the target word line due to the double repair problem, the preset detection device can be started to detect the signal source in the storage array, and the number of word lines in the storage array in the on state can be determined according to the number of detected signal sources.

[0095] Optionally, the above detection device can use an Emission Microscope (EMMI for short).

[0096] Among them, when the memory chip is working normally, when turning on a word line, EMMI can only detect the signal source generated by one word line in the storage array; when there is a repair fault in the memory chip due to the double repair problem, after turning on a word line, EMMI will detect the signal sources generated by multiple word lines in the storage array. Therefore, when there are at least two signal sources in the storage array, it can be further determined that there is a repair fault in the target word line.

[0097] In another feasible implementation manner of the present application, after preliminarily determining that there is a repair fault in the target word line due to the double repair problem, the control circuit (ARMWLB) of the target word line can also lead out the signal through a Focused Ionbeam (FIB), and further use an oscilloscope to verify the word line with the repair fault.

[0098] After the word line testing method provided by the embodiments of the present application determines that there is a repair failure in the target word line through testing, the testing result is further verified by a detection device, which can effectively improve the accuracy and reliability of the detection result, and solves the technical problem in the prior art that it is difficult to accurately detect the word line that fails due to the repair failure.

[0099] Based on the content described in the above embodiments, an embodiment of the present application also provides a word line testing device. Refer to Figure 4 , Figure 4 is a schematic diagram of a program module of a word line testing device provided in an embodiment of the present application. The word line testing device includes:

[0100] A first detection module 401, configured to detect whether there is a target word line in a failed state in the storage array after the storage array is repaired.

[0101] A first determination module 402, configured to, if there is a target word line in a failed state in the storage array, after writing a second value into the target word line, determine whether there are at least two word lines in the storage array in an on state at the same time according to the values output by each word line in the storage array.

[0102] A second detection module 403, configured to, if there are at least two word lines in the storage array in an on state at the same time, detect the current value generated during the process of the target word line from being turned on to being turned off.

[0103] A second determination module 404, configured to determine that there is a repair failure in the target word line when the current value generated during the process of the target word line from being turned on to being turned off is greater than a preset current threshold.

[0104] For the word line testing device provided by the embodiments of the present application, when the word line fails due to a repair failure, it will cause multiple word lines to be turned on at the same time, and the current value generated during the process of the target word line from being turned on to being turned off will also be greater than the current value in the normal state. Therefore, after the storage array is repaired, if there is a target word line in a failed state in the storage array, a second value is written into the target word line, and according to the values output by each word line in the storage array, it is determined whether there are multiple word lines in the storage array in an on state at the same time. If there are multiple word lines in the storage array in an on state at the same time, and the current value generated during the process of the target word line from being turned on to being turned off is greater than a preset current threshold, it can be determined that there is a repair failure in the target word line, and the technical problem in the prior art that it is difficult to accurately detect the word line that fails due to the repair failure is solved.

[0105] In a feasible implementation manner, the first detection module 401 is specifically configured to:

[0106] After writing a first value to each word line of the storage array, determine whether there is a target word line in the storage array in a failed state according to the values output by each word line.

[0107] In a feasible implementation manner, the first detection module 401 is specifically configured to:

[0108] After writing 0 to each word line of the storage array, read the values output by each word line; determine the word lines with the output value of 1 among each word line as the target word lines.

[0109] In a feasible implementation manner, the first determination module 402 is specifically configured to:

[0110] After writing 1 to the target word line, read the values output by each word line in the storage array; when there are at least two word lines in the storage array with the output value of 0, determine that there are at least two word lines in the storage array in a simultaneously turned-on state.

[0111] In a feasible implementation manner, the above device further includes:

[0112] An inspection module, configured to, when the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold, turn on the target word line and start a preset detection device to detect the signal source in the storage array; if there are at least two signal sources in the storage array, determine that there is a repair fault in the target word line.

[0113] In a feasible implementation manner, the second determination module 404 is further configured to:

[0114] After determining that there is a repair fault in the target word line, determine the abnormal repair module corresponding to the target word line in the repair circuit according to the target word line and the corresponding relationship between each repair module in the repair circuit and each word line.

[0115] It should be noted that the specific content executed by the first detection module 401, the first determination module 402, the second detection module 403, and the second determination module 404 described in the embodiments of the present application can refer to Figure 1 each step in the word line test method described in the embodiment shown in FIG. 2, which will not be elaborated here.

[0116] Furthermore, based on the content described in the above embodiments, an embodiment of the present application further provides a test device, which includes at least one processor and a memory; wherein, the memory stores computer execution instructions; the above at least one processor executes the computer execution instructions stored in the memory to implement each step in the word line test method described in the above embodiments, and can specifically refer to the content described in the above embodiments, which will not be elaborated here.

[0117] For a better understanding of the embodiments of the present application, refer to Figure 5 , Figure 5 which is a schematic diagram of the hardware structure of a testing device provided by an embodiment of the present application.

[0118] As Figure 5 shown, the electronic device 50 of this embodiment includes: a processor 501 and a memory 502; where:

[0119] The memory 502 is used to store computer-executable instructions;

[0120] The processor 501 is used to execute the computer-executable instructions stored in the memory to implement each step in the word line testing method described in the above embodiments. Specifically, reference can be made to the content described in the above embodiments, which will not be elaborated here.

[0121] Optionally, the memory 502 can be either independent or integrated with the processor 501.

[0122] When the memory 502 is independently provided, the device further includes a bus 503 for connecting the memory 502 and the processor 501.

[0123] Furthermore, based on the content described in the above embodiments, an embodiment of the present application also provides a computer-readable storage medium. The computer-readable storage medium stores computer-executable instructions. When the processor executes the computer-executable instructions, each step in the word line testing method described in the above embodiments can be implemented. Specifically, reference can be made to the content described in the above embodiments, which will not be elaborated here.

[0124] In several embodiments provided by the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods. For example, multiple modules can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other can be through some interfaces, indirect couplings or communication connections of devices or modules, and can be electrical, mechanical or other forms.

[0125] The modules described as separate components may or may not be physically separated. The components shown as modules may or may not be physical units, that is, they can be located in one place, or can be distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0126] In addition, in each embodiment of the present application, each functional module can be integrated in a processing unit, or each module can exist physically alone, or two or more modules can be integrated in one unit. The unit formed by the above modules can be implemented in the form of hardware, or in the form of a hardware plus software functional unit.

[0127] The integrated module implemented in the form of a software functional module can be stored in a computer-readable storage medium. The above software functional module stored in a storage medium includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to execute some steps of the methods described in each embodiment of the present application.

[0128] It should be understood that the above processor can be a central processing unit (English: Central Processing Unit, abbreviated as: CPU), and can also be other general-purpose processors, digital signal processors (English: Digital Signal Processor, abbreviated as: DSP), application specific integrated circuits (English: Application Specific Integrated Circuit, abbreviated as: ASIC), etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in combination with the application can be directly implemented by the execution of the hardware processor, or can be implemented by the combination of the hardware and software modules in the processor.

[0129] The memory may include a high-speed RAM memory, and may also include non-volatile storage NVM, such as at least one disk memory, and can also be a USB flash drive, a mobile hard disk, a read-only memory, a disk, or an optical disc, etc.

[0130] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For the convenience of representation, the bus in the drawings of the present application is not limited to only one bus or one type of bus.

[0131] The above storage medium may be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, a magnetic disk, or an optical disk. The storage medium may be any available medium accessible by a general-purpose or special-purpose computer.

[0132] An exemplary storage medium is coupled to the processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may be located in an application specific integrated circuit (ASIC). Of course, the processor and the storage medium may also exist as discrete components in an electronic device or a master device.

[0133] Those of ordinary skill in the art will understand that all or part of the steps of implementing the above method embodiments may be completed by hardware related to program instructions. The foregoing program may be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments; and the foregoing storage medium includes various media that can store program codes, such as ROM, RAM, magnetic disks, or optical disks.

[0134] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A word line testing method, characterized in that, The method includes: After the storage array finishes patching, detecting whether there is a target word line in the storage array that is in a failed state; If there is a target word line in the storage array that is in a failed state, after writing a second value in the target word line, determining whether there are at least two word lines in the storage array that are in an on state simultaneously according to the values output by each word line in the storage array; If there are at least two word lines in the storage array that are in an on state simultaneously, detecting the current value generated during the process of the target word line turning from on to off; When the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold, determining that there is a patching fault in the target word line.

2. The method according to claim 1, wherein The detecting whether there is a target word line in the storage array that is in a failed state includes: After writing a first value in each word line of the storage array, determining whether there is a target word line in the storage array that is in a failed state according to the values output by each word line.

3. The method according to claim 2, characterized in that The determining whether there is a target word line in the storage array that is in a failed state after writing a first value in each word line of the storage array includes: Writing 0 in each word line of the storage array and reading the values output by each word line; Determining the word lines with an output value of 1 among each word line as the target word lines.

4. The method according to claim 3, wherein The determining whether there are at least two word lines in the storage array that are in an on state simultaneously after writing a second value in the target word line and according to the values output by each word line in the storage array includes: Writing 1 in the target word line and reading the values output by each word line in the storage array; When there are at least two word lines in the storage array with an output value of 0, determining that there are at least two word lines in the storage array that are in an on state simultaneously.

5. The method according to any one of claims 1 to 4, characterized in that The determining that there is a patching fault in the target word line when the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold includes: When the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold, turning on the target word line and starting a preset detection device to detect the signal source in the storage array; If there are at least two signal sources in the storage array, determining that there is a patching fault in the target word line.

6. The method according to claim 5, wherein The preset current threshold is greater than the current value generated during the process of the target word line turning from on to off in a normal state.

7. The method according to claim 1, wherein After determining that there is a patching fault in the target word line, it further includes: According to the target word line and the corresponding relationship between each patching module in the patching circuit and each word line, determining the abnormal patching module corresponding to the target word line in the patching circuit.

8. A word line testing device, characterized in that, The device includes: A first detection module, configured to detect whether there is a target word line in the storage array that is in a failed state after the storage array finishes patching; A first determination module, configured to, if there is a target word line in a failed state in the storage array, after writing a second value into the target word line, determine whether there are at least two word lines in the storage array in a simultaneously-on state according to the values output by each word line in the storage array; A second detection module, configured to, if there are at least two word lines in the storage array in a simultaneously-on state, detect the current value generated during the process of the target word line turning from on to off; A second determination module, configured to determine that there is a repair fault in the target word line when the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold; 9. The device according to claim 8, characterized in that, The first detection module is specifically configured to: After writing a first value into each word line of the storage array, determine whether there is a target word line in a failed state in the storage array according to the values output by each word line.

10. The device according to claim 9, characterized in that The first detection module is specifically configured to: Write 0 into each word line of the storage array and read the values output by each word line; Determine the word lines with an output value of 1 among each word line as the target word line.

11. The device according to claim 10, characterized in that, The first determination module is specifically configured to: After writing 1 into the target word line, read the values output by each word line in the storage array; When there are at least two word lines with an output value of 0 in the storage array, determine that there are at least two word lines in the storage array in a simultaneously-on state.

12. The device according to any one of claims 8-11, characterized in that, It further includes: An inspection module, configured to, when the current value generated during the process of the target word line turning from on to off is greater than a preset current threshold, turn on the target word line and start a preset detection device to detect a signal source in the storage array; if there are at least two signal sources in the storage array, determine that there is a repair fault in the target word line.

13. The device according to claim 12, characterized in that, The preset current threshold is greater than the current value generated during the process of the target word line turning from on to off in a normal state.

14. The device according to claim 8, wherein The second determination module is further configured to: After determining that there is a repair fault in the target word line, determine an abnormal repair module corresponding to the target word line in the repair circuit according to the target word line and the corresponding relationship between each repair module in the repair circuit and each word line.

15. A test device, characterized in that, It includes: At least one processor and a memory; The memory stores computer execution instructions; The at least one processor executes the computer execution instructions stored in the memory, so that the at least one processor executes the word line test method according to any one of claims 1 to 7.

16. A computer-readable storage medium, characterized in that, Computer execution instructions are stored in the computer-readable storage medium, and when the processor executes the computer execution instructions, the word line test method according to any one of claims 1 to 7 is implemented.

Images