Method for manufacturing a semiconductor device and semiconductor device

Abstract

The application provides a semiconductor device manufacturing method and a semiconductor device. The method comprises the following steps: firstly, providing a first base comprising a first substrate and a first preliminary substrate which are stacked, and providing a second base comprising a second substrate and a first oxide layer which are stacked; then, removing part of the first preliminary substrate, and forming a third substrate comprising a body part and a plurality of protruding parts which are arranged on the body part; then, forming a second oxide layer on a surface of the third substrate which is far away from the first substrate, and bonding the second base to a surface of the second oxide layer which is far away from the third substrate, so that the first oxide layer is in contact with the second oxide layer; then, removing the first substrate and the body part and / or part of the protruding parts of the third substrate after bonding, so as to obtain a preliminary structure; finally, forming a device structure on an exposed surface of the second oxide layer in the preliminary structure, so as to obtain a target structure. The performance of the semiconductor device is ensured.

Description

Technical Field

[0001] This application relates to the field of semiconductors, and more specifically, to a method for manufacturing a semiconductor device, a semiconductor device, and a transistor. Background Technology

[0002] Ge has attracted considerable interest as a promising channel material for P-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) due to its advantages, such as higher carrier mobility compared to Si. However, since transistors only exhibit good performance when Ge is very thin, obtaining GOI (Germanium on Insulator) substrates with good thickness uniformity remains a challenge.

[0003] The information disclosed above in the background section is only intended to enhance the understanding of the background art of the art described herein. Therefore, the background art may contain certain information that does not constitute prior art known to those skilled in the art in this country. Summary of the Invention

[0004] The main objective of this application is to provide a method for fabricating a semiconductor device, a semiconductor device, and a transistor, in order to solve the problem of poor performance of semiconductor devices in the prior art due to the difficulty in controlling the thickness of Ge.

[0005] According to one aspect of the present invention, a method for fabricating a semiconductor device is provided. The method includes: providing a first substrate and a second substrate, the first substrate including a first substrate and a first pre-substrate stacked together, the second substrate including a second substrate and a first oxide layer stacked together; removing a portion of the first pre-substrate, the remaining first pre-substrate forming a third substrate, the third substrate including a body portion and a plurality of protrusions spaced apart on the body portion; forming a second oxide layer on a surface of the third substrate away from the first substrate, and bonding the second substrate on the surface of the second oxide layer away from the third substrate, the first oxide layer being in contact with the second oxide layer; removing the first substrate and the body portion and / or a portion of the protrusions of the bonded structure to obtain a pre-structure, the remaining plurality of protrusions forming a plurality of target protrusions; forming a device structure on the exposed surface of the second oxide layer in the pre-structure to obtain a target structure, the device structure being in contact with the target protrusions.

[0006] Optionally, forming a second oxide layer on the surface of the third substrate away from the first substrate includes: forming a preliminary oxide layer on the surface of the third substrate away from the first substrate; removing a portion of the preliminary oxide layer to expose the protrusion of the third substrate, with the remaining preliminary oxide layer forming a third oxide layer; forming a fourth oxide layer on the exposed surfaces of the third oxide layer and the protrusion of the third substrate, with the third oxide layer and the fourth oxide layer forming the second oxide layer.

[0007] Optionally, removing the body portion and / or part of the protrusions of the first substrate and the third substrate after bonding includes: removing the first substrate and removing the body portion and / or part of the protrusions of the third substrate to expose the third oxide layer; removing the third oxide layer to expose part of the fourth oxide layer.

[0008] Optionally, removing a portion of the pre-oxidation layer to expose the protrusion of the third substrate includes: removing a portion of the pre-oxidation layer using a CMP process to expose the protrusion of the third substrate.

[0009] Optionally, a device structure is formed on the exposed surface of the second oxide layer in the pre-structure to obtain the target structure, including: removing a portion of the sidewall of the target protrusion; forming a source and a drain on both sides of the target protrusion after removing the portion of the sidewall, wherein the source contacts the target protrusion and the fourth oxide layer respectively, and the drain contacts the target protrusion and the fourth oxide layer respectively; and forming a gate on the surface of the second substrate away from the first oxide layer.

[0010] Optionally, after removing part of the sidewall and forming source and drain electrodes on both sides of the target protrusion, the method further includes: removing part of the target protrusion, part of the source electrode, and part of the drain electrode; forming at least one first pre-reserved nanowire with the remaining target protrusion; forming a source electrode portion and at least one second pre-reserved nanowire with the remaining source electrode; forming a drain electrode portion and at least one third pre-reserved nanowire with the remaining drain electrode; the first pre-reserved nanowire, the second pre-reserved nanowire, and the third pre-reserved nanowire are connected in contact to form a target nanowire; the source electrode portion and the drain electrode portion are located on the fourth oxide layer on both sides of at least one target nanowire; and the two ends of the target nanowire are in contact with the source electrode portion and the drain electrode portion, respectively. Then, removing part of the fourth oxide layer and part of the first oxide layer, the remaining first oxide layer forms a first oxide portion and two spaced-apart second oxide portions; the two second oxide portions are located on the surface of the first oxide portion near the target nanowire; and the remaining fourth oxide layer forms spaced-apart third oxide portions; the projections of the source electrode portion and the drain electrode portion onto the first oxide layer cover the second oxide portions and the third oxide portions.

[0011] Optionally, removing a portion of the fourth oxide layer and a portion of the first oxide layer includes: removing a portion of the fourth oxide layer and a portion of the first oxide layer using a predetermined solution, wherein the predetermined solution includes an HF solution.

[0012] Optionally, the material of the third substrate includes germanium.

[0013] Optionally, the thickness of the target protrusion ranges from 5 nm to 100 nm.

[0014] Optionally, the material of the first oxide layer includes silicon dioxide.

[0015] According to another aspect of this application, a semiconductor device is also provided, said semiconductor device being manufactured using any of the methods described.

[0016] According to another aspect of this application, a transistor is also provided, which is made using any of the methods described, or is the semiconductor device described above.

[0017] In an embodiment of the present invention, the method for fabricating the semiconductor device firstly provides a first substrate comprising a first substrate and a first pre-substrate stacked together, and a second substrate comprising a second substrate and a first oxide layer stacked together; then, a portion of the first pre-substrate is removed, and the remaining first pre-substrate forms a third substrate comprising a body portion and a plurality of protrusions spaced apart on the body portion; subsequently, a second oxide layer is formed on the surface of the third substrate away from the first substrate, and the second substrate is bonded on the surface of the second oxide layer away from the third substrate, wherein the first oxide layer is in contact with the second oxide layer; subsequently, the body portion and / or a portion of the protrusions of the first substrate and the third substrate of the bonded structure are removed to obtain a pre-structure, and the remaining plurality of protrusions form a plurality of target protrusions; finally, a device structure is formed on the exposed surface of the second oxide layer in the pre-structure to obtain a target structure, wherein the device structure is in contact with the target protrusions. Compared to the problem of poor semiconductor device performance caused by the difficulty in controlling the thickness of Ge in existing technologies, the semiconductor device fabrication method of this application provides a first substrate and a second substrate, and then removes a portion of the first pre-substrate from the first substrate, so that the remaining first pre-substrate forms the body portion and a plurality of protrusions. This ensures that the thickness of the formed protrusions is relatively thin, and at the same time ensures that the protrusions have fewer defects and dislocations, that is, ensures that the quality of the protrusions is good. Then, by forming a second oxide layer and bonding the second substrate, and removing the body portion and / or a portion of the protrusions of the third substrate, the thickness of the obtained target protrusions is relatively thin and meets the actual requirements. This allows for the obtaining of a pre-structure with good quality and controllable thickness, that is, a GOI substrate with good quality and controllable thickness. This solves the problem of poor semiconductor device performance caused by the difficulty in controlling the thickness of Ge in existing technologies. Finally, by forming the device structure, the performance of the semiconductor device is guaranteed to be good. Attached Figure Description

[0018] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0019] Figure 1 A schematic flowchart of a method for fabricating a semiconductor device according to an embodiment of this application is shown;

[0020] Figures 2 to 18 The diagrams show the structural schematics obtained after each process step of the semiconductor device fabrication method according to embodiments of this application.

[0021] The above figures include the following reference numerals:

[0022] 10. First substrate; 20. Second substrate; 30. Second oxide layer; 40. Preparatory structure; 70. Source; 80. Drain; 90. Gate; 100. Target nanowire; 101. First substrate; 102. First preparatory substrate; 103. Third substrate; 104. Body portion; 105. Protrusion portion; 106. Target protrusion portion; 107. First preparatory nanowire; 201. Second substrate; 202. First oxide layer; 203. First oxide portion; 204. Second oxide portion; 301. Preparatory oxide layer; 302. Third oxide layer; 303. Fourth oxide layer; 304. Third oxide portion; 701. Source portion; 702. Second preparatory nanowire; 801. Drain portion; 802. Third preparatory nanowire. Detailed Implementation

[0023] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0024] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0026] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be an intermediate element present. Furthermore, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element via a third element.

[0027] As mentioned in the background section, the existing technology suffers from poor semiconductor device performance due to the difficulty in controlling the thickness of Ge. To address this issue, in a typical embodiment of this application, a method for fabricating a semiconductor device, a semiconductor device, and a transistor are provided.

[0028] According to an embodiment of this application, a method for fabricating a semiconductor device is provided.

[0029] Figure 1 This is a flowchart of a method for fabricating a semiconductor device according to an embodiment of this application. For example... Figure 1 As shown, the method includes the following steps:

[0030] Step S101, as follows Figures 2 to 3 As shown, a first substrate 10 and a second substrate 20 are provided. The first substrate 10 includes a first substrate 101 and a first pre-substrate 102 stacked together, and the second substrate 20 includes a second substrate 201 and a first oxide layer 202 stacked together.

[0031] Step S102, as follows Figures 2 to 4 As shown, a portion of the first pre-substrate 102 is removed, and the remaining first pre-substrate 102 forms a third substrate 103. The third substrate 103 includes a body portion 104 and a plurality of protrusions 105 spaced apart on the body portion 104.

[0032] Step S103, as follows Figure 7 As shown, a second oxide layer 30 is formed on the surface of the third substrate 103 away from the first substrate 101, and the second substrate 20 is bonded to the surface of the second oxide layer 30 away from the third substrate 103. The first oxide layer 202 is in contact with the second oxide layer 30, resulting in the following: Figure 8 The structure shown;

[0033] Step S104, as follows Figures 8 to 11 As shown, the body portion 104 and / or part of the protrusion 105 of the first substrate 101 and the third substrate 103 after bonding are removed to obtain a preparatory structure 40, and the remaining multiple protrusions 105 form multiple target protrusions 106.

[0034] Step S105: A device structure is formed on the exposed surface of the second oxide layer in the above-mentioned preparatory structure to obtain the target structure, wherein the device structure is in contact with the target protrusion.

[0035] In the above-described method for fabricating a semiconductor device, firstly, a first substrate comprising a first substrate and a first pre-substrate stacked together is provided, and a second substrate comprising a second substrate and a first oxide layer stacked together is provided; then, a portion of the first pre-substrate is removed, and the remaining first pre-substrate forms a third substrate comprising a body portion and a plurality of protrusions spaced apart on the body portion; subsequently, a second oxide layer is formed on the surface of the third substrate away from the first substrate, and the second substrate is bonded to the surface of the second oxide layer away from the third substrate, wherein the first oxide layer is in contact with the second oxide layer; subsequently, the body portion and / or a portion of the protrusions of the first substrate and the third substrate of the bonded structure are removed to obtain a pre-structure, and the remaining plurality of protrusions form a plurality of target protrusions; finally, a device structure is formed on the exposed surface of the second oxide layer in the pre-structure to obtain a target structure, wherein the device structure is in contact with the target protrusions. Compared to the problem of poor semiconductor device performance caused by the difficulty in controlling the thickness of Ge in existing technologies, the semiconductor device fabrication method of this application provides the first substrate and the second substrate, and then removes a portion of the first pre-substrate from the first substrate, so that the remaining first pre-substrate forms the body portion and a plurality of protrusions. This ensures that the thickness of the formed protrusions is relatively thin, and at the same time ensures that the defects and dislocations of the protrusions are few, that is, ensures that the quality of the protrusions is good. Then, by forming the second oxide layer and bonding the second substrate, and removing the body portion and / or a portion of the protrusions of the third substrate, the thickness of the obtained target protrusions is relatively thin and meets the actual requirements. This allows for the obtaining of a pre-structure with good quality and controllable thickness, that is, a GOI substrate with good quality and controllable thickness. This solves the problem of poor semiconductor device performance caused by the difficulty in controlling the thickness of Ge in existing technologies. Finally, by forming the above device structure, the performance of the semiconductor device is guaranteed to be good.

[0036] Among them, such as Figure 4 As shown, since the protrusion 105 in the third substrate 103 is located above the body portion 104, the body portion is formed first, and then the protrusion is formed. This ensures that dislocations and defects in the third substrate are located in the body portion, further ensuring the quality of the protrusion, and thus further ensuring the performance of the semiconductor device.

[0037] In the prior art, the transistors can only exhibit good performance when the Ge layer is relatively thin. However, in the above-mentioned semiconductor device fabrication process, by first providing a relatively thick first pre-substrate (Ge layer) and then removing part of the first pre-substrate, the thickness of the obtained target protrusion is ensured to be relatively thin. At the same time, since the dislocations and defects of the first pre-substrate are mainly located in the body portion, the growth quality of the target protrusion is ensured to be good, which further ensures that the semiconductor device formed by the target protrusion has good performance.

[0038] In addition, the thickness of the protrusion in the predetermined direction is greater than the thickness of the active region in the predetermined direction, which is perpendicular to the first substrate.

[0039] To further ensure the better performance of the aforementioned semiconductor device, according to a specific embodiment of this application, a second oxide layer is formed on the surface of the third substrate away from the first substrate, including: Figure 5 As shown, a preliminary oxide layer 301 is formed on the surface of the third substrate 103 that is away from the first substrate 101; as Figure 6 As shown, a portion of the aforementioned pre-oxide layer 301 is removed, exposing the protrusion 105 of the third substrate 103, and the remaining pre-oxide layer 301 forms the third oxide layer 302; as Figure 7 As shown, a fourth oxide layer 303 is formed on the exposed surfaces of the third oxide layer 302 and the protrusion 105 of the third substrate 103, and the second oxide layer 30 is formed on the third oxide layer 302 and the fourth oxide layer 303. By forming the pre-oxide layer on the surface of the third substrate away from the first substrate, the third substrate can be protected by the pre-oxide layer. By removing part of the pre-oxide layer, the protrusion is exposed, and the thickness of the protrusion can be directly obtained by removing the body portion to obtain a thinner protrusion. By forming the fourth oxide layer on the exposed surfaces of the third oxide layer and the protrusion of the third substrate, it is ensured that the third substrate can be protected by the third protective layer and the fourth protective layer, further ensuring the better performance of the semiconductor device.

[0040] According to another specific embodiment of this application, the removal of the body portion and / or part of the protrusion of the first substrate and the third substrate after bonding includes: Figures 9 to 10 As shown, the first substrate is removed, and the body portion 104 and / or part of the protrusion 105 of the third substrate 103 are removed, exposing the third oxide layer 302; as Figures 10 to 11As shown, the third oxide layer 302 is removed, exposing part of the fourth oxide layer 303. By removing the body portion and / or part of the protrusions of the first substrate and the third substrate, the remaining protrusions are made thin enough to meet practical requirements. Furthermore, by removing the third oxide layer, a GOI substrate can be obtained relatively easily, and the thickness of the protrusions in the GOI substrate is ensured to be thin. This further ensures that the target structure formed on the pre-structure has good performance, further ensures that the semiconductor device has good performance, and at the same time ensures that the semiconductor device fabrication process is relatively simple.

[0041] Specifically, if the thickness of the protrusion meets the actual requirements, only the body portion of the first substrate and the third substrate of the bonded structure is removed. If the thickness of the protrusion is greater than the actual requirements, the body portion of the first substrate and the third substrate of the bonded structure, as well as part of the protrusion, are removed, further ensuring that the thickness of the remaining protrusion meets the actual requirements.

[0042] In one specific embodiment, the above-mentioned pre-substrate is a GOI substrate.

[0043] To further simplify the fabrication process of the aforementioned semiconductor device, according to another specific embodiment of this application, removing a portion of the aforementioned pre-oxide layer to expose the protrusions of the third substrate includes: using a CMP process to remove a portion of the aforementioned pre-oxide layer, thereby exposing the protrusions of the third substrate. Removing the aforementioned pre-oxide layer using a CMP process ensures that a portion of the aforementioned pre-oxide layer can be easily removed, further simplifying the fabrication process of the aforementioned semiconductor device.

[0044] According to a specific embodiment of this application, a device structure is formed on the exposed surface of the second oxide layer in the above-described pre-structure to obtain the target structure, including: Figure 12 As shown, a portion of the sidewall of the aforementioned target protrusion 106 is removed; as Figure 13 As shown, after removing part of the sidewall, a source electrode 70 and a drain electrode 80 are formed on both sides of the target protrusion 106, respectively. The source electrode 70 is in contact with the target protrusion 106 and the fourth oxide layer 303, respectively, and the drain electrode 80 is in contact with the target protrusion 106 and the fourth oxide layer 303, respectively. Figure 14As shown, a gate 90 is formed on the surface of the second substrate 201 away from the first oxide layer 202. By removing part of the sidewall of the target protrusion and forming the source and drain on both sides of the target protrusion, a transistor device can be obtained. Furthermore, by forming the gate on the surface of the second substrate away from the first oxide layer, a back-gate transistor can be obtained relatively easily, and the thickness of the target protrusion in the transistor is thin and the growth quality is good, further ensuring good performance of the semiconductor device.

[0045] Specifically, such as Figures 11 to 12 As shown, only a portion of the above-mentioned preparatory structure 40 will be described, that is, only one target protrusion 106 will be selected for description.

[0046] In one specific embodiment, on the GOI substrate, the active region is first defined, then Ni metal is sputtered, and after annealing, the source and drain of NiGe are formed. Finally, the gate Ti / Pt is formed.

[0047] To further ensure the better performance of the aforementioned semiconductor device, according to another specific embodiment of this application, after forming source and drain electrodes on both sides of the target protrusion respectively after removing part of the sidewall, the method further includes: as follows Figures 15 to 16 As shown, by removing a portion of the target protrusion 106, a portion of the source electrode 70, and a portion of the drain electrode 80, the remaining target protrusion 106 forms at least one first pre-existing nanowire 107, the remaining source electrode 70 forms a source electrode portion 701 and at least one second pre-existing nanowire 702, and the remaining drain electrode 80 forms a drain electrode portion 801 and at least one third pre-existing nanowire 802. The first pre-existing nanowire 107, the second pre-existing nanowire 702, and the third pre-existing nanowire 802 are connected in contact to form a target nanowire 100. The source electrode portion 701 and the drain electrode portion 801 are located on the fourth oxide layer 303 on both sides of at least one target nanowire 100, and the two ends of the target nanowire 100 are in contact with the source electrode portion 701 and the drain electrode portion 801, respectively. Figures 17 to 18As shown, after removing part of the fourth oxide layer and part of the first oxide layer, the remaining first oxide layer forms a first oxide portion 203 and two spaced-apart second oxide portions 204. The two second oxide portions 204 are located on the surface of the first oxide portion 203 near the target nanowire 100. The remaining fourth oxide layer forms a spaced-apart third oxide portion 304. The projections of the source portion 701 and the drain portion 801 on the first oxide layer cover the second oxide portions 204 and the third oxide portions 304. By removing a portion of the target protrusion, a portion of the source electrode, and a portion of the drain electrode, at least one target nanowire can be obtained. Each target nanowire includes a first pre-reserved nanowire, a second pre-reserved nanowire, and a third pre-reserved nanowire. That is, the target nanowire is composed of a portion of the target protrusion, a portion of the source electrode, and a portion of the drain electrode, which ensures that the target nanowire has a thinner thickness and better growth quality. By removing a portion of the fourth oxide layer and a portion of the first oxide layer, the target structure is obtained, ensuring that the target nanowire in the target structure has a thinner thickness and better growth quality, further ensuring that the target structure has better performance.

[0048] in, Figures 15 to 17 This is a top view, specifically... Figure 15 for Figure 14 Top view.

[0049] Specifically, the target structure, including the aforementioned target nanowire, is a FinFET (Fin Field Effect Transistor). Its specific implementation method is as follows: firstly, the gate region is defined on the aforementioned GOI substrate, P / B implantation is performed on the aforementioned source and the aforementioned drain, then Fin is defined by electron beam etching, then the active region is defined, finally the gate dielectric is deposited, and then the contact between the aforementioned source and the aforementioned drain is completed.

[0050] Furthermore, the target structure comprising multiple target nanowires is a GAA nanowire structure. The specific implementation method is as follows: firstly, the gate region is defined on the GOI substrate, and P / B implantation is performed on the source and drain. Then, multiple Fins are defined by electron beam etching, and then the active region is defined. Then, under ultrasonic assistance, the obtained structure is immersed in a diluted HF solution to remove SiO2 at the bottom of the target nanowires. In addition, a high-k dielectric layer needs to be deposited to cover the target nanowires and the surrounding structure, and to complete the contact between the source and drain.

[0051] In one specific embodiment, the appearance of the target structure is not limited to that shown in the figures, as long as the thickness of the nanowire is obtained by the above-described semiconductor device fabrication method.

[0052] In addition, in practical applications, the thickness of the source and drain portions should be greater than the thickness of the target nanowire.

[0053] According to another specific embodiment of this application, removing a portion of the fourth oxide layer and a portion of the first oxide layer includes: removing a portion of the fourth oxide layer and a portion of the first oxide layer using a predetermined solution, wherein the predetermined solution includes an HF solution. Removing a portion of the fourth oxide layer and a portion of the first oxide layer using the predetermined solution ensures that the fourth oxide layer and the first oxide layer can be removed relatively easily without damaging the target nanowire, further ensuring a simpler fabrication process for the semiconductor device and better performance of the semiconductor device.

[0054] Specifically, the structure is then immersed in a diluted HF solution under ultrasonic assistance to remove the SiO2 at the bottom of the target nanowire. In addition, a high-k dielectric layer is deposited to cover the target nanowire and the surrounding structure and to complete the source-drain contact.

[0055] According to a specific embodiment of this application, the material of the third substrate includes germanium. Since the material of the third substrate is germanium, it ensures that the material of the target protrusion is also germanium, guaranteeing that a thinner and higher-quality Ge layer can be obtained, further ensuring the better performance of the target structure formed on the GOI substrate.

[0056] It should be noted that the fabrication process of the aforementioned semiconductor devices is not limited to the materials mentioned above, and substrates made of other materials can also be fabricated.

[0057] Specifically, the material of the third substrate is germanium.

[0058] In addition, the material of the third oxide layer is silicon dioxide, and the material of the fourth oxide layer is Al2O3.

[0059] According to another specific embodiment of this application, the thickness of the aforementioned target protrusion ranges from 5 nm to 100 nm. Since the thickness of the aforementioned target protrusion ranges from 5 nm to 100 nm, it ensures that the thickness of the aforementioned target protrusion can be controlled according to actual needs.

[0060] According to another specific embodiment of this application, the material of the first oxide layer includes silicon dioxide.

[0061] Of course, the material is not limited to silicon dioxide. Other materials such as Si or Si3N4 can also be used, as long as the material can be removed by selective etching, thus achieving control over the thickness of the Ge layer.

[0062] In addition, the materials of the first substrate and the second substrate mentioned above include Si.

[0063] Specifically, by selectively epitaxially layering a buffer substrate (the first preparatory substrate mentioned above), most of the dislocations and defects in Ge are confined to the lower region (i.e., dislocations and defects are confined to the body portion). Meanwhile, after photolithography is used to etch the protrusions on the buffer layer to a size larger than the active region area, the thickness of the Ge layer is controlled by depositing the preparatory oxide layer SiO2 and the third oxide layer. Since only one more photolithography step is needed in the fabrication process of the GOI substrate, the thickness of the Ge layer can be controlled by the thickness of SiO2, ensuring that the fabrication process of the semiconductor device is relatively simple, while achieving control of the thickness of the target protrusion (Ge layer).

[0064] In one specific embodiment, the fabrication process of the above-mentioned semiconductor device is based on the UTB (Ultra-Thin Insulator on Planar SI Technology) Ge layer, and can produce transistors with high electron mobility.

[0065] This application also provides a semiconductor device, which is manufactured using any of the methods described above.

[0066] The aforementioned semiconductor device is fabricated using any of the methods described above. Compared to the problem in the prior art where the thickness of Ge is difficult to control, resulting in poor performance of semiconductor devices, the semiconductor device of this application, by providing the first substrate and the second substrate, and then removing a portion of the first pre-substrate from the first substrate, allows the remaining first pre-substrate to form the body portion and multiple protrusions. This ensures that the thickness of the formed protrusions is relatively thin, while also ensuring that there are fewer defects and dislocations in the protrusions, thus ensuring good quality of the protrusions. Furthermore, by forming the second oxide layer and bonding the second substrate, and removing the body portion and / or a portion of the protrusions from the third substrate, the thickness of the resulting target protrusions is relatively thin and meets actual requirements. This allows for the obtaining of a pre-structure with good quality and controllable thickness, i.e., a GOI substrate with good quality and controllable thickness. This solves the problem in the prior art where the thickness of Ge is difficult to control, resulting in poor performance of semiconductor devices. Finally, by forming the aforementioned device structure, good performance of the semiconductor device is ensured.

[0067] This application also provides a transistor, which is manufactured using any of the methods described above, or is a semiconductor device as described above.

[0068] The transistors described above are fabricated using any of the methods described above, or are semiconductor devices as described above. Compared to the problem in the prior art where the thickness of Ge is difficult to control, resulting in poor performance of semiconductor devices, the transistors of this application, by providing the first substrate and the second substrate, and then removing a portion of the first pre-substrate from the first substrate, allow the remaining first pre-substrate to form the body portion and multiple protrusions. This ensures that the thickness of the formed protrusions is relatively thin, while also ensuring that there are fewer defects and dislocations in the protrusions, thus ensuring good quality of the protrusions. Furthermore, by forming the second oxide layer and bonding the second substrate, and removing the body portion and / or a portion of the protrusions from the third substrate, the thickness of the resulting target protrusions is relatively thin and meets actual requirements. This allows for the obtaining of a pre-structure with good quality and controllable thickness, i.e., a GOI substrate with good quality and controllable thickness. This solves the problem in the prior art where the thickness of Ge is difficult to control, resulting in poor performance of semiconductor devices. Finally, by forming the device structure described above, good performance of the semiconductor device is ensured.

[0069] In one specific embodiment, the thinness of the target nanowire in the transistor ensures a high electron mobility for the transistor.

[0070] In the above embodiments of the present invention, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0071] As can be seen from the above description, the embodiments of this application achieve the following technical effects:

[0072] 1) In the method for fabricating the semiconductor device described above in this application, firstly, a first substrate including a first substrate and a first pre-substrate stacked together is provided, and a second substrate including a second substrate and a first oxide layer stacked together is provided; then, a portion of the first pre-substrate is removed, and the remaining first pre-substrate forms a third substrate including a body portion and a plurality of protrusions spaced apart on the body portion; then, a second oxide layer is formed on the surface of the third substrate away from the first substrate, and the second substrate is bonded on the surface of the second oxide layer away from the third substrate, with the first oxide layer in contact with the second oxide layer; then, the body portion and / or a portion of the protrusions of the first substrate and the third substrate of the bonded structure are removed to obtain a pre-structure, and the remaining plurality of protrusions form a plurality of target protrusions; finally, a device structure is formed on the exposed surface of the second oxide layer in the pre-structure to obtain a target structure, with the device structure in contact with the target protrusions. Compared to the problem of poor semiconductor device performance caused by the difficulty in controlling the thickness of Ge in existing technologies, the semiconductor device fabrication method of this application provides the first substrate and the second substrate, and then removes a portion of the first pre-substrate from the first substrate, so that the remaining first pre-substrate forms the body portion and a plurality of protrusions. This ensures that the thickness of the formed protrusions is relatively thin, and at the same time ensures that the defects and dislocations of the protrusions are few, that is, ensures that the quality of the protrusions is good. Then, by forming the second oxide layer and bonding the second substrate, and removing the body portion and / or a portion of the protrusions of the third substrate, the thickness of the obtained target protrusions is relatively thin and meets the actual requirements. This allows for the obtaining of a pre-structure with good quality and controllable thickness, that is, a GOI substrate with good quality and controllable thickness. This solves the problem of poor semiconductor device performance caused by the difficulty in controlling the thickness of Ge in existing technologies. Finally, by forming the above device structure, the performance of the semiconductor device is guaranteed to be good.

[0073] 2) The semiconductor device described in this application is manufactured using any of the methods described above. Compared to the problem in the prior art where the thickness of Ge is difficult to control, resulting in poor performance of semiconductor devices, the semiconductor device described in this application provides the first substrate and the second substrate, and then removes a portion of the first pre-substrate from the first substrate, so that the remaining first pre-substrate forms the body portion and a plurality of protrusions. This ensures that the thickness of the formed protrusions is relatively thin, and at the same time ensures that there are fewer defects and dislocations in the protrusions, that is, it ensures that the quality of the protrusions is good. Then, by forming the second oxide layer and bonding the second substrate, and removing the body portion and / or a portion of the protrusions from the third substrate, the thickness of the obtained target protrusions is relatively thin and meets the actual requirements. This allows for the obtaining of a pre-structure with good quality and controllable thickness, that is, a GOI substrate with good quality and controllable thickness. This solves the problem in the prior art where the thickness of Ge is difficult to control, resulting in poor performance of semiconductor devices. Finally, by forming the above device structure, the performance of the semiconductor device is guaranteed to be good.

[0074] 3) The transistor described in this application is manufactured using any of the methods described above, or is a semiconductor device described above. Compared with the problem of poor semiconductor device performance due to the difficulty in controlling the thickness of Ge in the prior art, the transistor described in this application, by providing the first substrate and the second substrate, and then removing part of the first pre-substrate in the first substrate, so that the remaining first pre-substrate forms the body portion and a plurality of protrusions, ensures that the thickness of the formed protrusions is thin, and at the same time ensures that there are fewer defects and dislocations in the protrusions, that is, ensures that the quality of the protrusions is good. Then, by forming the second oxide layer and bonding the second substrate, and removing the body portion and / or part of the protrusions of the third substrate, the thickness of the obtained target protrusions is thin and meets the actual requirements, so that a pre-structure with good quality and controllable thickness can be obtained, that is, a GOI substrate with good quality and controllable thickness can be obtained, solving the problem of poor semiconductor device performance due to the difficulty in controlling the thickness of Ge in the prior art. Finally, by forming the device structure, the performance of the semiconductor device is guaranteed to be good.

[0075] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for fabricating a semiconductor device, characterized in that, The method includes: A first substrate and a second substrate are provided, the first substrate comprising a first substrate and a first pre-substrate stacked together, and the second substrate comprising a second substrate and a first oxide layer stacked together; A portion of the first pre-substrate is removed, and the remaining first pre-substrate forms a third substrate. The third substrate includes a body portion and a plurality of protrusions spaced apart on the body portion. The material of the third substrate includes germanium. A second oxide layer is formed on the surface of the third substrate away from the first substrate, and the second substrate is bonded on the surface of the second oxide layer away from the third substrate, wherein the first oxide layer is in contact with the second oxide layer; The first substrate and the third substrate of the bonded structure are removed, or the first substrate and the third substrate of the bonded structure and part of the protrusions are removed to obtain a preliminary structure, and the remaining protrusions form a plurality of target protrusions. A device structure is formed on the exposed surface of the second oxide layer in the pre-structure to obtain the target structure, wherein the device structure is in contact with the target protrusion.

2. The method according to claim 1, characterized in that, A second oxide layer is formed on the surface of the third substrate away from the first substrate, comprising: A pre-oxide layer is formed on the surface of the third substrate that is away from the first substrate; A portion of the pre-oxide layer is removed, exposing the protrusion of the third substrate, and the remaining pre-oxide layer forms the third oxide layer; A fourth oxide layer is formed on the exposed surface of the protrusion of the third oxide layer and the third substrate, and the third oxide layer and the fourth oxide layer form the second oxide layer.

3. The method according to claim 2, characterized in that, Removing the body portion of the first substrate and the third substrate after bonding, or removing the body portion and part of the protrusion of the first substrate and the third substrate after bonding, includes: Remove the first substrate; Remove the body portion of the third substrate, or remove the body portion and part of the protrusion of the third substrate, so that the third oxide layer is exposed; Remove the third oxide layer to expose part of the fourth oxide layer.

4. The method according to claim 2, characterized in that, Removing a portion of the pre-oxidized layer to expose the protrusions of the third substrate includes: The pre-oxidation layer is partially removed using a CMP process, thereby exposing the protrusions of the third substrate.

5. The method according to claim 2, characterized in that, A device structure is formed on the exposed surface of the second oxide layer in the pre-structure to obtain the target structure, comprising: Remove part of the sidewall of the target protrusion; After removing part of the sidewall, a source electrode and a drain electrode are formed on both sides of the target protrusion, respectively. The source electrode is in contact with the target protrusion and the fourth oxide layer, respectively, and the drain electrode is in contact with the target protrusion and the fourth oxide layer, respectively. A gate is formed on the surface of the second substrate away from the first oxide layer.

6. The method according to claim 5, characterized in that, After removing part of the sidewall, and forming source and drain electrodes on both sides of the target protrusion respectively, the method further includes: A portion of the target protrusion, a portion of the source electrode, and a portion of the drain electrode are removed. The remaining target protrusion forms at least one first pre-reserved nanowire. The remaining source electrode forms a source portion and at least one second pre-reserved nanowire. The remaining drain electrode forms a drain portion and at least one third pre-reserved nanowire. The first pre-reserved nanowire, the second pre-reserved nanowire, and the third pre-reserved nanowire are connected in contact to form a target nanowire. The source portion and the drain portion are located on the fourth oxide layer on both sides of at least one target nanowire. The two ends of the target nanowire are in contact with the source portion and the drain portion, respectively. A portion of the fourth oxide layer and a portion of the first oxide layer are removed, and the remaining first oxide layer forms a first oxide portion and two spaced-apart second oxide portions. The two second oxide portions are located on the surface of the first oxide portion near the target nanowire. The remaining fourth oxide layer forms a spaced-apart third oxide portion. The projections of the source portion and the drain portion onto the first oxide layer cover the second oxide portions and the third oxide portions.

7. The method according to claim 6, characterized in that, Removing a portion of the fourth oxide layer and a portion of the first oxide layer includes: A predetermined solution, including an HF solution, is used to remove a portion of the fourth oxide layer and a portion of the first oxide layer.

8. The method according to any one of claims 1 to 7, characterized in that, The thickness of the target protrusion ranges from 5nm to 100nm.

9. The method according to any one of claims 1 to 7, characterized in that, The material of the first oxide layer includes silicon dioxide.

10. A semiconductor device, characterized in that, The semiconductor device is manufactured using the method described in any one of claims 1 to 9.

11. A transistor, characterized in that, The transistor is manufactured using the method described in any one of claims 1 to 9, or is the semiconductor device described in claim 10.

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