A method for rapid optimization of neutral busbar surge arrester parameters, electronic equipment, and readable storage medium.

Abstract

A method, electronic device, and readable storage medium for rapid optimization of neutral bus arrester parameters are disclosed. Based on the main circuit topology of a symmetrical bipolar flexible DC system composed of a half-bridge submodule MMC converter, the method establishes equivalent circuits for different fault conditions, including DC pole-to-ground faults, single-phase-to-ground faults in the valve-side windings connected to the transformer delta connection, and neutral line open-circuit faults. It obtains the energy absorbed by the neutral bus arrester and, based on the relationship between the energy absorbed by the neutral bus arrester and its protection level, optimizes the energy absorption of the arrester under different fault conditions with the goal of balancing the energy absorbed. This allows for rapid optimization of the neutral bus arrester parameters, offering advantages of speed, economy, and efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of insulation coordination of direct current transmission system, and particularly relates to a neutral bus arrester parameter rapid optimization method, an electronic device and a readable storage medium. BACKGROUND

[0002] With the further expansion of new energy development scale and power transmission distance, the demand for using direct current transmission to realize large-scale new energy grid connection is also increasing. Insulation coordination design of direct current transmission system is one of the key technologies for direct current transmission project implementation, and the insulation level is directly related to the cost of the entire direct current project. The purpose of insulation coordination is to ensure that the insulation level design is reasonable, and at the same time, the equipment can be safely, economically and reliably operated under various overvoltages. In recent years, neutral bus overvoltage faults have occurred in many direct current projects in China. The reason is that the insulation coordination design is not reasonable, which leads to rapid aging or breakdown of the equipment connected to the neutral bus, causing a large amount of direct and indirect economic losses.

[0003] The insulation coordination design of direct current transmission system is generally carried out in two stages. In the preliminary design stage of the project scheme, the coordination design of the insulation protection system of the direct current transmission system and even the neutral bus is initially completed by referring to relevant national standards and previous engineering experience. Then, in the detailed design stage of the project, one of the tasks of detailed design is to carry out detailed electromagnetic transient simulation verification. The rationality of the preliminary system insulation coordination design is verified for different operation and fault conditions. A large number of parameter adjustments, improvements and repeated verifications are usually accompanied. The simulation verification and parameter adjustment often lead to an increase in time and design cost

[0004] Currently, in the process of setting the neutral bus arrester in the system, the electromagnetic transient simulation of the entire DC system is involved, and the insulation coordination scheme is finally determined through the optimization and adjustment of parameters. The insulation coordination setting requires strong professional and technical requirements for personnel. In the early stage of the engineering scheme, the setting of the neutral bus arrester is usually determined by referring to the relevant national standards of insulation coordination and the past engineering experience. However, the current national standards related to insulation coordination of flexible DC converter stations are not perfect, and the influencing factors of arrester configuration in different flexible DC projects are also different. It is necessary to calculate various overvoltages that may occur on the neutral bus, which consumes a long time and restricts the construction efficiency of the DC transmission project, causing inconvenience to the actual application of insulation coordination in the DC transmission system. Patent application CN104578127B discloses an insulation coordination method for a flexible DC-based intelligent power distribution system. The method comprehensively analyzes the topology structure, operation mode and fault mode of the flexible DC-based intelligent power distribution system through system analysis, arrester configuration, overvoltage simulation calculation and insulation coordination setting steps, and makes preliminary arrester configuration for the system on this basis. The method is relatively complex and cannot quickly realize the parameter optimization calculation of the neutral bus arrester, thereby affecting the efficiency of the DC system design work. SUMMARY

[0005] In order to overcome the defects of the prior art, the purpose of the present application is to provide a neutral bus arrester parameter fast optimization method, electronic equipment and readable storage medium. By analyzing the fault loop of the system when the DC pole line is grounded, the single-phase grounding of the valve side winding of the connecting transformer and the open circuit fault of the neutral line, the various overvoltages that may occur on the neutral bus are obtained. According to the internal relationship between the energy absorbed by the neutral bus arrester and the protection level of the arrester under different faults, the fast optimization of the neutral bus arrester parameters that meet the system protection requirements is finally realized. It is easy to operate, time-consuming and low in cost.

[0006] In order to achieve the above purpose, the technical scheme adopted by the present application is as follows:

[0007] A neutral bus arrester parameter fast optimization method, specifically comprising the following steps:

[0008] Step 1, determine the fault types that affect the setting of the neutral bus arrester parameters in the system, and establish the equivalent circuit of the arrester under different fault types to calculate the energy absorbed by the arrester and the operating wave protection level.

[0009] Step 2, according to the relationship between the energy absorbed by the neutral bus arrester and the operating wave protection level under different faults obtained in step 1, select the lowest operating wave protection level according to the maximum energy absorbed by the arrester under different fault scenarios.

[0010] The fault type affecting parameter setting of the neutral bus arrester in the system includes: DC pole line ground fault, valve side winding single-phase ground fault of a transformer delta connection or neutral line open circuit fault.

[0011] The step 1 determines the fault type affecting parameter setting of the neutral bus arrester in the system, establishes an arrester charging equivalent circuit under different fault types, and establishes a single pole of a symmetric bipolar flexible DC system as an analysis object based on a single-line diagram of the symmetric bipolar flexible DC system composed of half-bridge sub-modules MMC.

[0012] The step 1, when the system has a DC pole line ground fault, establishes an equivalent circuit of a DC pole line to ground equivalent capacitor charging the arrester under a commutator blocking condition, and obtains energy absorbed by the neutral bus arrester without considering pole line and neutral line resistances:

[0013] Energy absorbed by the neutral bus arrester The expression is:

[0014]

[0015] In the formula, C0 is an equivalent capacitor of the commutator and the DC pole line to ground, U dc is a maximum operating voltage of the DC pole line to ground before the fault.

[0016] The step 1, when the system has a valve side winding single-phase ground fault of a transformer delta connection, establishes an equivalent circuit of an AC side power supply charging the arrester through a neutral line under a commutator blocking condition, and obtains energy absorbed by the neutral bus arrester according to changes of equivalent circuit characteristic parameters before and after the arrester is turned on:

[0017] Before the neutral bus arrester is turned on, a current flowing through the neutral bus arrester can be ignored, a current of the neutral bus smoothing reactor is the same as a neutral line current A loop current under cosine voltage excitation can be expressed as:

[0018]

[0019] L c = 2L T +L arm +L n (3)

[0020]

[0021]

[0022]

[0023] In the formula, the excitation voltage source is U 2p is the peak value of the AC line voltage connected to the valve side of the transformer, τ1 is the time constant of the fault circuit before the arrester is turned on, L T is the leakage inductance connected to the valve side of the transformer, L arm is the bridge arm reactance of the MMC converter valve, L n is the inductance of the neutral line smoothing reactor, is the worst fault occurrence angle, is the impedance angle of the fault circuit before the arrester is turned on, R line is the equivalent resistance of the neutral line, L line is the equivalent inductance of the neutral line;

[0024] When the neutral bus arrester is turned on at t0, the neutral bus arrester is equivalent to a constant voltage source with an operating wave protection level U SIPL , and the current of the neutral bus DC smoothing reactor can be expressed as:

[0025]

[0026] The neutral line current is:

[0027]

[0028]

[0029] In the formula, U SIPL is the arrester operating wave protection level (SIPL), τ2 is the time constant of the neutral line, determined by formula (2);

[0030] The energy absorbed by the arrester is:

[0031]

[0032] In the formula, is the energy absorbed by the neutral bus arrester, and the integration time T is determined by the system protection strategy, taking the longest action time of the AC circuit breaker.

[0033] The step 1, when the system occurs a neutral line open circuit fault, the fault circuit is constituted in the manner of the converter being locked out, an equivalent circuit is established for charging the arrester by the maximum operating current before the converter fails, without considering the neutral line resistance, and the energy absorbed by the neutral bus arrester is calculated:

[0034] Without considering the pole line resistance, the energy absorbed by the arrester is:

[0035]

[0036] At this time, assume that the MMC converter protection delay time is t p , the converter is charged to the maximum operating current I dc before the fault before the protection action; Linearly increases with the increase of the arrester protection level.

[0037] The step 2 further comprises: drawing a curve of the neutral bus arrester absorbed energy and the operating wave protection level under different types of faults, selecting the intersection of the curve as the object of the optimization analysis, selecting the intersection point that meets the maximum arrester absorbed energy and the lowest operating wave protection level, and determining the neutral bus arrester absorbed energy and the operating wave protection level according to the coordinate values corresponding to the intersection point.

[0038] The step 2 further comprises: requiring that the operating wave protection level is not lower than 1.8 times of the DC voltage drop.

[0039] An electronic device comprises a processor, a memory, and a program or instructions stored on the memory and executable on the processor, and the program or instructions are executed by the processor to implement the steps in the above optimization method.

[0040] A readable storage medium, the readable storage medium stores a program or instructions, and the program or instructions are executed by a processor to implement the steps in the above optimization method.

[0041] Compared with the prior art, the present application has the following advantages:

[0042] The present application takes the neutral bus arrester absorbed energy balance as the optimization target, respectively obtains the equivalent circuits of the DC pole line ground fault, the valve side winding single-phase ground fault of the connection transformer delta type connection, and the neutral line open circuit fault, obtains the relationship between the neutral bus arrester absorbed energy and the protection level under different fault conditions, and realizes the rapid optimization of the neutral bus arrester parameters; greatly simplifies the calculation work of the neutral bus arrester insulation coordination analysis, can efficiently complete the insulation coordination setting of the neutral bus arrester, enables the equipment to be safely, economically and reliably operated under various overvoltages, and forms a tool for the rapid optimization setting of the neutral bus arrester. BRIEF DESCRIPTION OF DRAWINGS

[0043] Figure 1 It is a single line diagram of the symmetrical bipolar flexible DC system.

[0044] Figure 2 It is a DC pole line ground fault circuit.

[0045] Figure 3For the single-phase ground fault loop of the valve side winding connected with the delta connection of the transformer.

[0046] Figure 4 For the open circuit fault loop of the neutral line.

[0047] Figure 5 For the equivalent circuit of the DC pole line ground.

[0048] Figure 6 For the single-phase ground equivalent circuit of the valve side winding connected with the delta connection of the transformer.

[0049] Figure 7 For the equivalent circuit of the open circuit fault of the neutral line.

[0050] Figure 8 For the relationship between the energy and voltage protection level of the neutral bus arrester under three different faults. DETAILED DESCRIPTION

[0051] The application will be described in detail below with reference to the accompanying drawings.

[0052] The single-line diagram of the symmetrical bipolar flexible DC system is shown in Figure 1 , wherein the MMC converter is composed of half-bridge sub-modules, and the neutral bus voltage is very low when the system is in normal operation; when the DC system fails, overvoltage is prone to occur on the neutral bus, and a neutral bus arrester EL needs to be configured to limit the overvoltage level; the neutral bus arrester EL is installed on the line side of the DC smoothing reactor L n , and plays a role in limiting the overvoltage of the neutral bus and protecting the equipment connected to the neutral bus, and also helps to reduce the overall insulation requirements of the flexible DC converter and other related equipment.

[0053] The overvoltage level of the neutral bus is related to the loop characteristics, working state, and impedance variation characteristics of the fault or operation process of the system, and among various faults of the DC system, the DC pole line ground, the single-phase ground of the valve side winding connected with the delta connection of the transformer, and the open circuit fault of the neutral line have the most serious impact on the neutral bus arrester; the causes of overvoltage need to be analyzed in combination with these fault types, the corresponding relationship between the energy absorbed by the neutral bus arrester and the protection level needs to be researched, and the optimal design parameters of the neutral bus arrester need to be determined.

[0054] Fault scenario 1: when the system has a DC pole line ground fault, the half-bridge sub-module MMC converter is locked after a short time delay, and a loop is formed between the DC pole line ground point and the arrester EL ground point as shown in Figure 2 ; the energy absorbed by the neutral bus arrester mainly comes from the energy on the equivalent capacitance of the converter and the pole line to ground, and the equivalent circuit of the equivalent capacitance of the DC pole line to ground charging the arrester is shown in Figure 5 .

[0055] Fault scenario 2: when single-phase grounding fault occurs in the valve side winding of the delta connection transformer, the half-bridge module MMC converter is locked after a short time delay, and the single-phase grounding point of the valve side winding of the delta connection transformer and the grounding point of the arrester EL form a loop as shown in Figure 3 The equivalent circuit of the AC side power supply charging the arrester through the neutral line is established as shown in Figure 6 .

[0056] Fault scenario 3: when the neutral line open circuit fault occurs in the system, the neutral bus grounding point of the receiving end converter station and the arrester EL grounding point of the sending end converter station form a loop as shown in Figure 4 The system DC current charges the neutral bus arrester at a constant current until the converter is locked or the AC circuit breaker is opened, and the equivalent circuit of the arrester charged by the maximum operating current before the converter fault is established as shown in Figure 7 .

[0057] A neutral bus arrester parameter rapid optimization method, specifically comprising the following steps:

[0058] Step 1, determine the fault type that affects the parameter setting of the neutral bus arrester of the system, when the DC pole line grounding fault, the single-phase grounding fault of the valve side winding of the delta connection transformer or the neutral line open circuit fault occurs in the system, the overvoltage level of the neutral bus is affected the most; based on the single-line diagram of the symmetric bipolar flexible DC system composed of half-bridge sub-modules MMC, taking the single pole of the symmetric bipolar flexible DC system as the optimization basis, the equivalent circuit of the arrester under different fault types is established, and the arrester energy absorption and operating wave protection level are calculated, specifically:

[0059] Based on the single pole of the symmetric bipolar flexible DC system, the composition mode of the fault loop under the condition of converter lockout when the DC pole line grounding fault occurs in the system is obtained, the equivalent circuit of the arrester charged by the equivalent capacitance of the DC pole line to ground is established, and the energy absorbed by the neutral bus arrester is obtained without considering the resistance of the pole line and the neutral line:

[0060] The expression of the energy absorbed by the neutral bus arrester is:

[0061]

[0062] In the formula, C0 is the equivalent capacitance of the converter and the DC pole line to ground, U dc is the maximum operating voltage of the DC pole line to ground before the fault. The energy absorbed by the neutral bus arrester is determined by the energy stored by the equivalent capacitance before the fault, and is linearly related to the equivalent capacitance and the square of the DC pole line operating voltage before the fault, and is independent of the fault duration;

[0063] ​Based on the single pole of the symmetrical bipolar flexible DC system, the composition of the fault loop under the condition of converter blocking when the single-phase grounding fault of the valve side winding of the connection transformer Δ type connection occurs is obtained, the equivalent circuit of the AC side power supply charging the neutral line arrester is established, and the energy absorbed by the neutral bus arrester is obtained according to the changes of the characteristic parameters of the equivalent circuit before and after the arrester is turned on:

[0064] Before the neutral bus arrester is turned on, the current flowing through the neutral bus arrester can be ignored, and the current of the neutral bus smoothing reactor is the same as the neutral line current , and the loop current under the excitation of the cosine voltage can be expressed as:

[0065]

[0066] L c = 2L T + L arm + L n (3)

[0067]

[0068]

[0069]

[0070] In the formula, the excitation voltage source is U 2p , τ1 is the time constant of the fault loop before the arrester is turned on, L T is the leakage inductance of the valve side of the connection transformer, L arm is the bridge arm reactance of the MMC converter valve, L n is the inductance of the neutral line smoothing reactor, is the worst fault occurrence angle, is the impedance angle of the fault loop before the arrester is turned on, R line is the equivalent resistance of the neutral line, L line is the equivalent inductance of the neutral line.

[0071] When the neutral bus arrester is turned on at t0, the neutral bus arrester is equivalent to a constant voltage source with an operating wave protection level U SIPL , and the current of the neutral bus DC smoothing reactor can be expressed as:

[0072] The neutral line current

[0073] is:

[0074] ​​

[0075]

[0076] In the formula, U SIPL SIPL is the arrester operating wave protection level, τ2 is the neutral line time constant, determined by formula (2);

[0077] The energy absorbed by the arrester is:

[0078]

[0079] In the formula, is the energy absorbed by the neutral bus arrester, and the integral time T is determined by the system protection strategy, and is the longest action time of the AC circuit breaker;

[0080] Based on the single-pole of the symmetrical bipolar flexible DC system, the composition mode of the fault loop under the condition of converter blocking when the system has a neutral line open circuit fault is obtained, the equivalent circuit of the maximum operating current before the converter fault charging the arrester is established, and the energy absorbed by the neutral bus arrester is calculated without considering the neutral line resistance:

[0081] Without considering the pole line resistance, the energy absorbed by the arrester is:

[0082]

[0083] At this time, it is assumed that the MMC converter protection delay time is t p , and the converter charges the arrester with the maximum operating current I dc before the fault; linearly increases with the increase of the arrester protection level;

[0084] Step 2, according to step 1, when the system has a DC pole line ground fault, the equivalent circuit of the DC pole line to ground equivalent capacitance charging the arrester is established, and combined with the expression of the energy absorbed by the neutral bus arrester , it is known that the energy absorbed by the neutral bus arrester is determined by the energy stored by the equivalent capacitance before the fault, and is irrelevant to the value of the operating wave protection level;

[0085] According to step 1, when the system has a single-phase ground fault of the valve side winding connected to the transformer Δ type connection, the equivalent circuit of the AC side power supply through the neutral line charging the arrester is established, and it is known that the peak value of the neutral bus arrester cooperation current decreases with the increase of the protection level, and combined with the energy absorbed by the neutral bus arrester the expression of the absorbed energy of the neutral bus arrester and the protection level of the operating wave, it is found that the absorbed energy of the arrester increases with the increase of the protection level of the operating wave when the protection level of the operating wave is lower than 100 kV, and the absorbed energy of the arrester decreases with the increase of the protection level of the operating wave when the protection level of the operating wave is higher than 100 kV, and the working point of the arrester under the overvoltage protection condition is selected in the region where the absorbed energy decreases with the increase of the protection level of the operating wave;

[0086] According to step 1, when the system has a neutral line open circuit fault, the established equivalent circuit of the maximum operating current of the converter before the fault charging the arrester is combined with the expression of the absorbed energy of the neutral bus arrester , it is found that the absorbed energy of the neutral bus arrester linearly increases with the increase of the protection level of the operating wave; according to the regulation standard that the protection level of the arrester is not lower than 1.8 times of the DC voltage drop of the symmetrical bipolar DC power transmission system under the maximum steady state operating condition of the single pole, the lower limit of the protection level of the neutral bus arrester is obtained as:

[0087]

[0088] The relationship curves of the absorbed energy of the neutral bus arrester and the protection level of the operating wave under the conditions of the DC pole line ground fault, the single-phase ground fault of the valve side winding of the Δ type connection transformer and the neutral line open circuit fault are shown in Figure 8 , the intersection points of different curves are selected as the objects of the optimization analysis, the absorbed energy of the arrester under different fault scenarios is compared, the lowest protection level of the operating wave is selected according to the maximum absorbed energy of the arrester under different fault scenarios, and meanwhile the protection level of the operating wave is required to be not lower than the regulation standard that the protection level of the operating wave is not lower than 1.8 times of the DC voltage drop, and then the absorbed energy of the neutral bus arrester and the protection level of the operating wave are determined.

[0089] Take Figure 8 as an example, when the three fault curves intersect at A1, A2 and A3 points, the maximum absorbed energy of the arrester is A1 point, about 12000 kJ, A2 and A3 points are lower than the energy level, and the protection level of the operating wave is selected as 200 kV corresponding to A1; when the three fault curves intersect at A1, B2 and B3 points, the maximum absorbed energy of the arrester is B2 and B3, and A1 point is lower than the energy level, and the protection level of the operating wave is selected as 140 kV corresponding to B2.

Claims

1. A method for rapid optimization of parameters of a neutral bus arrester, characterized in that: Specifically comprising the following steps: Step 1, determining the fault type affecting the parameter setting of the neutral bus arrester in the system, establishing the charging equivalent circuit of the arrester under different fault types, and calculating the energy absorbed by the arrester and the operating wave protection level; Step 2, according to the relationship between the energy absorbed by the neutral bus arrester and the operating wave protection level under different faults obtained in step 1, selecting the lowest operating wave protection level according to the maximum energy absorbed by the arrester under different fault scenarios; The step 2 specifically comprises drawing the relationship curve between the energy absorbed by the neutral bus arrester and the operating wave protection level under different types of faults, selecting the intersection point of the curve as the object of optimization analysis, selecting the intersection point with the lowest operating wave protection level while satisfying the maximum energy absorbed by the arrester, and determining the energy absorbed by the neutral bus arrester and the operating wave protection level according to the coordinate values corresponding to the intersection point.

2. The method for fast optimization of parameters of a neutral bus surge arrester according to claim 1, characterized in that: The fault type affecting the parameter setting of the neutral bus arrester in the system in step 1 includes: DC pole line ground fault, valve side winding single-phase ground fault of Δ type connection of transformer or neutral line open circuit fault.

3. The method according to claim 2, characterized in that: The step 1 of determining the fault type affecting the parameter setting of the neutral bus arrester in the system further comprises establishing the equivalent circuit of the arrester based on the single-line diagram of the symmetric bipolar flexible DC system composed of half-bridge sub-modules MMC, and taking the single pole of the symmetric bipolar flexible DC system as the analysis object.

4. The method according to claim 3, characterized in that: In the step 1, when the system occurs DC pole line ground fault, the composition mode of the fault loop under the converter blocking condition is established, the equivalent circuit of the equivalent capacitance of the DC pole line to ground charging the arrester is established, and the energy absorbed by the neutral bus arrester is obtained without considering the resistance of the pole line and the neutral line: Neutral bus arrester absorbs energy The expression is: where Co is the converter and DC pole line to ground equivalent capacitance, U dc is the maximum operating voltage of the DC pole line to ground before the fault.

5. The method for fast optimization of parameters of a neutral bus surge arrester according to claim 3, characterized in that: In the step 1, when the system occurs valve side winding single-phase ground fault of Δ type connection of transformer, the composition mode of the fault loop under the converter blocking condition is established, the equivalent circuit of the AC side power supply charging the arrester through the neutral line is established, and the energy absorbed by the neutral bus arrester is obtained according to the change of the equivalent circuit characteristic parameters before and after the arrester is turned on: Before the neutral bus arrester is conducted, the current flowing through the neutral bus arrester can be ignored, and the current of the neutral bus smoothing reactor is the same as the neutral line current Under the excitation of the cosine voltage, the loop current can be represented as: L c = 2L T + L arm + L n (3) In the formula, the excitation voltage source is U 2p is the peak value of the AC line voltage connected to the valve side of the transformer, τ1 is the time constant of the fault circuit before the arrester is turned on, L T is the leakage inductance connected to the valve side of the transformer, L arm is the bridge arm reactance of the MMC converter valve, L n is the inductance of the neutral line smoothing reactor, is the worst fault occurrence angle, is the impedance angle of the fault circuit before the arrester is turned on, R line is the equivalent resistance of the neutral line, L line is the equivalent inductance of the neutral line; When the neutral bus arrester is turned on at t0, the neutral bus arrester is equivalent to a constant voltage source with an operating wave protection level U SIPL , and the current of the neutral bus DC smoothing reactor can be represented as: Neutral current Is: In the formula, U SIPL SIPL is the arrester operating wave protection level, τ2 is the neutral line time constant, is determined from equation (2); Light emitting diode (LED) light source is: In the formula, To absorb the energy of the neutral bus arrester, the integration time T is determined by the system protection strategy, and the longest action time of the AC circuit breaker is taken.

6. The method for fast optimization of parameters of a neutral bus surge arrester according to claim 3, characterized in that: In the step 1, when the system occurs neutral line open circuit fault, the composition mode of the fault loop under the converter blocking condition is established, the equivalent circuit of the maximum operating current before the converter fault charging the arrester is established, and the energy absorbed by the neutral bus arrester is calculated without considering the resistance of the neutral line: Without considering the resistance of the lightning line, the arrester absorbs energy is: At this time, assume that the MMC converter protection delay time is t p , the converter is charged to the maximum operating current I dc before the fault before the protection action; increases linearly with the increase of the protection level of the surge arrester.

7. The method for fast optimization of parameters of a neutral bus surge arrester according to claim 1, characterized in that: The step 2 further comprises requiring the operating wave protection level to be not less than 1.8 times of the DC voltage drop.

8. An electronic device, comprising: The processor, the memory and the program or instructions stored on the memory and executable on the processor are included, and the processor executes the program or instructions to realize the steps in the neutral bus arrester parameter fast optimization method according to any one of claims 1 to 7.

9. A readable storage medium characterized by: The program or instructions are stored on the readable storage medium, and the processor executes the program or instructions to realize the steps in the neutral bus arrester parameter fast optimization method according to any one of claims 1 to 7.

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