Method for determining leakage energy consumption and semiconductor memory

Abstract

An embodiment of the present application provides a method for determining leakage energy consumption and a semiconductor memory, the method comprising: writing a high-level signal to an array area of ​​a memory through a power supply to obtain the total heat dissipated by the memory, the memory comprising a storage capacitor in the array area, and switching tubes in the array area and a peripheral area, the total heat dissipated by the memory comprising the leakage energy consumption of the switching tube and a first heat dissipated by the capacitor, the capacitor comprising the storage capacitor and an equivalent capacitor of the switching tube; discharging the total stored energy of the capacitor, obtaining a measured second heat dissipated by the capacitor, and determining the second heat dissipated by the capacitor as the total stored energy of the capacitor; and determining the leakage energy consumption of the switching tube based on the total heat dissipated by the memory and the second heat dissipated by the capacitor.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and relates to but is not limited to a method for determining leakage energy consumption and a semiconductor memory. Background Art

[0002] When designing semiconductor memory, such as dynamic random access memory (DRAM), low energy consumption is usually pursued. The implementation methods of low energy consumption include: 1. The storage energy of DRAM should account for as high a proportion of the energy input from the power supply to DRAM as possible; 2. Under the premise of realizing the storage function, the storage energy of DRAM should be as low as possible; 3. The storage energy of DRAM should be retained for as long as possible. Among them, the size of leakage energy consumption affects the retention time of DRAM storage energy, so it is necessary to provide a method to determine the size of leakage energy consumption. Summary of the invention

[0003] In view of this, an embodiment of the present application provides a method for determining leakage energy consumption and a semiconductor memory.

[0004] In a first aspect, an embodiment of the present application provides a method for determining leakage energy consumption, the method comprising: writing a high-level signal to an array area of ​​a memory through a power supply to obtain the total heat dissipated by the memory, the memory comprising a storage capacitor in the array area, a switch tube in the array area and a peripheral area, the total heat dissipated by the memory comprising the leakage energy consumption of the switch tube and a first heat dissipated by the capacitor, the capacitor comprising the storage capacitor and an equivalent capacitor of the switch tube; discharging the total stored energy of the capacitor, obtaining a measured second heat dissipated by the capacitor, and determining the second heat dissipated by the capacitor as the total stored energy of the capacitor; determining the leakage energy consumption of the switch tube based on the total heat dissipated by the memory and the second heat dissipated by the capacitor.

[0005] In some embodiments, the method further includes: when the energy consumption of the power supply includes not only the total energy consumption of the memory but also the third heat dissipated inside the power supply, determining that the first heat dissipated by the capacitor is equal to the total stored energy of the capacitor when a high-level signal is written to the array area of ​​the memory through the power supply.

[0006] In some embodiments, the method further includes: when a high-level signal is written to the array area of ​​the memory through a power supply, determining the total energy consumption of the memory, the total energy consumption of the memory including the total storage energy of the capacitor, the leakage energy consumption of the switching tube and the first heat dissipated by the capacitor; based on the total energy consumption of the memory and the second heat dissipated by the capacitor, determining the leakage energy consumption of the switching tube.

[0007] In some embodiments, discharging the total stored energy of the capacitor and obtaining the measured second heat dissipated by the capacitor includes: obtaining a measured first temperature difference of the memory during the process of discharging the total stored energy of the capacitor; obtaining the specific heat capacity and mass of the memory material; and determining the second heat dissipated by the capacitor based on the first temperature difference of the memory, the specific heat capacity and the mass of the memory material.

[0008] In some embodiments, obtaining a measured first temperature difference of the memory during the process of discharging the total stored energy of the capacitor includes: after writing a high-level signal to an array area of ​​the memory through a power supply, changing the state of the array area to a power-off state; when changing the state of the array area to the power-off state, obtaining a measured first temperature of the memory; when the charge in the capacitor is completely discharged, obtaining a measured second temperature of the memory; and determining a first temperature difference of the memory based on the first temperature of the memory and the second temperature of the memory.

[0009] In some embodiments, the process of discharging the total stored energy of the capacitor, obtaining a measured first temperature difference of the memory includes: after writing a high-level signal to the array area of ​​the memory through a power supply, changing the state of the array area to a standby state and turning off the refresh function; when the state of the array area is changed to a standby state and the refresh function is turned off, obtaining a measured third temperature of the memory; when the charge in the capacitor is completely discharged, obtaining a measured fourth temperature of the memory; and determining the first temperature difference of the memory based on the third temperature of the memory and the fourth temperature of the memory.

[0010] In some embodiments, the method of writing a high-level signal to an array area of ​​a memory through a power supply to obtain a total amount of heat dissipated by the memory includes: obtaining a measured second temperature difference of the memory during the process of writing a high-level signal to an array area of ​​the memory through a power supply; obtaining the specific heat capacity and mass of the memory material; and determining the total amount of heat dissipated by the memory based on the second temperature difference of the memory, the specific heat capacity and mass of the memory material.

[0011] In some embodiments, the process of writing a high-level signal to the array area of ​​the memory through a power supply, obtaining a measured second temperature difference of the memory includes: obtaining a measured fifth temperature of the memory when starting to write a high-level signal to the array area of ​​the memory through a power supply; obtaining a measured sixth temperature of the memory when ending writing a high-level signal to the array area of ​​the memory through a power supply; and determining the second temperature difference of the memory based on the fifth temperature of the memory and the sixth temperature of the memory.

[0012] In some embodiments, when the substrate material of the memory includes a silicon material, the specific heat capacity of the memory material is equivalent to the specific heat capacity of the silicon material.

[0013] In some embodiments, the temperature of the memory is measured by a temperature sensor.

[0014] In some embodiments, when a high-level signal is written to an array area of ​​a memory through a power supply, the total energy consumption of the memory is determined, including: obtaining a relationship graph between current, voltage and time of the memory; determining a time period during which a high-level signal is written to the array area of ​​the memory through a power supply; based on the time period, determining in the relationship graph the current value and voltage value of the memory during the process of writing a high-level signal to the array area of ​​the memory through a power supply; and determining the total energy consumption of the memory based on the time period, the current value and the voltage value.

[0015] In some embodiments, when a high-level signal is written to the array area of ​​the memory through the power supply, the total energy consumption of the memory is determined, including: when a third heat dissipated inside the power supply is less than a preset threshold, when a high-level signal is written to the array area of ​​the memory through the power supply, the energy consumption of the power supply is determined; and the energy consumption of the power supply is determined as the total energy consumption of the memory.

[0016] In some embodiments, when the third heat dissipated inside the power supply is less than a preset threshold, the energy consumption of the power supply is determined when a high-level signal is written to the array area of ​​the memory through the power supply, including: when the first operation set is performed N times to the array area of ​​the memory through the power supply, the total energy consumption of the power supply is determined, and the first operation set includes the following operations performed in sequence: writing a high-level signal to the array area to discharge the total stored energy of the capacitor, N is an integer greater than or equal to 1; based on the total energy consumption of the power supply, the energy consumption of the power supply when the high-level signal is written to the array area of ​​the memory through the power supply is determined.

[0017] In some embodiments, when executing N first operation sets to the array area of ​​the memory through the power supply, determining the total energy consumption of the power supply includes: obtaining the percentage of power consumption of the power supply during the execution of the N first operation sets; and determining the total energy consumption of the power supply based on the obtained capacity of the power supply and the percentage of power consumption of the power supply.

[0018] In some embodiments, the array area includes: all array regions of the memory or a sub-array region of the memory.

[0019] In a second aspect, an embodiment of the present application provides a semiconductor memory for executing the above-mentioned method for determining leakage energy consumption.

[0020] In some embodiments, the semiconductor memory is a dynamic random access memory DRAM chip.

[0021] In the embodiment of the present application, first, a high-level signal is written to the array area of ​​the memory through the power supply to obtain the total heat dissipated by the memory, wherein the total heat dissipated by the memory includes the leakage energy consumption of the switch tube and the first heat dissipated by the capacitor; then, in order to determine the size of the leakage energy consumption, the total storage energy of the capacitor is discharged to obtain the measured second heat dissipated by the capacitor, so that the second heat dissipated by the capacitor is equal to the first heat dissipated by the capacitor; finally, the leakage energy consumption of the switch tube is obtained by subtracting the second heat dissipated by the capacitor from the total heat dissipated by the memory. It can be seen that in the embodiment of the present application, the determination of the leakage energy consumption is achieved by converting the first heat dissipated by the capacitor, which is not easy to obtain, into the second heat dissipated by the capacitor, which can be measured, which not only makes the operation and implementation more convenient, but also does not change the original structure of the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1A A flow chart of a method for determining leakage energy consumption provided in an embodiment of the present application;

[0023] Figure 1B A circuit diagram of a storage unit in an array area provided in an embodiment of the present application;

[0024] Figure 2A A flowchart of another method for determining leakage energy consumption provided in an embodiment of the present application;

[0025] Figure 2B A schematic diagram of the total energy consumption of a memory in an operating state provided by an embodiment of the present application;

[0026] Figure 3A A flowchart of another method for determining leakage energy consumption provided in an embodiment of the present application;

[0027] Figure 3B A flowchart of another method for determining leakage energy consumption provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] The exemplary embodiments disclosed in the present application will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the specific embodiments described herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present application and to fully convey the scope disclosed in the present application to those skilled in the art.

[0029] In the following description, a large number of specific details are given in order to provide a more thorough understanding of the present application. However, it is obvious to those skilled in the art that the present application can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features well known in the art are not described; that is, all features of the actual embodiments are not described here, and well-known functions and structures are not described in detail.

[0030] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0031] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present application necessarily has the first element, component, region, layer or part.

[0032] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0033] The present application embodiment provides a method for determining leakage energy consumption, such as Figure 1A As shown, the method includes the following steps S101 to S103:

[0034] Step S101: writing a high-level signal to an array area of ​​a memory through a power supply to obtain a total amount of heat dissipated by the memory, wherein the memory includes a storage capacitor in the array area, and switches in the array area and a peripheral area, and the total amount of heat dissipated by the memory includes leakage energy consumption of the switch and a first amount of heat dissipated by the capacitor, and the capacitor includes the storage capacitor and an equivalent capacitor of the switch;

[0035] Here, the memory may be a DRAM, a static random access memory (SRAM), etc. In general, the memory includes an array area and a peripheral area, wherein the array area is the core area of ​​the memory for storing data; the peripheral area is the control area of ​​the memory for controlling the writing and reading of data in the array area. The array area includes a storage capacitor and a switch tube, wherein the storage capacitor is used to store data; the switch tube in the array area is used to control the input and output of data in the storage capacitor. The peripheral area also includes a switch tube for forming a control circuit to realize the control of writing and reading data in the array area. The switch tubes in the array area and the peripheral area may both be metal-oxide-semiconductor field-effect transistors (MOSFET). The equivalent capacitance of the switch tube refers to the equivalent capacitance of the gate oxide layer capacitance, the space charge layer capacitance, and the depletion layer capacitance in the switch tubes in the array area and the peripheral area.

[0036] The following uses DRAM as an example to illustrate the process of writing or reading data in the array area. Generally, the array area includes a number of storage cells, each of which is used to store one bit of data. The data stored in all storage cells in the array area are combined to obtain the storage information of the array area, and the peripheral area is used to control the time and size of writing or reading data in the array area. Figure 1B FIG. 4 shows a circuit diagram of a memory cell in the array area. Figure 1B As shown, the storage unit includes a storage capacitor C and a switch tube T, the gate of the switch tube T is connected to the word line (Word Line, WL), the drain is connected to the bit line (Bit Line, BL), and the source is connected to the storage capacitor C. A storage unit represents logical 1 and 0 by the amount of charge stored in the storage capacitor C, or the high and low voltage difference across the storage capacitor C, thereby realizing the storage of information. The on and off of the switch tube T determines whether the information stored in the storage capacitor C is allowed or prohibited to be read and rewritten. Among them, BL is the only channel for the outside world to access the storage capacitor C. When the switch tube T is turned on, the storage capacitor C can be read or written through BL. The peripheral area can control the on and off of the switch tube T by controlling the size of the WL voltage, thereby controlling the charging and discharging of the storage capacitor C to realize the writing or reading of the stored information.

[0037] In some embodiments, the voltage applied to one plate of the storage capacitor C is half of the power supply voltage Vcc, that is, (1 / 2) Vcc. When data "1" is to be written, voltage Vcc is applied to BL, and this voltage is conducted from the drain to the source through the turned-on switch tube T, and finally loaded on the other plate of the storage capacitor C. At this time, the voltage difference across the storage capacitor C is + (1 / 2) Vcc; when data "0" is to be written, voltage 0 is applied to BL, which causes the voltage on the other plate of the storage capacitor C to be 0. At this time, the voltage difference across the storage capacitor C is - (1 / 2) Vcc. It can be seen that in the two states of writing data "1" and writing data "0", the voltage difference across the storage capacitor C is equal in magnitude, but opposite in direction. Therefore, the direction of the voltage difference across the storage capacitor C can be used to determine whether the stored data is "0" or "1".

[0038] The state in which the power supply writes a high-level signal to the array area of ​​the memory is the operating state of the memory. The power supply writes a high-level signal to the array area of ​​the memory, that is, the power supply writes data "1" to the array area of ​​the memory. Since the total heat dissipated by the memory when the high-level signal is written to the array area of ​​the memory needs to be obtained in step S101, in order to ensure that before the high-level signal is written to the array area of ​​the memory, the energy stored in the storage capacitor and the equivalent capacitor of the switch tube will not affect the total heat dissipated by the memory when the high-level signal is written to the array area of ​​the memory. In some embodiments, the implementation of step S101 can first write data "0" to the array area of ​​the memory as a base, and then write data "1" to the array area of ​​the memory.

[0039] In the process of writing a high-level signal to the array area of ​​the memory by the power supply, since the memory does not do work to the outside, the energy written by the power supply to the memory is either stored by the memory or dissipated by heat generation. Since the memory includes storage capacitors in the array area, switching tubes in the array area and the peripheral area, the energy stored by the memory refers to the energy stored in the storage capacitor and the equivalent capacitance of the switching tube. In addition, since in the process of writing a high-level signal to the array area of ​​the memory by the power supply, the equivalent capacitance of the storage capacitor and the switching tube will generate heat dissipation, and the switching tube will also generate heat dissipation due to leakage, the energy dissipated by heat generation includes the dissipation of heat of the storage capacitor, the dissipation of heat of the equivalent capacitance of the switching tube, and the dissipation of heat of leakage, and these three parts together are the total heat dissipated by the memory. Since the leakage energy consumption is completely used to generate heat dissipation, the dissipation of leakage heat is equal to the leakage energy consumption, so the total heat dissipated by the memory includes the leakage energy consumption of the switching tube and the first heat dissipated by the capacitor, wherein the capacitor here includes the storage capacitor and the equivalent capacitance of the switching tube.

[0040] In some embodiments, the method of obtaining the total heat dissipated by the memory may include: first measuring the temperature difference on the surface of the memory before and after the power supply writes a high-level signal to the array area of ​​the memory;

[0041] The total heat dissipated by the memory is then obtained according to the heat calculation formula Q=CMΔT, where C is the specific heat capacity of the memory object, M is the mass of the memory object, and ΔT is the increased (decreased) temperature of the memory object (ie, the temperature difference).

[0042] In some embodiments, the array area may be all array areas of the memory or sub-array areas of the memory, that is, the array area here may be all array areas in the memory or part of the array area in the memory. In the case where the leakage energy consumption of the sub-array area needs to be determined, the implementation of step S101 may include: writing a high-level signal to the sub-array area of ​​the memory through a power supply, that is, only writing a high-level signal to the sub-array area of ​​the leakage energy consumption to be determined, so that the method provided in the embodiment of the present application can be applied to more scenarios without changing the original memory structure.

[0043] Step S102: discharging the total stored energy of the capacitor, obtaining a measured second heat dissipated by the capacitor, and determining the second heat dissipated by the capacitor as the total stored energy of the capacitor;

[0044] Here, discharging the total stored energy of the capacitor means completely discharging the total stored energy of the capacitor. The second heat dissipated by the capacitor refers to the heat dissipated to the environment during the process of discharging the total stored energy of the capacitor. According to the law of conservation of energy, in the process of discharging the total stored energy of the capacitor, the total stored energy of the capacitor will be dissipated to the environment in the form of heat. Therefore, the second heat dissipated by the capacitor is equal to the total stored energy of the capacitor.

[0045] In some embodiments, a method for obtaining the second heat dissipated by the capacitor may include: first measuring the temperature difference on the surface of the memory before and after the total stored energy of the discharge capacitor is discharged;

[0046] Then, according to the heat calculation formula Q=CMΔT, the second heat dissipated by the capacitor is obtained.

[0047] Wherein, C is the specific heat capacity of the storage object, M is the mass of the storage object, and ΔT is the increased (decreased) temperature of the storage object (ie, the temperature difference).

[0048] Step S103: determining the leakage energy consumption of the switch tube based on the total heat dissipated by the memory and the second heat dissipated by the capacitor.

[0049] In some embodiments, the method further includes: when the energy consumption of the power supply includes not only the total energy consumption of the memory but also the third heat dissipated inside the power supply, determining that the first heat dissipated by the capacitor is equal to the total stored energy of the capacitor when a high-level signal is written to the array area of ​​the memory through the power supply.

[0050] Here, the total storage energy of the capacitor refers to the energy stored in the capacitor when a high-level signal is written to the array area of ​​the memory through the power supply. The energy consumption of the power supply includes not only the total energy consumption of the memory, but also the third heat dissipated inside the power supply, which means that the energy consumption of the power supply is only used to do work for the memory and generate heat inside itself.

[0051] In the case where the energy consumption of the power supply includes the third heat dissipated inside the power supply in addition to the total energy consumption of the memory, the proof process that the first heat dissipated by the capacitor is equal to the total stored energy of the capacitor when a high-level signal is written to the array area of ​​the memory through the power supply is as follows:

[0052] When the power supply writes a high-level signal to the array area of ​​the memory, if the current approaches 0, the process is reversible, and the power supply does the maximum non-volume work on the memory, and we get:

[0053] ΔG = ΔH - TΔS = ZFE;

[0054] Among them, G is the Gibbs free energy. For an isothermal and isobaric equilibrium closed system, ΔG can measure the non-volume work output by the system, T is the temperature, S is the entropy, H is the enthalpy, Z is the amount of transferred electronic matter, E is the electromotive force, and F is the Faraday constant.

[0055] For the power supply, Q = ZF, and for the memory (the energy of the power supply mainly acts on the capacitor in the memory), Q = C*U, where C is the capacitor and U is the voltage across the capacitor. Since the process of the power supply writing a high-level signal to the array area of ​​the memory is a reversible process when the current approaches 0, the power supply does the maximum non-volume work on the memory, so Q = ZF = C*U, and thus ΔG = QE = C*U*E. Since U = E, ΔG = C*U 2 .

[0056] If the current does not approach 0 (the actual working condition of the memory), then ΔG < ZFE, that is, part of the energy consumed by the power supply will be dissipated in the form of irreversible heat. Because the current does not approach 0, the voltage stabilizing unit in the memory stabilizes the voltage of the capacitor written into the memory at a certain value, and the extra energy consumed is completely used to generate heat inside the power supply. Therefore, for the memory, regardless of the current size, the energy it obtains from the power supply is the same, which is C*U 2 .

[0057] According to the energy storage formula of capacitor: W = 1 / 2CU 2 It can be seen that the energy W stored in the capacitor is equal to the energy obtained from the power supply (C*U 2 ), that is, half of the energy obtained from the power supply is stored in the capacitor and the other half is dissipated. In other words, the energy W stored in the capacitor is equal to the heat dissipated by the capacitor.

[0058] Since the above conclusion is established under the condition that the energy consumption of the power supply is only used to do work for the memory and generate heat inside itself, therefore, when the energy consumption of the power supply includes not only the total energy consumption of the memory but also the third heat dissipated inside the power supply, it is determined that the first heat dissipated by the capacitor is equal to the total stored energy of the capacitor when a high-level signal is written to the array area of ​​the memory through the power supply.

[0059] Based on this, since the total heat dissipated by the memory includes the leakage energy consumption of the switching tube and the first heat dissipated by the capacitor, and according to the above, it is concluded that the first heat dissipated by the capacitor is equal to the total storage energy of the capacitor, and according to step S102, it is concluded that the total storage energy of the capacitor is equal to the second heat dissipated by the capacitor, therefore, the first heat dissipated by the capacitor is equal to the second heat dissipated by the capacitor, so the leakage energy consumption of the switching tube can be obtained by subtracting the second heat dissipated by the capacitor from the total heat dissipated by the memory.

[0060] In the embodiment of the present application, first, a high-level signal is written to the array area of ​​the memory through the power supply to obtain the total heat dissipated by the memory, wherein the total heat dissipated by the memory includes the leakage energy consumption of the switch tube and the first heat dissipated by the capacitor; then, in order to determine the size of the leakage energy consumption, the total storage energy of the capacitor is discharged to obtain the measured second heat dissipated by the capacitor, so that the second heat dissipated by the capacitor is equal to the first heat dissipated by the capacitor; finally, the leakage energy consumption of the switch tube is obtained by subtracting the second heat dissipated by the capacitor from the total heat dissipated by the memory. It can be seen that the embodiment of the present application realizes the determination of the leakage energy consumption by converting the first heat dissipated by the capacitor, which is not easy to obtain, into the second heat dissipated by the capacitor, which can be measured, which not only makes the operation and implementation more convenient, but also does not change the original structure of the memory.

[0061] In some embodiments, the implementation of step S101 “writing a high-level signal to the array area of ​​the memory through a power supply to obtain the total heat dissipated by the memory” may include the following steps S1011 to S1013:

[0062] Step S1011: in the process of writing a high level signal into the array area of ​​the memory through the power supply, obtaining a measured second temperature difference of the memory;

[0063] Here, the second temperature difference refers to the temperature difference of the memory measured when writing a high level signal to the array area of ​​the memory starts and ends through power supply.

[0064] Since the volume of the memory is usually small, the total heat dissipated by the memory can be determined by measuring the temperature difference of the memory.

[0065] In some embodiments, the implementation of step S1011 may include the following steps S111a to S111c:

[0066] Step S111a: when starting to write a high level signal to the array area of ​​the memory through the power supply, obtaining a measured fifth temperature of the memory;

[0067] Here, step S111a is implemented by measuring the temperature of the memory once when starting to write a high level signal to the array area of ​​the memory through the power supply, that is, before writing a high level signal to the array area of ​​the memory, and recording it as the fifth temperature.

[0068] Step S111b: when the high level signal is written into the array area of ​​the memory by the power supply, a sixth temperature of the memory is obtained;

[0069] Here, step S111b is implemented as measuring the temperature of the memory again after finishing writing the high level signal to the array area of ​​the memory through the power supply, ie, after writing the high level signal to the array area of ​​the memory, and recording it as the sixth temperature.

[0070] In some embodiments, the temperature of the memory can be measured by a temperature sensor. Here, the temperature sensor can be a temperature sensor integrated inside the memory, or a temperature sensor attached to the surface of the memory. During implementation, one temperature sensor can be used, or two or more temperature sensors can be used to improve the accuracy of the measurement. Since the temperature sensor can be built into the memory or attached to the surface of the memory, the temperature of the memory can be obtained without changing the original memory structure, simplifying the operation.

[0071] Step S111c: Determine a second temperature difference of the memory based on the fifth temperature of the memory and the sixth temperature of the memory.

[0072] Here, the implementation of step S111c may include subtracting the fifth temperature from the sixth temperature to obtain a second temperature difference of the memory.

[0073] In the embodiment of the present application, the fifth temperature and the sixth temperature of the memory are first measured respectively when the power starts and ends writing a high level signal to the array area of ​​the memory, and then the second temperature difference is determined by subtracting the fifth temperature from the sixth temperature.

[0074] Step S1012: Obtaining the specific heat capacity and mass of the memory material;

[0075] Here, the memory material refers to the materials of all parts in the memory, such as substrate, contact plug, dielectric layer, etc. The quality of the memory material is fixed when the memory is fixed, and can be obtained by measurement and the like.

[0076] Regarding the specific heat capacity of the memory material, in some embodiments, since the substrate in the memory occupies most of the memory, the specific heat capacity of the substrate material can be used as the specific heat capacity of the memory material. For example, in the case where the substrate material of the memory includes silicon material, the specific heat capacity of the memory material can be equivalent to the specific heat capacity of the silicon material. In this way, the difficulty of calculating the specific heat capacity of the memory material can be reduced and the calculation method can be simplified.

[0077] Step S1013: Determine the total heat dissipated by the memory based on the second temperature difference of the memory, the specific heat capacity and the mass of the memory material.

[0078] Here, the implementation of step S1013 can obtain the total heat dissipated by the memory according to the heat calculation formula Q=CMΔT, where ΔT is the second temperature difference of the memory.

[0079] In an embodiment of the present application, first, in the process of writing a high-level signal to the array area of ​​the memory through a power supply, the second temperature difference of the memory is measured; then the specific heat capacity and mass of the memory material are obtained, and finally the total heat dissipated by the memory is determined by using a heat calculation formula.

[0080] In some embodiments, the implementation of step S102 “discharging the total stored energy of the capacitor and obtaining the measured second heat dissipated by the capacitor” may include the following steps S1021 to S1023:

[0081] Step S1021: obtaining a measured first temperature difference of the memory during the process of discharging the total stored energy of the capacitor;

[0082] Here, the first temperature difference refers to the temperature difference of the memory measured at the beginning and end of the discharge of the total stored energy of the capacitor. Since the total stored energy of the capacitor will be dissipated to the environment in the form of heat during the discharge of the total stored energy of the capacitor, the second heat dissipated by the capacitor can be obtained by determining the first temperature difference of the memory during the discharge of the total stored energy of the capacitor. Since the total stored energy of the capacitor will be completely discharged when the memory is in a power-off state or a standby state (and no refresh operation is performed), the total stored energy of the capacitor can be discharged by the power-off state or the standby state (and no refresh operation is performed) of the memory. Correspondingly, the implementation of step S1021 can include the following two methods.

[0083] The first method: the implementation of step S1021 may include the following steps S121a to S124a:

[0084] Step S121a: after writing a high level signal to the array area of ​​the memory through the power supply, changing the state of the array area to a power-off state;

[0085] Here, the power-off state refers to the Power Down state, at which the power supply stops supplying power to the memory. Step S121a is used to completely discharge the energy stored in the capacitor during the implementation of step S101, at which point the energy stored in the capacitor (ie, the total stored energy of the capacitor) will all be dissipated to the environment in the form of heat.

[0086] Step S122a: when the state of the array area is changed to the power-off state, obtaining a measured first temperature of the memory;

[0087] Here, since the total stored energy of the capacitor is dissipated to the environment in the form of heat after the state of the array area is changed to the power-off state in step S121a, in order to measure the amount of heat dissipated to the environment and obtain the second amount of heat dissipated by the capacitor, it is necessary to determine the temperature difference of the memory before and after the total stored energy of the capacitor is dissipated to the environment in the form of heat. Step S122a is used to determine the temperature of the memory before the total stored energy of the capacitor is dissipated to the environment in the form of heat, which is recorded as the first temperature.

[0088] Step S123a: when the charge in the capacitor is completely discharged, obtaining a measured second temperature of the memory;

[0089] Here, step S123a is used to determine the temperature of the memory after the total stored energy of the capacitor is dissipated to the environment in the form of heat, which is recorded as the second temperature.

[0090] Step S124a: Determine a first temperature difference of the memory based on the first temperature of the memory and the second temperature of the memory.

[0091] Here, the implementation of step S124a may include subtracting the first temperature from the second temperature to obtain a first temperature difference of the memory.

[0092] In the embodiment of the present application, the total storage energy of the capacitor is discharged by changing the state of the array area to the power-off state, and then the temperature of the memory is measured respectively when the state of the array area is changed to the power-off state and when the charge in the capacitor is completely discharged. Based on the respectively measured temperatures of the memory, the first temperature difference of the memory is determined.

[0093] The second method: the implementation of step S1021 may include the following steps S121b to S124b:

[0094] Step S121b: after writing a high level signal to the array area of ​​the memory through the power supply, changing the state of the array area to a standby state, and turning off the refresh function;

[0095] Here, the standby state is the Idle state, and turning off the refresh function means that after the charge in the capacitor is discharged, the capacitor is not refreshed. Step S121b is used to completely discharge the energy stored in the capacitor during the implementation of step S101. At this time, the energy stored in the capacitor (that is, the total stored energy of the capacitor) will be completely dissipated to the environment in the form of heat.

[0096] Step S122b: when the state of the array area is changed to the standby state and the refresh function is turned off, obtaining a measured third temperature of the memory;

[0097] Here, since step S121b changes the state of the array area to the standby state and turns off the refresh function, the total stored energy of the capacitor is dissipated to the environment in the form of heat. In order to measure the amount of heat dissipated to the environment and obtain the second amount of heat dissipated by the capacitor, it is necessary to determine the temperature difference of the memory before and after the total stored energy of the capacitor is dissipated to the environment in the form of heat. Step S122b is used to determine the temperature of the memory before the total stored energy of the capacitor is dissipated to the environment in the form of heat, which is recorded as the third temperature.

[0098] Step S123b: when the charge in the capacitor is completely discharged, obtaining a measured fourth temperature of the memory;

[0099] Here, step S123b is used to determine the temperature of the memory after the total stored energy of the capacitor is dissipated to the environment in the form of heat, which is recorded as the fourth temperature.

[0100] Step S124b: Determine a first temperature difference of the memory based on the third temperature of the memory and the fourth temperature of the memory.

[0101] Here, the implementation of step S124b may include subtracting the third temperature from the fourth temperature to obtain a first temperature difference of the memory.

[0102] In an embodiment of the present application, the total storage energy of the capacitor is discharged by changing the state of the array area to a standby state and turning off the refresh function. Then, when the state of the array area is changed to a standby state and the refresh function is turned off and when the charge in the capacitor is completely discharged, the temperature of the memory is measured respectively. Based on the respectively measured temperatures of the memory, the first temperature difference of the memory is determined.

[0103] Step S1022: Obtaining the specific heat capacity and mass of the memory material;

[0104] Here, the implementation of step S1022 may refer to step S1012.

[0105] Step S1023: Determine a second amount of heat dissipated by the capacitor based on the first temperature difference of the memory, the specific heat capacity and the mass of the memory material.

[0106] Here, the implementation of step S1023 can obtain the second heat dissipated by the capacitor according to the heat calculation formula Q=CMΔT, where ΔT is the first temperature difference.

[0107] In an embodiment of the present application, first, in the process of discharging the total stored energy of the capacitor, the first temperature difference of the measured memory is obtained, then the specific heat capacity and mass of the memory material are obtained, and finally the heat calculation formula is used to determine the second heat dissipated by the capacitor.

[0108] The present application also provides a method for determining leakage energy consumption, such as Figure 2A As shown, the method includes the following steps S201 to S204:

[0109] Step S201: when a high level signal is written to an array area of ​​a memory through a power supply, the total energy consumption of the memory is determined, where the total energy consumption of the memory includes the total storage energy of the capacitor, the leakage energy consumption of the switch tube, and the first heat dissipated by the capacitor;

[0110] Here, the total storage energy of the capacitor includes the storage energy of the storage capacitor and the storage energy of the equivalent capacitor. The first heat dissipated by the capacitor includes the heat dissipated by the storage capacitor and the heat dissipated by the equivalent capacitor. Figure 2B It is a schematic diagram of the total energy consumption of the memory in the operating state, such as Figure 2B As shown, the total energy consumption 20 of the memory (writing a high-level signal to the array area is the operating state) includes the stored energy 201 of the storage capacitor, the stored energy 202 of the equivalent capacitor, the leakage energy consumption 203 of the switch tube, the heat 205 dissipated by the storage capacitor, and the heat 204 dissipated by the equivalent capacitor. Among them, the leakage energy consumption 203 of the switch tube, the heat 205 dissipated by the storage capacitor, and the heat 204 dissipated by the equivalent capacitor in the operating state are released to the environment in the form of heat, which are all useless energy consumption. The stored energy 201 of the storage capacitor and the stored energy 202 of the equivalent capacitor are the energy consumption under data logic operation. The stored energy 201 of the storage capacitor and the stored energy 202 of the equivalent capacitor will discharge the charge and generate heat in the power-off state.

[0111] The total energy consumption of the memory can be calculated using Joule's law. Alternatively, when the internal resistance of the power supply is small, the energy consumption of the power supply can be determined as the energy consumption of the memory. By determining the energy consumption of the power supply, the energy consumption of the memory can be obtained.

[0112] Step S202: when the energy consumption of the power supply includes the third heat dissipated inside the power supply in addition to the total energy consumption of the memory, determining that the first heat dissipated by the capacitor is equal to the total stored energy of the capacitor when a high level signal is written to the array area of ​​the memory through the power supply;

[0113] Step S203: discharging the total stored energy of the capacitor, obtaining a measured second heat dissipated by the capacitor, and determining the second heat dissipated by the capacitor as the total stored energy of the capacitor;

[0114] Step S204: determining the leakage energy consumption of the switch tube based on the total energy consumption of the memory and the second heat dissipated by the capacitor.

[0115] Here, since the total energy consumption of the memory includes the total storage energy of the capacitor, the leakage energy consumption of the switch tube and the first heat dissipated by the capacitor, and according to step S202, it is obtained that the first heat dissipated by the capacitor is equal to the total storage energy of the capacitor, and according to step S203, it is obtained that the total storage energy of the capacitor is equal to the second heat dissipated by the capacitor, therefore, the total storage energy of the capacitor and the first heat dissipated by the capacitor are both equal to the second heat dissipated by the capacitor. Therefore, the implementation of step S204 can include the total energy consumption of the memory minus twice the second heat dissipated by the capacitor to obtain the leakage energy consumption of the switch tube.

[0116] In the embodiment of the present application, firstly, when a high-level signal is written to the array area of ​​the memory by the power supply, the total energy consumption of the memory is determined, wherein the total energy consumption of the memory includes the total storage energy of the capacitor, the leakage energy consumption of the switch tube and the first heat dissipated by the capacitor; then, in order to determine the size of the leakage energy consumption, the first step is to convert the first heat dissipated by the capacitor into the total storage energy of the capacitor when the high-level signal is written to the array area of ​​the memory by the power supply; the second step is to obtain the measured second heat dissipated by the capacitor in the process of discharging the total storage energy of the capacitor, and convert the total storage energy of the capacitor into the second heat dissipated by the capacitor that can be measured, so that the total storage energy of the capacitor and the first heat dissipated by the capacitor are equal to the second heat dissipated by the capacitor, and finally the leakage energy consumption of the switch tube is determined by subtracting 2 times the second heat dissipated by the capacitor from the total energy consumption of the memory. It can be seen that the embodiment of the present application converts the first heat dissipated by the capacitor and the total storage energy of the capacitor, which are not easy to obtain, into the second heat dissipated by the capacitor that can be measured, through two-step conversion, to achieve the determination of the leakage energy consumption, which not only makes the operation and implementation more convenient, but also does not change the original structure of the memory.

[0117] In some embodiments, the implementation of step S201 “determining the total energy consumption of the memory when writing a high level signal to the array area of ​​the memory through the power supply” may include the following steps S2011a to S2014a:

[0118] Step S2011a: obtaining a relationship diagram between current, voltage and time of the memory;

[0119] Here, the implementation of step S2011a can collect the values ​​of the memory current and voltage at a certain sampling interval, thereby obtaining a relationship diagram between the memory current, voltage and time. The sampling interval can be determined according to the test accuracy. For example, if the energy consumption value needs to be accurately calculated, the sampling interval can be smaller; if the energy consumption value needs to be roughly calculated, that is, the accuracy requirement is not high, the sampling interval can be larger. The embodiment of the present application does not limit the sampling interval.

[0120] Step S2012a: determining a time period for writing a high level signal to the array area of ​​the memory through a power supply;

[0121] Here, the time period includes a start time and an end time, and step S2012a is used to determine the start time and the end time of writing a high level signal to the array area of ​​the memory through the power supply. The duration can also be determined by subtracting the start time of the time period from the end time of the time period.

[0122] Step S2013a: Based on the time period, determining in the relationship diagram the current value and the voltage value of the memory during the process of writing a high level signal to the array area of ​​the memory through a power supply;

[0123] Here, the implementation of step S2013a may include: determining the start time and the end time through the time period; then finding the positions of the start time and the end time in the relationship diagram, and the current value and voltage value corresponding to the curve between the start time and the end time in the relationship diagram are the current value and voltage value of the memory during the process of writing a high-level signal to the array area of ​​the memory through a power supply.

[0124] Step S2014a: Determine the total energy consumption of the memory based on the time period, the current value and the voltage value.

[0125] Here, step S2014a can be implemented according to Joule's law: Q=IUΔt to obtain the total energy consumption of the memory, where I is the current value, U is the voltage value, and Δt is the duration, which can be obtained through the time period.

[0126] In an embodiment of the present application, a relationship diagram between the current, voltage and time of the memory is first obtained; then the time period for writing a high-level signal to the array area of ​​the memory through the power supply is determined; finally, based on the time period, current value and voltage value, the total energy consumption of the memory is determined by Joule's law.

[0127] In some embodiments, the implementation of step S201 “determining the total energy consumption of the memory when writing a high level signal to the array area of ​​the memory through the power supply” may include the following steps S2011b and S2012b:

[0128] Step S2011b: when the third heat dissipated inside the power supply is less than a preset threshold, when a high level signal is written to the array area of ​​the memory through the power supply, determining the energy consumption of the power supply;

[0129] Here, the preset threshold value may be determined according to the total energy consumption of the memory, and the setting standard may be: the preset threshold value is smaller than the total energy consumption of the memory, so that when the third heat dissipated inside the power supply is smaller than the preset threshold value, the third heat dissipated inside the power supply may be ignored. During implementation, if the total energy consumption of the memory is larger, the preset threshold value may also be larger; if the total energy consumption of the memory is smaller, the preset threshold value may also be smaller.

[0130] In some embodiments, the power supply may be a mobile power supply with a relatively small internal resistance, and the energy consumption of the power supply may be obtained by detecting the power supply value of the mobile power supply. The embodiment of the present application does not limit the method for determining the energy consumption of the power supply.

[0131] Step S2012b: Determine the energy consumption of the power supply as the total energy consumption of the memory.

[0132] Here, since the third heat dissipated inside the power supply is less than the preset threshold, the energy dissipated inside the power supply in the energy consumption of the power supply can be ignored. At this time, the energy consumption of the power supply can be used as the total energy consumption of the memory. Therefore, when the energy consumption of the power supply is easy to obtain, the method of obtaining the total energy consumption of the memory can be simplified, making the operation more convenient.

[0133] In some embodiments, the implementation of step S2011b "determining the energy consumption of the power supply when a high level signal is written to the array area of ​​the memory through the power supply when the third heat dissipated inside the power supply is less than a preset threshold value" may include the following steps S2b1 and S2b2:

[0134] Step S2b1: when a first operation set is executed N times on the array area of ​​the memory by a power supply, the total energy consumption of the power supply is determined, the first operation set comprising the following operations executed in sequence: writing a high level signal to the array area, discharging the total stored energy of the capacitor, and N is an integer greater than or equal to 1;

[0135] Here, the first operation set includes writing a high-level signal to the array area and discharging the total stored energy of the capacitor, that is, first writing a high-level signal to the array area, and then discharging the energy stored in the capacitor. The energy consumed by one operation set is the energy consumption of the power supply when writing a high-level signal to the array area of ​​the memory through the power supply. The implementation of step S2b1 is to perform the first operation set N times to the array area of ​​the memory through the power supply, and the energy consumption of the power supply at this time is N times the energy consumption of the power supply when writing a high-level signal to the array area of ​​the memory through the power supply. The reason for this operation is that by performing the operation of writing a high-level signal to the array area through the power supply for multiple times, the accuracy of the power supply energy consumption when writing a high-level signal to the array area through the power supply is improved, and the acquisition of the power supply energy consumption is convenient.

[0136] In the case where the power supply has its own power detection function, the implementation of step S2b1 "determining the total energy consumption of the power supply when the power supply performs N first operation sets on the array area of ​​the memory" may include:

[0137] Step S211: in the process of executing the first operation set N times, obtaining the percentage of the power consumption;

[0138] Here, the percentage of power consumption is the ratio of power consumption to total power. The implementation of step S211 may include: first obtaining the percentage of power before executing the first set of operations N times; then obtaining the percentage of power after executing the first set of operations N times; the difference between the two percentages is the percentage of power consumption.

[0139] Step S212: Determine the total energy consumption of the power supply based on the acquired capacity of the power supply and the percentage of power consumption of the power supply.

[0140] Here, the capacity of the power supply refers to the total amount of work that the power supply can do, and the unit can be watt-hour Wh. Usually, the capacity of the power supply will be marked on the product when the power supply leaves the factory. The implementation of step S212 can be to multiply the capacity of the power supply by the percentage of the power consumption of the power supply, and the total energy consumption of the power supply can be obtained. In this way, the total energy consumption of the power supply can be obtained quickly and conveniently.

[0141] Step S2b2: Based on the total energy consumption of the power supply, determine the energy consumption of the power supply when writing a high level signal to the array area of ​​the memory through the power supply.

[0142] Here, the implementation of step S2b2 may include dividing the total energy consumption of the power supply by N, and the result is the energy consumption of the power supply when writing a high level signal to the array area of ​​the memory through the power supply.

[0143] In the embodiment of the present application, the method for determining the power consumption when writing a high-level signal to the array area through the power supply is converted into: first determine the total power consumption when executing the first operation set N times, and then divide the total power consumption by N, so as to obtain the power consumption when writing a high-level signal to the array area through the power supply once. In this way, the accuracy of the power consumption can be improved, and the acquisition of the power consumption is convenient.

[0144] The present application also provides a method for determining leakage energy consumption, which is applied to DRAM. Figure 3A As shown, the method includes the following steps S301 to S306:

[0145] Step S301: writing data "0" into the array area of ​​DRAM through power supply;

[0146] Here, writing data "0" is used to clear the energy stored in the capacitor in the DRAM.

[0147] Step S302: writing data "1" into the array area of ​​the DRAM through the power supply;

[0148] That is, in step S101 , a high level signal is written into the array area of ​​the memory through the power supply.

[0149] Step S303: obtaining the heat generated Q1 of the DRAM (i.e., the total heat dissipated by the memory);

[0150] Step S304: Change the DRAM state to Power Down state;

[0151] Step S305: obtaining the heat Q2 generated by the DRAM (i.e., the second heat dissipated by the capacitor), and the cut-off time is when all the DRAM data is leaked;

[0152] Step S306: Determine the leakage power consumption in the DRAM operation state, wherein leakage power consumption = Q1 - Q2.

[0153] The present application also provides a method for determining leakage energy consumption, which is also applied to DRAM. Figure 3B As shown, the method includes the following steps S401 to S406:

[0154] Step S401: writing data "0" into the array area of ​​DRAM through power supply;

[0155] Step S402: writing data "1" into the array area of ​​the DRAM through the power supply;

[0156] Step S403: obtaining the heat generated Q1 of the DRAM (i.e., the total heat dissipated by the memory);

[0157] Step S404: Change the DRAM state to Idle state and disable the refresh function;

[0158] Step S405: obtaining the heat Q2 generated by the DRAM (i.e., the second heat dissipated by the capacitor), and the cut-off time is when all the DRAM data is leaked;

[0159] Step S406: Determine the leakage power consumption in the DRAM operation state, wherein leakage power consumption = Q1 - Q2.

[0160] The present application provides a semiconductor memory for executing the above-mentioned method for determining leakage energy consumption. In some embodiments, the semiconductor memory is a DRAM chip.

[0161] The features disclosed in several method or structural embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments or structural embodiments.

[0162] The description of the semiconductor structure embodiment above is similar to the description of the method embodiment above, and has similar beneficial effects as the method embodiment. For technical details not disclosed in the semiconductor structure embodiment of the present application, please refer to the description of the method embodiment of the present application for understanding.

[0163] The above description is merely an exemplary embodiment of the present application and is not intended to limit the scope of protection of the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A method for determining leakage energy consumption, characterized in that: include: Writing a high-level signal to the array area of ​​the memory through a power supply to obtain the total heat dissipated by the memory, the memory comprising a storage capacitor in the array area, and switch tubes in the array area and the peripheral area, the total heat dissipated by the memory comprising leakage energy consumption of the switch tube and a first heat dissipated by the capacitor, the capacitor comprising the storage capacitor and an equivalent capacitor of the switch tube; Discharging the total stored energy of the capacitor, obtaining a measured second amount of heat dissipated by the capacitor, and determining the second amount of heat dissipated by the capacitor as the total stored energy of the capacitor; Based on the total heat dissipated by the memory and the second heat dissipated by the capacitor, the leakage energy consumption of the switch tube is determined.

2. The determination method according to claim 1, characterized in that: Also includes: When the energy consumption of the power supply includes the third heat dissipated inside the power supply in addition to the total energy consumption of the memory, it is determined that the first heat dissipated by the capacitor is equal to the total stored energy of the capacitor when a high level signal is written to the array area of ​​the memory through the power supply.

3. The determination method according to claim 2, characterized in that: The method further comprises: When a high level signal is written to the array area of ​​the memory through a power supply, the total energy consumption of the memory is determined, and the total energy consumption of the memory includes the total storage energy of the capacitor, the leakage energy consumption of the switch tube, and the first heat dissipated by the capacitor; The leakage energy consumption of the switch tube is determined based on the total energy consumption of the memory and the second heat dissipated by the capacitor.

4. The determination method according to any one of claims 1 to 3, characterized in that: The discharging the total stored energy of the capacitor and obtaining a measured second heat dissipated by the capacitor includes: In the process of discharging the total stored energy of the capacitor, obtaining a measured first temperature difference of the memory; Obtaining the specific heat capacity and mass of the memory material; A second amount of heat dissipated by the capacitor is determined based on the first temperature difference of the memory, the specific heat capacity and the mass of the memory material.

5. The determination method according to claim 4, characterized in that: The step of obtaining a measured first temperature difference of the memory during the process of discharging the total stored energy of the capacitor includes: After writing a high level signal to the array area of ​​the memory through the power supply, changing the state of the array area to a power-off state; When the state of the array area is changed to a power-off state, obtaining a measured first temperature of the memory; When the charge in the capacitor is completely discharged, obtaining a measured second temperature of the memory; A first temperature difference of the memory is determined based on a first temperature of the memory and a second temperature of the memory.

6. The determination method according to claim 4, characterized in that: The step of obtaining a measured first temperature difference of the memory during the process of discharging the total stored energy of the capacitor includes: After a high level signal is written to the array area of ​​the memory through a power supply, the state of the array area is changed to a standby state, and a refresh function is turned off; When the state of the array area is changed to a standby state and a refresh function is turned off, obtaining a measured third temperature of the memory; When the charge in the capacitor is completely discharged, obtaining a measured fourth temperature of the memory; A first temperature difference of the memory is determined based on a third temperature of the memory and a fourth temperature of the memory.

7. The determination method according to any one of claims 1 to 3, 5 and 6, characterized in that: The method of writing a high level signal to the array area of ​​the memory through a power supply to obtain the total heat dissipated by the memory includes: In the process of writing a high level signal to the array area of ​​the memory through the power supply, obtaining a measured second temperature difference of the memory; Obtaining the specific heat capacity and mass of the memory material; A total amount of heat dissipated by the memory is determined based on the second temperature difference of the memory, the specific heat capacity and the mass of the memory material.

8. The determination method according to claim 7, characterized in that: The method of obtaining a measured second temperature difference of the memory during the process of writing a high level signal to the array area of ​​the memory by means of a power supply comprises: When starting to write a high level signal to the array area of ​​the memory through the power supply, obtaining a fifth temperature of the memory measured; When the high level signal is written to the array area of ​​the memory through the power supply, a sixth temperature of the memory is obtained; Based on the fifth temperature of the memory and the sixth temperature of the memory, a second temperature difference of the memory is determined.

9. The determination method according to claim 8, characterized in that: In the case where the substrate material of the memory includes a silicon material, the specific heat capacity of the memory material is equivalent to the specific heat capacity of the silicon material.

10. The determination method according to any one of claims 5, 6 and 8, characterized in that: The temperature of the storage device is measured by a temperature sensor.

11. The determination method according to claim 3, characterized in that: When writing a high level signal to the array area of ​​the memory through the power supply, determining the total energy consumption of the memory comprises: Obtaining a relationship diagram between current, voltage and time of the memory; Determining a time period for writing a high level signal to an array area of ​​the memory through a power supply; Based on the time period, determining in the relationship diagram a current value and a voltage value of the memory during a process of writing a high level signal to an array area of ​​the memory through a power supply; Based on the time period, the current value, and the voltage value, a total energy consumption of the memory is determined.

12. The determination method according to claim 3, characterized in that: When writing a high level signal to the array area of ​​the memory through the power supply, determining the total energy consumption of the memory comprises: When a third amount of heat dissipated inside the power supply is less than a preset threshold, when a high level signal is written to the array area of ​​the memory through the power supply, determining the energy consumption of the power supply; The energy consumption of the power supply is determined as the total energy consumption of the memory.

13. The determination method according to claim 12, characterized in that: When the third heat dissipated inside the power supply is less than a preset threshold, when a high level signal is written to the array area of ​​the memory through the power supply, determining the energy consumption of the power supply includes: When a first set of operations is performed N times on the array area of ​​the memory by a power supply, the total energy consumption of the power supply is determined, the first set of operations comprising the following operations performed in sequence: writing a high level signal to the array area, discharging the total stored energy of the capacitor, and N is an integer greater than or equal to 1; Based on the total energy consumption of the power supply, the energy consumption of the power supply when writing a high level signal to an array area of ​​a memory through the power supply is determined.

14. The determination method according to claim 13, characterized in that: The determining of the total energy consumption of the power supply when executing N first operation sets on the array area of ​​the memory through the power supply comprises: In the process of executing the first operation set N times, obtaining the percentage of power consumption of the power supply; The total energy consumption of the power supply is determined based on the acquired capacity of the power supply and the percentage of power consumption of the power supply.

15. The determination method according to any one of claims 1 to 3, 5, 6, 8, 11 to 14, characterized in that: The array area includes: all array regions of the memory or a sub-array region of the memory.

16. A semiconductor memory, characterized in that: Used to execute the determination method according to any one of claims 1 to 15.

17. The semiconductor memory according to claim 16, wherein: The semiconductor memory is a dynamic random access memory DRAM chip.

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