A headphone audio amplifier for eliminating phase noise

Abstract

The present invention relates to a headphone audio amplifier for eliminating phase noise. A phase processing module is provided to process the digital audio data sent from the audio source interface, align the phases of the Data input signal and the WCK input signal, and perform relative phase locking between the BCK input signal and the Data input signal; so that the valid edge of the latch clock is established after the data is stable, ensuring that the data is not affected by jitter and the discreteness of circuit delay. Further, a delay calculation module is connected to the amplification module to calculate the delay t generated by the audio data processed by the amplification module and the data input from the audio source interface, and send the delay t to the delay feedback module, which feeds back to the audio source interface, so that the video track is set to have a delay time of t compared to the audio track, to ensure that there is no perceivable delay after the video track and the audio track are played.

Description

Technical Field

[0001] The present invention relates to an audio amplifier, and particularly to a headphone audio amplifier for eliminating phase noise. Background Art

[0002] An audio amplifier is a device that reconstructs an input audio signal on an output element that generates sound, and the reconstructed signal should have an ideal, truthful, effective, and low-distortion volume and power level. The audio range is approximately 20 Hz to 20,000 Hz, so the amplifier must have a good frequency response within this range (smaller when driving a frequency-band-limited speaker, such as a woofer or tweeter).

[0003] During the transmission of digital audio signals, due to the discreteness of the distributed parameters of the circuit board, the discrete transmission delay of the gate circuits passed through in the transmission path, and severe phase noise and other factors, the clock signal and the relative phase are in a critical state or bit errors occur. The higher the sampling rate of the data, the greater the impact of the transmission path.

[0004] The device and method for encoding and decoding data and the system and method for processing signals with application number CN200910002105.X disclose a data encoding device that makes it impossible to copy any data while maintaining its original good quality without deteriorating the output quality of the data before the data is copied, thereby preventing illegal copying of, for example, analog image data. However, its phase processing method is not applicable to audio amplifiers. Summary of the Invention

[0005] In view of the above, to solve the above problems, a headphone audio amplifier for eliminating phase noise is provided, including an audio source interface, a phase processing module, an amplification module, an output interface module, a delay feedback module, a delay calculation module, and an audio source detection module;

[0006] The audio source interface is used to connect to an audio source, obtain digital audio data, and output it to the phase processing module;

[0007] The phase processing module processes the digital audio data sent by the audio source interface, aligns the phases of the Data input signal and the WCK input signal, and locks the relative phase of the BCK input signal and the Data input signal; then outputs the Data, WCK, and BCK signals to the amplification module;

[0008] The amplification module performs audio analog-to-digital conversion on the phase processing module and amplifies the signal, and sends the amplified analog signal to the output interface module; the output interface module is used to externally connect a speaker;

[0009] The delay calculation module is connected to the amplification module, calculates the delay t generated by the audio data processed by the amplification module and the input data of the audio source interface, and sends the delay t to the delay feedback module, which feeds it back to the audio source interface through the delay feedback module.

[0010] The phase processing module includes a relative phase measurer, a phase detector, a loop filter, a high-frequency VCO, a synchronous frequency divider, and an I2S clock and data phase rearrangement module;

[0011] Data is input to the I2S clock and data phase rearrangement module; the I2S clock and data phase rearrangement module outputs the rearranged BCK, WCK, and Data three-way data;

[0012] The BCK and WCK of the audio source are input to the relative phase measurer and the I2S clock and data phase rearrangement module. At the same time, one branch of the WCK is input to the phase detector, the output of the phase detector is input to the loop filter, the output of the loop filter is input to the high-frequency VCO, the output of the high-frequency VCO is input to the synchronous frequency divider and the relative phase measurer, and the output of the synchronous frequency divider is input to the phase detector; thus, the phase detector, the loop filter, the high-frequency VCO, and the synchronous frequency divider form a loop phase-locked frequency synthesizer, generating a high-multiple frequency clock signal for phase quantization measurement, and its clock is synchronized with the WCK;

[0013] The relative phase measurer takes the rising edge of the WCK as the standard, tests the relative phase of the WCK and the BCK, and sends the quantized phase error value to the I2S clock and data phase rearrangement module to achieve the relative rearrangement of the clock and data phases.

[0014] Taking the rising edge of the BCK clock signal as the establishment reference of the latch signal, when arranging the phase, the BCK clock signal is aligned with the center of the rising edge and the falling edge of the Data signal; making the effective edge of the latch clock established after the data is stable to ensure that the data will not be affected by jitter and the discreteness of the circuit delay.

[0015] The high-frequency VCO is set to 16 times the BCK frequency.

[0016] The audio source detection module is connected to the audio source interface to obtain the file type of the data source of the audio source interface; the file type of the data source is divided into video file type and audio file type;

[0017] When the file type of the data source is the video file type, the audio source detection module sends a control signal to the delay feedback module to make the delay feedback module start, and feeds back the delay t obtained by the delay calculation module to the audio source through the audio source interface; when the audio source device plays the corresponding video file, the video track is set to be delayed by time t compared to the audio track to ensure that there is no perceivable delay after the video track and the audio track are played;

[0018] When the file type of the data source is an audio file, the audio source detection module sends a control signal to the delay feedback module, causing the delay feedback module to turn off and not feedback the delay t obtained by the delay calculation module to the audio source through the audio source interface.

[0019] The delay calculation module obtains two sets of data. One set comes from the relative phase of the test WCK and BCK in the phase processing module, and the quantized phase error value t1 is used as the first set of data; the other set comes from the amplification module, and the sampling frequency and bit rate of the audio data obtained by the amplification module are used as the second set of data.

[0020] The delay calculation module inputs the sampling frequency and bit rate into the matching table stored in the delay calculation module. The matching table stores the delay t2 generated by the audio data with different sampling frequencies and bit rates in the amplification module.

[0021] The delay calculation module calculates t = k·t1 + t2, and sends t as the delay obtained by the delay calculation module to the delay feedback module.

[0022] Where k is a coefficient associated with the sampling frequency, bit rate, and processing performance of the phase processing module.

[0023] The method for obtaining the coefficient k is to connect a delay test device before and after the phase processing module to detect the delay generated by the data processing before and after the phase processing module; input audio data with different sampling frequencies and bit rates into phase processing modules with different processing performances, and obtain the phase error value t1 output by the phase processing module and the actual delay generated by the phase processing module; then, through the obtained data, inversely deduce the coefficient k corresponding to different sampling frequencies, bit rates, and the processing performance of the phase processing module.

[0024] The method for obtaining the matching table stored in the delay calculation module is to connect a delay test device before and after the amplification module to detect the delay generated by the data processing before and after the amplification module; input audio data with different sampling frequencies and bit rates into the amplification module, obtain the actual delay generated by the amplification module, and then match the delay t2 generated by the audio data with different sampling frequencies and bit rates in the amplification module to obtain the matching table stored in the delay calculation module.

[0025] The beneficial effects of the present invention are as follows:

[0026] The present invention provides a phase processing module, which processes the digital audio data sent from the audio source interface, aligns the phases of the Data input signal and the WCK input signal, and locks the relative phase of the BCK input signal and the Data input signal; enables the valid edge of the latch clock to be established after the data is stable, ensuring that the data is not affected by jitter and the discreteness of circuit delay.

[0027] A delay calculation module is further set to be connected to the amplification module, and the delay t generated by the audio data processed by the amplification module and the input data of the audio source interface is calculated. The delay t is sent to the delay feedback module and fed back to the audio source interface through the delay feedback module, so that the video track is set to have a delay time of t compared to the audio track, ensuring that there is no perceivable delay after the video track and the audio track are played.

[0028] In the calculation of obtaining the delay t, the sampling frequency and the bit rate are input into the matching table stored in the delay calculation module. The delay calculation of the audio data with different sampling frequencies and bit rates stored in the matching table in the amplification module is more accurate and the experience is better. Brief Description of the Drawings

[0029] The drawings, which are included to provide a further understanding of the disclosed subject matter, are incorporated in and constitute a part of this specification. The drawings illustrate implementations of the disclosed subject matter and, together with the detailed description, are used to explain the principles of implementation of the disclosed subject matter. No attempt is made to show structural details of the disclosed subject matter beyond what is necessary for a fundamental understanding of the disclosed subject matter and its various practiced aspects.

[0030] Figure 1 It is the overall architecture diagram of the present invention;

[0031] Figure 2 It is the schematic structural diagram of the phase processing module of the present invention;

[0032] Figure 3 It is the input / output diagram of the phase processing module of the present invention. Detailed Description of the Invention

[0033] The advantages, features, and the methods for achieving the above objects of the present invention will become clear through the accompanying drawings and the subsequent detailed description.

[0034] Embodiment 1:

[0035] Combined with Figures 1-3 , a headphone audio amplifier for eliminating phase noise includes an audio source interface, a phase processing module, an amplification module, an output interface module, a delay feedback module, a delay calculation module, and an audio source detection module;

[0036] The audio source interface is used to connect to the audio source, obtain digital audio data, and output it to the phase processing module;

[0037] The phase processing module processes the digital audio data sent by the audio source interface, aligns the phases of the Data input signal and the WCK input signal, and locks the relative phase of the BCK input signal and the Data input signal; then outputs the Data, WCK, and BCK signals to the amplification module;

[0038] The amplification module performs audio analog-to-digital conversion on the phase processing module, amplifies the signal, and sends the amplified analog signal to the output interface module; the output interface module is used to connect an external speaker.

[0039] The delay calculation module is connected to the amplification module, calculates the delay t generated by the audio data processed by the amplification module and the input data of the audio source interface, sends the delay t to the delay feedback module, and feeds it back to the audio source interface through the delay feedback module.

[0040] The phase processing module includes a relative phase measurer 5, a phase discriminator 1, a loop filter 2, a high-frequency VCO 3, a synchronous frequency divider 4, and an I2S clock and data phase rearrangement module 6;

[0041] Data is input to the I2S clock and data phase rearrangement module 6; the I2S clock and data phase rearrangement module 6 outputs three re-arranged data streams of BCK, WCK, and Data;

[0042] The BCK and WCK of the audio source are input to the relative phase measurer 5 and the I2S clock and data phase rearrangement module 6. At the same time, one branch of WCK is input to the phase discriminator 1. The phase discriminator 1 outputs to the loop filter 2. The loop filter 2 outputs to the high-frequency VCO 3. The high-frequency VCO 3 outputs to the synchronous frequency divider 4 and the relative phase measurer 5. The synchronous frequency divider 4 outputs to the phase discriminator 1; thus, the phase discriminator 1, the loop filter 2, the high-frequency VCO 3, and the synchronous frequency divider 4 form a loop phase-locked frequency synthesizer, generating a high-multiple frequency clock signal for phase quantization measurement, and its clock is synchronized with WCK;

[0043] The relative phase measurer 5 uses the rising edge of WCK as a standard to measure the relative phase of WCK and BCK, and sends the quantized phase error value to the I2S clock and data phase rearrangement module 6 to achieve relative rearrangement of the clock and data phases.

[0044] Taking the rising edge of the BCK clock signal as the establishment reference of the latch signal, when arranging the phase, the BCK clock signal is aligned with the center of the rising and falling edges of the Data signal; the effective edge of the latch clock is established after the data is stable, ensuring that the data is not affected by jitter and circuit delay dispersion.

[0045] The high-frequency VCO 3 is set to 16 times the BCK frequency.

[0046] The audio source detection module is connected to the audio source interface to obtain the file type of the data source of the audio source interface; the file type of the data source is divided into video file types and audio file types;

[0047] When the file type of the data source is a video file, the audio source detection module sends a control signal to the delay feedback module, causing the delay feedback module to start, and feeding back the delay t obtained by the delay calculation module to the audio source through the audio source interface; when the audio source device plays the corresponding video file, the video track is set to be delayed by t compared to the audio track to ensure that there is no perceivable delay after the video track and the audio track are played;

[0048] When the file type of the data source is an audio file, the audio source detection module sends a control signal to the delay feedback module, causing the delay feedback module to close, and not feeding back the delay t obtained by the delay calculation module to the audio source through the audio source interface.

[0049] The delay calculation module obtains two sets of data. One set comes from testing the relative phase of WCK and BCK in the phase processing module, and uses the quantized phase error value t1 as the first set of data; the other set comes from the amplification module, and uses the sampling frequency and bit rate of the audio data obtained by the amplification module as the second set of data;

[0050] The delay calculation module inputs the sampling frequency and bit rate into the matching table stored in the delay calculation module. The matching table stores the delay t2 generated by the audio data with different sampling frequencies and bit rates in the amplification module;

[0051] The delay calculation module calculates t = k·t1 + t2, and sends t as the delay obtained by the delay calculation module to the delay feedback module;

[0052] where k is a coefficient associated with the sampling frequency, bit rate, and the processing performance of the phase processing module.

[0053] The method for obtaining the coefficient k is as follows: Connect a delay test device before and after the phase processing module to detect the delay generated by the data processing before and after the phase processing module; input audio data with different sampling frequencies and bit rates into phase processing modules with different processing performances, and obtain the phase error value t1 output by the phase processing module and the actual delay generated by the phase processing module; then, use the obtained data to reverse-infer the coefficient k corresponding to different sampling frequencies, bit rates, and the processing performance of the phase processing module.

[0054] The method for obtaining the matching table stored in the delay calculation module is as follows: Connect a delay test device before and after the amplification module to detect the delay generated by the data processing before and after the amplification module; input audio data with different sampling frequencies and bit rates into the amplification module, and obtain the actual delay generated by the amplification module. Then, match the delay t2 generated by the audio data with different sampling frequencies and bit rates in the amplification module to obtain the matching table stored in the delay calculation module.

[0055] Embodiment 2:

[0056] This embodiment describes in detail the working mode of the above-mentioned device.

[0057] Abbreviation introduction:

[0058] BCK: Serial clock, also called bit clock. For each bit of digital audio data, there is a pulse for SCLK. WCK: Frame clock, used to switch the data of the left and right channels. Data: Serial data stream.

[0059] VCO refers to a voltage-controlled oscillator. A voltage-controlled oscillator is an oscillator circuit whose output frequency has a corresponding relationship with the input control voltage.

[0060] In use, the audio source interface is connected to the decoder, and the output interface module is connected to the headphones or speakers;

[0061] The BCK and WCK of the audio source are input to the relative phase measurer 5 and the I2S clock and data phase rearrangement module 6. At the same time, one branch of WCK is input to the phase detector 1. The phase detector 1 outputs to the loop filter 2, the loop filter 2 outputs to the high-frequency VCO 3, the high-frequency VCO 3 outputs to the synchronous frequency divider 4 and the relative phase measurer 5, and the synchronous frequency divider 4 outputs to the phase detector 1; thus, the phase detector 1, the loop filter 2, the high-frequency VCO 3, and the synchronous frequency divider 4 form a loop phase-locked frequency synthesizer, generating a high-multiple frequency clock signal for phase quantization measurement, and its clock is synchronized with WCK;

[0062] The relative phase measurer 5 takes the rising edge of WCK as the standard, measures the relative phase of WCK and BCK, and sends the quantized phase error value to the I2S clock and data phase rearrangement module 6 to achieve relative rearrangement of the clock and data phases.

[0063] Taking the rising edge of the BCK clock signal as the establishment reference of the latch signal, when arranging the phase, the BCK clock signal is aligned with the center of the rising and falling edges of the Data signal; making the effective edge of the latch clock established after the data is stable to ensure that the data will not be affected by jitter and the discreteness of circuit delay.

[0064] Specifically, when implementing, the phase error is obtained and compared with the time T between the rising and falling edges of Data. If the phase error is exactly equal to half of T, it can be directly output without rearrangement; if it is less than half of T, further delay is performed to make the phase error equal to half of T; if it is greater than half of T, backward delay is performed to make the phase error equal to 1.5×T.

[0065] The audio source detection module is connected to the audio source interface to obtain the file type of the data source of the audio source interface;

[0066] When the file type of the data source is a video file type, the audio source detection module sends a control signal to the delay feedback module, causing the delay feedback module to start, and feeding back the delay t obtained by the delay calculation module to the audio source through the audio source interface; when the audio source device plays the corresponding video file, the video track is set to be delayed by t compared to the audio track to ensure that there is no perceivable delay after the video track and the audio track are played.

[0067] As described above, it is only the preferred embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. An earphone audio amplifier for eliminating phase noise, characterized in that: It includes an audio source interface, a phase processing module, an amplification module, an output interface module, a delay feedback module, a delay calculation module, and an audio source detection module; The audio source interface is used to connect to an audio source, obtain digital audio data, and output it to the phase processing module; The phase processing module processes the digital audio data sent by the audio source interface, aligns the phases of the Data input signal and the WCK input signal, and locks the relative phase of the BCK input signal and the Data input signal; then it outputs the Data, WCK, and BCK signals to the amplification module; The amplification module performs audio analog-to-digital conversion on the phase processing module and amplifies the signal, and sends the amplified analog signal to the output interface module; The output interface module is used to externally connect a speaker; The delay calculation module is connected to the amplification module, calculates the delay t generated by the audio data processed by the amplification module and the data input by the audio source interface, sends the delay t to the delay feedback module, and feeds it back to the audio source interface through the delay feedback module; The delay calculation module obtains two sets of data. One set comes from measuring the relative phase of the test WCK and BCK in the phase processing module, and uses the quantified phase error value t1 as the first set of data; the other comes from the amplification module, and uses the sampling frequency and bit rate of the audio data obtained by the amplification module as the second set of data; The delay calculation module inputs the sampling frequency and bit rate into the matching table stored in the delay calculation module. The matching table stores the delay t2 generated by the audio data with different sampling frequencies and bit rates in the amplification module; The delay calculation module calculates t = k·t1 + t2, and sends t as the delay obtained by the delay calculation module to the delay feedback module; where k is a coefficient associated with the sampling frequency, bit rate, and processing performance of the phase processing module; The method for obtaining the coefficient k is as follows: Connect a delay test device before and after the phase processing module to detect the delay generated by the data processing before and after the phase processing module; input audio data with different sampling frequencies and bit rates into phase processing modules with different processing performances, and obtain the phase error value t1 output by the phase processing module and the actual delay generated by the phase processing module; then inversely deduce the coefficient k corresponding to different sampling frequencies, bit rates, and the processing performance of the phase processing module through the obtained data.

2. The headphone audio amplifier for eliminating phase noise according to claim 1, wherein: The phase processing module includes a relative phase measurer (5), a phase discriminator (1), a loop filter (2), a high-frequency VCO (3), a synchronous frequency divider (4), and an I2S clock and data phase rearrangement module (6); The Data is input into the I2S clock and data phase rearrangement module (6); the I2S clock and data phase rearrangement module (6) outputs the rearranged BCK, WCK, and Data three-way data; The BCK and WCK of the audio source are input to the relative phase measurer (5) and the I2S clock and data phase rearrangement module (6). Meanwhile, one branch of the WCK is input to the phase detector (1), the output of the phase detector (1) is input to the loop filter (2), the output of the loop filter (2) is input to the high-frequency VCO (3), the output of the high-frequency VCO (3) is input to the synchronous frequency divider (4) and the relative phase measurer (5), and the output of the synchronous frequency divider (4) is input to the phase detector (1); thus, the phase detector (1), the loop filter (2), the high-frequency VCO (3), and the synchronous frequency divider (4) form a loop phase-locked frequency synthesizer to generate a high-multiple frequency clock signal for phase quantization measurement, and its clock is synchronized with the WCK; The relative phase measurer (5) takes the rising edge of the WCK as the standard to measure the relative phase between the WCK and the BCK, and sends the quantized phase error value to the I2S clock and data phase rearrangement module (6) to realize the relative rearrangement of the clock and data phases.

3. The headphone audio amplifier for eliminating phase noise according to claim 2, wherein: Taking the rising edge of the BCK clock signal as the establishment reference of the latch signal, when arranging the phase, the BCK clock signal is aligned with the center of the rising edge and the falling edge of the Data signal; making the effective edge of the latch clock be established after the data is stable to ensure that the data will not be affected by jitter and the discreteness of circuit delay.

4. The headphone audio amplifier for eliminating phase noise according to claim 2, wherein: The high-frequency VCO (3) is set to 16 times the BCK frequency.

5. The headphone audio amplifier for eliminating phase noise according to claim 1, wherein: The audio source detection module is connected to the audio source interface to obtain the file type of the data source of the audio source interface; the file types of the data source are divided into video file types and audio file types; When the file type of the data source is a video file type, the audio source detection module sends a control signal to the delay feedback module to make the delay feedback module start, and feeds back the delay t obtained by the delay calculation module to the audio source through the audio source interface; when the audio source device plays the corresponding video file, the video track is set to be delayed by time t compared with the audio track to ensure that there is no perceptible delay after the video track and the audio track are played; When the file type of the data source is an audio file type, the audio source detection module sends a control signal to the delay feedback module to make the delay feedback module turn off, and does not feed back the delay t obtained by the delay calculation module to the audio source through the audio source interface.

6. The headphone audio amplifier for eliminating phase noise according to claim 5, wherein: The method for obtaining the matching table stored in the delay calculation module is as follows: connect a delay test device before and after the phase amplification module to detect the delay generated by the data processing before and after the amplification module; input audio data with different sampling frequencies and bit rates into the amplification module, obtain the actual delay generated by the output of the amplification module, and then match the delay t2 generated by the audio data with different sampling frequencies and bit rates in the amplification module to obtain the matching table stored in the delay calculation module.

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