A phase-adjustable headphone audio amplifier
By designing a phase-adjusted headphone audio amplifier, using phase processing and delay calculation modules, the problem of audio and video track delay is solved, synchronous playback of audio and video is realized, and the playback quality is improved.
Patent Information
- Application Number
- CN202211017094.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-23
- Publication Date
- 2025-07-01
- Estimated Expiration
- 2042-08-23
AI Technical Summary
Existing audio amplifiers have difficulty effectively eliminating delays between audio and video tracks, especially when streaming media, which leads to audio and video synchronization problems.
A phase-adjusted headphone audio amplifier is designed, including an input interface, a cache module, a phase processing module, a digital-to-analog conversion amplification module, an output interface, a delay calculation module, a delay feedback module and an input detection module. The phase processing module performs phase processing on the audio data, the delay calculation module calculates and feedbacks the delay in real time, and the cache module adjusts the playback time of the audio track according to the delay to eliminate the delay between the audio and video tracks.
It realizes the effect of no delay when playing audio and video, ensures synchronization of audio and video tracks, reduces the system processing burden, and improves the quality of audio and video playback.
Smart Images

Figure CN115426565B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an audio amplifier, and more particularly to a phase adjustment type headphone audio amplifier. Background Art
[0002] The power amplifier, abbreviated as PA, generally refers to a most basic device in an audio system, commonly known as an "amplifier". Its task is to amplify the weak electrical signals from a signal source (from a mixer in a professional audio system) to drive a speaker to emit sound. It can also refer to other devices for power amplification. The power amplifier includes a digital audio amplifier and an analog audio amplifier. During the transmission of digital audio signals, due to factors such as circuit boards, the clock signal and the relative phase are in a critical state or bit errors occur. The higher the sampling rate of the data, the greater the impact of the transmission path.
[0003] The patent application No. CN201110103993.1 discloses a stereo audio signal separation circuit and an audio device, including: a stereo clock generation module, a clock delay module, and an audio power amplifier module. The stereo audio signal separation circuit delays the stereo clock signal output from the stereo clock generation module received through the clock delay module, and outputs a clock delay signal. The audio power amplifier module modulates the stereo audio signal output from the audio signal generator according to the clock delay signal, thereby improving the separation degree of the stereo audio signal. However, its processing method is not suitable for video files. The current popularity of streaming media has led to higher and higher requirements for the delay of audio and video tracks, and an amplifier that can eliminate the delay of audio and video tracks is needed. Summary of the Invention
[0004] In view of the above, to solve the above problems, a phase adjustment type headphone audio amplifier is provided, including an input interface, a buffer module, a phase processing module, a digital-to-analog conversion and amplification module, an output interface, a delay calculation module, a delay feedback module, and an input detection module;
[0005] The input module is used to connect to the digital output interface of the decoder, obtain digital audio data, and send the data to the buffer module; the buffer module is connected to the input interface, obtains digital audio data from the input interface and caches it, and the cached digital audio data is sent to the phase processing module. The phase processing module performs phase processing on the digital audio data sent from the audio source interface, and locks the relative phase of the BCK input signal and the DATA input signal; then the Data, WCK, and BCK signals are output to the digital-to-analog conversion and amplification module;
[0006] The digital-to-analog conversion and amplification module performs audio analog-to-digital conversion and amplifies the signal before outputting;
[0007] The delay calculation module is connected to the input interface and the output interface, and is used to obtain the delay t generated between the input interface and the output interface;
[0008] The delay feedback module obtains the delay from the delay calculation module and sends the delay t to the buffer module.
[0009] The phase processing module includes a relative phase measurer, a phase discriminator, a loop filter, a high-frequency VCO, a synchronous frequency divider, and an I2S clock and data phase rearrangement module;
[0010] Data is input to the I2S clock and data phase rearrangement module; the I2S clock and data phase rearrangement module outputs three paths of data: rearranged BCK, WCK, and Data;
[0011] The BCK and WCK of the audio are input to the relative phase measurer and the I2S clock and data phase rearrangement module. At the same time, one branch of the WCK is input to the phase discriminator. The phase discriminator outputs to the loop filter, the loop filter outputs to the high-frequency VCO, the high-frequency VCO outputs to the synchronous frequency divider and the relative phase measurer, and the synchronous frequency divider outputs to the phase discriminator; thus, the phase discriminator, the loop filter, the high-frequency VCO, and the synchronous frequency divider form a loop phase-locked frequency synthesizer, generating a high-multiple frequency clock signal for phase quantization measurement, and its clock is synchronized with the WCK;
[0012] The relative phase measurer uses the rising edge of the WCK as a standard to measure the relative phase between the WCK and the BCK, and sends the quantized phase error value to the I2S clock and data phase rearrangement module to achieve relative rearrangement of the clock and data phases.
[0013] Taking the rising edge of the BCK clock signal as the establishment reference of the latch signal, when arranging the phase, the BCK clock signal is aligned with the center of the rising edge and the falling edge of the Data signal; making the effective edge of the latch clock established after the data is stable to ensure that the data will not be affected by jitter and the discreteness of circuit delay.
[0014] The high-frequency VCO is set to 16 times the BCK frequency.
[0015] After the buffer module obtains the digital audio data, it superimposes a marker code on the digital audio data. The marker code includes a timestamp. At the same time, after the marker code is converted by digital-to-analog conversion, it corresponds to a characteristic frequency; the marker code can be recognized and parsed by the delay calculation module to obtain the timestamp of the marker code;
[0016] After the marker code is sent to the phase processing module, it is output to the digital-to-analog conversion and amplification module, converted into an analog signal and sent to the output interface;
[0017] The delay calculation module obtains the characteristic frequency corresponding to the marker code from the output interface, calculates its time, and thus calculates the delay t1 of the marker code after passing through the phase processing module, being output to the digital-to-analog conversion and amplification module and then transmitted to the output interface;
[0018] The delay calculation module itself has a processing delay t2;
[0019] The delay calculation module calculates t = t1 + t2.
[0020] The input detection module is connected to the input interface and obtains the file type of the data source of the input interface; the file type of the data source is divided into video file types and audio file types;
[0021] When the file type of the data source is a video file type, the input detection module sends a control signal to the delay feedback module, causing the delay feedback module to start, and the delay t obtained by the delay calculation module is fed back to the buffer module in real time; the buffer module ensures that the audio track is ahead of the video track by time t when playing the video file, so as to ensure that there is no perceivable delay after the video track and the audio track are played; t is a variable, and the delay calculation module obtains t at fixed intervals;
[0022] When the file type of the data source is an audio file type, the audio source detection module sends a control signal to the delay feedback module, causing the delay feedback module to close and not feed back the delay t obtained by the delay calculation module, and the buffer module does not adjust the time of the audio track when there is no feedback from the delay module.
[0023] The caching duration of the buffer module for caching the audio track file is fixed at T, and the caching duration T is greater than t, that is, T is the advance time of the digital audio track sent by the decoder obtained by the buffer module in real time compared to the video track; t is the required advance time of the audio track compared to the video track; in actual playback, playing the audio track at the T - t moment in the cached file can ensure that there is no perceivable delay after the video track and the audio track are played.
[0024] The characteristic frequency corresponding to the marker code is above 200 kHz, which cannot be felt by the human ear and does not affect the human ear's hearing perception.
[0025] The beneficial effects of the present invention are:
[0026] The present invention first sets up a cache module, which can pre-fetch and pre-store audio files to provide guarantee for subsequent delay processing; sets up a delay calculation module to obtain the delay between the cache module and the output interface in real time, and feedback the delay to the cache module in real time, and adjusts the advance amount of the cache module according to the obtained delay, so as to ensure that there is no delay in playing audio and video tracks, and thus ensure that the delay generated in the processes such as phase processing and amplification processing is eliminated; further sets up an interface recognition module, which can recognize whether it is an audio file or a video file, so as to only eliminate the delay of the video file and the audio file does not need to be processed, reducing the processing burden of the system.
[0027] The present invention sets up a phase processing module, which processes the digital audio data sent by the audio source interface, aligns the phases of the Data input signal and the WCK input signal, and locks the relative phase of the BCK input signal and the Data input signal; makes the valid edge of the latch clock established after the data is stable, ensuring that the data will not be affected by jitter and the discreteness of circuit delay. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The drawings included to provide a further understanding of the disclosed subject matter are incorporated in and constitute a part of this specification. The drawings also illustrate the implementation of the disclosed subject matter and, together with the detailed description, are used to explain the implementation principles of the disclosed subject matter. No attempt is made to show more structural details than are necessary for a basic understanding of the disclosed subject matter and its various practiced aspects.
[0029] Figure 1 is the overall architecture diagram of the present invention;
[0030] Figure 2 is the structural schematic diagram of the phase processing module of the present invention;
[0031] Figure 3 is the input / output diagram of the phase processing module of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0032] The advantages, features and the methods for achieving the above object of the present invention will be made clear by the accompanying drawings and the subsequent detailed description.
[0033] INTRODUCTION OF ABBREVIATIONS:
[0034] BCK: Serial clock, also called bit clock, for each bit of digital audio data, there is a pulse for SCLK. WCK: Frame clock, used to switch the data of left and right channels, Data: Serial data stream.
[0035] VCO refers to voltage controlled oscillator. A voltage controlled oscillator refers to an oscillator circuit whose output frequency has a corresponding relationship with the input control voltage.
[0036] Embodiment 1:
[0037] Combination Figures 1 - 3 , a phase adjustment type headphone audio amplifier, comprising an input interface, a buffer module, a phase processing module, a digital-to-analog conversion and amplification module, an output interface, a delay calculation module, a delay feedback module and an input detection module;
[0038] The input module is used to connect to the digital output interface of the decoder, obtain digital audio data, and send the data to the buffer module; the buffer module is connected to the input interface, obtains digital audio data from the input interface and caches it, and the cached digital audio data is sent to the phase processing module. The phase processing module performs phase processing on the digital audio data sent from the audio source interface, and performs relative phase locking on the BCK input signal and the DATA input signal; then outputs the Data, WCK and BCK signals to the digital-to-analog conversion and amplification module;
[0039] The digital-to-analog conversion and amplification module performs audio analog-to-digital conversion and amplifies the signal before outputting;
[0040] The delay calculation module is connected to the input interface and the output interface, and is used to obtain the delay t generated between the input interface and the output interface;
[0041] The delay feedback module obtains the delay from the delay calculation module and sends the delay t to the buffer module.
[0042] The phase processing module includes a relative phase measurer 5, a phase discriminator 1, a loop filter 2, a high-frequency VCO 3, a synchronous frequency divider 4 and an I2S clock and data phase rearrangement module 6;
[0043] The Data data is input to the I2S clock and data phase rearrangement module 6; the I2S clock and data phase rearrangement module 6 outputs the rearranged BCK, WCK and Data three-way data;
[0044] The BCK and WCK of the audio source are input to the relative phase measurer 5 and the I2S clock and data phase rearrangement module 6. At the same time, one branch of the WCK is input to the phase discriminator 1. The phase discriminator 1 outputs to the loop filter 2. The loop filter 2 outputs to the high-frequency VCO 3. The high-frequency VCO 3 outputs to the synchronous frequency divider 4 and the relative phase measurer 5. The synchronous frequency divider 4 outputs to the phase discriminator 1; thus, the phase discriminator 1, the loop filter 2, the high-frequency VCO 3, and the synchronous frequency divider 4 form a loop phase-locked frequency synthesizer, generating a high-multiple frequency clock signal for phase quantization measurement, and its clock is synchronized with the WCK;
[0045] The relative phase measurer 5 takes the rising edge of the WCK as the standard, tests the relative phase of the WCK and the BCK, and sends the quantized phase error value to the I2S clock and data phase rearrangement module 6 to realize the relative rearrangement of the clock and data phases.
[0046] Use the rising edge of the BCK clock signal as the establishment reference for the latch signal. When arranging the phase, align the BCK clock signal with the center of the rising edge and falling edge of the Data signal; ensure that the valid edge of the latch clock is established after the data is stable, ensuring that the data is not affected by jitter and the dispersion of circuit delay.
[0047] The high-frequency VCO3 is set to 16 times the BCK frequency.
[0048] After the cache module obtains the digital audio data, it superimposes a marker code on the digital audio data. The marker code includes a timestamp, and at the same time, after the marker code is converted from digital to analog, it corresponds to a characteristic frequency; the marker code can be recognized and parsed by the delay calculation module, so as to obtain the timestamp of the marker code.
[0049] After the marker code is sent to the phase processing module, it is output to the digital-to-analog conversion and amplification module, converted into an analog signal and sent to the output interface.
[0050] The delay calculation module obtains the characteristic frequency corresponding to the marker code from the output interface and calculates its time, so as to calculate the delay t1 of the marker code from being output to the digital-to-analog conversion and amplification module after passing through the phase processing module and then being transmitted to the output interface.
[0051] The delay calculation module itself has a processing delay t2.
[0052] The delay calculation module calculates t = t1 + t2.
[0053] The input detection module is connected to the input interface to obtain the file type of the data source of the input interface; the file type of the data source is divided into video file types and audio file types.
[0054] When the file type of the data source is a video file type, the input detection module sends a control signal to the delay feedback module to start the delay feedback module, and feeds back the delay t obtained by the delay calculation module to the cache module in real time; the cache module ensures that the audio track is ahead of the video track by time t when playing the video file, so as to ensure that there is no perceivable delay after the video track and the audio track are played; t is a variable, and the delay calculation module obtains t at fixed intervals.
[0055] When the file type of the data source is an audio file type, the audio source detection module sends a control signal to the delay feedback module to turn off the delay feedback module and does not feed back the delay t obtained by the delay calculation module. The cache module does not adjust the time of the audio track when there is no feedback from the delay module.
[0056] The caching duration for the audio track file cached by the caching module is fixed at T, and the caching duration T is greater than t. That is, T is the advance time of the digital audio track sent by the decoder obtained in real time by the caching module compared to the video track; t is the required advance time of the audio track compared to the video track. When actually playing, playing the audio track at the T - t moment in the cached file can ensure that there is no perceivable delay after the video track and the audio track are played.
[0057] The characteristic frequency corresponding to the marker code is above 200 kHz, which cannot be felt by the human ear and does not affect the human ear's sense of hearing.
[0058] Embodiment 2: This embodiment describes in detail the working mode of the above - mentioned device.
[0059] When in use, the input interface is connected to the decoder, and the output interface module is connected to the earphone or the speaker;
[0060] The caching module is connected to the input interface, obtains digital audio data from the input interface and caches it. The cached digital audio data is sent to the phase - processing module. The phase - processing module performs phase processing on the digital audio data sent from the audio source interface, and locks the relative phase of the BCK input signal and the DATA input signal; then the Data, WCK, and BCK signals are output to the digital - to - analog conversion and amplification module;
[0061] In the phase - processing module, the BCK and WCK of the input audio are input to the relative phase measurer 5 and the I2S clock and data phase rearrangement module 6. At the same time, one branch of the WCK is input to the phase - discriminator 1. The phase - discriminator 1 outputs to the loop filter 2. The loop filter 2 outputs to the high - frequency VCO 3. The high - frequency VCO 3 outputs to the synchronous frequency divider 4 and the relative phase measurer 5. The synchronous frequency divider 4 outputs to the phase - discriminator 1; thus, the phase - discriminator 1, the loop filter 2, the high - frequency VCO 3, and the synchronous frequency divider 4 form a loop - locked phase - frequency synthesizer, generating a high - multiple - frequency clock signal for phase quantization measurement, and its clock is synchronized with the WCK;
[0062] The relative phase measurer 5 uses the rising edge of the WCK as a standard to measure the relative phase of the WCK and the BCK, and sends the quantized phase error value to the I2S clock and data phase rearrangement module 6 to achieve relative rearrangement of the clock and data phases.
[0063] In another path, after the caching module obtains the digital audio data, a marker code is superimposed on the digital audio data. The marker code includes a time stamp, and at the same time, the marker code corresponds to a characteristic frequency after being digitally - to - analog - converted; the marker code can be recognized and parsed by the delay calculation module to obtain the time stamp of the marker code;
[0064] After the marker code is sent to the phase - processing module, it is output to the digital - to - analog conversion and amplification module, converted into an analog signal and sent to the output interface;
[0065] The delay calculation module obtains the characteristic frequency corresponding to the marker code from the output interface and calculates its time, so as to calculate the delay t1 of the marker code output from the phase processing module to the digital-to-analog conversion and amplification module and then transmitted to the output interface;
[0066] The delay calculation module itself has a processing delay t2;
[0067] The delay calculation module calculates t = t1 + t2.
[0068] When the file type of the data source is a video file type, the input detection module sends a control signal to the delay feedback module to start the delay feedback module, and the delay t obtained by the delay calculation module is fed back to the buffer module in real time; the buffer module ensures that the audio track is ahead of the video track by time t when the video file is played, so as to ensure that there is no perceivable delay after the video track and the audio track are played.
[0069] Where t is a variable, and the delay calculation module obtains t at fixed time intervals.
[0070] The above is only the preferred embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims
1. A phase-adjustable headphone audio amplifier, comprising an input interface, a buffer module, a phase processing module, a digital-to-analog conversion and amplification module, an output interface, a delay calculation module, a delay feedback module, and an input detection module; characterized in that: The input module is used to connect to the digital output interface of the decoder, obtain digital audio data, and send the data to the buffer module; the buffer module is connected to the input interface, obtains digital audio data from the input interface and caches it, and the cached digital audio data is sent to the phase processing module. The phase processing module performs phase processing on the digital audio data sent from the audio source interface, and performs relative phase locking on the BCK input signal and the DATA input signal; then outputs the Data, WCK, and BCK signals to the digital-to-analog conversion and amplification module. The digital-to-analog conversion and amplification module performs audio analog-to-digital conversion and amplifies the signal before outputting. The delay calculation module is connected to the input interface and the output interface, and is used to obtain the delay t generated between the input interface and the output interface. The delay feedback module obtains the delay from the delay calculation module and sends the delay t to the buffer module. The input detection module is connected to the input interface and obtains the file type of the data source of the input interface; the file type of the data source is divided into video file types and audio file types. When the file type is a video file type, the input detection module sends a control signal to the delay feedback module to start the delay feedback module, and feeds back the delay t obtained by the delay calculation module to the buffer module in real time; the buffer module ensures that the audio track is ahead of the video track by time t when playing the video file. t is a variable, and the delay calculation module obtains t at fixed intervals; when the file type is an audio file type, the input detection module sends a control signal to the delay feedback module to turn off the delay feedback module, and does not feed back the delay t obtained by the delay calculation module. The buffer module does not adjust the time of the audio track when there is no feedback from the delay module.
2. The phase-adjustable headphone audio amplifier according to claim 1, characterized in that: The phase processing module includes a relative phase measurer (5), a phase discriminator (1), a loop filter (2), a high-frequency VCO (3), a synchronous frequency divider (4), and an I2S clock and data phase rearrangement module (6); The Data data is input to the I2S clock and data phase rearrangement module (6); the I2S clock and data phase rearrangement module (6) outputs the rearranged BCK, WCK, and Data three-way data. The audio BCK and WCK are input to the relative phase measurer (5) and the I2S clock and data phase rearrangement module (6). At the same time, one branch of the WCK is input to the phase discriminator (1), the phase discriminator (1) outputs to the loop filter (2), the loop filter (2) outputs to the high-frequency VCO (3), the high-frequency VCO (3) outputs to the synchronous frequency divider (4) and the relative phase measurer (5), and the synchronous frequency divider (4) outputs to the phase discriminator (1); thus, the phase discriminator (1), the loop filter (2), the high-frequency VCO (3), and the synchronous frequency divider (4) form a loop phase-locked frequency synthesizer, generating a high-multiple frequency clock signal for phase quantization measurement, and its clock is synchronized with the WCK. The relative phase measurer (5) takes the rising edge of WCK as the standard to measure the relative phase between WCK and BCK, and sends the quantized phase error value to the I2S clock and data phase rearrangement module (6) to achieve relative rearrangement of the clock and data phases.
3. The phase-adjustable headphone audio amplifier according to claim 2, characterized in that: Taking the rising edge of the BCK clock signal as the establishment reference of the latch signal, when arranging the phase, the BCK clock signal is aligned with the center of the rising edge and the falling edge of the Data signal; making the effective edge of the latch clock established after the data is stable to ensure that the data will not be affected by jitter and the discreteness of circuit delay.
4. The phase-adjustable headphone audio amplifier according to claim 2, characterized in that: The high-frequency VCO (3) is set to 16 times the BCK frequency.
5. The phase-adjustable headphone audio amplifier according to claim 1, characterized in that: After the cache module obtains the digital audio data, a marker code is superimposed on the digital audio data. The marker code includes a time stamp, and at the same time, after the marker code is converted from digital to analog, it corresponds to a characteristic frequency; The marker code can be recognized and parsed by the delay calculation module to obtain the time stamp of the marker code; The marker code is sent to the phase processing module and then output to the digital-to-analog conversion and amplification module, converted into an analog signal and sent to the output interface; The delay calculation module obtains the characteristic frequency corresponding to the marker code from the output interface and calculates its time, so as to calculate the delay t1 of the marker code after passing through the phase processing module and then being output to the digital-to-analog conversion and amplification module and transmitted to the output interface; The delay calculation module itself has a processing delay t2; The delay calculation module calculates t = t1 + t2.
6. The phase-adjustable headphone audio amplifier according to claim 1, characterized in that: The cache duration of the cache module for caching the audio track file is fixed at T, and the cache duration T is greater than t, that is, T is the advance time of the decoder sending the digital audio track compared to the video track obtained by the cache module in real time; t is the required advance time of the audio track compared to the video track; when actually playing, playing the audio track at the T - t moment in the cache file can ensure that there is no perceivable delay after the video track and the audio track are played.
7. The phase-adjustable headphone audio amplifier according to claim 5, characterized in that: The characteristic frequency corresponding to the marker code is above 200 kHz, which cannot be felt by the human ear and does not affect the human ear's sense of hearing.
Citation Information
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